2 bool "Mailbox Hardware Support"
4 Mailbox is a framework to control hardware communication between
5 on-chip processors through queued messages and interrupt driven
6 signals. Say Y if your platform supports hardware mailboxes.
11 tristate "ARM MHU Mailbox"
14 Say Y here if you want to build the ARM MHU controller driver.
15 The controller has 3 mailbox channels, the last of which can be
16 used in Secure mode only.
19 bool "ARM PL320 Mailbox"
22 An implementation of the ARM PL320 Interprocessor Communication
23 Mailbox (IPCM), tailored for the Calxeda Highbank. It is used to
24 send short messages between Highbank's A9 cores and the EnergyCore
25 Management Engine, primarily for cpufreq. Say Y here if you want
26 to use the PL320 IPCM support.
29 tristate "OMAP2+ Mailbox framework support"
30 depends on ARCH_OMAP2PLUS
32 Mailbox implementation for OMAP family chips with hardware for
33 interprocessor communication involving DSP, IVA1.0 and IVA2 in
34 OMAP2/3; or IPU, IVA HD and DSP in OMAP4/5. Say Y here if you
35 want to use OMAP2+ Mailbox framework support.
37 config OMAP_MBOX_KFIFO_SIZE
38 int "Mailbox kfifo default buffer size (bytes)"
39 depends on OMAP2PLUS_MBOX
42 Specify the default size of mailbox's kfifo buffers (bytes).
43 This can also be changed at runtime (via the mbox_kfifo_size
47 bool "Rockchip Soc Intergrated Mailbox Support"
48 depends on ARCH_ROCKCHIP || COMPILE_TEST
50 This driver provides support for inter-processor communication
51 between CPU cores and MCU processor on Some Rockchip SOCs.
52 Please check it that the Soc you use have Mailbox hardware.
53 Say Y here if you want to use the Rockchip Mailbox support.
56 bool "Platform Communication Channel Driver"
60 ACPI 5.0+ spec defines a generic mode of communication
61 between the OS and a platform such as the BMC. This medium
62 (PCC) is typically used by CPPC (ACPI CPU Performance management),
63 RAS (ACPI reliability protocol) and MPST (ACPI Memory power
64 states). Select this driver if your platform implements the
65 PCC clients mentioned above.
68 tristate "Altera Mailbox"
71 An implementation of the Altera Mailbox soft core. It is used
72 to send message between processors. Say Y here if you want to use the
73 Altera mailbox support.
76 tristate "BCM2835 Mailbox"
77 depends on ARCH_BCM2835
79 An implementation of the BCM2385 Mailbox. It is used to invoke
80 the services of the Videocore. Say Y here if you want to use the
84 tristate "STI Mailbox framework support"
85 depends on ARCH_STI && OF
87 Mailbox implementation for STMicroelectonics family chips with
88 hardware for interprocessor communication.
91 tristate "Hi6220 Mailbox"
94 An implementation of the hi6220 mailbox. It is used to send message
95 between application processors and MCU. Say Y here if you want to
96 build Hi6220 mailbox controller driver.
99 tristate "Mailbox Test Client"
103 Test client to help with testing new Controller driver
106 config XGENE_SLIMPRO_MBOX
107 tristate "APM SoC X-Gene SLIMpro Mailbox Controller"
108 depends on ARCH_XGENE
110 An implementation of the APM X-Gene Interprocessor Communication
111 Mailbox (IPCM) between the ARM 64-bit cores and SLIMpro controller.
112 It is used to send short messages between ARM64-bit cores and
113 the SLIMpro Management Engine, primarily for PM. Say Y here if you
114 want to use the APM X-Gene SLIMpro IPCM support.