Pull ec into release branch
[deliverable/linux.git] / drivers / media / dvb / pluto2 / pluto2.c
1 /*
2 * pluto2.c - Satelco Easywatch Mobile Terrestrial Receiver [DVB-T]
3 *
4 * Copyright (C) 2005 Andreas Oberritter <obi@linuxtv.org>
5 *
6 * based on pluto2.c 1.10 - http://instinct-wp8.no-ip.org/pluto/
7 * by Dany Salman <salmandany@yahoo.fr>
8 * Copyright (c) 2004 TDF
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 *
24 */
25
26 #include <linux/i2c.h>
27 #include <linux/i2c-algo-bit.h>
28 #include <linux/init.h>
29 #include <linux/kernel.h>
30 #include <linux/module.h>
31 #include <linux/pci.h>
32 #include <linux/dma-mapping.h>
33
34 #include "demux.h"
35 #include "dmxdev.h"
36 #include "dvb_demux.h"
37 #include "dvb_frontend.h"
38 #include "dvb_net.h"
39 #include "dvbdev.h"
40 #include "tda1004x.h"
41
42 #define DRIVER_NAME "pluto2"
43
44 #define REG_PIDn(n) ((n) << 2) /* PID n pattern registers */
45 #define REG_PCAR 0x0020 /* PC address register */
46 #define REG_TSCR 0x0024 /* TS ctrl & status */
47 #define REG_MISC 0x0028 /* miscellaneous */
48 #define REG_MMAC 0x002c /* MSB MAC address */
49 #define REG_IMAC 0x0030 /* ISB MAC address */
50 #define REG_LMAC 0x0034 /* LSB MAC address */
51 #define REG_SPID 0x0038 /* SPI data */
52 #define REG_SLCS 0x003c /* serial links ctrl/status */
53
54 #define PID0_NOFIL (0x0001 << 16)
55 #define PIDn_ENP (0x0001 << 15)
56 #define PID0_END (0x0001 << 14)
57 #define PID0_AFIL (0x0001 << 13)
58 #define PIDn_PID (0x1fff << 0)
59
60 #define TSCR_NBPACKETS (0x00ff << 24)
61 #define TSCR_DEM (0x0001 << 17)
62 #define TSCR_DE (0x0001 << 16)
63 #define TSCR_RSTN (0x0001 << 15)
64 #define TSCR_MSKO (0x0001 << 14)
65 #define TSCR_MSKA (0x0001 << 13)
66 #define TSCR_MSKL (0x0001 << 12)
67 #define TSCR_OVR (0x0001 << 11)
68 #define TSCR_AFUL (0x0001 << 10)
69 #define TSCR_LOCK (0x0001 << 9)
70 #define TSCR_IACK (0x0001 << 8)
71 #define TSCR_ADEF (0x007f << 0)
72
73 #define MISC_DVR (0x0fff << 4)
74 #define MISC_ALED (0x0001 << 3)
75 #define MISC_FRST (0x0001 << 2)
76 #define MISC_LED1 (0x0001 << 1)
77 #define MISC_LED0 (0x0001 << 0)
78
79 #define SPID_SPIDR (0x00ff << 0)
80
81 #define SLCS_SCL (0x0001 << 7)
82 #define SLCS_SDA (0x0001 << 6)
83 #define SLCS_CSN (0x0001 << 2)
84 #define SLCS_OVR (0x0001 << 1)
85 #define SLCS_SWC (0x0001 << 0)
86
87 #define TS_DMA_PACKETS (8)
88 #define TS_DMA_BYTES (188 * TS_DMA_PACKETS)
89
90 #define I2C_ADDR_TDA10046 0x10
91 #define I2C_ADDR_TUA6034 0xc2
92 #define NHWFILTERS 8
93
94 struct pluto {
95 /* pci */
96 struct pci_dev *pdev;
97 u8 __iomem *io_mem;
98
99 /* dvb */
100 struct dmx_frontend hw_frontend;
101 struct dmx_frontend mem_frontend;
102 struct dmxdev dmxdev;
103 struct dvb_adapter dvb_adapter;
104 struct dvb_demux demux;
105 struct dvb_frontend *fe;
106 struct dvb_net dvbnet;
107 unsigned int full_ts_users;
108 unsigned int users;
109
110 /* i2c */
111 struct i2c_algo_bit_data i2c_bit;
112 struct i2c_adapter i2c_adap;
113 unsigned int i2cbug;
114
115 /* irq */
116 unsigned int overflow;
117
118 /* dma */
119 dma_addr_t dma_addr;
120 u8 dma_buf[TS_DMA_BYTES];
121 u8 dummy[4096];
122 };
123
124 static inline struct pluto *feed_to_pluto(struct dvb_demux_feed *feed)
125 {
126 return container_of(feed->demux, struct pluto, demux);
127 }
128
129 static inline struct pluto *frontend_to_pluto(struct dvb_frontend *fe)
130 {
131 return container_of(fe->dvb, struct pluto, dvb_adapter);
132 }
133
134 static inline u32 pluto_readreg(struct pluto *pluto, u32 reg)
135 {
136 return readl(&pluto->io_mem[reg]);
137 }
138
139 static inline void pluto_writereg(struct pluto *pluto, u32 reg, u32 val)
140 {
141 writel(val, &pluto->io_mem[reg]);
142 }
143
144 static inline void pluto_rw(struct pluto *pluto, u32 reg, u32 mask, u32 bits)
145 {
146 u32 val = readl(&pluto->io_mem[reg]);
147 val &= ~mask;
148 val |= bits;
149 writel(val, &pluto->io_mem[reg]);
150 }
151
152 static void pluto_write_tscr(struct pluto *pluto, u32 val)
153 {
154 /* set the number of packets */
155 val &= ~TSCR_ADEF;
156 val |= TS_DMA_PACKETS / 2;
157
158 pluto_writereg(pluto, REG_TSCR, val);
159 }
160
161 static void pluto_setsda(void *data, int state)
162 {
163 struct pluto *pluto = data;
164
165 if (state)
166 pluto_rw(pluto, REG_SLCS, SLCS_SDA, SLCS_SDA);
167 else
168 pluto_rw(pluto, REG_SLCS, SLCS_SDA, 0);
169 }
170
171 static void pluto_setscl(void *data, int state)
172 {
173 struct pluto *pluto = data;
174
175 if (state)
176 pluto_rw(pluto, REG_SLCS, SLCS_SCL, SLCS_SCL);
177 else
178 pluto_rw(pluto, REG_SLCS, SLCS_SCL, 0);
179
180 /* try to detect i2c_inb() to workaround hardware bug:
181 * reset SDA to high after SCL has been set to low */
182 if ((state) && (pluto->i2cbug == 0)) {
183 pluto->i2cbug = 1;
184 } else {
185 if ((!state) && (pluto->i2cbug == 1))
186 pluto_setsda(pluto, 1);
187 pluto->i2cbug = 0;
188 }
189 }
190
191 static int pluto_getsda(void *data)
192 {
193 struct pluto *pluto = data;
194
195 return pluto_readreg(pluto, REG_SLCS) & SLCS_SDA;
196 }
197
198 static int pluto_getscl(void *data)
199 {
200 struct pluto *pluto = data;
201
202 return pluto_readreg(pluto, REG_SLCS) & SLCS_SCL;
203 }
204
205 static void pluto_reset_frontend(struct pluto *pluto, int reenable)
206 {
207 u32 val = pluto_readreg(pluto, REG_MISC);
208
209 if (val & MISC_FRST) {
210 val &= ~MISC_FRST;
211 pluto_writereg(pluto, REG_MISC, val);
212 }
213 if (reenable) {
214 val |= MISC_FRST;
215 pluto_writereg(pluto, REG_MISC, val);
216 }
217 }
218
219 static void pluto_reset_ts(struct pluto *pluto, int reenable)
220 {
221 u32 val = pluto_readreg(pluto, REG_TSCR);
222
223 if (val & TSCR_RSTN) {
224 val &= ~TSCR_RSTN;
225 pluto_write_tscr(pluto, val);
226 }
227 if (reenable) {
228 val |= TSCR_RSTN;
229 pluto_write_tscr(pluto, val);
230 }
231 }
232
233 static void pluto_set_dma_addr(struct pluto *pluto)
234 {
235 pluto_writereg(pluto, REG_PCAR, cpu_to_le32(pluto->dma_addr));
236 }
237
238 static int __devinit pluto_dma_map(struct pluto *pluto)
239 {
240 pluto->dma_addr = pci_map_single(pluto->pdev, pluto->dma_buf,
241 TS_DMA_BYTES, PCI_DMA_FROMDEVICE);
242
243 return pci_dma_mapping_error(pluto->dma_addr);
244 }
245
246 static void pluto_dma_unmap(struct pluto *pluto)
247 {
248 pci_unmap_single(pluto->pdev, pluto->dma_addr,
249 TS_DMA_BYTES, PCI_DMA_FROMDEVICE);
250 }
251
252 static int pluto_start_feed(struct dvb_demux_feed *f)
253 {
254 struct pluto *pluto = feed_to_pluto(f);
255
256 /* enable PID filtering */
257 if (pluto->users++ == 0)
258 pluto_rw(pluto, REG_PIDn(0), PID0_AFIL | PID0_NOFIL, 0);
259
260 if ((f->pid < 0x2000) && (f->index < NHWFILTERS))
261 pluto_rw(pluto, REG_PIDn(f->index), PIDn_ENP | PIDn_PID, PIDn_ENP | f->pid);
262 else if (pluto->full_ts_users++ == 0)
263 pluto_rw(pluto, REG_PIDn(0), PID0_NOFIL, PID0_NOFIL);
264
265 return 0;
266 }
267
268 static int pluto_stop_feed(struct dvb_demux_feed *f)
269 {
270 struct pluto *pluto = feed_to_pluto(f);
271
272 /* disable PID filtering */
273 if (--pluto->users == 0)
274 pluto_rw(pluto, REG_PIDn(0), PID0_AFIL, PID0_AFIL);
275
276 if ((f->pid < 0x2000) && (f->index < NHWFILTERS))
277 pluto_rw(pluto, REG_PIDn(f->index), PIDn_ENP | PIDn_PID, 0x1fff);
278 else if (--pluto->full_ts_users == 0)
279 pluto_rw(pluto, REG_PIDn(0), PID0_NOFIL, 0);
280
281 return 0;
282 }
283
284 static void pluto_dma_end(struct pluto *pluto, unsigned int nbpackets)
285 {
286 /* synchronize the DMA transfer with the CPU
287 * first so that we see updated contents. */
288 pci_dma_sync_single_for_cpu(pluto->pdev, pluto->dma_addr,
289 TS_DMA_BYTES, PCI_DMA_FROMDEVICE);
290
291 /* Workaround for broken hardware:
292 * [1] On startup NBPACKETS seems to contain an uninitialized value,
293 * but no packets have been transfered.
294 * [2] Sometimes (actually very often) NBPACKETS stays at zero
295 * although one packet has been transfered.
296 */
297 if ((nbpackets == 0) || (nbpackets > TS_DMA_PACKETS)) {
298 unsigned int i = 0;
299 while (pluto->dma_buf[i] == 0x47)
300 i += 188;
301 nbpackets = i / 188;
302 }
303
304 dvb_dmx_swfilter_packets(&pluto->demux, pluto->dma_buf, nbpackets);
305
306 /* clear the dma buffer. this is needed to be able to identify
307 * new valid ts packets above */
308 memset(pluto->dma_buf, 0, nbpackets * 188);
309
310 /* reset the dma address */
311 pluto_set_dma_addr(pluto);
312
313 /* sync the buffer and give it back to the card */
314 pci_dma_sync_single_for_device(pluto->pdev, pluto->dma_addr,
315 TS_DMA_BYTES, PCI_DMA_FROMDEVICE);
316 }
317
318 static irqreturn_t pluto_irq(int irq, void *dev_id)
319 {
320 struct pluto *pluto = dev_id;
321 u32 tscr;
322
323 /* check whether an interrupt occured on this device */
324 tscr = pluto_readreg(pluto, REG_TSCR);
325 if (!(tscr & (TSCR_DE | TSCR_OVR)))
326 return IRQ_NONE;
327
328 if (tscr == 0xffffffff) {
329 // FIXME: maybe recover somehow
330 dev_err(&pluto->pdev->dev, "card hung up :(\n");
331 return IRQ_HANDLED;
332 }
333
334 /* dma end interrupt */
335 if (tscr & TSCR_DE) {
336 pluto_dma_end(pluto, (tscr & TSCR_NBPACKETS) >> 24);
337 /* overflow interrupt */
338 if (tscr & TSCR_OVR)
339 pluto->overflow++;
340 if (pluto->overflow) {
341 dev_err(&pluto->pdev->dev, "overflow irq (%d)\n",
342 pluto->overflow);
343 pluto_reset_ts(pluto, 1);
344 pluto->overflow = 0;
345 }
346 } else if (tscr & TSCR_OVR) {
347 pluto->overflow++;
348 }
349
350 /* ACK the interrupt */
351 pluto_write_tscr(pluto, tscr | TSCR_IACK);
352
353 return IRQ_HANDLED;
354 }
355
356 static void __devinit pluto_enable_irqs(struct pluto *pluto)
357 {
358 u32 val = pluto_readreg(pluto, REG_TSCR);
359
360 /* disable AFUL and LOCK interrupts */
361 val |= (TSCR_MSKA | TSCR_MSKL);
362 /* enable DMA and OVERFLOW interrupts */
363 val &= ~(TSCR_DEM | TSCR_MSKO);
364 /* clear pending interrupts */
365 val |= TSCR_IACK;
366
367 pluto_write_tscr(pluto, val);
368 }
369
370 static void pluto_disable_irqs(struct pluto *pluto)
371 {
372 u32 val = pluto_readreg(pluto, REG_TSCR);
373
374 /* disable all interrupts */
375 val |= (TSCR_DEM | TSCR_MSKO | TSCR_MSKA | TSCR_MSKL);
376 /* clear pending interrupts */
377 val |= TSCR_IACK;
378
379 pluto_write_tscr(pluto, val);
380 }
381
382 static int __devinit pluto_hw_init(struct pluto *pluto)
383 {
384 pluto_reset_frontend(pluto, 1);
385
386 /* set automatic LED control by FPGA */
387 pluto_rw(pluto, REG_MISC, MISC_ALED, MISC_ALED);
388
389 /* set data endianess */
390 #ifdef __LITTLE_ENDIAN
391 pluto_rw(pluto, REG_PIDn(0), PID0_END, PID0_END);
392 #else
393 pluto_rw(pluto, REG_PIDn(0), PID0_END, 0);
394 #endif
395 /* map DMA and set address */
396 pluto_dma_map(pluto);
397 pluto_set_dma_addr(pluto);
398
399 /* enable interrupts */
400 pluto_enable_irqs(pluto);
401
402 /* reset TS logic */
403 pluto_reset_ts(pluto, 1);
404
405 return 0;
406 }
407
408 static void pluto_hw_exit(struct pluto *pluto)
409 {
410 /* disable interrupts */
411 pluto_disable_irqs(pluto);
412
413 pluto_reset_ts(pluto, 0);
414
415 /* LED: disable automatic control, enable yellow, disable green */
416 pluto_rw(pluto, REG_MISC, MISC_ALED | MISC_LED1 | MISC_LED0, MISC_LED1);
417
418 /* unmap DMA */
419 pluto_dma_unmap(pluto);
420
421 pluto_reset_frontend(pluto, 0);
422 }
423
424 static inline u32 divide(u32 numerator, u32 denominator)
425 {
426 if (denominator == 0)
427 return ~0;
428
429 return (numerator + denominator / 2) / denominator;
430 }
431
432 /* LG Innotek TDTE-E001P (Infineon TUA6034) */
433 static int lg_tdtpe001p_tuner_set_params(struct dvb_frontend *fe,
434 struct dvb_frontend_parameters *p)
435 {
436 struct pluto *pluto = frontend_to_pluto(fe);
437 struct i2c_msg msg;
438 int ret;
439 u8 buf[4];
440 u32 div;
441
442 // Fref = 166.667 Hz
443 // Fref * 3 = 500.000 Hz
444 // IF = 36166667
445 // IF / Fref = 217
446 //div = divide(p->frequency + 36166667, 166667);
447 div = divide(p->frequency * 3, 500000) + 217;
448 buf[0] = (div >> 8) & 0x7f;
449 buf[1] = (div >> 0) & 0xff;
450
451 if (p->frequency < 611000000)
452 buf[2] = 0xb4;
453 else if (p->frequency < 811000000)
454 buf[2] = 0xbc;
455 else
456 buf[2] = 0xf4;
457
458 // VHF: 174-230 MHz
459 // center: 350 MHz
460 // UHF: 470-862 MHz
461 if (p->frequency < 350000000)
462 buf[3] = 0x02;
463 else
464 buf[3] = 0x04;
465
466 if (p->u.ofdm.bandwidth == BANDWIDTH_8_MHZ)
467 buf[3] |= 0x08;
468
469 if (sizeof(buf) == 6) {
470 buf[4] = buf[2];
471 buf[4] &= ~0x1c;
472 buf[4] |= 0x18;
473
474 buf[5] = (0 << 7) | (2 << 4);
475 }
476
477 msg.addr = I2C_ADDR_TUA6034 >> 1;
478 msg.flags = 0;
479 msg.buf = buf;
480 msg.len = sizeof(buf);
481
482 if (fe->ops.i2c_gate_ctrl)
483 fe->ops.i2c_gate_ctrl(fe, 1);
484 ret = i2c_transfer(&pluto->i2c_adap, &msg, 1);
485 if (ret < 0)
486 return ret;
487 else if (ret == 0)
488 return -EREMOTEIO;
489
490 return 0;
491 }
492
493 static int pluto2_request_firmware(struct dvb_frontend *fe,
494 const struct firmware **fw, char *name)
495 {
496 struct pluto *pluto = frontend_to_pluto(fe);
497
498 return request_firmware(fw, name, &pluto->pdev->dev);
499 }
500
501 static struct tda1004x_config pluto2_fe_config __devinitdata = {
502 .demod_address = I2C_ADDR_TDA10046 >> 1,
503 .invert = 1,
504 .invert_oclk = 0,
505 .xtal_freq = TDA10046_XTAL_16M,
506 .agc_config = TDA10046_AGC_DEFAULT,
507 .if_freq = TDA10046_FREQ_3617,
508 .request_firmware = pluto2_request_firmware,
509 };
510
511 static int __devinit frontend_init(struct pluto *pluto)
512 {
513 int ret;
514
515 pluto->fe = tda10046_attach(&pluto2_fe_config, &pluto->i2c_adap);
516 if (!pluto->fe) {
517 dev_err(&pluto->pdev->dev, "could not attach frontend\n");
518 return -ENODEV;
519 }
520 pluto->fe->ops.tuner_ops.set_params = lg_tdtpe001p_tuner_set_params;
521
522 ret = dvb_register_frontend(&pluto->dvb_adapter, pluto->fe);
523 if (ret < 0) {
524 if (pluto->fe->ops.release)
525 pluto->fe->ops.release(pluto->fe);
526 return ret;
527 }
528
529 return 0;
530 }
531
532 static void __devinit pluto_read_rev(struct pluto *pluto)
533 {
534 u32 val = pluto_readreg(pluto, REG_MISC) & MISC_DVR;
535 dev_info(&pluto->pdev->dev, "board revision %d.%d\n",
536 (val >> 12) & 0x0f, (val >> 4) & 0xff);
537 }
538
539 static void __devinit pluto_read_mac(struct pluto *pluto, u8 *mac)
540 {
541 u32 val = pluto_readreg(pluto, REG_MMAC);
542 mac[0] = (val >> 8) & 0xff;
543 mac[1] = (val >> 0) & 0xff;
544
545 val = pluto_readreg(pluto, REG_IMAC);
546 mac[2] = (val >> 8) & 0xff;
547 mac[3] = (val >> 0) & 0xff;
548
549 val = pluto_readreg(pluto, REG_LMAC);
550 mac[4] = (val >> 8) & 0xff;
551 mac[5] = (val >> 0) & 0xff;
552
553 dev_info(&pluto->pdev->dev, "MAC %02x:%02x:%02x:%02x:%02x:%02x\n",
554 mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
555 }
556
557 static int __devinit pluto_read_serial(struct pluto *pluto)
558 {
559 struct pci_dev *pdev = pluto->pdev;
560 unsigned int i, j;
561 u8 __iomem *cis;
562
563 cis = pci_iomap(pdev, 1, 0);
564 if (!cis)
565 return -EIO;
566
567 dev_info(&pdev->dev, "S/N ");
568
569 for (i = 0xe0; i < 0x100; i += 4) {
570 u32 val = readl(&cis[i]);
571 for (j = 0; j < 32; j += 8) {
572 if ((val & 0xff) == 0xff)
573 goto out;
574 printk("%c", val & 0xff);
575 val >>= 8;
576 }
577 }
578 out:
579 printk("\n");
580 pci_iounmap(pdev, cis);
581
582 return 0;
583 }
584
585 static int __devinit pluto2_probe(struct pci_dev *pdev,
586 const struct pci_device_id *ent)
587 {
588 struct pluto *pluto;
589 struct dvb_adapter *dvb_adapter;
590 struct dvb_demux *dvbdemux;
591 struct dmx_demux *dmx;
592 int ret = -ENOMEM;
593
594 pluto = kzalloc(sizeof(struct pluto), GFP_KERNEL);
595 if (!pluto)
596 goto out;
597
598 pluto->pdev = pdev;
599
600 ret = pci_enable_device(pdev);
601 if (ret < 0)
602 goto err_kfree;
603
604 /* enable interrupts */
605 pci_write_config_dword(pdev, 0x6c, 0x8000);
606
607 ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
608 if (ret < 0)
609 goto err_pci_disable_device;
610
611 pci_set_master(pdev);
612
613 ret = pci_request_regions(pdev, DRIVER_NAME);
614 if (ret < 0)
615 goto err_pci_disable_device;
616
617 pluto->io_mem = pci_iomap(pdev, 0, 0x40);
618 if (!pluto->io_mem) {
619 ret = -EIO;
620 goto err_pci_release_regions;
621 }
622
623 pci_set_drvdata(pdev, pluto);
624
625 ret = request_irq(pdev->irq, pluto_irq, IRQF_SHARED, DRIVER_NAME, pluto);
626 if (ret < 0)
627 goto err_pci_iounmap;
628
629 ret = pluto_hw_init(pluto);
630 if (ret < 0)
631 goto err_free_irq;
632
633 /* i2c */
634 i2c_set_adapdata(&pluto->i2c_adap, pluto);
635 strcpy(pluto->i2c_adap.name, DRIVER_NAME);
636 pluto->i2c_adap.owner = THIS_MODULE;
637 pluto->i2c_adap.class = I2C_CLASS_TV_DIGITAL;
638 pluto->i2c_adap.dev.parent = &pdev->dev;
639 pluto->i2c_adap.algo_data = &pluto->i2c_bit;
640 pluto->i2c_bit.data = pluto;
641 pluto->i2c_bit.setsda = pluto_setsda;
642 pluto->i2c_bit.setscl = pluto_setscl;
643 pluto->i2c_bit.getsda = pluto_getsda;
644 pluto->i2c_bit.getscl = pluto_getscl;
645 pluto->i2c_bit.udelay = 10;
646 pluto->i2c_bit.timeout = 10;
647
648 /* Raise SCL and SDA */
649 pluto_setsda(pluto, 1);
650 pluto_setscl(pluto, 1);
651
652 ret = i2c_bit_add_bus(&pluto->i2c_adap);
653 if (ret < 0)
654 goto err_pluto_hw_exit;
655
656 /* dvb */
657 ret = dvb_register_adapter(&pluto->dvb_adapter, DRIVER_NAME, THIS_MODULE, &pdev->dev);
658 if (ret < 0)
659 goto err_i2c_del_adapter;
660
661 dvb_adapter = &pluto->dvb_adapter;
662
663 pluto_read_rev(pluto);
664 pluto_read_serial(pluto);
665 pluto_read_mac(pluto, dvb_adapter->proposed_mac);
666
667 dvbdemux = &pluto->demux;
668 dvbdemux->filternum = 256;
669 dvbdemux->feednum = 256;
670 dvbdemux->start_feed = pluto_start_feed;
671 dvbdemux->stop_feed = pluto_stop_feed;
672 dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
673 DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING);
674 ret = dvb_dmx_init(dvbdemux);
675 if (ret < 0)
676 goto err_dvb_unregister_adapter;
677
678 dmx = &dvbdemux->dmx;
679
680 pluto->hw_frontend.source = DMX_FRONTEND_0;
681 pluto->mem_frontend.source = DMX_MEMORY_FE;
682 pluto->dmxdev.filternum = NHWFILTERS;
683 pluto->dmxdev.demux = dmx;
684
685 ret = dvb_dmxdev_init(&pluto->dmxdev, dvb_adapter);
686 if (ret < 0)
687 goto err_dvb_dmx_release;
688
689 ret = dmx->add_frontend(dmx, &pluto->hw_frontend);
690 if (ret < 0)
691 goto err_dvb_dmxdev_release;
692
693 ret = dmx->add_frontend(dmx, &pluto->mem_frontend);
694 if (ret < 0)
695 goto err_remove_hw_frontend;
696
697 ret = dmx->connect_frontend(dmx, &pluto->hw_frontend);
698 if (ret < 0)
699 goto err_remove_mem_frontend;
700
701 ret = frontend_init(pluto);
702 if (ret < 0)
703 goto err_disconnect_frontend;
704
705 dvb_net_init(dvb_adapter, &pluto->dvbnet, dmx);
706 out:
707 return ret;
708
709 err_disconnect_frontend:
710 dmx->disconnect_frontend(dmx);
711 err_remove_mem_frontend:
712 dmx->remove_frontend(dmx, &pluto->mem_frontend);
713 err_remove_hw_frontend:
714 dmx->remove_frontend(dmx, &pluto->hw_frontend);
715 err_dvb_dmxdev_release:
716 dvb_dmxdev_release(&pluto->dmxdev);
717 err_dvb_dmx_release:
718 dvb_dmx_release(dvbdemux);
719 err_dvb_unregister_adapter:
720 dvb_unregister_adapter(dvb_adapter);
721 err_i2c_del_adapter:
722 i2c_del_adapter(&pluto->i2c_adap);
723 err_pluto_hw_exit:
724 pluto_hw_exit(pluto);
725 err_free_irq:
726 free_irq(pdev->irq, pluto);
727 err_pci_iounmap:
728 pci_iounmap(pdev, pluto->io_mem);
729 err_pci_release_regions:
730 pci_release_regions(pdev);
731 err_pci_disable_device:
732 pci_disable_device(pdev);
733 err_kfree:
734 pci_set_drvdata(pdev, NULL);
735 kfree(pluto);
736 goto out;
737 }
738
739 static void __devexit pluto2_remove(struct pci_dev *pdev)
740 {
741 struct pluto *pluto = pci_get_drvdata(pdev);
742 struct dvb_adapter *dvb_adapter = &pluto->dvb_adapter;
743 struct dvb_demux *dvbdemux = &pluto->demux;
744 struct dmx_demux *dmx = &dvbdemux->dmx;
745
746 dmx->close(dmx);
747 dvb_net_release(&pluto->dvbnet);
748 if (pluto->fe)
749 dvb_unregister_frontend(pluto->fe);
750
751 dmx->disconnect_frontend(dmx);
752 dmx->remove_frontend(dmx, &pluto->mem_frontend);
753 dmx->remove_frontend(dmx, &pluto->hw_frontend);
754 dvb_dmxdev_release(&pluto->dmxdev);
755 dvb_dmx_release(dvbdemux);
756 dvb_unregister_adapter(dvb_adapter);
757 i2c_del_adapter(&pluto->i2c_adap);
758 pluto_hw_exit(pluto);
759 free_irq(pdev->irq, pluto);
760 pci_iounmap(pdev, pluto->io_mem);
761 pci_release_regions(pdev);
762 pci_disable_device(pdev);
763 pci_set_drvdata(pdev, NULL);
764 kfree(pluto);
765 }
766
767 #ifndef PCI_VENDOR_ID_SCM
768 #define PCI_VENDOR_ID_SCM 0x0432
769 #endif
770 #ifndef PCI_DEVICE_ID_PLUTO2
771 #define PCI_DEVICE_ID_PLUTO2 0x0001
772 #endif
773
774 static struct pci_device_id pluto2_id_table[] __devinitdata = {
775 {
776 .vendor = PCI_VENDOR_ID_SCM,
777 .device = PCI_DEVICE_ID_PLUTO2,
778 .subvendor = PCI_ANY_ID,
779 .subdevice = PCI_ANY_ID,
780 }, {
781 /* empty */
782 },
783 };
784
785 MODULE_DEVICE_TABLE(pci, pluto2_id_table);
786
787 static struct pci_driver pluto2_driver = {
788 .name = DRIVER_NAME,
789 .id_table = pluto2_id_table,
790 .probe = pluto2_probe,
791 .remove = __devexit_p(pluto2_remove),
792 };
793
794 static int __init pluto2_init(void)
795 {
796 return pci_register_driver(&pluto2_driver);
797 }
798
799 static void __exit pluto2_exit(void)
800 {
801 pci_unregister_driver(&pluto2_driver);
802 }
803
804 module_init(pluto2_init);
805 module_exit(pluto2_exit);
806
807 MODULE_AUTHOR("Andreas Oberritter <obi@linuxtv.org>");
808 MODULE_DESCRIPTION("Pluto2 driver");
809 MODULE_LICENSE("GPL");
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