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[media] rtl2832: wrap DVBv5 CNR to DVBv3 SNR
[deliverable/linux.git] / drivers / media / dvb-frontends / rtl2832.c
1 /*
2 * Realtek RTL2832 DVB-T demodulator driver
3 *
4 * Copyright (C) 2012 Thomas Mair <thomas.mair86@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21 #include "rtl2832_priv.h"
22 #include "dvb_math.h"
23 #include <linux/bitops.h>
24
25 #define REG_MASK(b) (BIT(b + 1) - 1)
26
27 static const struct rtl2832_reg_entry registers[] = {
28 [DVBT_SOFT_RST] = {0x1, 0x1, 2, 2},
29 [DVBT_IIC_REPEAT] = {0x1, 0x1, 3, 3},
30 [DVBT_TR_WAIT_MIN_8K] = {0x1, 0x88, 11, 2},
31 [DVBT_RSD_BER_FAIL_VAL] = {0x1, 0x8f, 15, 0},
32 [DVBT_EN_BK_TRK] = {0x1, 0xa6, 7, 7},
33 [DVBT_AD_EN_REG] = {0x0, 0x8, 7, 7},
34 [DVBT_AD_EN_REG1] = {0x0, 0x8, 6, 6},
35 [DVBT_EN_BBIN] = {0x1, 0xb1, 0, 0},
36 [DVBT_MGD_THD0] = {0x1, 0x95, 7, 0},
37 [DVBT_MGD_THD1] = {0x1, 0x96, 7, 0},
38 [DVBT_MGD_THD2] = {0x1, 0x97, 7, 0},
39 [DVBT_MGD_THD3] = {0x1, 0x98, 7, 0},
40 [DVBT_MGD_THD4] = {0x1, 0x99, 7, 0},
41 [DVBT_MGD_THD5] = {0x1, 0x9a, 7, 0},
42 [DVBT_MGD_THD6] = {0x1, 0x9b, 7, 0},
43 [DVBT_MGD_THD7] = {0x1, 0x9c, 7, 0},
44 [DVBT_EN_CACQ_NOTCH] = {0x1, 0x61, 4, 4},
45 [DVBT_AD_AV_REF] = {0x0, 0x9, 6, 0},
46 [DVBT_REG_PI] = {0x0, 0xa, 2, 0},
47 [DVBT_PIP_ON] = {0x0, 0x21, 3, 3},
48 [DVBT_SCALE1_B92] = {0x2, 0x92, 7, 0},
49 [DVBT_SCALE1_B93] = {0x2, 0x93, 7, 0},
50 [DVBT_SCALE1_BA7] = {0x2, 0xa7, 7, 0},
51 [DVBT_SCALE1_BA9] = {0x2, 0xa9, 7, 0},
52 [DVBT_SCALE1_BAA] = {0x2, 0xaa, 7, 0},
53 [DVBT_SCALE1_BAB] = {0x2, 0xab, 7, 0},
54 [DVBT_SCALE1_BAC] = {0x2, 0xac, 7, 0},
55 [DVBT_SCALE1_BB0] = {0x2, 0xb0, 7, 0},
56 [DVBT_SCALE1_BB1] = {0x2, 0xb1, 7, 0},
57 [DVBT_KB_P1] = {0x1, 0x64, 3, 1},
58 [DVBT_KB_P2] = {0x1, 0x64, 6, 4},
59 [DVBT_KB_P3] = {0x1, 0x65, 2, 0},
60 [DVBT_OPT_ADC_IQ] = {0x0, 0x6, 5, 4},
61 [DVBT_AD_AVI] = {0x0, 0x9, 1, 0},
62 [DVBT_AD_AVQ] = {0x0, 0x9, 3, 2},
63 [DVBT_K1_CR_STEP12] = {0x2, 0xad, 9, 4},
64 [DVBT_TRK_KS_P2] = {0x1, 0x6f, 2, 0},
65 [DVBT_TRK_KS_I2] = {0x1, 0x70, 5, 3},
66 [DVBT_TR_THD_SET2] = {0x1, 0x72, 3, 0},
67 [DVBT_TRK_KC_P2] = {0x1, 0x73, 5, 3},
68 [DVBT_TRK_KC_I2] = {0x1, 0x75, 2, 0},
69 [DVBT_CR_THD_SET2] = {0x1, 0x76, 7, 6},
70 [DVBT_PSET_IFFREQ] = {0x1, 0x19, 21, 0},
71 [DVBT_SPEC_INV] = {0x1, 0x15, 0, 0},
72 [DVBT_RSAMP_RATIO] = {0x1, 0x9f, 27, 2},
73 [DVBT_CFREQ_OFF_RATIO] = {0x1, 0x9d, 23, 4},
74 [DVBT_FSM_STAGE] = {0x3, 0x51, 6, 3},
75 [DVBT_RX_CONSTEL] = {0x3, 0x3c, 3, 2},
76 [DVBT_RX_HIER] = {0x3, 0x3c, 6, 4},
77 [DVBT_RX_C_RATE_LP] = {0x3, 0x3d, 2, 0},
78 [DVBT_RX_C_RATE_HP] = {0x3, 0x3d, 5, 3},
79 [DVBT_GI_IDX] = {0x3, 0x51, 1, 0},
80 [DVBT_FFT_MODE_IDX] = {0x3, 0x51, 2, 2},
81 [DVBT_RSD_BER_EST] = {0x3, 0x4e, 15, 0},
82 [DVBT_CE_EST_EVM] = {0x4, 0xc, 15, 0},
83 [DVBT_RF_AGC_VAL] = {0x3, 0x5b, 13, 0},
84 [DVBT_IF_AGC_VAL] = {0x3, 0x59, 13, 0},
85 [DVBT_DAGC_VAL] = {0x3, 0x5, 7, 0},
86 [DVBT_SFREQ_OFF] = {0x3, 0x18, 13, 0},
87 [DVBT_CFREQ_OFF] = {0x3, 0x5f, 17, 0},
88 [DVBT_POLAR_RF_AGC] = {0x0, 0xe, 1, 1},
89 [DVBT_POLAR_IF_AGC] = {0x0, 0xe, 0, 0},
90 [DVBT_AAGC_HOLD] = {0x1, 0x4, 5, 5},
91 [DVBT_EN_RF_AGC] = {0x1, 0x4, 6, 6},
92 [DVBT_EN_IF_AGC] = {0x1, 0x4, 7, 7},
93 [DVBT_IF_AGC_MIN] = {0x1, 0x8, 7, 0},
94 [DVBT_IF_AGC_MAX] = {0x1, 0x9, 7, 0},
95 [DVBT_RF_AGC_MIN] = {0x1, 0xa, 7, 0},
96 [DVBT_RF_AGC_MAX] = {0x1, 0xb, 7, 0},
97 [DVBT_IF_AGC_MAN] = {0x1, 0xc, 6, 6},
98 [DVBT_IF_AGC_MAN_VAL] = {0x1, 0xc, 13, 0},
99 [DVBT_RF_AGC_MAN] = {0x1, 0xe, 6, 6},
100 [DVBT_RF_AGC_MAN_VAL] = {0x1, 0xe, 13, 0},
101 [DVBT_DAGC_TRG_VAL] = {0x1, 0x12, 7, 0},
102 [DVBT_AGC_TARG_VAL_0] = {0x1, 0x2, 0, 0},
103 [DVBT_AGC_TARG_VAL_8_1] = {0x1, 0x3, 7, 0},
104 [DVBT_AAGC_LOOP_GAIN] = {0x1, 0xc7, 5, 1},
105 [DVBT_LOOP_GAIN2_3_0] = {0x1, 0x4, 4, 1},
106 [DVBT_LOOP_GAIN2_4] = {0x1, 0x5, 7, 7},
107 [DVBT_LOOP_GAIN3] = {0x1, 0xc8, 4, 0},
108 [DVBT_VTOP1] = {0x1, 0x6, 5, 0},
109 [DVBT_VTOP2] = {0x1, 0xc9, 5, 0},
110 [DVBT_VTOP3] = {0x1, 0xca, 5, 0},
111 [DVBT_KRF1] = {0x1, 0xcb, 7, 0},
112 [DVBT_KRF2] = {0x1, 0x7, 7, 0},
113 [DVBT_KRF3] = {0x1, 0xcd, 7, 0},
114 [DVBT_KRF4] = {0x1, 0xce, 7, 0},
115 [DVBT_EN_GI_PGA] = {0x1, 0xe5, 0, 0},
116 [DVBT_THD_LOCK_UP] = {0x1, 0xd9, 8, 0},
117 [DVBT_THD_LOCK_DW] = {0x1, 0xdb, 8, 0},
118 [DVBT_THD_UP1] = {0x1, 0xdd, 7, 0},
119 [DVBT_THD_DW1] = {0x1, 0xde, 7, 0},
120 [DVBT_INTER_CNT_LEN] = {0x1, 0xd8, 3, 0},
121 [DVBT_GI_PGA_STATE] = {0x1, 0xe6, 3, 3},
122 [DVBT_EN_AGC_PGA] = {0x1, 0xd7, 0, 0},
123 [DVBT_CKOUTPAR] = {0x1, 0x7b, 5, 5},
124 [DVBT_CKOUT_PWR] = {0x1, 0x7b, 6, 6},
125 [DVBT_SYNC_DUR] = {0x1, 0x7b, 7, 7},
126 [DVBT_ERR_DUR] = {0x1, 0x7c, 0, 0},
127 [DVBT_SYNC_LVL] = {0x1, 0x7c, 1, 1},
128 [DVBT_ERR_LVL] = {0x1, 0x7c, 2, 2},
129 [DVBT_VAL_LVL] = {0x1, 0x7c, 3, 3},
130 [DVBT_SERIAL] = {0x1, 0x7c, 4, 4},
131 [DVBT_SER_LSB] = {0x1, 0x7c, 5, 5},
132 [DVBT_CDIV_PH0] = {0x1, 0x7d, 3, 0},
133 [DVBT_CDIV_PH1] = {0x1, 0x7d, 7, 4},
134 [DVBT_MPEG_IO_OPT_2_2] = {0x0, 0x6, 7, 7},
135 [DVBT_MPEG_IO_OPT_1_0] = {0x0, 0x7, 7, 6},
136 [DVBT_CKOUTPAR_PIP] = {0x0, 0xb7, 4, 4},
137 [DVBT_CKOUT_PWR_PIP] = {0x0, 0xb7, 3, 3},
138 [DVBT_SYNC_LVL_PIP] = {0x0, 0xb7, 2, 2},
139 [DVBT_ERR_LVL_PIP] = {0x0, 0xb7, 1, 1},
140 [DVBT_VAL_LVL_PIP] = {0x0, 0xb7, 0, 0},
141 [DVBT_CKOUTPAR_PID] = {0x0, 0xb9, 4, 4},
142 [DVBT_CKOUT_PWR_PID] = {0x0, 0xb9, 3, 3},
143 [DVBT_SYNC_LVL_PID] = {0x0, 0xb9, 2, 2},
144 [DVBT_ERR_LVL_PID] = {0x0, 0xb9, 1, 1},
145 [DVBT_VAL_LVL_PID] = {0x0, 0xb9, 0, 0},
146 [DVBT_SM_PASS] = {0x1, 0x93, 11, 0},
147 [DVBT_AD7_SETTING] = {0x0, 0x11, 15, 0},
148 [DVBT_RSSI_R] = {0x3, 0x1, 6, 0},
149 [DVBT_ACI_DET_IND] = {0x3, 0x12, 0, 0},
150 [DVBT_REG_MON] = {0x0, 0xd, 1, 0},
151 [DVBT_REG_MONSEL] = {0x0, 0xd, 2, 2},
152 [DVBT_REG_GPE] = {0x0, 0xd, 7, 7},
153 [DVBT_REG_GPO] = {0x0, 0x10, 0, 0},
154 [DVBT_REG_4MSEL] = {0x0, 0x13, 0, 0},
155 };
156
157 /* Our regmap is bypassing I2C adapter lock, thus we do it! */
158 int rtl2832_bulk_write(struct i2c_client *client, unsigned int reg,
159 const void *val, size_t val_count)
160 {
161 struct rtl2832_dev *dev = i2c_get_clientdata(client);
162 int ret;
163
164 i2c_lock_adapter(client->adapter);
165 ret = regmap_bulk_write(dev->regmap, reg, val, val_count);
166 i2c_unlock_adapter(client->adapter);
167 return ret;
168 }
169
170 int rtl2832_update_bits(struct i2c_client *client, unsigned int reg,
171 unsigned int mask, unsigned int val)
172 {
173 struct rtl2832_dev *dev = i2c_get_clientdata(client);
174 int ret;
175
176 i2c_lock_adapter(client->adapter);
177 ret = regmap_update_bits(dev->regmap, reg, mask, val);
178 i2c_unlock_adapter(client->adapter);
179 return ret;
180 }
181
182 int rtl2832_bulk_read(struct i2c_client *client, unsigned int reg, void *val,
183 size_t val_count)
184 {
185 struct rtl2832_dev *dev = i2c_get_clientdata(client);
186 int ret;
187
188 i2c_lock_adapter(client->adapter);
189 ret = regmap_bulk_read(dev->regmap, reg, val, val_count);
190 i2c_unlock_adapter(client->adapter);
191 return ret;
192 }
193
194 /* write multiple registers */
195 static int rtl2832_wr_regs(struct rtl2832_dev *dev, u8 reg, u8 page, u8 *val, int len)
196 {
197 return rtl2832_bulk_write(dev->client, page << 8 | reg, val, len);
198 }
199
200 /* read multiple registers */
201 static int rtl2832_rd_regs(struct rtl2832_dev *dev, u8 reg, u8 page, u8 *val, int len)
202 {
203 return rtl2832_bulk_read(dev->client, page << 8 | reg, val, len);
204 }
205
206 /* write single register */
207 static int rtl2832_wr_reg(struct rtl2832_dev *dev, u8 reg, u8 page, u8 val)
208 {
209 return rtl2832_wr_regs(dev, reg, page, &val, 1);
210 }
211
212 /* read single register */
213 static int rtl2832_rd_reg(struct rtl2832_dev *dev, u8 reg, u8 page, u8 *val)
214 {
215 return rtl2832_rd_regs(dev, reg, page, val, 1);
216 }
217
218 static int rtl2832_rd_demod_reg(struct rtl2832_dev *dev, int reg, u32 *val)
219 {
220 struct i2c_client *client = dev->client;
221 int ret;
222
223 u8 reg_start_addr;
224 u8 msb, lsb;
225 u8 page;
226 u8 reading[4];
227 u32 reading_tmp;
228 int i;
229
230 u8 len;
231 u32 mask;
232
233 reg_start_addr = registers[reg].start_address;
234 msb = registers[reg].msb;
235 lsb = registers[reg].lsb;
236 page = registers[reg].page;
237
238 len = (msb >> 3) + 1;
239 mask = REG_MASK(msb - lsb);
240
241 ret = rtl2832_rd_regs(dev, reg_start_addr, page, &reading[0], len);
242 if (ret)
243 goto err;
244
245 reading_tmp = 0;
246 for (i = 0; i < len; i++)
247 reading_tmp |= reading[i] << ((len - 1 - i) * 8);
248
249 *val = (reading_tmp >> lsb) & mask;
250
251 return ret;
252
253 err:
254 dev_dbg(&client->dev, "failed=%d\n", ret);
255 return ret;
256
257 }
258
259 static int rtl2832_wr_demod_reg(struct rtl2832_dev *dev, int reg, u32 val)
260 {
261 struct i2c_client *client = dev->client;
262 int ret, i;
263 u8 len;
264 u8 reg_start_addr;
265 u8 msb, lsb;
266 u8 page;
267 u32 mask;
268
269
270 u8 reading[4];
271 u8 writing[4];
272 u32 reading_tmp;
273 u32 writing_tmp;
274
275
276 reg_start_addr = registers[reg].start_address;
277 msb = registers[reg].msb;
278 lsb = registers[reg].lsb;
279 page = registers[reg].page;
280
281 len = (msb >> 3) + 1;
282 mask = REG_MASK(msb - lsb);
283
284
285 ret = rtl2832_rd_regs(dev, reg_start_addr, page, &reading[0], len);
286 if (ret)
287 goto err;
288
289 reading_tmp = 0;
290 for (i = 0; i < len; i++)
291 reading_tmp |= reading[i] << ((len - 1 - i) * 8);
292
293 writing_tmp = reading_tmp & ~(mask << lsb);
294 writing_tmp |= ((val & mask) << lsb);
295
296
297 for (i = 0; i < len; i++)
298 writing[i] = (writing_tmp >> ((len - 1 - i) * 8)) & 0xff;
299
300 ret = rtl2832_wr_regs(dev, reg_start_addr, page, &writing[0], len);
301 if (ret)
302 goto err;
303
304 return ret;
305
306 err:
307 dev_dbg(&client->dev, "failed=%d\n", ret);
308 return ret;
309
310 }
311
312 static int rtl2832_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
313 {
314 struct rtl2832_dev *dev = fe->demodulator_priv;
315 struct i2c_client *client = dev->client;
316 int ret;
317
318 dev_dbg(&client->dev, "enable=%d\n", enable);
319
320 /* gate already open or close */
321 if (dev->i2c_gate_state == enable)
322 return 0;
323
324 ret = rtl2832_wr_demod_reg(dev, DVBT_IIC_REPEAT, (enable ? 0x1 : 0x0));
325 if (ret)
326 goto err;
327
328 dev->i2c_gate_state = enable;
329
330 return ret;
331 err:
332 dev_dbg(&client->dev, "failed=%d\n", ret);
333 return ret;
334 }
335
336 static int rtl2832_set_if(struct dvb_frontend *fe, u32 if_freq)
337 {
338 struct rtl2832_dev *dev = fe->demodulator_priv;
339 struct i2c_client *client = dev->client;
340 int ret;
341 u64 pset_iffreq;
342 u8 en_bbin = (if_freq == 0 ? 0x1 : 0x0);
343
344 /*
345 * PSET_IFFREQ = - floor((IfFreqHz % CrystalFreqHz) * pow(2, 22)
346 * / CrystalFreqHz)
347 */
348
349 pset_iffreq = if_freq % dev->pdata->clk;
350 pset_iffreq *= 0x400000;
351 pset_iffreq = div_u64(pset_iffreq, dev->pdata->clk);
352 pset_iffreq = -pset_iffreq;
353 pset_iffreq = pset_iffreq & 0x3fffff;
354 dev_dbg(&client->dev, "if_frequency=%d pset_iffreq=%08x\n",
355 if_freq, (unsigned)pset_iffreq);
356
357 ret = rtl2832_wr_demod_reg(dev, DVBT_EN_BBIN, en_bbin);
358 if (ret)
359 return ret;
360
361 ret = rtl2832_wr_demod_reg(dev, DVBT_PSET_IFFREQ, pset_iffreq);
362
363 return ret;
364 }
365
366 static int rtl2832_init(struct dvb_frontend *fe)
367 {
368 struct rtl2832_dev *dev = fe->demodulator_priv;
369 struct i2c_client *client = dev->client;
370 struct dtv_frontend_properties *c = &dev->fe.dtv_property_cache;
371 const struct rtl2832_reg_value *init;
372 int i, ret, len;
373 /* initialization values for the demodulator registers */
374 struct rtl2832_reg_value rtl2832_initial_regs[] = {
375 {DVBT_AD_EN_REG, 0x1},
376 {DVBT_AD_EN_REG1, 0x1},
377 {DVBT_RSD_BER_FAIL_VAL, 0x2800},
378 {DVBT_MGD_THD0, 0x10},
379 {DVBT_MGD_THD1, 0x20},
380 {DVBT_MGD_THD2, 0x20},
381 {DVBT_MGD_THD3, 0x40},
382 {DVBT_MGD_THD4, 0x22},
383 {DVBT_MGD_THD5, 0x32},
384 {DVBT_MGD_THD6, 0x37},
385 {DVBT_MGD_THD7, 0x39},
386 {DVBT_EN_BK_TRK, 0x0},
387 {DVBT_EN_CACQ_NOTCH, 0x0},
388 {DVBT_AD_AV_REF, 0x2a},
389 {DVBT_REG_PI, 0x6},
390 {DVBT_PIP_ON, 0x0},
391 {DVBT_CDIV_PH0, 0x8},
392 {DVBT_CDIV_PH1, 0x8},
393 {DVBT_SCALE1_B92, 0x4},
394 {DVBT_SCALE1_B93, 0xb0},
395 {DVBT_SCALE1_BA7, 0x78},
396 {DVBT_SCALE1_BA9, 0x28},
397 {DVBT_SCALE1_BAA, 0x59},
398 {DVBT_SCALE1_BAB, 0x83},
399 {DVBT_SCALE1_BAC, 0xd4},
400 {DVBT_SCALE1_BB0, 0x65},
401 {DVBT_SCALE1_BB1, 0x43},
402 {DVBT_KB_P1, 0x1},
403 {DVBT_KB_P2, 0x4},
404 {DVBT_KB_P3, 0x7},
405 {DVBT_K1_CR_STEP12, 0xa},
406 {DVBT_REG_GPE, 0x1},
407 {DVBT_SERIAL, 0x0},
408 {DVBT_CDIV_PH0, 0x9},
409 {DVBT_CDIV_PH1, 0x9},
410 {DVBT_MPEG_IO_OPT_2_2, 0x0},
411 {DVBT_MPEG_IO_OPT_1_0, 0x0},
412 {DVBT_TRK_KS_P2, 0x4},
413 {DVBT_TRK_KS_I2, 0x7},
414 {DVBT_TR_THD_SET2, 0x6},
415 {DVBT_TRK_KC_I2, 0x5},
416 {DVBT_CR_THD_SET2, 0x1},
417 };
418
419 dev_dbg(&client->dev, "\n");
420
421 for (i = 0; i < ARRAY_SIZE(rtl2832_initial_regs); i++) {
422 ret = rtl2832_wr_demod_reg(dev, rtl2832_initial_regs[i].reg,
423 rtl2832_initial_regs[i].value);
424 if (ret)
425 goto err;
426 }
427
428 /* load tuner specific settings */
429 dev_dbg(&client->dev, "load settings for tuner=%02x\n",
430 dev->pdata->tuner);
431 switch (dev->pdata->tuner) {
432 case RTL2832_TUNER_FC0012:
433 case RTL2832_TUNER_FC0013:
434 len = ARRAY_SIZE(rtl2832_tuner_init_fc0012);
435 init = rtl2832_tuner_init_fc0012;
436 break;
437 case RTL2832_TUNER_TUA9001:
438 len = ARRAY_SIZE(rtl2832_tuner_init_tua9001);
439 init = rtl2832_tuner_init_tua9001;
440 break;
441 case RTL2832_TUNER_E4000:
442 len = ARRAY_SIZE(rtl2832_tuner_init_e4000);
443 init = rtl2832_tuner_init_e4000;
444 break;
445 case RTL2832_TUNER_R820T:
446 case RTL2832_TUNER_R828D:
447 len = ARRAY_SIZE(rtl2832_tuner_init_r820t);
448 init = rtl2832_tuner_init_r820t;
449 break;
450 default:
451 ret = -EINVAL;
452 goto err;
453 }
454
455 for (i = 0; i < len; i++) {
456 ret = rtl2832_wr_demod_reg(dev, init[i].reg, init[i].value);
457 if (ret)
458 goto err;
459 }
460
461 /*
462 * r820t NIM code does a software reset here at the demod -
463 * may not be needed, as there's already a software reset at
464 * set_params()
465 */
466 #if 1
467 /* soft reset */
468 ret = rtl2832_wr_demod_reg(dev, DVBT_SOFT_RST, 0x1);
469 if (ret)
470 goto err;
471
472 ret = rtl2832_wr_demod_reg(dev, DVBT_SOFT_RST, 0x0);
473 if (ret)
474 goto err;
475 #endif
476 /* init stats here in order signal app which stats are supported */
477 c->cnr.len = 1;
478 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
479 c->post_bit_error.len = 1;
480 c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
481 c->post_bit_count.len = 1;
482 c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
483 /* start statistics polling */
484 schedule_delayed_work(&dev->stat_work, msecs_to_jiffies(2000));
485 dev->sleeping = false;
486
487 return ret;
488 err:
489 dev_dbg(&client->dev, "failed=%d\n", ret);
490 return ret;
491 }
492
493 static int rtl2832_sleep(struct dvb_frontend *fe)
494 {
495 struct rtl2832_dev *dev = fe->demodulator_priv;
496 struct i2c_client *client = dev->client;
497
498 dev_dbg(&client->dev, "\n");
499 dev->sleeping = true;
500 /* stop statistics polling */
501 cancel_delayed_work_sync(&dev->stat_work);
502 dev->fe_status = 0;
503 return 0;
504 }
505
506 static int rtl2832_get_tune_settings(struct dvb_frontend *fe,
507 struct dvb_frontend_tune_settings *s)
508 {
509 struct rtl2832_dev *dev = fe->demodulator_priv;
510 struct i2c_client *client = dev->client;
511
512 dev_dbg(&client->dev, "\n");
513 s->min_delay_ms = 1000;
514 s->step_size = fe->ops.info.frequency_stepsize * 2;
515 s->max_drift = (fe->ops.info.frequency_stepsize * 2) + 1;
516 return 0;
517 }
518
519 static int rtl2832_set_frontend(struct dvb_frontend *fe)
520 {
521 struct rtl2832_dev *dev = fe->demodulator_priv;
522 struct i2c_client *client = dev->client;
523 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
524 int ret, i, j;
525 u64 bw_mode, num, num2;
526 u32 resamp_ratio, cfreq_off_ratio;
527 static u8 bw_params[3][32] = {
528 /* 6 MHz bandwidth */
529 {
530 0xf5, 0xff, 0x15, 0x38, 0x5d, 0x6d, 0x52, 0x07, 0xfa, 0x2f,
531 0x53, 0xf5, 0x3f, 0xca, 0x0b, 0x91, 0xea, 0x30, 0x63, 0xb2,
532 0x13, 0xda, 0x0b, 0xc4, 0x18, 0x7e, 0x16, 0x66, 0x08, 0x67,
533 0x19, 0xe0,
534 },
535
536 /* 7 MHz bandwidth */
537 {
538 0xe7, 0xcc, 0xb5, 0xba, 0xe8, 0x2f, 0x67, 0x61, 0x00, 0xaf,
539 0x86, 0xf2, 0xbf, 0x59, 0x04, 0x11, 0xb6, 0x33, 0xa4, 0x30,
540 0x15, 0x10, 0x0a, 0x42, 0x18, 0xf8, 0x17, 0xd9, 0x07, 0x22,
541 0x19, 0x10,
542 },
543
544 /* 8 MHz bandwidth */
545 {
546 0x09, 0xf6, 0xd2, 0xa7, 0x9a, 0xc9, 0x27, 0x77, 0x06, 0xbf,
547 0xec, 0xf4, 0x4f, 0x0b, 0xfc, 0x01, 0x63, 0x35, 0x54, 0xa7,
548 0x16, 0x66, 0x08, 0xb4, 0x19, 0x6e, 0x19, 0x65, 0x05, 0xc8,
549 0x19, 0xe0,
550 },
551 };
552
553
554 dev_dbg(&client->dev, "frequency=%u bandwidth_hz=%u inversion=%u\n",
555 c->frequency, c->bandwidth_hz, c->inversion);
556
557 /* program tuner */
558 if (fe->ops.tuner_ops.set_params)
559 fe->ops.tuner_ops.set_params(fe);
560
561 /* PIP mode related */
562 ret = rtl2832_wr_regs(dev, 0x92, 1, "\x00\x0f\xff", 3);
563 if (ret)
564 goto err;
565
566 /* If the frontend has get_if_frequency(), use it */
567 if (fe->ops.tuner_ops.get_if_frequency) {
568 u32 if_freq;
569
570 ret = fe->ops.tuner_ops.get_if_frequency(fe, &if_freq);
571 if (ret)
572 goto err;
573
574 ret = rtl2832_set_if(fe, if_freq);
575 if (ret)
576 goto err;
577 }
578
579 switch (c->bandwidth_hz) {
580 case 6000000:
581 i = 0;
582 bw_mode = 48000000;
583 break;
584 case 7000000:
585 i = 1;
586 bw_mode = 56000000;
587 break;
588 case 8000000:
589 i = 2;
590 bw_mode = 64000000;
591 break;
592 default:
593 dev_err(&client->dev, "invalid bandwidth_hz %u\n",
594 c->bandwidth_hz);
595 ret = -EINVAL;
596 goto err;
597 }
598
599 for (j = 0; j < sizeof(bw_params[0]); j++) {
600 ret = rtl2832_wr_regs(dev, 0x1c+j, 1, &bw_params[i][j], 1);
601 if (ret)
602 goto err;
603 }
604
605 /* calculate and set resample ratio
606 * RSAMP_RATIO = floor(CrystalFreqHz * 7 * pow(2, 22)
607 * / ConstWithBandwidthMode)
608 */
609 num = dev->pdata->clk * 7;
610 num *= 0x400000;
611 num = div_u64(num, bw_mode);
612 resamp_ratio = num & 0x3ffffff;
613 ret = rtl2832_wr_demod_reg(dev, DVBT_RSAMP_RATIO, resamp_ratio);
614 if (ret)
615 goto err;
616
617 /* calculate and set cfreq off ratio
618 * CFREQ_OFF_RATIO = - floor(ConstWithBandwidthMode * pow(2, 20)
619 * / (CrystalFreqHz * 7))
620 */
621 num = bw_mode << 20;
622 num2 = dev->pdata->clk * 7;
623 num = div_u64(num, num2);
624 num = -num;
625 cfreq_off_ratio = num & 0xfffff;
626 ret = rtl2832_wr_demod_reg(dev, DVBT_CFREQ_OFF_RATIO, cfreq_off_ratio);
627 if (ret)
628 goto err;
629
630 /* soft reset */
631 ret = rtl2832_wr_demod_reg(dev, DVBT_SOFT_RST, 0x1);
632 if (ret)
633 goto err;
634
635 ret = rtl2832_wr_demod_reg(dev, DVBT_SOFT_RST, 0x0);
636 if (ret)
637 goto err;
638
639 return ret;
640 err:
641 dev_dbg(&client->dev, "failed=%d\n", ret);
642 return ret;
643 }
644
645 static int rtl2832_get_frontend(struct dvb_frontend *fe)
646 {
647 struct rtl2832_dev *dev = fe->demodulator_priv;
648 struct i2c_client *client = dev->client;
649 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
650 int ret;
651 u8 buf[3];
652
653 if (dev->sleeping)
654 return 0;
655
656 ret = rtl2832_rd_regs(dev, 0x3c, 3, buf, 2);
657 if (ret)
658 goto err;
659
660 ret = rtl2832_rd_reg(dev, 0x51, 3, &buf[2]);
661 if (ret)
662 goto err;
663
664 dev_dbg(&client->dev, "TPS=%*ph\n", 3, buf);
665
666 switch ((buf[0] >> 2) & 3) {
667 case 0:
668 c->modulation = QPSK;
669 break;
670 case 1:
671 c->modulation = QAM_16;
672 break;
673 case 2:
674 c->modulation = QAM_64;
675 break;
676 }
677
678 switch ((buf[2] >> 2) & 1) {
679 case 0:
680 c->transmission_mode = TRANSMISSION_MODE_2K;
681 break;
682 case 1:
683 c->transmission_mode = TRANSMISSION_MODE_8K;
684 }
685
686 switch ((buf[2] >> 0) & 3) {
687 case 0:
688 c->guard_interval = GUARD_INTERVAL_1_32;
689 break;
690 case 1:
691 c->guard_interval = GUARD_INTERVAL_1_16;
692 break;
693 case 2:
694 c->guard_interval = GUARD_INTERVAL_1_8;
695 break;
696 case 3:
697 c->guard_interval = GUARD_INTERVAL_1_4;
698 break;
699 }
700
701 switch ((buf[0] >> 4) & 7) {
702 case 0:
703 c->hierarchy = HIERARCHY_NONE;
704 break;
705 case 1:
706 c->hierarchy = HIERARCHY_1;
707 break;
708 case 2:
709 c->hierarchy = HIERARCHY_2;
710 break;
711 case 3:
712 c->hierarchy = HIERARCHY_4;
713 break;
714 }
715
716 switch ((buf[1] >> 3) & 7) {
717 case 0:
718 c->code_rate_HP = FEC_1_2;
719 break;
720 case 1:
721 c->code_rate_HP = FEC_2_3;
722 break;
723 case 2:
724 c->code_rate_HP = FEC_3_4;
725 break;
726 case 3:
727 c->code_rate_HP = FEC_5_6;
728 break;
729 case 4:
730 c->code_rate_HP = FEC_7_8;
731 break;
732 }
733
734 switch ((buf[1] >> 0) & 7) {
735 case 0:
736 c->code_rate_LP = FEC_1_2;
737 break;
738 case 1:
739 c->code_rate_LP = FEC_2_3;
740 break;
741 case 2:
742 c->code_rate_LP = FEC_3_4;
743 break;
744 case 3:
745 c->code_rate_LP = FEC_5_6;
746 break;
747 case 4:
748 c->code_rate_LP = FEC_7_8;
749 break;
750 }
751
752 return 0;
753 err:
754 dev_dbg(&client->dev, "failed=%d\n", ret);
755 return ret;
756 }
757
758 static int rtl2832_read_status(struct dvb_frontend *fe, fe_status_t *status)
759 {
760 struct rtl2832_dev *dev = fe->demodulator_priv;
761 struct i2c_client *client = dev->client;
762 int ret;
763 u32 tmp;
764
765 dev_dbg(&client->dev, "\n");
766
767 *status = 0;
768 if (dev->sleeping)
769 return 0;
770
771 ret = rtl2832_rd_demod_reg(dev, DVBT_FSM_STAGE, &tmp);
772 if (ret)
773 goto err;
774
775 if (tmp == 11) {
776 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
777 FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
778 }
779 /* TODO find out if this is also true for rtl2832? */
780 /*else if (tmp == 10) {
781 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
782 FE_HAS_VITERBI;
783 }*/
784
785 dev->fe_status = *status;
786 return ret;
787 err:
788 dev_dbg(&client->dev, "failed=%d\n", ret);
789 return ret;
790 }
791
792 static int rtl2832_read_snr(struct dvb_frontend *fe, u16 *snr)
793 {
794 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
795
796 /* report SNR in resolution of 0.1 dB */
797 if (c->cnr.stat[0].scale == FE_SCALE_DECIBEL)
798 *snr = div_s64(c->cnr.stat[0].svalue, 100);
799 else
800 *snr = 0;
801
802 return 0;
803 }
804
805 static int rtl2832_read_ber(struct dvb_frontend *fe, u32 *ber)
806 {
807 struct rtl2832_dev *dev = fe->demodulator_priv;
808 struct i2c_client *client = dev->client;
809 int ret;
810 u8 buf[2];
811
812 ret = rtl2832_rd_regs(dev, 0x4e, 3, buf, 2);
813 if (ret)
814 goto err;
815
816 *ber = buf[0] << 8 | buf[1];
817
818 return 0;
819 err:
820 dev_dbg(&client->dev, "failed=%d\n", ret);
821 return ret;
822 }
823
824 static void rtl2832_stat_work(struct work_struct *work)
825 {
826 struct rtl2832_dev *dev = container_of(work, struct rtl2832_dev, stat_work.work);
827 struct i2c_client *client = dev->client;
828 struct dtv_frontend_properties *c = &dev->fe.dtv_property_cache;
829 int ret, tmp;
830 u8 u8tmp, buf[2];
831 u16 u16tmp;
832
833 dev_dbg(&client->dev, "\n");
834
835 /* CNR */
836 if (dev->fe_status & FE_HAS_VITERBI) {
837 unsigned hierarchy, constellation;
838 #define CONSTELLATION_NUM 3
839 #define HIERARCHY_NUM 4
840 static const u32 constant[CONSTELLATION_NUM][HIERARCHY_NUM] = {
841 {85387325, 85387325, 85387325, 85387325},
842 {86676178, 86676178, 87167949, 87795660},
843 {87659938, 87659938, 87885178, 88241743},
844 };
845
846 ret = rtl2832_bulk_read(client, 0x33c, &u8tmp, 1);
847 if (ret)
848 goto err;
849
850 constellation = (u8tmp >> 2) & 0x03; /* [3:2] */
851 if (constellation > CONSTELLATION_NUM - 1)
852 goto err_schedule_delayed_work;
853
854 hierarchy = (u8tmp >> 4) & 0x07; /* [6:4] */
855 if (hierarchy > HIERARCHY_NUM - 1)
856 goto err_schedule_delayed_work;
857
858 ret = rtl2832_bulk_read(client, 0x40c, buf, 2);
859 if (ret)
860 goto err;
861
862 u16tmp = buf[0] << 8 | buf[1] << 0;
863 if (u16tmp)
864 tmp = (constant[constellation][hierarchy] -
865 intlog10(u16tmp)) / ((1 << 24) / 10000);
866 else
867 tmp = 0;
868
869 dev_dbg(&client->dev, "cnr raw=%u\n", u16tmp);
870
871 c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
872 c->cnr.stat[0].svalue = tmp;
873 } else {
874 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
875 }
876
877 /* BER */
878 if (dev->fe_status & FE_HAS_LOCK) {
879 ret = rtl2832_bulk_read(client, 0x34e, buf, 2);
880 if (ret)
881 goto err;
882
883 u16tmp = buf[0] << 8 | buf[1] << 0;
884 dev->post_bit_error += u16tmp;
885 dev->post_bit_count += 1000000;
886
887 dev_dbg(&client->dev, "ber errors=%u total=1000000\n", u16tmp);
888
889 c->post_bit_error.stat[0].scale = FE_SCALE_COUNTER;
890 c->post_bit_error.stat[0].uvalue = dev->post_bit_error;
891 c->post_bit_count.stat[0].scale = FE_SCALE_COUNTER;
892 c->post_bit_count.stat[0].uvalue = dev->post_bit_count;
893 } else {
894 c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
895 c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
896 }
897
898 err_schedule_delayed_work:
899 schedule_delayed_work(&dev->stat_work, msecs_to_jiffies(2000));
900 return;
901 err:
902 dev_dbg(&client->dev, "failed=%d\n", ret);
903 }
904
905 /*
906 * I2C gate/mux/repeater logic
907 * We must use unlocked __i2c_transfer() here (through regmap) because of I2C
908 * adapter lock is already taken by tuner driver.
909 * There is delay mechanism to avoid unneeded I2C gate open / close. Gate close
910 * is delayed here a little bit in order to see if there is sequence of I2C
911 * messages sent to same I2C bus.
912 */
913 static void rtl2832_i2c_gate_work(struct work_struct *work)
914 {
915 struct rtl2832_dev *dev = container_of(work, struct rtl2832_dev, i2c_gate_work.work);
916 struct i2c_client *client = dev->client;
917 int ret;
918
919 /* close gate */
920 ret = rtl2832_update_bits(dev->client, 0x101, 0x08, 0x00);
921 if (ret)
922 goto err;
923
924 dev->i2c_gate_state = false;
925
926 return;
927 err:
928 dev_dbg(&client->dev, "failed=%d\n", ret);
929 return;
930 }
931
932 static int rtl2832_select(struct i2c_adapter *adap, void *mux_priv, u32 chan_id)
933 {
934 struct rtl2832_dev *dev = mux_priv;
935 struct i2c_client *client = dev->client;
936 int ret;
937
938 /* terminate possible gate closing */
939 cancel_delayed_work(&dev->i2c_gate_work);
940
941 if (dev->i2c_gate_state == chan_id)
942 return 0;
943
944 /*
945 * chan_id 1 is muxed adapter demod provides and chan_id 0 is demod
946 * itself. We need open gate when request is for chan_id 1. On that case
947 * I2C adapter lock is already taken and due to that we will use
948 * regmap_update_bits() which does not lock again I2C adapter.
949 */
950 if (chan_id == 1)
951 ret = regmap_update_bits(dev->regmap, 0x101, 0x08, 0x08);
952 else
953 ret = rtl2832_update_bits(dev->client, 0x101, 0x08, 0x00);
954 if (ret)
955 goto err;
956
957 dev->i2c_gate_state = chan_id;
958
959 return 0;
960 err:
961 dev_dbg(&client->dev, "failed=%d\n", ret);
962 return ret;
963 }
964
965 static int rtl2832_deselect(struct i2c_adapter *adap, void *mux_priv,
966 u32 chan_id)
967 {
968 struct rtl2832_dev *dev = mux_priv;
969
970 schedule_delayed_work(&dev->i2c_gate_work, usecs_to_jiffies(100));
971 return 0;
972 }
973
974 static struct dvb_frontend_ops rtl2832_ops = {
975 .delsys = { SYS_DVBT },
976 .info = {
977 .name = "Realtek RTL2832 (DVB-T)",
978 .frequency_min = 174000000,
979 .frequency_max = 862000000,
980 .frequency_stepsize = 166667,
981 .caps = FE_CAN_FEC_1_2 |
982 FE_CAN_FEC_2_3 |
983 FE_CAN_FEC_3_4 |
984 FE_CAN_FEC_5_6 |
985 FE_CAN_FEC_7_8 |
986 FE_CAN_FEC_AUTO |
987 FE_CAN_QPSK |
988 FE_CAN_QAM_16 |
989 FE_CAN_QAM_64 |
990 FE_CAN_QAM_AUTO |
991 FE_CAN_TRANSMISSION_MODE_AUTO |
992 FE_CAN_GUARD_INTERVAL_AUTO |
993 FE_CAN_HIERARCHY_AUTO |
994 FE_CAN_RECOVER |
995 FE_CAN_MUTE_TS
996 },
997
998 .init = rtl2832_init,
999 .sleep = rtl2832_sleep,
1000
1001 .get_tune_settings = rtl2832_get_tune_settings,
1002
1003 .set_frontend = rtl2832_set_frontend,
1004 .get_frontend = rtl2832_get_frontend,
1005
1006 .read_status = rtl2832_read_status,
1007 .read_snr = rtl2832_read_snr,
1008 .read_ber = rtl2832_read_ber,
1009
1010 .i2c_gate_ctrl = rtl2832_i2c_gate_ctrl,
1011 };
1012
1013 /*
1014 * We implement own I2C access routines for regmap in order to get manual access
1015 * to I2C adapter lock, which is needed for I2C mux adapter.
1016 */
1017 static int rtl2832_regmap_read(void *context, const void *reg_buf,
1018 size_t reg_size, void *val_buf, size_t val_size)
1019 {
1020 struct i2c_client *client = context;
1021 int ret;
1022 struct i2c_msg msg[2] = {
1023 {
1024 .addr = client->addr,
1025 .flags = 0,
1026 .len = reg_size,
1027 .buf = (u8 *)reg_buf,
1028 }, {
1029 .addr = client->addr,
1030 .flags = I2C_M_RD,
1031 .len = val_size,
1032 .buf = val_buf,
1033 }
1034 };
1035
1036 ret = __i2c_transfer(client->adapter, msg, 2);
1037 if (ret != 2) {
1038 dev_warn(&client->dev, "i2c reg read failed %d\n", ret);
1039 if (ret >= 0)
1040 ret = -EREMOTEIO;
1041 return ret;
1042 }
1043 return 0;
1044 }
1045
1046 static int rtl2832_regmap_write(void *context, const void *data, size_t count)
1047 {
1048 struct i2c_client *client = context;
1049 int ret;
1050 struct i2c_msg msg[1] = {
1051 {
1052 .addr = client->addr,
1053 .flags = 0,
1054 .len = count,
1055 .buf = (u8 *)data,
1056 }
1057 };
1058
1059 ret = __i2c_transfer(client->adapter, msg, 1);
1060 if (ret != 1) {
1061 dev_warn(&client->dev, "i2c reg write failed %d\n", ret);
1062 if (ret >= 0)
1063 ret = -EREMOTEIO;
1064 return ret;
1065 }
1066 return 0;
1067 }
1068
1069 static int rtl2832_regmap_gather_write(void *context, const void *reg,
1070 size_t reg_len, const void *val,
1071 size_t val_len)
1072 {
1073 struct i2c_client *client = context;
1074 int ret;
1075 u8 buf[256];
1076 struct i2c_msg msg[1] = {
1077 {
1078 .addr = client->addr,
1079 .flags = 0,
1080 .len = 1 + val_len,
1081 .buf = buf,
1082 }
1083 };
1084
1085 buf[0] = *(u8 const *)reg;
1086 memcpy(&buf[1], val, val_len);
1087
1088 ret = __i2c_transfer(client->adapter, msg, 1);
1089 if (ret != 1) {
1090 dev_warn(&client->dev, "i2c reg write failed %d\n", ret);
1091 if (ret >= 0)
1092 ret = -EREMOTEIO;
1093 return ret;
1094 }
1095 return 0;
1096 }
1097
1098 static struct dvb_frontend *rtl2832_get_dvb_frontend(struct i2c_client *client)
1099 {
1100 struct rtl2832_dev *dev = i2c_get_clientdata(client);
1101
1102 dev_dbg(&client->dev, "\n");
1103 return &dev->fe;
1104 }
1105
1106 static struct i2c_adapter *rtl2832_get_i2c_adapter_(struct i2c_client *client)
1107 {
1108 struct rtl2832_dev *dev = i2c_get_clientdata(client);
1109
1110 dev_dbg(&client->dev, "\n");
1111 return dev->i2c_adapter_tuner;
1112 }
1113
1114 static struct i2c_adapter *rtl2832_get_private_i2c_adapter_(struct i2c_client *client)
1115 {
1116 struct rtl2832_dev *dev = i2c_get_clientdata(client);
1117
1118 dev_dbg(&client->dev, "\n");
1119 return dev->i2c_adapter;
1120 }
1121
1122 static int rtl2832_enable_slave_ts(struct i2c_client *client)
1123 {
1124 struct rtl2832_dev *dev = i2c_get_clientdata(client);
1125 int ret;
1126
1127 dev_dbg(&client->dev, "\n");
1128
1129 ret = rtl2832_wr_regs(dev, 0x0c, 1, "\x5f\xff", 2);
1130 if (ret)
1131 goto err;
1132
1133 ret = rtl2832_wr_demod_reg(dev, DVBT_PIP_ON, 0x1);
1134 if (ret)
1135 goto err;
1136
1137 ret = rtl2832_wr_reg(dev, 0xbc, 0, 0x18);
1138 if (ret)
1139 goto err;
1140
1141 ret = rtl2832_wr_reg(dev, 0x22, 0, 0x01);
1142 if (ret)
1143 goto err;
1144
1145 ret = rtl2832_wr_reg(dev, 0x26, 0, 0x1f);
1146 if (ret)
1147 goto err;
1148
1149 ret = rtl2832_wr_reg(dev, 0x27, 0, 0xff);
1150 if (ret)
1151 goto err;
1152
1153 ret = rtl2832_wr_regs(dev, 0x92, 1, "\x7f\xf7\xff", 3);
1154 if (ret)
1155 goto err;
1156
1157 /* soft reset */
1158 ret = rtl2832_wr_demod_reg(dev, DVBT_SOFT_RST, 0x1);
1159 if (ret)
1160 goto err;
1161
1162 ret = rtl2832_wr_demod_reg(dev, DVBT_SOFT_RST, 0x0);
1163 if (ret)
1164 goto err;
1165
1166 return 0;
1167 err:
1168 dev_dbg(&client->dev, "failed=%d\n", ret);
1169 return ret;
1170 }
1171
1172 static int rtl2832_probe(struct i2c_client *client,
1173 const struct i2c_device_id *id)
1174 {
1175 struct rtl2832_platform_data *pdata = client->dev.platform_data;
1176 struct i2c_adapter *i2c = client->adapter;
1177 struct rtl2832_dev *dev;
1178 int ret;
1179 u8 tmp;
1180 static const struct regmap_bus regmap_bus = {
1181 .read = rtl2832_regmap_read,
1182 .write = rtl2832_regmap_write,
1183 .gather_write = rtl2832_regmap_gather_write,
1184 .val_format_endian_default = REGMAP_ENDIAN_NATIVE,
1185 };
1186 static const struct regmap_range_cfg regmap_range_cfg[] = {
1187 {
1188 .selector_reg = 0x00,
1189 .selector_mask = 0xff,
1190 .selector_shift = 0,
1191 .window_start = 0,
1192 .window_len = 0x100,
1193 .range_min = 0 * 0x100,
1194 .range_max = 5 * 0x100,
1195 },
1196 };
1197 static const struct regmap_config regmap_config = {
1198 .reg_bits = 8,
1199 .val_bits = 8,
1200 .max_register = 5 * 0x100,
1201 .ranges = regmap_range_cfg,
1202 .num_ranges = ARRAY_SIZE(regmap_range_cfg),
1203 };
1204
1205 dev_dbg(&client->dev, "\n");
1206
1207 /* allocate memory for the internal state */
1208 dev = kzalloc(sizeof(struct rtl2832_dev), GFP_KERNEL);
1209 if (dev == NULL) {
1210 ret = -ENOMEM;
1211 goto err;
1212 }
1213
1214 /* setup the state */
1215 i2c_set_clientdata(client, dev);
1216 dev->client = client;
1217 dev->pdata = client->dev.platform_data;
1218 if (pdata->config) {
1219 dev->pdata->clk = pdata->config->xtal;
1220 dev->pdata->tuner = pdata->config->tuner;
1221 }
1222 dev->sleeping = true;
1223 INIT_DELAYED_WORK(&dev->i2c_gate_work, rtl2832_i2c_gate_work);
1224 INIT_DELAYED_WORK(&dev->stat_work, rtl2832_stat_work);
1225 /* create regmap */
1226 dev->regmap = regmap_init(&client->dev, &regmap_bus, client,
1227 &regmap_config);
1228 if (IS_ERR(dev->regmap)) {
1229 ret = PTR_ERR(dev->regmap);
1230 goto err_kfree;
1231 }
1232 /* create muxed i2c adapter for demod itself */
1233 dev->i2c_adapter = i2c_add_mux_adapter(i2c, &i2c->dev, dev, 0, 0, 0,
1234 rtl2832_select, NULL);
1235 if (dev->i2c_adapter == NULL) {
1236 ret = -ENODEV;
1237 goto err_regmap_exit;
1238 }
1239
1240 /* check if the demod is there */
1241 ret = rtl2832_rd_reg(dev, 0x00, 0x0, &tmp);
1242 if (ret)
1243 goto err_i2c_del_mux_adapter;
1244
1245 /* create muxed i2c adapter for demod tuner bus */
1246 dev->i2c_adapter_tuner = i2c_add_mux_adapter(i2c, &i2c->dev, dev,
1247 0, 1, 0, rtl2832_select, rtl2832_deselect);
1248 if (dev->i2c_adapter_tuner == NULL) {
1249 ret = -ENODEV;
1250 goto err_i2c_del_mux_adapter;
1251 }
1252
1253 /* create dvb_frontend */
1254 memcpy(&dev->fe.ops, &rtl2832_ops, sizeof(struct dvb_frontend_ops));
1255 dev->fe.demodulator_priv = dev;
1256
1257 /* setup callbacks */
1258 pdata->get_dvb_frontend = rtl2832_get_dvb_frontend;
1259 pdata->get_i2c_adapter = rtl2832_get_i2c_adapter_;
1260 pdata->get_private_i2c_adapter = rtl2832_get_private_i2c_adapter_;
1261 pdata->enable_slave_ts = rtl2832_enable_slave_ts;
1262
1263 dev_info(&client->dev, "Realtek RTL2832 successfully attached\n");
1264 return 0;
1265 err_i2c_del_mux_adapter:
1266 i2c_del_mux_adapter(dev->i2c_adapter);
1267 err_regmap_exit:
1268 regmap_exit(dev->regmap);
1269 err_kfree:
1270 kfree(dev);
1271 err:
1272 dev_dbg(&client->dev, "failed=%d\n", ret);
1273 return ret;
1274 }
1275
1276 static int rtl2832_remove(struct i2c_client *client)
1277 {
1278 struct rtl2832_dev *dev = i2c_get_clientdata(client);
1279
1280 dev_dbg(&client->dev, "\n");
1281
1282 cancel_delayed_work_sync(&dev->i2c_gate_work);
1283
1284 i2c_del_mux_adapter(dev->i2c_adapter_tuner);
1285
1286 i2c_del_mux_adapter(dev->i2c_adapter);
1287
1288 regmap_exit(dev->regmap);
1289
1290 kfree(dev);
1291
1292 return 0;
1293 }
1294
1295 static const struct i2c_device_id rtl2832_id_table[] = {
1296 {"rtl2832", 0},
1297 {}
1298 };
1299 MODULE_DEVICE_TABLE(i2c, rtl2832_id_table);
1300
1301 static struct i2c_driver rtl2832_driver = {
1302 .driver = {
1303 .owner = THIS_MODULE,
1304 .name = "rtl2832",
1305 },
1306 .probe = rtl2832_probe,
1307 .remove = rtl2832_remove,
1308 .id_table = rtl2832_id_table,
1309 };
1310
1311 module_i2c_driver(rtl2832_driver);
1312
1313 MODULE_AUTHOR("Thomas Mair <mair.thomas86@gmail.com>");
1314 MODULE_DESCRIPTION("Realtek RTL2832 DVB-T demodulator driver");
1315 MODULE_LICENSE("GPL");
1316 MODULE_VERSION("0.5");
Linux kernel - Deliverables
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