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[deliverable/linux.git] / drivers / media / i2c / mt9t001.c
1 /*
2 * Driver for MT9T001 CMOS Image Sensor from Aptina (Micron)
3 *
4 * Copyright (C) 2010-2011, Laurent Pinchart <laurent.pinchart@ideasonboard.com>
5 *
6 * Based on the MT9M001 driver,
7 *
8 * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15 #include <linux/i2c.h>
16 #include <linux/module.h>
17 #include <linux/log2.h>
18 #include <linux/slab.h>
19 #include <linux/videodev2.h>
20 #include <linux/v4l2-mediabus.h>
21
22 #include <media/mt9t001.h>
23 #include <media/v4l2-ctrls.h>
24 #include <media/v4l2-device.h>
25 #include <media/v4l2-subdev.h>
26
27 #define MT9T001_PIXEL_ARRAY_HEIGHT 1568
28 #define MT9T001_PIXEL_ARRAY_WIDTH 2112
29
30 #define MT9T001_CHIP_VERSION 0x00
31 #define MT9T001_CHIP_ID 0x1621
32 #define MT9T001_ROW_START 0x01
33 #define MT9T001_ROW_START_MIN 0
34 #define MT9T001_ROW_START_DEF 20
35 #define MT9T001_ROW_START_MAX 1534
36 #define MT9T001_COLUMN_START 0x02
37 #define MT9T001_COLUMN_START_MIN 0
38 #define MT9T001_COLUMN_START_DEF 32
39 #define MT9T001_COLUMN_START_MAX 2046
40 #define MT9T001_WINDOW_HEIGHT 0x03
41 #define MT9T001_WINDOW_HEIGHT_MIN 1
42 #define MT9T001_WINDOW_HEIGHT_DEF 1535
43 #define MT9T001_WINDOW_HEIGHT_MAX 1567
44 #define MT9T001_WINDOW_WIDTH 0x04
45 #define MT9T001_WINDOW_WIDTH_MIN 1
46 #define MT9T001_WINDOW_WIDTH_DEF 2047
47 #define MT9T001_WINDOW_WIDTH_MAX 2111
48 #define MT9T001_HORIZONTAL_BLANKING 0x05
49 #define MT9T001_HORIZONTAL_BLANKING_MIN 21
50 #define MT9T001_HORIZONTAL_BLANKING_MAX 1023
51 #define MT9T001_VERTICAL_BLANKING 0x06
52 #define MT9T001_VERTICAL_BLANKING_MIN 3
53 #define MT9T001_VERTICAL_BLANKING_MAX 1023
54 #define MT9T001_OUTPUT_CONTROL 0x07
55 #define MT9T001_OUTPUT_CONTROL_SYNC (1 << 0)
56 #define MT9T001_OUTPUT_CONTROL_CHIP_ENABLE (1 << 1)
57 #define MT9T001_OUTPUT_CONTROL_TEST_DATA (1 << 6)
58 #define MT9T001_SHUTTER_WIDTH_HIGH 0x08
59 #define MT9T001_SHUTTER_WIDTH_LOW 0x09
60 #define MT9T001_SHUTTER_WIDTH_MIN 1
61 #define MT9T001_SHUTTER_WIDTH_DEF 1561
62 #define MT9T001_SHUTTER_WIDTH_MAX (1024 * 1024)
63 #define MT9T001_PIXEL_CLOCK 0x0a
64 #define MT9T001_PIXEL_CLOCK_INVERT (1 << 15)
65 #define MT9T001_PIXEL_CLOCK_SHIFT_MASK (7 << 8)
66 #define MT9T001_PIXEL_CLOCK_SHIFT_SHIFT 8
67 #define MT9T001_PIXEL_CLOCK_DIVIDE_MASK (0x7f << 0)
68 #define MT9T001_FRAME_RESTART 0x0b
69 #define MT9T001_SHUTTER_DELAY 0x0c
70 #define MT9T001_SHUTTER_DELAY_MAX 2047
71 #define MT9T001_RESET 0x0d
72 #define MT9T001_READ_MODE1 0x1e
73 #define MT9T001_READ_MODE_SNAPSHOT (1 << 8)
74 #define MT9T001_READ_MODE_STROBE_ENABLE (1 << 9)
75 #define MT9T001_READ_MODE_STROBE_WIDTH (1 << 10)
76 #define MT9T001_READ_MODE_STROBE_OVERRIDE (1 << 11)
77 #define MT9T001_READ_MODE2 0x20
78 #define MT9T001_READ_MODE_BAD_FRAMES (1 << 0)
79 #define MT9T001_READ_MODE_LINE_VALID_CONTINUOUS (1 << 9)
80 #define MT9T001_READ_MODE_LINE_VALID_FRAME (1 << 10)
81 #define MT9T001_READ_MODE3 0x21
82 #define MT9T001_READ_MODE_GLOBAL_RESET (1 << 0)
83 #define MT9T001_READ_MODE_GHST_CTL (1 << 1)
84 #define MT9T001_ROW_ADDRESS_MODE 0x22
85 #define MT9T001_ROW_SKIP_MASK (7 << 0)
86 #define MT9T001_ROW_BIN_MASK (3 << 3)
87 #define MT9T001_ROW_BIN_SHIFT 3
88 #define MT9T001_COLUMN_ADDRESS_MODE 0x23
89 #define MT9T001_COLUMN_SKIP_MASK (7 << 0)
90 #define MT9T001_COLUMN_BIN_MASK (3 << 3)
91 #define MT9T001_COLUMN_BIN_SHIFT 3
92 #define MT9T001_GREEN1_GAIN 0x2b
93 #define MT9T001_BLUE_GAIN 0x2c
94 #define MT9T001_RED_GAIN 0x2d
95 #define MT9T001_GREEN2_GAIN 0x2e
96 #define MT9T001_TEST_DATA 0x32
97 #define MT9T001_GLOBAL_GAIN 0x35
98 #define MT9T001_GLOBAL_GAIN_MIN 8
99 #define MT9T001_GLOBAL_GAIN_MAX 1024
100 #define MT9T001_BLACK_LEVEL 0x49
101 #define MT9T001_ROW_BLACK_DEFAULT_OFFSET 0x4b
102 #define MT9T001_BLC_DELTA_THRESHOLDS 0x5d
103 #define MT9T001_CAL_THRESHOLDS 0x5f
104 #define MT9T001_GREEN1_OFFSET 0x60
105 #define MT9T001_GREEN2_OFFSET 0x61
106 #define MT9T001_BLACK_LEVEL_CALIBRATION 0x62
107 #define MT9T001_BLACK_LEVEL_OVERRIDE (1 << 0)
108 #define MT9T001_BLACK_LEVEL_DISABLE_OFFSET (1 << 1)
109 #define MT9T001_BLACK_LEVEL_RECALCULATE (1 << 12)
110 #define MT9T001_BLACK_LEVEL_LOCK_RED_BLUE (1 << 13)
111 #define MT9T001_BLACK_LEVEL_LOCK_GREEN (1 << 14)
112 #define MT9T001_RED_OFFSET 0x63
113 #define MT9T001_BLUE_OFFSET 0x64
114
115 struct mt9t001 {
116 struct v4l2_subdev subdev;
117 struct media_pad pad;
118
119 struct v4l2_mbus_framefmt format;
120 struct v4l2_rect crop;
121
122 struct v4l2_ctrl_handler ctrls;
123 struct v4l2_ctrl *gains[4];
124
125 u16 output_control;
126 u16 black_level;
127 };
128
129 static inline struct mt9t001 *to_mt9t001(struct v4l2_subdev *sd)
130 {
131 return container_of(sd, struct mt9t001, subdev);
132 }
133
134 static int mt9t001_read(struct i2c_client *client, u8 reg)
135 {
136 return i2c_smbus_read_word_swapped(client, reg);
137 }
138
139 static int mt9t001_write(struct i2c_client *client, u8 reg, u16 data)
140 {
141 return i2c_smbus_write_word_swapped(client, reg, data);
142 }
143
144 static int mt9t001_set_output_control(struct mt9t001 *mt9t001, u16 clear,
145 u16 set)
146 {
147 struct i2c_client *client = v4l2_get_subdevdata(&mt9t001->subdev);
148 u16 value = (mt9t001->output_control & ~clear) | set;
149 int ret;
150
151 if (value == mt9t001->output_control)
152 return 0;
153
154 ret = mt9t001_write(client, MT9T001_OUTPUT_CONTROL, value);
155 if (ret < 0)
156 return ret;
157
158 mt9t001->output_control = value;
159 return 0;
160 }
161
162 /* -----------------------------------------------------------------------------
163 * V4L2 subdev video operations
164 */
165
166 static struct v4l2_mbus_framefmt *
167 __mt9t001_get_pad_format(struct mt9t001 *mt9t001, struct v4l2_subdev_fh *fh,
168 unsigned int pad, enum v4l2_subdev_format_whence which)
169 {
170 switch (which) {
171 case V4L2_SUBDEV_FORMAT_TRY:
172 return v4l2_subdev_get_try_format(fh, pad);
173 case V4L2_SUBDEV_FORMAT_ACTIVE:
174 return &mt9t001->format;
175 default:
176 return NULL;
177 }
178 }
179
180 static struct v4l2_rect *
181 __mt9t001_get_pad_crop(struct mt9t001 *mt9t001, struct v4l2_subdev_fh *fh,
182 unsigned int pad, enum v4l2_subdev_format_whence which)
183 {
184 switch (which) {
185 case V4L2_SUBDEV_FORMAT_TRY:
186 return v4l2_subdev_get_try_crop(fh, pad);
187 case V4L2_SUBDEV_FORMAT_ACTIVE:
188 return &mt9t001->crop;
189 default:
190 return NULL;
191 }
192 }
193
194 static int mt9t001_s_stream(struct v4l2_subdev *subdev, int enable)
195 {
196 const u16 mode = MT9T001_OUTPUT_CONTROL_CHIP_ENABLE;
197 struct i2c_client *client = v4l2_get_subdevdata(subdev);
198 struct mt9t001 *mt9t001 = to_mt9t001(subdev);
199 struct v4l2_mbus_framefmt *format = &mt9t001->format;
200 struct v4l2_rect *crop = &mt9t001->crop;
201 unsigned int hratio;
202 unsigned int vratio;
203 int ret;
204
205 if (!enable)
206 return mt9t001_set_output_control(mt9t001, mode, 0);
207
208 /* Configure the window size and row/column bin */
209 hratio = DIV_ROUND_CLOSEST(crop->width, format->width);
210 vratio = DIV_ROUND_CLOSEST(crop->height, format->height);
211
212 ret = mt9t001_write(client, MT9T001_ROW_ADDRESS_MODE, hratio - 1);
213 if (ret < 0)
214 return ret;
215
216 ret = mt9t001_write(client, MT9T001_COLUMN_ADDRESS_MODE, vratio - 1);
217 if (ret < 0)
218 return ret;
219
220 ret = mt9t001_write(client, MT9T001_COLUMN_START, crop->left);
221 if (ret < 0)
222 return ret;
223
224 ret = mt9t001_write(client, MT9T001_ROW_START, crop->top);
225 if (ret < 0)
226 return ret;
227
228 ret = mt9t001_write(client, MT9T001_WINDOW_WIDTH, crop->width - 1);
229 if (ret < 0)
230 return ret;
231
232 ret = mt9t001_write(client, MT9T001_WINDOW_HEIGHT, crop->height - 1);
233 if (ret < 0)
234 return ret;
235
236 /* Switch to master "normal" mode */
237 return mt9t001_set_output_control(mt9t001, 0, mode);
238 }
239
240 static int mt9t001_enum_mbus_code(struct v4l2_subdev *subdev,
241 struct v4l2_subdev_fh *fh,
242 struct v4l2_subdev_mbus_code_enum *code)
243 {
244 if (code->index > 0)
245 return -EINVAL;
246
247 code->code = V4L2_MBUS_FMT_SGRBG10_1X10;
248 return 0;
249 }
250
251 static int mt9t001_enum_frame_size(struct v4l2_subdev *subdev,
252 struct v4l2_subdev_fh *fh,
253 struct v4l2_subdev_frame_size_enum *fse)
254 {
255 if (fse->index >= 8 || fse->code != V4L2_MBUS_FMT_SGRBG10_1X10)
256 return -EINVAL;
257
258 fse->min_width = (MT9T001_WINDOW_WIDTH_DEF + 1) / fse->index;
259 fse->max_width = fse->min_width;
260 fse->min_height = (MT9T001_WINDOW_HEIGHT_DEF + 1) / fse->index;
261 fse->max_height = fse->min_height;
262
263 return 0;
264 }
265
266 static int mt9t001_get_format(struct v4l2_subdev *subdev,
267 struct v4l2_subdev_fh *fh,
268 struct v4l2_subdev_format *format)
269 {
270 struct mt9t001 *mt9t001 = to_mt9t001(subdev);
271
272 format->format = *__mt9t001_get_pad_format(mt9t001, fh, format->pad,
273 format->which);
274 return 0;
275 }
276
277 static int mt9t001_set_format(struct v4l2_subdev *subdev,
278 struct v4l2_subdev_fh *fh,
279 struct v4l2_subdev_format *format)
280 {
281 struct mt9t001 *mt9t001 = to_mt9t001(subdev);
282 struct v4l2_mbus_framefmt *__format;
283 struct v4l2_rect *__crop;
284 unsigned int width;
285 unsigned int height;
286 unsigned int hratio;
287 unsigned int vratio;
288
289 __crop = __mt9t001_get_pad_crop(mt9t001, fh, format->pad,
290 format->which);
291
292 /* Clamp the width and height to avoid dividing by zero. */
293 width = clamp_t(unsigned int, ALIGN(format->format.width, 2),
294 max_t(unsigned int, __crop->width / 8,
295 MT9T001_WINDOW_HEIGHT_MIN + 1),
296 __crop->width);
297 height = clamp_t(unsigned int, ALIGN(format->format.height, 2),
298 max_t(unsigned int, __crop->height / 8,
299 MT9T001_WINDOW_HEIGHT_MIN + 1),
300 __crop->height);
301
302 hratio = DIV_ROUND_CLOSEST(__crop->width, width);
303 vratio = DIV_ROUND_CLOSEST(__crop->height, height);
304
305 __format = __mt9t001_get_pad_format(mt9t001, fh, format->pad,
306 format->which);
307 __format->width = __crop->width / hratio;
308 __format->height = __crop->height / vratio;
309
310 format->format = *__format;
311
312 return 0;
313 }
314
315 static int mt9t001_get_crop(struct v4l2_subdev *subdev,
316 struct v4l2_subdev_fh *fh,
317 struct v4l2_subdev_crop *crop)
318 {
319 struct mt9t001 *mt9t001 = to_mt9t001(subdev);
320
321 crop->rect = *__mt9t001_get_pad_crop(mt9t001, fh, crop->pad,
322 crop->which);
323 return 0;
324 }
325
326 static int mt9t001_set_crop(struct v4l2_subdev *subdev,
327 struct v4l2_subdev_fh *fh,
328 struct v4l2_subdev_crop *crop)
329 {
330 struct mt9t001 *mt9t001 = to_mt9t001(subdev);
331 struct v4l2_mbus_framefmt *__format;
332 struct v4l2_rect *__crop;
333 struct v4l2_rect rect;
334
335 /* Clamp the crop rectangle boundaries and align them to a multiple of 2
336 * pixels.
337 */
338 rect.left = clamp(ALIGN(crop->rect.left, 2),
339 MT9T001_COLUMN_START_MIN,
340 MT9T001_COLUMN_START_MAX);
341 rect.top = clamp(ALIGN(crop->rect.top, 2),
342 MT9T001_ROW_START_MIN,
343 MT9T001_ROW_START_MAX);
344 rect.width = clamp_t(unsigned int, ALIGN(crop->rect.width, 2),
345 MT9T001_WINDOW_WIDTH_MIN + 1,
346 MT9T001_WINDOW_WIDTH_MAX + 1);
347 rect.height = clamp_t(unsigned int, ALIGN(crop->rect.height, 2),
348 MT9T001_WINDOW_HEIGHT_MIN + 1,
349 MT9T001_WINDOW_HEIGHT_MAX + 1);
350
351 rect.width = min_t(unsigned int, rect.width,
352 MT9T001_PIXEL_ARRAY_WIDTH - rect.left);
353 rect.height = min_t(unsigned int, rect.height,
354 MT9T001_PIXEL_ARRAY_HEIGHT - rect.top);
355
356 __crop = __mt9t001_get_pad_crop(mt9t001, fh, crop->pad, crop->which);
357
358 if (rect.width != __crop->width || rect.height != __crop->height) {
359 /* Reset the output image size if the crop rectangle size has
360 * been modified.
361 */
362 __format = __mt9t001_get_pad_format(mt9t001, fh, crop->pad,
363 crop->which);
364 __format->width = rect.width;
365 __format->height = rect.height;
366 }
367
368 *__crop = rect;
369 crop->rect = rect;
370
371 return 0;
372 }
373
374 /* -----------------------------------------------------------------------------
375 * V4L2 subdev control operations
376 */
377
378 #define V4L2_CID_TEST_PATTERN_COLOR (V4L2_CID_USER_BASE | 0x1001)
379 #define V4L2_CID_BLACK_LEVEL_AUTO (V4L2_CID_USER_BASE | 0x1002)
380 #define V4L2_CID_BLACK_LEVEL_OFFSET (V4L2_CID_USER_BASE | 0x1003)
381 #define V4L2_CID_BLACK_LEVEL_CALIBRATE (V4L2_CID_USER_BASE | 0x1004)
382
383 #define V4L2_CID_GAIN_RED (V4L2_CTRL_CLASS_CAMERA | 0x1001)
384 #define V4L2_CID_GAIN_GREEN_RED (V4L2_CTRL_CLASS_CAMERA | 0x1002)
385 #define V4L2_CID_GAIN_GREEN_BLUE (V4L2_CTRL_CLASS_CAMERA | 0x1003)
386 #define V4L2_CID_GAIN_BLUE (V4L2_CTRL_CLASS_CAMERA | 0x1004)
387
388 static u16 mt9t001_gain_value(s32 *gain)
389 {
390 /* Gain is controlled by 2 analog stages and a digital stage. Valid
391 * values for the 3 stages are
392 *
393 * Stage Min Max Step
394 * ------------------------------------------
395 * First analog stage x1 x2 1
396 * Second analog stage x1 x4 0.125
397 * Digital stage x1 x16 0.125
398 *
399 * To minimize noise, the gain stages should be used in the second
400 * analog stage, first analog stage, digital stage order. Gain from a
401 * previous stage should be pushed to its maximum value before the next
402 * stage is used.
403 */
404 if (*gain <= 32)
405 return *gain;
406
407 if (*gain <= 64) {
408 *gain &= ~1;
409 return (1 << 6) | (*gain >> 1);
410 }
411
412 *gain &= ~7;
413 return ((*gain - 64) << 5) | (1 << 6) | 32;
414 }
415
416 static int mt9t001_ctrl_freeze(struct mt9t001 *mt9t001, bool freeze)
417 {
418 return mt9t001_set_output_control(mt9t001,
419 freeze ? 0 : MT9T001_OUTPUT_CONTROL_SYNC,
420 freeze ? MT9T001_OUTPUT_CONTROL_SYNC : 0);
421 }
422
423 static int mt9t001_s_ctrl(struct v4l2_ctrl *ctrl)
424 {
425 static const u8 gains[4] = {
426 MT9T001_RED_GAIN, MT9T001_GREEN1_GAIN,
427 MT9T001_GREEN2_GAIN, MT9T001_BLUE_GAIN
428 };
429
430 struct mt9t001 *mt9t001 =
431 container_of(ctrl->handler, struct mt9t001, ctrls);
432 struct i2c_client *client = v4l2_get_subdevdata(&mt9t001->subdev);
433 unsigned int count;
434 unsigned int i;
435 u16 value;
436 int ret;
437
438 switch (ctrl->id) {
439 case V4L2_CID_GAIN_RED:
440 case V4L2_CID_GAIN_GREEN_RED:
441 case V4L2_CID_GAIN_GREEN_BLUE:
442 case V4L2_CID_GAIN_BLUE:
443
444 /* Disable control updates if more than one control has changed
445 * in the cluster.
446 */
447 for (i = 0, count = 0; i < 4; ++i) {
448 struct v4l2_ctrl *gain = mt9t001->gains[i];
449
450 if (gain->val != gain->cur.val)
451 count++;
452 }
453
454 if (count > 1) {
455 ret = mt9t001_ctrl_freeze(mt9t001, true);
456 if (ret < 0)
457 return ret;
458 }
459
460 /* Update the gain controls. */
461 for (i = 0; i < 4; ++i) {
462 struct v4l2_ctrl *gain = mt9t001->gains[i];
463
464 if (gain->val == gain->cur.val)
465 continue;
466
467 value = mt9t001_gain_value(&gain->val);
468 ret = mt9t001_write(client, gains[i], value);
469 if (ret < 0) {
470 mt9t001_ctrl_freeze(mt9t001, false);
471 return ret;
472 }
473 }
474
475 /* Enable control updates. */
476 if (count > 1) {
477 ret = mt9t001_ctrl_freeze(mt9t001, false);
478 if (ret < 0)
479 return ret;
480 }
481
482 break;
483
484 case V4L2_CID_EXPOSURE:
485 ret = mt9t001_write(client, MT9T001_SHUTTER_WIDTH_LOW,
486 ctrl->val & 0xffff);
487 if (ret < 0)
488 return ret;
489
490 return mt9t001_write(client, MT9T001_SHUTTER_WIDTH_HIGH,
491 ctrl->val >> 16);
492
493 case V4L2_CID_TEST_PATTERN:
494 return mt9t001_set_output_control(mt9t001,
495 ctrl->val ? 0 : MT9T001_OUTPUT_CONTROL_TEST_DATA,
496 ctrl->val ? MT9T001_OUTPUT_CONTROL_TEST_DATA : 0);
497
498 case V4L2_CID_TEST_PATTERN_COLOR:
499 return mt9t001_write(client, MT9T001_TEST_DATA, ctrl->val << 2);
500
501 case V4L2_CID_BLACK_LEVEL_AUTO:
502 value = ctrl->val ? 0 : MT9T001_BLACK_LEVEL_OVERRIDE;
503 ret = mt9t001_write(client, MT9T001_BLACK_LEVEL_CALIBRATION,
504 value);
505 if (ret < 0)
506 return ret;
507
508 mt9t001->black_level = value;
509 break;
510
511 case V4L2_CID_BLACK_LEVEL_OFFSET:
512 ret = mt9t001_write(client, MT9T001_GREEN1_OFFSET, ctrl->val);
513 if (ret < 0)
514 return ret;
515
516 ret = mt9t001_write(client, MT9T001_GREEN2_OFFSET, ctrl->val);
517 if (ret < 0)
518 return ret;
519
520 ret = mt9t001_write(client, MT9T001_RED_OFFSET, ctrl->val);
521 if (ret < 0)
522 return ret;
523
524 return mt9t001_write(client, MT9T001_BLUE_OFFSET, ctrl->val);
525
526 case V4L2_CID_BLACK_LEVEL_CALIBRATE:
527 return mt9t001_write(client, MT9T001_BLACK_LEVEL_CALIBRATION,
528 MT9T001_BLACK_LEVEL_RECALCULATE |
529 mt9t001->black_level);
530 }
531
532 return 0;
533 }
534
535 static struct v4l2_ctrl_ops mt9t001_ctrl_ops = {
536 .s_ctrl = mt9t001_s_ctrl,
537 };
538
539 static const char * const mt9t001_test_pattern_menu[] = {
540 "Disabled",
541 "Enabled",
542 };
543
544 static const struct v4l2_ctrl_config mt9t001_ctrls[] = {
545 {
546 .ops = &mt9t001_ctrl_ops,
547 .id = V4L2_CID_TEST_PATTERN_COLOR,
548 .type = V4L2_CTRL_TYPE_INTEGER,
549 .name = "Test Pattern Color",
550 .min = 0,
551 .max = 1023,
552 .step = 1,
553 .def = 0,
554 .flags = 0,
555 }, {
556 .ops = &mt9t001_ctrl_ops,
557 .id = V4L2_CID_BLACK_LEVEL_AUTO,
558 .type = V4L2_CTRL_TYPE_BOOLEAN,
559 .name = "Black Level, Auto",
560 .min = 0,
561 .max = 1,
562 .step = 1,
563 .def = 1,
564 .flags = 0,
565 }, {
566 .ops = &mt9t001_ctrl_ops,
567 .id = V4L2_CID_BLACK_LEVEL_OFFSET,
568 .type = V4L2_CTRL_TYPE_INTEGER,
569 .name = "Black Level, Offset",
570 .min = -256,
571 .max = 255,
572 .step = 1,
573 .def = 32,
574 .flags = 0,
575 }, {
576 .ops = &mt9t001_ctrl_ops,
577 .id = V4L2_CID_BLACK_LEVEL_CALIBRATE,
578 .type = V4L2_CTRL_TYPE_BUTTON,
579 .name = "Black Level, Calibrate",
580 .min = 0,
581 .max = 0,
582 .step = 0,
583 .def = 0,
584 .flags = V4L2_CTRL_FLAG_WRITE_ONLY,
585 },
586 };
587
588 static const struct v4l2_ctrl_config mt9t001_gains[] = {
589 {
590 .ops = &mt9t001_ctrl_ops,
591 .id = V4L2_CID_GAIN_RED,
592 .type = V4L2_CTRL_TYPE_INTEGER,
593 .name = "Gain, Red",
594 .min = MT9T001_GLOBAL_GAIN_MIN,
595 .max = MT9T001_GLOBAL_GAIN_MAX,
596 .step = 1,
597 .def = MT9T001_GLOBAL_GAIN_MIN,
598 .flags = 0,
599 }, {
600 .ops = &mt9t001_ctrl_ops,
601 .id = V4L2_CID_GAIN_GREEN_RED,
602 .type = V4L2_CTRL_TYPE_INTEGER,
603 .name = "Gain, Green (R)",
604 .min = MT9T001_GLOBAL_GAIN_MIN,
605 .max = MT9T001_GLOBAL_GAIN_MAX,
606 .step = 1,
607 .def = MT9T001_GLOBAL_GAIN_MIN,
608 .flags = 0,
609 }, {
610 .ops = &mt9t001_ctrl_ops,
611 .id = V4L2_CID_GAIN_GREEN_BLUE,
612 .type = V4L2_CTRL_TYPE_INTEGER,
613 .name = "Gain, Green (B)",
614 .min = MT9T001_GLOBAL_GAIN_MIN,
615 .max = MT9T001_GLOBAL_GAIN_MAX,
616 .step = 1,
617 .def = MT9T001_GLOBAL_GAIN_MIN,
618 .flags = 0,
619 }, {
620 .ops = &mt9t001_ctrl_ops,
621 .id = V4L2_CID_GAIN_BLUE,
622 .type = V4L2_CTRL_TYPE_INTEGER,
623 .name = "Gain, Blue",
624 .min = MT9T001_GLOBAL_GAIN_MIN,
625 .max = MT9T001_GLOBAL_GAIN_MAX,
626 .step = 1,
627 .def = MT9T001_GLOBAL_GAIN_MIN,
628 .flags = 0,
629 },
630 };
631
632 /* -----------------------------------------------------------------------------
633 * V4L2 subdev internal operations
634 */
635
636 static int mt9t001_open(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh)
637 {
638 struct v4l2_mbus_framefmt *format;
639 struct v4l2_rect *crop;
640
641 crop = v4l2_subdev_get_try_crop(fh, 0);
642 crop->left = MT9T001_COLUMN_START_DEF;
643 crop->top = MT9T001_ROW_START_DEF;
644 crop->width = MT9T001_WINDOW_WIDTH_DEF + 1;
645 crop->height = MT9T001_WINDOW_HEIGHT_DEF + 1;
646
647 format = v4l2_subdev_get_try_format(fh, 0);
648 format->code = V4L2_MBUS_FMT_SGRBG10_1X10;
649 format->width = MT9T001_WINDOW_WIDTH_DEF + 1;
650 format->height = MT9T001_WINDOW_HEIGHT_DEF + 1;
651 format->field = V4L2_FIELD_NONE;
652 format->colorspace = V4L2_COLORSPACE_SRGB;
653
654 return 0;
655 }
656
657 static struct v4l2_subdev_video_ops mt9t001_subdev_video_ops = {
658 .s_stream = mt9t001_s_stream,
659 };
660
661 static struct v4l2_subdev_pad_ops mt9t001_subdev_pad_ops = {
662 .enum_mbus_code = mt9t001_enum_mbus_code,
663 .enum_frame_size = mt9t001_enum_frame_size,
664 .get_fmt = mt9t001_get_format,
665 .set_fmt = mt9t001_set_format,
666 .get_crop = mt9t001_get_crop,
667 .set_crop = mt9t001_set_crop,
668 };
669
670 static struct v4l2_subdev_ops mt9t001_subdev_ops = {
671 .video = &mt9t001_subdev_video_ops,
672 .pad = &mt9t001_subdev_pad_ops,
673 };
674
675 static struct v4l2_subdev_internal_ops mt9t001_subdev_internal_ops = {
676 .open = mt9t001_open,
677 };
678
679 static int mt9t001_video_probe(struct i2c_client *client)
680 {
681 struct mt9t001_platform_data *pdata = client->dev.platform_data;
682 s32 data;
683 int ret;
684
685 dev_info(&client->dev, "Probing MT9T001 at address 0x%02x\n",
686 client->addr);
687
688 /* Reset the chip and stop data read out */
689 ret = mt9t001_write(client, MT9T001_RESET, 1);
690 if (ret < 0)
691 return ret;
692
693 ret = mt9t001_write(client, MT9T001_RESET, 0);
694 if (ret < 0)
695 return ret;
696
697 ret = mt9t001_write(client, MT9T001_OUTPUT_CONTROL, 0);
698 if (ret < 0)
699 return ret;
700
701 /* Configure the pixel clock polarity */
702 if (pdata->clk_pol) {
703 ret = mt9t001_write(client, MT9T001_PIXEL_CLOCK,
704 MT9T001_PIXEL_CLOCK_INVERT);
705 if (ret < 0)
706 return ret;
707 }
708
709 /* Read and check the sensor version */
710 data = mt9t001_read(client, MT9T001_CHIP_VERSION);
711 if (data != MT9T001_CHIP_ID) {
712 dev_err(&client->dev, "MT9T001 not detected, wrong version "
713 "0x%04x\n", data);
714 return -ENODEV;
715 }
716
717 dev_info(&client->dev, "MT9T001 detected at address 0x%02x\n",
718 client->addr);
719
720 return ret;
721 }
722
723 static int mt9t001_probe(struct i2c_client *client,
724 const struct i2c_device_id *did)
725 {
726 struct mt9t001_platform_data *pdata = client->dev.platform_data;
727 struct mt9t001 *mt9t001;
728 unsigned int i;
729 int ret;
730
731 if (pdata == NULL) {
732 dev_err(&client->dev, "No platform data\n");
733 return -EINVAL;
734 }
735
736 if (!i2c_check_functionality(client->adapter,
737 I2C_FUNC_SMBUS_WORD_DATA)) {
738 dev_warn(&client->adapter->dev,
739 "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n");
740 return -EIO;
741 }
742
743 ret = mt9t001_video_probe(client);
744 if (ret < 0)
745 return ret;
746
747 mt9t001 = devm_kzalloc(&client->dev, sizeof(*mt9t001), GFP_KERNEL);
748 if (!mt9t001)
749 return -ENOMEM;
750
751 v4l2_ctrl_handler_init(&mt9t001->ctrls, ARRAY_SIZE(mt9t001_ctrls) +
752 ARRAY_SIZE(mt9t001_gains) + 4);
753
754 v4l2_ctrl_new_std(&mt9t001->ctrls, &mt9t001_ctrl_ops,
755 V4L2_CID_EXPOSURE, MT9T001_SHUTTER_WIDTH_MIN,
756 MT9T001_SHUTTER_WIDTH_MAX, 1,
757 MT9T001_SHUTTER_WIDTH_DEF);
758 v4l2_ctrl_new_std(&mt9t001->ctrls, &mt9t001_ctrl_ops,
759 V4L2_CID_BLACK_LEVEL, 1, 1, 1, 1);
760 v4l2_ctrl_new_std(&mt9t001->ctrls, &mt9t001_ctrl_ops,
761 V4L2_CID_PIXEL_RATE, pdata->ext_clk, pdata->ext_clk,
762 1, pdata->ext_clk);
763 v4l2_ctrl_new_std_menu_items(&mt9t001->ctrls, &mt9t001_ctrl_ops,
764 V4L2_CID_TEST_PATTERN,
765 ARRAY_SIZE(mt9t001_test_pattern_menu) - 1, 0,
766 0, mt9t001_test_pattern_menu);
767
768 for (i = 0; i < ARRAY_SIZE(mt9t001_ctrls); ++i)
769 v4l2_ctrl_new_custom(&mt9t001->ctrls, &mt9t001_ctrls[i], NULL);
770
771 for (i = 0; i < ARRAY_SIZE(mt9t001_gains); ++i)
772 mt9t001->gains[i] = v4l2_ctrl_new_custom(&mt9t001->ctrls,
773 &mt9t001_gains[i], NULL);
774
775 v4l2_ctrl_cluster(ARRAY_SIZE(mt9t001_gains), mt9t001->gains);
776
777 mt9t001->subdev.ctrl_handler = &mt9t001->ctrls;
778
779 if (mt9t001->ctrls.error) {
780 printk(KERN_INFO "%s: control initialization error %d\n",
781 __func__, mt9t001->ctrls.error);
782 ret = -EINVAL;
783 goto done;
784 }
785
786 mt9t001->crop.left = MT9T001_COLUMN_START_DEF;
787 mt9t001->crop.top = MT9T001_ROW_START_DEF;
788 mt9t001->crop.width = MT9T001_WINDOW_WIDTH_DEF + 1;
789 mt9t001->crop.height = MT9T001_WINDOW_HEIGHT_DEF + 1;
790
791 mt9t001->format.code = V4L2_MBUS_FMT_SGRBG10_1X10;
792 mt9t001->format.width = MT9T001_WINDOW_WIDTH_DEF + 1;
793 mt9t001->format.height = MT9T001_WINDOW_HEIGHT_DEF + 1;
794 mt9t001->format.field = V4L2_FIELD_NONE;
795 mt9t001->format.colorspace = V4L2_COLORSPACE_SRGB;
796
797 v4l2_i2c_subdev_init(&mt9t001->subdev, client, &mt9t001_subdev_ops);
798 mt9t001->subdev.internal_ops = &mt9t001_subdev_internal_ops;
799 mt9t001->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
800
801 mt9t001->pad.flags = MEDIA_PAD_FL_SOURCE;
802 ret = media_entity_init(&mt9t001->subdev.entity, 1, &mt9t001->pad, 0);
803
804 done:
805 if (ret < 0) {
806 v4l2_ctrl_handler_free(&mt9t001->ctrls);
807 media_entity_cleanup(&mt9t001->subdev.entity);
808 }
809
810 return ret;
811 }
812
813 static int mt9t001_remove(struct i2c_client *client)
814 {
815 struct v4l2_subdev *subdev = i2c_get_clientdata(client);
816 struct mt9t001 *mt9t001 = to_mt9t001(subdev);
817
818 v4l2_ctrl_handler_free(&mt9t001->ctrls);
819 v4l2_device_unregister_subdev(subdev);
820 media_entity_cleanup(&subdev->entity);
821 return 0;
822 }
823
824 static const struct i2c_device_id mt9t001_id[] = {
825 { "mt9t001", 0 },
826 { }
827 };
828 MODULE_DEVICE_TABLE(i2c, mt9t001_id);
829
830 static struct i2c_driver mt9t001_driver = {
831 .driver = {
832 .name = "mt9t001",
833 },
834 .probe = mt9t001_probe,
835 .remove = mt9t001_remove,
836 .id_table = mt9t001_id,
837 };
838
839 module_i2c_driver(mt9t001_driver);
840
841 MODULE_DESCRIPTION("Aptina (Micron) MT9T001 Camera driver");
842 MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>");
843 MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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