2 * Driver for MT9V032 CMOS Image Sensor from Micron
4 * Copyright (C) 2010, Laurent Pinchart <laurent.pinchart@ideasonboard.com>
6 * Based on the MT9M001 driver,
8 * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/delay.h>
16 #include <linux/i2c.h>
17 #include <linux/log2.h>
18 #include <linux/mutex.h>
19 #include <linux/slab.h>
20 #include <linux/videodev2.h>
21 #include <linux/v4l2-mediabus.h>
22 #include <linux/module.h>
24 #include <media/mt9v032.h>
25 #include <media/v4l2-ctrls.h>
26 #include <media/v4l2-device.h>
27 #include <media/v4l2-subdev.h>
29 #define MT9V032_PIXEL_ARRAY_HEIGHT 492
30 #define MT9V032_PIXEL_ARRAY_WIDTH 782
32 #define MT9V032_SYSCLK_FREQ_DEF 26600000
34 #define MT9V032_CHIP_VERSION 0x00
35 #define MT9V032_CHIP_ID_REV1 0x1311
36 #define MT9V032_CHIP_ID_REV3 0x1313
37 #define MT9V032_COLUMN_START 0x01
38 #define MT9V032_COLUMN_START_MIN 1
39 #define MT9V032_COLUMN_START_DEF 1
40 #define MT9V032_COLUMN_START_MAX 752
41 #define MT9V032_ROW_START 0x02
42 #define MT9V032_ROW_START_MIN 4
43 #define MT9V032_ROW_START_DEF 5
44 #define MT9V032_ROW_START_MAX 482
45 #define MT9V032_WINDOW_HEIGHT 0x03
46 #define MT9V032_WINDOW_HEIGHT_MIN 1
47 #define MT9V032_WINDOW_HEIGHT_DEF 480
48 #define MT9V032_WINDOW_HEIGHT_MAX 480
49 #define MT9V032_WINDOW_WIDTH 0x04
50 #define MT9V032_WINDOW_WIDTH_MIN 1
51 #define MT9V032_WINDOW_WIDTH_DEF 752
52 #define MT9V032_WINDOW_WIDTH_MAX 752
53 #define MT9V032_HORIZONTAL_BLANKING 0x05
54 #define MT9V032_HORIZONTAL_BLANKING_MIN 43
55 #define MT9V032_HORIZONTAL_BLANKING_DEF 94
56 #define MT9V032_HORIZONTAL_BLANKING_MAX 1023
57 #define MT9V032_VERTICAL_BLANKING 0x06
58 #define MT9V032_VERTICAL_BLANKING_MIN 4
59 #define MT9V032_VERTICAL_BLANKING_DEF 45
60 #define MT9V032_VERTICAL_BLANKING_MAX 3000
61 #define MT9V032_CHIP_CONTROL 0x07
62 #define MT9V032_CHIP_CONTROL_MASTER_MODE (1 << 3)
63 #define MT9V032_CHIP_CONTROL_DOUT_ENABLE (1 << 7)
64 #define MT9V032_CHIP_CONTROL_SEQUENTIAL (1 << 8)
65 #define MT9V032_SHUTTER_WIDTH1 0x08
66 #define MT9V032_SHUTTER_WIDTH2 0x09
67 #define MT9V032_SHUTTER_WIDTH_CONTROL 0x0a
68 #define MT9V032_TOTAL_SHUTTER_WIDTH 0x0b
69 #define MT9V032_TOTAL_SHUTTER_WIDTH_MIN 1
70 #define MT9V032_TOTAL_SHUTTER_WIDTH_DEF 480
71 #define MT9V032_TOTAL_SHUTTER_WIDTH_MAX 32767
72 #define MT9V032_RESET 0x0c
73 #define MT9V032_READ_MODE 0x0d
74 #define MT9V032_READ_MODE_ROW_BIN_MASK (3 << 0)
75 #define MT9V032_READ_MODE_ROW_BIN_SHIFT 0
76 #define MT9V032_READ_MODE_COLUMN_BIN_MASK (3 << 2)
77 #define MT9V032_READ_MODE_COLUMN_BIN_SHIFT 2
78 #define MT9V032_READ_MODE_ROW_FLIP (1 << 4)
79 #define MT9V032_READ_MODE_COLUMN_FLIP (1 << 5)
80 #define MT9V032_READ_MODE_DARK_COLUMNS (1 << 6)
81 #define MT9V032_READ_MODE_DARK_ROWS (1 << 7)
82 #define MT9V032_PIXEL_OPERATION_MODE 0x0f
83 #define MT9V032_PIXEL_OPERATION_MODE_COLOR (1 << 2)
84 #define MT9V032_PIXEL_OPERATION_MODE_HDR (1 << 6)
85 #define MT9V032_ANALOG_GAIN 0x35
86 #define MT9V032_ANALOG_GAIN_MIN 16
87 #define MT9V032_ANALOG_GAIN_DEF 16
88 #define MT9V032_ANALOG_GAIN_MAX 64
89 #define MT9V032_MAX_ANALOG_GAIN 0x36
90 #define MT9V032_MAX_ANALOG_GAIN_MAX 127
91 #define MT9V032_FRAME_DARK_AVERAGE 0x42
92 #define MT9V032_DARK_AVG_THRESH 0x46
93 #define MT9V032_DARK_AVG_LOW_THRESH_MASK (255 << 0)
94 #define MT9V032_DARK_AVG_LOW_THRESH_SHIFT 0
95 #define MT9V032_DARK_AVG_HIGH_THRESH_MASK (255 << 8)
96 #define MT9V032_DARK_AVG_HIGH_THRESH_SHIFT 8
97 #define MT9V032_ROW_NOISE_CORR_CONTROL 0x70
98 #define MT9V032_ROW_NOISE_CORR_ENABLE (1 << 5)
99 #define MT9V032_ROW_NOISE_CORR_USE_BLK_AVG (1 << 7)
100 #define MT9V032_PIXEL_CLOCK 0x74
101 #define MT9V032_PIXEL_CLOCK_INV_LINE (1 << 0)
102 #define MT9V032_PIXEL_CLOCK_INV_FRAME (1 << 1)
103 #define MT9V032_PIXEL_CLOCK_XOR_LINE (1 << 2)
104 #define MT9V032_PIXEL_CLOCK_CONT_LINE (1 << 3)
105 #define MT9V032_PIXEL_CLOCK_INV_PXL_CLK (1 << 4)
106 #define MT9V032_TEST_PATTERN 0x7f
107 #define MT9V032_TEST_PATTERN_DATA_MASK (1023 << 0)
108 #define MT9V032_TEST_PATTERN_DATA_SHIFT 0
109 #define MT9V032_TEST_PATTERN_USE_DATA (1 << 10)
110 #define MT9V032_TEST_PATTERN_GRAY_MASK (3 << 11)
111 #define MT9V032_TEST_PATTERN_GRAY_NONE (0 << 11)
112 #define MT9V032_TEST_PATTERN_GRAY_VERTICAL (1 << 11)
113 #define MT9V032_TEST_PATTERN_GRAY_HORIZONTAL (2 << 11)
114 #define MT9V032_TEST_PATTERN_GRAY_DIAGONAL (3 << 11)
115 #define MT9V032_TEST_PATTERN_ENABLE (1 << 13)
116 #define MT9V032_TEST_PATTERN_FLIP (1 << 14)
117 #define MT9V032_AEC_AGC_ENABLE 0xaf
118 #define MT9V032_AEC_ENABLE (1 << 0)
119 #define MT9V032_AGC_ENABLE (1 << 1)
120 #define MT9V032_THERMAL_INFO 0xc1
123 struct v4l2_subdev subdev
;
124 struct media_pad pad
;
126 struct v4l2_mbus_framefmt format
;
127 struct v4l2_rect crop
;
129 struct v4l2_ctrl_handler ctrls
;
131 struct v4l2_ctrl
*link_freq
;
132 struct v4l2_ctrl
*pixel_rate
;
135 struct mutex power_lock
;
138 struct mt9v032_platform_data
*pdata
;
146 static struct mt9v032
*to_mt9v032(struct v4l2_subdev
*sd
)
148 return container_of(sd
, struct mt9v032
, subdev
);
151 static int mt9v032_read(struct i2c_client
*client
, const u8 reg
)
153 s32 data
= i2c_smbus_read_word_swapped(client
, reg
);
154 dev_dbg(&client
->dev
, "%s: read 0x%04x from 0x%02x\n", __func__
,
159 static int mt9v032_write(struct i2c_client
*client
, const u8 reg
,
162 dev_dbg(&client
->dev
, "%s: writing 0x%04x to 0x%02x\n", __func__
,
164 return i2c_smbus_write_word_swapped(client
, reg
, data
);
167 static int mt9v032_set_chip_control(struct mt9v032
*mt9v032
, u16 clear
, u16 set
)
169 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9v032
->subdev
);
170 u16 value
= (mt9v032
->chip_control
& ~clear
) | set
;
173 ret
= mt9v032_write(client
, MT9V032_CHIP_CONTROL
, value
);
177 mt9v032
->chip_control
= value
;
182 mt9v032_update_aec_agc(struct mt9v032
*mt9v032
, u16 which
, int enable
)
184 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9v032
->subdev
);
185 u16 value
= mt9v032
->aec_agc
;
193 ret
= mt9v032_write(client
, MT9V032_AEC_AGC_ENABLE
, value
);
197 mt9v032
->aec_agc
= value
;
202 mt9v032_update_hblank(struct mt9v032
*mt9v032
)
204 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9v032
->subdev
);
205 struct v4l2_rect
*crop
= &mt9v032
->crop
;
207 return mt9v032_write(client
, MT9V032_HORIZONTAL_BLANKING
,
208 max_t(s32
, mt9v032
->hblank
, 660 - crop
->width
));
211 #define EXT_CLK 25000000
213 static int mt9v032_power_on(struct mt9v032
*mt9v032
)
215 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9v032
->subdev
);
218 if (mt9v032
->pdata
->set_clock
) {
219 mt9v032
->pdata
->set_clock(&mt9v032
->subdev
, mt9v032
->sysclk
);
223 /* Reset the chip and stop data read out */
224 ret
= mt9v032_write(client
, MT9V032_RESET
, 1);
228 ret
= mt9v032_write(client
, MT9V032_RESET
, 0);
232 return mt9v032_write(client
, MT9V032_CHIP_CONTROL
, 0);
235 static void mt9v032_power_off(struct mt9v032
*mt9v032
)
237 if (mt9v032
->pdata
->set_clock
)
238 mt9v032
->pdata
->set_clock(&mt9v032
->subdev
, 0);
241 static int __mt9v032_set_power(struct mt9v032
*mt9v032
, bool on
)
243 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9v032
->subdev
);
247 mt9v032_power_off(mt9v032
);
251 ret
= mt9v032_power_on(mt9v032
);
255 /* Configure the pixel clock polarity */
256 if (mt9v032
->pdata
&& mt9v032
->pdata
->clk_pol
) {
257 ret
= mt9v032_write(client
, MT9V032_PIXEL_CLOCK
,
258 MT9V032_PIXEL_CLOCK_INV_PXL_CLK
);
263 /* Disable the noise correction algorithm and restore the controls. */
264 ret
= mt9v032_write(client
, MT9V032_ROW_NOISE_CORR_CONTROL
, 0);
268 return v4l2_ctrl_handler_setup(&mt9v032
->ctrls
);
271 /* -----------------------------------------------------------------------------
272 * V4L2 subdev video operations
275 static struct v4l2_mbus_framefmt
*
276 __mt9v032_get_pad_format(struct mt9v032
*mt9v032
, struct v4l2_subdev_fh
*fh
,
277 unsigned int pad
, enum v4l2_subdev_format_whence which
)
280 case V4L2_SUBDEV_FORMAT_TRY
:
281 return v4l2_subdev_get_try_format(fh
, pad
);
282 case V4L2_SUBDEV_FORMAT_ACTIVE
:
283 return &mt9v032
->format
;
289 static struct v4l2_rect
*
290 __mt9v032_get_pad_crop(struct mt9v032
*mt9v032
, struct v4l2_subdev_fh
*fh
,
291 unsigned int pad
, enum v4l2_subdev_format_whence which
)
294 case V4L2_SUBDEV_FORMAT_TRY
:
295 return v4l2_subdev_get_try_crop(fh
, pad
);
296 case V4L2_SUBDEV_FORMAT_ACTIVE
:
297 return &mt9v032
->crop
;
303 static int mt9v032_s_stream(struct v4l2_subdev
*subdev
, int enable
)
305 const u16 mode
= MT9V032_CHIP_CONTROL_MASTER_MODE
306 | MT9V032_CHIP_CONTROL_DOUT_ENABLE
307 | MT9V032_CHIP_CONTROL_SEQUENTIAL
;
308 struct i2c_client
*client
= v4l2_get_subdevdata(subdev
);
309 struct mt9v032
*mt9v032
= to_mt9v032(subdev
);
310 struct v4l2_mbus_framefmt
*format
= &mt9v032
->format
;
311 struct v4l2_rect
*crop
= &mt9v032
->crop
;
317 return mt9v032_set_chip_control(mt9v032
, mode
, 0);
319 /* Configure the window size and row/column bin */
320 hratio
= DIV_ROUND_CLOSEST(crop
->width
, format
->width
);
321 vratio
= DIV_ROUND_CLOSEST(crop
->height
, format
->height
);
323 ret
= mt9v032_write(client
, MT9V032_READ_MODE
,
324 (hratio
- 1) << MT9V032_READ_MODE_ROW_BIN_SHIFT
|
325 (vratio
- 1) << MT9V032_READ_MODE_COLUMN_BIN_SHIFT
);
329 ret
= mt9v032_write(client
, MT9V032_COLUMN_START
, crop
->left
);
333 ret
= mt9v032_write(client
, MT9V032_ROW_START
, crop
->top
);
337 ret
= mt9v032_write(client
, MT9V032_WINDOW_WIDTH
, crop
->width
);
341 ret
= mt9v032_write(client
, MT9V032_WINDOW_HEIGHT
, crop
->height
);
345 ret
= mt9v032_update_hblank(mt9v032
);
349 /* Switch to master "normal" mode */
350 return mt9v032_set_chip_control(mt9v032
, 0, mode
);
353 static int mt9v032_enum_mbus_code(struct v4l2_subdev
*subdev
,
354 struct v4l2_subdev_fh
*fh
,
355 struct v4l2_subdev_mbus_code_enum
*code
)
360 code
->code
= V4L2_MBUS_FMT_SGRBG10_1X10
;
364 static int mt9v032_enum_frame_size(struct v4l2_subdev
*subdev
,
365 struct v4l2_subdev_fh
*fh
,
366 struct v4l2_subdev_frame_size_enum
*fse
)
368 if (fse
->index
>= 8 || fse
->code
!= V4L2_MBUS_FMT_SGRBG10_1X10
)
371 fse
->min_width
= MT9V032_WINDOW_WIDTH_DEF
/ fse
->index
;
372 fse
->max_width
= fse
->min_width
;
373 fse
->min_height
= MT9V032_WINDOW_HEIGHT_DEF
/ fse
->index
;
374 fse
->max_height
= fse
->min_height
;
379 static int mt9v032_get_format(struct v4l2_subdev
*subdev
,
380 struct v4l2_subdev_fh
*fh
,
381 struct v4l2_subdev_format
*format
)
383 struct mt9v032
*mt9v032
= to_mt9v032(subdev
);
385 format
->format
= *__mt9v032_get_pad_format(mt9v032
, fh
, format
->pad
,
390 static void mt9v032_configure_pixel_rate(struct mt9v032
*mt9v032
,
393 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9v032
->subdev
);
396 ret
= v4l2_ctrl_s_ctrl_int64(mt9v032
->pixel_rate
,
397 mt9v032
->sysclk
/ hratio
);
399 dev_warn(&client
->dev
, "failed to set pixel rate (%d)\n", ret
);
402 static int mt9v032_set_format(struct v4l2_subdev
*subdev
,
403 struct v4l2_subdev_fh
*fh
,
404 struct v4l2_subdev_format
*format
)
406 struct mt9v032
*mt9v032
= to_mt9v032(subdev
);
407 struct v4l2_mbus_framefmt
*__format
;
408 struct v4l2_rect
*__crop
;
414 __crop
= __mt9v032_get_pad_crop(mt9v032
, fh
, format
->pad
,
417 /* Clamp the width and height to avoid dividing by zero. */
418 width
= clamp_t(unsigned int, ALIGN(format
->format
.width
, 2),
419 max(__crop
->width
/ 8, MT9V032_WINDOW_WIDTH_MIN
),
421 height
= clamp_t(unsigned int, ALIGN(format
->format
.height
, 2),
422 max(__crop
->height
/ 8, MT9V032_WINDOW_HEIGHT_MIN
),
425 hratio
= DIV_ROUND_CLOSEST(__crop
->width
, width
);
426 vratio
= DIV_ROUND_CLOSEST(__crop
->height
, height
);
428 __format
= __mt9v032_get_pad_format(mt9v032
, fh
, format
->pad
,
430 __format
->width
= __crop
->width
/ hratio
;
431 __format
->height
= __crop
->height
/ vratio
;
432 if (format
->which
== V4L2_SUBDEV_FORMAT_ACTIVE
)
433 mt9v032_configure_pixel_rate(mt9v032
, hratio
);
435 format
->format
= *__format
;
440 static int mt9v032_get_crop(struct v4l2_subdev
*subdev
,
441 struct v4l2_subdev_fh
*fh
,
442 struct v4l2_subdev_crop
*crop
)
444 struct mt9v032
*mt9v032
= to_mt9v032(subdev
);
446 crop
->rect
= *__mt9v032_get_pad_crop(mt9v032
, fh
, crop
->pad
,
451 static int mt9v032_set_crop(struct v4l2_subdev
*subdev
,
452 struct v4l2_subdev_fh
*fh
,
453 struct v4l2_subdev_crop
*crop
)
455 struct mt9v032
*mt9v032
= to_mt9v032(subdev
);
456 struct v4l2_mbus_framefmt
*__format
;
457 struct v4l2_rect
*__crop
;
458 struct v4l2_rect rect
;
460 /* Clamp the crop rectangle boundaries and align them to a non multiple
461 * of 2 pixels to ensure a GRBG Bayer pattern.
463 rect
.left
= clamp(ALIGN(crop
->rect
.left
+ 1, 2) - 1,
464 MT9V032_COLUMN_START_MIN
,
465 MT9V032_COLUMN_START_MAX
);
466 rect
.top
= clamp(ALIGN(crop
->rect
.top
+ 1, 2) - 1,
467 MT9V032_ROW_START_MIN
,
468 MT9V032_ROW_START_MAX
);
469 rect
.width
= clamp(ALIGN(crop
->rect
.width
, 2),
470 MT9V032_WINDOW_WIDTH_MIN
,
471 MT9V032_WINDOW_WIDTH_MAX
);
472 rect
.height
= clamp(ALIGN(crop
->rect
.height
, 2),
473 MT9V032_WINDOW_HEIGHT_MIN
,
474 MT9V032_WINDOW_HEIGHT_MAX
);
476 rect
.width
= min(rect
.width
, MT9V032_PIXEL_ARRAY_WIDTH
- rect
.left
);
477 rect
.height
= min(rect
.height
, MT9V032_PIXEL_ARRAY_HEIGHT
- rect
.top
);
479 __crop
= __mt9v032_get_pad_crop(mt9v032
, fh
, crop
->pad
, crop
->which
);
481 if (rect
.width
!= __crop
->width
|| rect
.height
!= __crop
->height
) {
482 /* Reset the output image size if the crop rectangle size has
485 __format
= __mt9v032_get_pad_format(mt9v032
, fh
, crop
->pad
,
487 __format
->width
= rect
.width
;
488 __format
->height
= rect
.height
;
489 if (crop
->which
== V4L2_SUBDEV_FORMAT_ACTIVE
)
490 mt9v032_configure_pixel_rate(mt9v032
, 1);
499 /* -----------------------------------------------------------------------------
500 * V4L2 subdev control operations
503 #define V4L2_CID_TEST_PATTERN (V4L2_CID_USER_BASE | 0x1001)
505 static int mt9v032_s_ctrl(struct v4l2_ctrl
*ctrl
)
507 struct mt9v032
*mt9v032
=
508 container_of(ctrl
->handler
, struct mt9v032
, ctrls
);
509 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9v032
->subdev
);
514 case V4L2_CID_AUTOGAIN
:
515 return mt9v032_update_aec_agc(mt9v032
, MT9V032_AGC_ENABLE
,
519 return mt9v032_write(client
, MT9V032_ANALOG_GAIN
, ctrl
->val
);
521 case V4L2_CID_EXPOSURE_AUTO
:
522 return mt9v032_update_aec_agc(mt9v032
, MT9V032_AEC_ENABLE
,
525 case V4L2_CID_EXPOSURE
:
526 return mt9v032_write(client
, MT9V032_TOTAL_SHUTTER_WIDTH
,
529 case V4L2_CID_HBLANK
:
530 mt9v032
->hblank
= ctrl
->val
;
531 return mt9v032_update_hblank(mt9v032
);
533 case V4L2_CID_VBLANK
:
534 return mt9v032_write(client
, MT9V032_VERTICAL_BLANKING
,
537 case V4L2_CID_PIXEL_RATE
:
538 case V4L2_CID_LINK_FREQ
:
539 if (mt9v032
->link_freq
== NULL
)
542 freq
= mt9v032
->pdata
->link_freqs
[mt9v032
->link_freq
->val
];
543 mt9v032
->pixel_rate
->val64
= freq
;
544 mt9v032
->sysclk
= freq
;
547 case V4L2_CID_TEST_PATTERN
:
553 data
= MT9V032_TEST_PATTERN_GRAY_VERTICAL
554 | MT9V032_TEST_PATTERN_ENABLE
;
557 data
= MT9V032_TEST_PATTERN_GRAY_HORIZONTAL
558 | MT9V032_TEST_PATTERN_ENABLE
;
561 data
= MT9V032_TEST_PATTERN_GRAY_DIAGONAL
562 | MT9V032_TEST_PATTERN_ENABLE
;
565 data
= (ctrl
->val
<< MT9V032_TEST_PATTERN_DATA_SHIFT
)
566 | MT9V032_TEST_PATTERN_USE_DATA
567 | MT9V032_TEST_PATTERN_ENABLE
568 | MT9V032_TEST_PATTERN_FLIP
;
572 return mt9v032_write(client
, MT9V032_TEST_PATTERN
, data
);
578 static struct v4l2_ctrl_ops mt9v032_ctrl_ops
= {
579 .s_ctrl
= mt9v032_s_ctrl
,
582 static const struct v4l2_ctrl_config mt9v032_ctrls
[] = {
584 .ops
= &mt9v032_ctrl_ops
,
585 .id
= V4L2_CID_TEST_PATTERN
,
586 .type
= V4L2_CTRL_TYPE_INTEGER
,
587 .name
= "Test pattern",
596 /* -----------------------------------------------------------------------------
597 * V4L2 subdev core operations
600 static int mt9v032_set_power(struct v4l2_subdev
*subdev
, int on
)
602 struct mt9v032
*mt9v032
= to_mt9v032(subdev
);
605 mutex_lock(&mt9v032
->power_lock
);
607 /* If the power count is modified from 0 to != 0 or from != 0 to 0,
608 * update the power state.
610 if (mt9v032
->power_count
== !on
) {
611 ret
= __mt9v032_set_power(mt9v032
, !!on
);
616 /* Update the power count. */
617 mt9v032
->power_count
+= on
? 1 : -1;
618 WARN_ON(mt9v032
->power_count
< 0);
621 mutex_unlock(&mt9v032
->power_lock
);
625 /* -----------------------------------------------------------------------------
626 * V4L2 subdev internal operations
629 static int mt9v032_registered(struct v4l2_subdev
*subdev
)
631 struct i2c_client
*client
= v4l2_get_subdevdata(subdev
);
632 struct mt9v032
*mt9v032
= to_mt9v032(subdev
);
636 dev_info(&client
->dev
, "Probing MT9V032 at address 0x%02x\n",
639 ret
= mt9v032_power_on(mt9v032
);
641 dev_err(&client
->dev
, "MT9V032 power up failed\n");
645 /* Read and check the sensor version */
646 data
= mt9v032_read(client
, MT9V032_CHIP_VERSION
);
647 if (data
!= MT9V032_CHIP_ID_REV1
&& data
!= MT9V032_CHIP_ID_REV3
) {
648 dev_err(&client
->dev
, "MT9V032 not detected, wrong version "
653 mt9v032_power_off(mt9v032
);
655 dev_info(&client
->dev
, "MT9V032 detected at address 0x%02x\n",
658 mt9v032_configure_pixel_rate(mt9v032
, 1);
663 static int mt9v032_open(struct v4l2_subdev
*subdev
, struct v4l2_subdev_fh
*fh
)
665 struct v4l2_mbus_framefmt
*format
;
666 struct v4l2_rect
*crop
;
668 crop
= v4l2_subdev_get_try_crop(fh
, 0);
669 crop
->left
= MT9V032_COLUMN_START_DEF
;
670 crop
->top
= MT9V032_ROW_START_DEF
;
671 crop
->width
= MT9V032_WINDOW_WIDTH_DEF
;
672 crop
->height
= MT9V032_WINDOW_HEIGHT_DEF
;
674 format
= v4l2_subdev_get_try_format(fh
, 0);
675 format
->code
= V4L2_MBUS_FMT_SGRBG10_1X10
;
676 format
->width
= MT9V032_WINDOW_WIDTH_DEF
;
677 format
->height
= MT9V032_WINDOW_HEIGHT_DEF
;
678 format
->field
= V4L2_FIELD_NONE
;
679 format
->colorspace
= V4L2_COLORSPACE_SRGB
;
681 return mt9v032_set_power(subdev
, 1);
684 static int mt9v032_close(struct v4l2_subdev
*subdev
, struct v4l2_subdev_fh
*fh
)
686 return mt9v032_set_power(subdev
, 0);
689 static struct v4l2_subdev_core_ops mt9v032_subdev_core_ops
= {
690 .s_power
= mt9v032_set_power
,
693 static struct v4l2_subdev_video_ops mt9v032_subdev_video_ops
= {
694 .s_stream
= mt9v032_s_stream
,
697 static struct v4l2_subdev_pad_ops mt9v032_subdev_pad_ops
= {
698 .enum_mbus_code
= mt9v032_enum_mbus_code
,
699 .enum_frame_size
= mt9v032_enum_frame_size
,
700 .get_fmt
= mt9v032_get_format
,
701 .set_fmt
= mt9v032_set_format
,
702 .get_crop
= mt9v032_get_crop
,
703 .set_crop
= mt9v032_set_crop
,
706 static struct v4l2_subdev_ops mt9v032_subdev_ops
= {
707 .core
= &mt9v032_subdev_core_ops
,
708 .video
= &mt9v032_subdev_video_ops
,
709 .pad
= &mt9v032_subdev_pad_ops
,
712 static const struct v4l2_subdev_internal_ops mt9v032_subdev_internal_ops
= {
713 .registered
= mt9v032_registered
,
714 .open
= mt9v032_open
,
715 .close
= mt9v032_close
,
718 /* -----------------------------------------------------------------------------
719 * Driver initialization and probing
722 static int mt9v032_probe(struct i2c_client
*client
,
723 const struct i2c_device_id
*did
)
725 struct mt9v032_platform_data
*pdata
= client
->dev
.platform_data
;
726 struct mt9v032
*mt9v032
;
730 if (!i2c_check_functionality(client
->adapter
,
731 I2C_FUNC_SMBUS_WORD_DATA
)) {
732 dev_warn(&client
->adapter
->dev
,
733 "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n");
737 mt9v032
= kzalloc(sizeof(*mt9v032
), GFP_KERNEL
);
741 mutex_init(&mt9v032
->power_lock
);
742 mt9v032
->pdata
= pdata
;
744 v4l2_ctrl_handler_init(&mt9v032
->ctrls
, ARRAY_SIZE(mt9v032_ctrls
) + 8);
746 v4l2_ctrl_new_std(&mt9v032
->ctrls
, &mt9v032_ctrl_ops
,
747 V4L2_CID_AUTOGAIN
, 0, 1, 1, 1);
748 v4l2_ctrl_new_std(&mt9v032
->ctrls
, &mt9v032_ctrl_ops
,
749 V4L2_CID_GAIN
, MT9V032_ANALOG_GAIN_MIN
,
750 MT9V032_ANALOG_GAIN_MAX
, 1, MT9V032_ANALOG_GAIN_DEF
);
751 v4l2_ctrl_new_std_menu(&mt9v032
->ctrls
, &mt9v032_ctrl_ops
,
752 V4L2_CID_EXPOSURE_AUTO
, V4L2_EXPOSURE_MANUAL
, 0,
754 v4l2_ctrl_new_std(&mt9v032
->ctrls
, &mt9v032_ctrl_ops
,
755 V4L2_CID_EXPOSURE
, MT9V032_TOTAL_SHUTTER_WIDTH_MIN
,
756 MT9V032_TOTAL_SHUTTER_WIDTH_MAX
, 1,
757 MT9V032_TOTAL_SHUTTER_WIDTH_DEF
);
758 v4l2_ctrl_new_std(&mt9v032
->ctrls
, &mt9v032_ctrl_ops
,
759 V4L2_CID_HBLANK
, MT9V032_HORIZONTAL_BLANKING_MIN
,
760 MT9V032_HORIZONTAL_BLANKING_MAX
, 1,
761 MT9V032_HORIZONTAL_BLANKING_DEF
);
762 v4l2_ctrl_new_std(&mt9v032
->ctrls
, &mt9v032_ctrl_ops
,
763 V4L2_CID_VBLANK
, MT9V032_VERTICAL_BLANKING_MIN
,
764 MT9V032_VERTICAL_BLANKING_MAX
, 1,
765 MT9V032_VERTICAL_BLANKING_DEF
);
767 mt9v032
->pixel_rate
=
768 v4l2_ctrl_new_std(&mt9v032
->ctrls
, &mt9v032_ctrl_ops
,
769 V4L2_CID_PIXEL_RATE
, 0, 0, 1, 0);
771 if (pdata
&& pdata
->link_freqs
) {
772 unsigned int def
= 0;
774 for (i
= 0; pdata
->link_freqs
[i
]; ++i
) {
775 if (pdata
->link_freqs
[i
] == pdata
->link_def_freq
)
780 v4l2_ctrl_new_int_menu(&mt9v032
->ctrls
,
782 V4L2_CID_LINK_FREQ
, i
- 1, def
,
784 v4l2_ctrl_cluster(2, &mt9v032
->link_freq
);
787 for (i
= 0; i
< ARRAY_SIZE(mt9v032_ctrls
); ++i
)
788 v4l2_ctrl_new_custom(&mt9v032
->ctrls
, &mt9v032_ctrls
[i
], NULL
);
790 mt9v032
->subdev
.ctrl_handler
= &mt9v032
->ctrls
;
792 if (mt9v032
->ctrls
.error
)
793 printk(KERN_INFO
"%s: control initialization error %d\n",
794 __func__
, mt9v032
->ctrls
.error
);
796 mt9v032
->crop
.left
= MT9V032_COLUMN_START_DEF
;
797 mt9v032
->crop
.top
= MT9V032_ROW_START_DEF
;
798 mt9v032
->crop
.width
= MT9V032_WINDOW_WIDTH_DEF
;
799 mt9v032
->crop
.height
= MT9V032_WINDOW_HEIGHT_DEF
;
801 mt9v032
->format
.code
= V4L2_MBUS_FMT_SGRBG10_1X10
;
802 mt9v032
->format
.width
= MT9V032_WINDOW_WIDTH_DEF
;
803 mt9v032
->format
.height
= MT9V032_WINDOW_HEIGHT_DEF
;
804 mt9v032
->format
.field
= V4L2_FIELD_NONE
;
805 mt9v032
->format
.colorspace
= V4L2_COLORSPACE_SRGB
;
807 mt9v032
->aec_agc
= MT9V032_AEC_ENABLE
| MT9V032_AGC_ENABLE
;
808 mt9v032
->hblank
= MT9V032_HORIZONTAL_BLANKING_DEF
;
809 mt9v032
->sysclk
= MT9V032_SYSCLK_FREQ_DEF
;
811 v4l2_i2c_subdev_init(&mt9v032
->subdev
, client
, &mt9v032_subdev_ops
);
812 mt9v032
->subdev
.internal_ops
= &mt9v032_subdev_internal_ops
;
813 mt9v032
->subdev
.flags
|= V4L2_SUBDEV_FL_HAS_DEVNODE
;
815 mt9v032
->pad
.flags
= MEDIA_PAD_FL_SOURCE
;
816 ret
= media_entity_init(&mt9v032
->subdev
.entity
, 1, &mt9v032
->pad
, 0);
823 static int mt9v032_remove(struct i2c_client
*client
)
825 struct v4l2_subdev
*subdev
= i2c_get_clientdata(client
);
826 struct mt9v032
*mt9v032
= to_mt9v032(subdev
);
828 v4l2_device_unregister_subdev(subdev
);
829 media_entity_cleanup(&subdev
->entity
);
834 static const struct i2c_device_id mt9v032_id
[] = {
838 MODULE_DEVICE_TABLE(i2c
, mt9v032_id
);
840 static struct i2c_driver mt9v032_driver
= {
844 .probe
= mt9v032_probe
,
845 .remove
= mt9v032_remove
,
846 .id_table
= mt9v032_id
,
849 module_i2c_driver(mt9v032_driver
);
851 MODULE_DESCRIPTION("Aptina MT9V032 Camera driver");
852 MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>");
853 MODULE_LICENSE("GPL");