2 * Driver for the Conexant CX23885 PCIe bridge
4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 #include <linux/init.h>
23 #include <linux/module.h>
24 #include <linux/pci.h>
25 #include <linux/delay.h>
26 #include <media/cx25840.h>
27 #include <linux/firmware.h>
28 #include <misc/altera.h>
31 #include "tuner-xc2028.h"
32 #include "netup-eeprom.h"
33 #include "netup-init.h"
34 #include "altera-ci.h"
37 #include "cx23888-ir.h"
39 static unsigned int netup_card_rev
= 4;
40 module_param(netup_card_rev
, int, 0644);
41 MODULE_PARM_DESC(netup_card_rev
,
42 "NetUP Dual DVB-T/C CI card revision");
43 static unsigned int enable_885_ir
;
44 module_param(enable_885_ir
, int, 0644);
45 MODULE_PARM_DESC(enable_885_ir
,
46 "Enable integrated IR controller for supported\n"
47 "\t\t CX2388[57] boards that are wired for it:\n"
48 "\t\t\tHVR-1250 (reported safe)\n"
49 "\t\t\tTerraTec Cinergy T PCIe Dual (not well tested, appears to be safe)\n"
50 "\t\t\tTeVii S470 (reported unsafe)\n"
51 "\t\t This can cause an interrupt storm with some cards.\n"
52 "\t\t Default: 0 [Disabled]");
54 /* ------------------------------------------------------------------ */
55 /* board config info */
57 struct cx23885_board cx23885_boards
[] = {
58 [CX23885_BOARD_UNKNOWN
] = {
59 .name
= "UNKNOWN/GENERIC",
60 /* Ensure safe default for unknown boards */
63 .type
= CX23885_VMUX_COMPOSITE1
,
66 .type
= CX23885_VMUX_COMPOSITE2
,
69 .type
= CX23885_VMUX_COMPOSITE3
,
72 .type
= CX23885_VMUX_COMPOSITE4
,
76 [CX23885_BOARD_HAUPPAUGE_HVR1800lp
] = {
77 .name
= "Hauppauge WinTV-HVR1800lp",
78 .portc
= CX23885_MPEG_DVB
,
80 .type
= CX23885_VMUX_TELEVISION
,
84 .type
= CX23885_VMUX_DEBUG
,
88 .type
= CX23885_VMUX_COMPOSITE1
,
92 .type
= CX23885_VMUX_SVIDEO
,
97 [CX23885_BOARD_HAUPPAUGE_HVR1800
] = {
98 .name
= "Hauppauge WinTV-HVR1800",
99 .porta
= CX23885_ANALOG_VIDEO
,
100 .portb
= CX23885_MPEG_ENCODER
,
101 .portc
= CX23885_MPEG_DVB
,
102 .tuner_type
= TUNER_PHILIPS_TDA8290
,
103 .tuner_addr
= 0x42, /* 0x84 >> 1 */
106 .type
= CX23885_VMUX_TELEVISION
,
107 .vmux
= CX25840_VIN7_CH3
|
110 .amux
= CX25840_AUDIO8
,
113 .type
= CX23885_VMUX_COMPOSITE1
,
114 .vmux
= CX25840_VIN7_CH3
|
117 .amux
= CX25840_AUDIO7
,
120 .type
= CX23885_VMUX_SVIDEO
,
121 .vmux
= CX25840_VIN7_CH3
|
125 .amux
= CX25840_AUDIO7
,
129 [CX23885_BOARD_HAUPPAUGE_HVR1250
] = {
130 .name
= "Hauppauge WinTV-HVR1250",
131 .porta
= CX23885_ANALOG_VIDEO
,
132 .portc
= CX23885_MPEG_DVB
,
133 #ifdef MT2131_NO_ANALOG_SUPPORT_YET
134 .tuner_type
= TUNER_PHILIPS_TDA8290
,
135 .tuner_addr
= 0x42, /* 0x84 >> 1 */
140 #ifdef MT2131_NO_ANALOG_SUPPORT_YET
141 .type
= CX23885_VMUX_TELEVISION
,
142 .vmux
= CX25840_VIN7_CH3
|
145 .amux
= CX25840_AUDIO8
,
149 .type
= CX23885_VMUX_COMPOSITE1
,
150 .vmux
= CX25840_VIN7_CH3
|
153 .amux
= CX25840_AUDIO7
,
156 .type
= CX23885_VMUX_SVIDEO
,
157 .vmux
= CX25840_VIN7_CH3
|
161 .amux
= CX25840_AUDIO7
,
165 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP
] = {
166 .name
= "DViCO FusionHDTV5 Express",
167 .portb
= CX23885_MPEG_DVB
,
169 [CX23885_BOARD_HAUPPAUGE_HVR1500Q
] = {
170 .name
= "Hauppauge WinTV-HVR1500Q",
171 .portc
= CX23885_MPEG_DVB
,
173 [CX23885_BOARD_HAUPPAUGE_HVR1500
] = {
174 .name
= "Hauppauge WinTV-HVR1500",
175 .porta
= CX23885_ANALOG_VIDEO
,
176 .portc
= CX23885_MPEG_DVB
,
177 .tuner_type
= TUNER_XC2028
,
178 .tuner_addr
= 0x61, /* 0xc2 >> 1 */
180 .type
= CX23885_VMUX_TELEVISION
,
181 .vmux
= CX25840_VIN7_CH3
|
186 .type
= CX23885_VMUX_COMPOSITE1
,
187 .vmux
= CX25840_VIN7_CH3
|
192 .type
= CX23885_VMUX_SVIDEO
,
193 .vmux
= CX25840_VIN7_CH3
|
200 [CX23885_BOARD_HAUPPAUGE_HVR1200
] = {
201 .name
= "Hauppauge WinTV-HVR1200",
202 .portc
= CX23885_MPEG_DVB
,
204 [CX23885_BOARD_HAUPPAUGE_HVR1700
] = {
205 .name
= "Hauppauge WinTV-HVR1700",
206 .portc
= CX23885_MPEG_DVB
,
208 [CX23885_BOARD_HAUPPAUGE_HVR1400
] = {
209 .name
= "Hauppauge WinTV-HVR1400",
210 .portc
= CX23885_MPEG_DVB
,
212 [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP
] = {
213 .name
= "DViCO FusionHDTV7 Dual Express",
214 .portb
= CX23885_MPEG_DVB
,
215 .portc
= CX23885_MPEG_DVB
,
217 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP
] = {
218 .name
= "DViCO FusionHDTV DVB-T Dual Express",
219 .portb
= CX23885_MPEG_DVB
,
220 .portc
= CX23885_MPEG_DVB
,
222 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H
] = {
223 .name
= "Leadtek Winfast PxDVR3200 H",
224 .portc
= CX23885_MPEG_DVB
,
226 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000
] = {
227 .name
= "Leadtek Winfast PxDVR3200 H XC4000",
228 .porta
= CX23885_ANALOG_VIDEO
,
229 .portc
= CX23885_MPEG_DVB
,
230 .tuner_type
= TUNER_XC4000
,
233 .radio_addr
= ADDR_UNSET
,
235 .type
= CX23885_VMUX_TELEVISION
,
236 .vmux
= CX25840_VIN2_CH1
|
240 .type
= CX23885_VMUX_COMPOSITE1
,
241 .vmux
= CX25840_COMPOSITE1
,
243 .type
= CX23885_VMUX_SVIDEO
,
244 .vmux
= CX25840_SVIDEO_LUMA3
|
245 CX25840_SVIDEO_CHROMA4
,
247 .type
= CX23885_VMUX_COMPONENT
,
248 .vmux
= CX25840_VIN7_CH1
|
251 CX25840_COMPONENT_ON
,
254 [CX23885_BOARD_COMPRO_VIDEOMATE_E650F
] = {
255 .name
= "Compro VideoMate E650F",
256 .portc
= CX23885_MPEG_DVB
,
258 [CX23885_BOARD_TBS_6920
] = {
259 .name
= "TurboSight TBS 6920",
260 .portb
= CX23885_MPEG_DVB
,
262 [CX23885_BOARD_TEVII_S470
] = {
263 .name
= "TeVii S470",
264 .portb
= CX23885_MPEG_DVB
,
266 [CX23885_BOARD_DVBWORLD_2005
] = {
267 .name
= "DVBWorld DVB-S2 2005",
268 .portb
= CX23885_MPEG_DVB
,
270 [CX23885_BOARD_NETUP_DUAL_DVBS2_CI
] = {
272 .name
= "NetUP Dual DVB-S2 CI",
273 .portb
= CX23885_MPEG_DVB
,
274 .portc
= CX23885_MPEG_DVB
,
276 [CX23885_BOARD_HAUPPAUGE_HVR1270
] = {
277 .name
= "Hauppauge WinTV-HVR1270",
278 .portc
= CX23885_MPEG_DVB
,
280 [CX23885_BOARD_HAUPPAUGE_HVR1275
] = {
281 .name
= "Hauppauge WinTV-HVR1275",
282 .portc
= CX23885_MPEG_DVB
,
284 [CX23885_BOARD_HAUPPAUGE_HVR1255
] = {
285 .name
= "Hauppauge WinTV-HVR1255",
286 .porta
= CX23885_ANALOG_VIDEO
,
287 .portc
= CX23885_MPEG_DVB
,
288 .tuner_type
= TUNER_ABSENT
,
289 .tuner_addr
= 0x42, /* 0x84 >> 1 */
292 .type
= CX23885_VMUX_TELEVISION
,
293 .vmux
= CX25840_VIN7_CH3
|
297 .amux
= CX25840_AUDIO8
,
299 .type
= CX23885_VMUX_COMPOSITE1
,
300 .vmux
= CX25840_VIN7_CH3
|
303 .amux
= CX25840_AUDIO7
,
305 .type
= CX23885_VMUX_SVIDEO
,
306 .vmux
= CX25840_VIN7_CH3
|
310 .amux
= CX25840_AUDIO7
,
313 [CX23885_BOARD_HAUPPAUGE_HVR1255_22111
] = {
314 .name
= "Hauppauge WinTV-HVR1255",
315 .porta
= CX23885_ANALOG_VIDEO
,
316 .portc
= CX23885_MPEG_DVB
,
317 .tuner_type
= TUNER_ABSENT
,
318 .tuner_addr
= 0x42, /* 0x84 >> 1 */
321 .type
= CX23885_VMUX_TELEVISION
,
322 .vmux
= CX25840_VIN7_CH3
|
326 .amux
= CX25840_AUDIO8
,
328 .type
= CX23885_VMUX_SVIDEO
,
329 .vmux
= CX25840_VIN7_CH3
|
333 .amux
= CX25840_AUDIO7
,
336 [CX23885_BOARD_HAUPPAUGE_HVR1210
] = {
337 .name
= "Hauppauge WinTV-HVR1210",
338 .portc
= CX23885_MPEG_DVB
,
340 [CX23885_BOARD_MYGICA_X8506
] = {
341 .name
= "Mygica X8506 DMB-TH",
342 .tuner_type
= TUNER_XC5000
,
345 .porta
= CX23885_ANALOG_VIDEO
,
346 .portb
= CX23885_MPEG_DVB
,
349 .type
= CX23885_VMUX_TELEVISION
,
350 .vmux
= CX25840_COMPOSITE2
,
353 .type
= CX23885_VMUX_COMPOSITE1
,
354 .vmux
= CX25840_COMPOSITE8
,
357 .type
= CX23885_VMUX_SVIDEO
,
358 .vmux
= CX25840_SVIDEO_LUMA3
|
359 CX25840_SVIDEO_CHROMA4
,
362 .type
= CX23885_VMUX_COMPONENT
,
363 .vmux
= CX25840_COMPONENT_ON
|
370 [CX23885_BOARD_MAGICPRO_PROHDTVE2
] = {
371 .name
= "Magic-Pro ProHDTV Extreme 2",
372 .tuner_type
= TUNER_XC5000
,
375 .porta
= CX23885_ANALOG_VIDEO
,
376 .portb
= CX23885_MPEG_DVB
,
379 .type
= CX23885_VMUX_TELEVISION
,
380 .vmux
= CX25840_COMPOSITE2
,
383 .type
= CX23885_VMUX_COMPOSITE1
,
384 .vmux
= CX25840_COMPOSITE8
,
387 .type
= CX23885_VMUX_SVIDEO
,
388 .vmux
= CX25840_SVIDEO_LUMA3
|
389 CX25840_SVIDEO_CHROMA4
,
392 .type
= CX23885_VMUX_COMPONENT
,
393 .vmux
= CX25840_COMPONENT_ON
|
400 [CX23885_BOARD_HAUPPAUGE_HVR1850
] = {
401 .name
= "Hauppauge WinTV-HVR1850",
402 .porta
= CX23885_ANALOG_VIDEO
,
403 .portb
= CX23885_MPEG_ENCODER
,
404 .portc
= CX23885_MPEG_DVB
,
405 .tuner_type
= TUNER_ABSENT
,
406 .tuner_addr
= 0x42, /* 0x84 >> 1 */
409 .type
= CX23885_VMUX_TELEVISION
,
410 .vmux
= CX25840_VIN7_CH3
|
414 .amux
= CX25840_AUDIO8
,
416 .type
= CX23885_VMUX_COMPOSITE1
,
417 .vmux
= CX25840_VIN7_CH3
|
420 .amux
= CX25840_AUDIO7
,
422 .type
= CX23885_VMUX_SVIDEO
,
423 .vmux
= CX25840_VIN7_CH3
|
427 .amux
= CX25840_AUDIO7
,
430 [CX23885_BOARD_COMPRO_VIDEOMATE_E800
] = {
431 .name
= "Compro VideoMate E800",
432 .portc
= CX23885_MPEG_DVB
,
434 [CX23885_BOARD_HAUPPAUGE_HVR1290
] = {
435 .name
= "Hauppauge WinTV-HVR1290",
436 .portc
= CX23885_MPEG_DVB
,
438 [CX23885_BOARD_MYGICA_X8558PRO
] = {
439 .name
= "Mygica X8558 PRO DMB-TH",
440 .portb
= CX23885_MPEG_DVB
,
441 .portc
= CX23885_MPEG_DVB
,
443 [CX23885_BOARD_LEADTEK_WINFAST_PXTV1200
] = {
444 .name
= "LEADTEK WinFast PxTV1200",
445 .porta
= CX23885_ANALOG_VIDEO
,
446 .tuner_type
= TUNER_XC2028
,
450 .type
= CX23885_VMUX_TELEVISION
,
451 .vmux
= CX25840_VIN2_CH1
|
455 .type
= CX23885_VMUX_COMPOSITE1
,
456 .vmux
= CX25840_COMPOSITE1
,
458 .type
= CX23885_VMUX_SVIDEO
,
459 .vmux
= CX25840_SVIDEO_LUMA3
|
460 CX25840_SVIDEO_CHROMA4
,
462 .type
= CX23885_VMUX_COMPONENT
,
463 .vmux
= CX25840_VIN7_CH1
|
466 CX25840_COMPONENT_ON
,
469 [CX23885_BOARD_GOTVIEW_X5_3D_HYBRID
] = {
470 .name
= "GoTView X5 3D Hybrid",
471 .tuner_type
= TUNER_XC5000
,
474 .porta
= CX23885_ANALOG_VIDEO
,
475 .portb
= CX23885_MPEG_DVB
,
477 .type
= CX23885_VMUX_TELEVISION
,
478 .vmux
= CX25840_VIN2_CH1
|
482 .type
= CX23885_VMUX_COMPOSITE1
,
483 .vmux
= CX23885_VMUX_COMPOSITE1
,
485 .type
= CX23885_VMUX_SVIDEO
,
486 .vmux
= CX25840_SVIDEO_LUMA3
|
487 CX25840_SVIDEO_CHROMA4
,
490 [CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF
] = {
492 .name
= "NetUP Dual DVB-T/C-CI RF",
493 .porta
= CX23885_ANALOG_VIDEO
,
494 .portb
= CX23885_MPEG_DVB
,
495 .portc
= CX23885_MPEG_DVB
,
498 .tuner_type
= TUNER_XC5000
,
501 .type
= CX23885_VMUX_TELEVISION
,
502 .vmux
= CX25840_COMPOSITE1
,
505 [CX23885_BOARD_MPX885
] = {
507 .porta
= CX23885_ANALOG_VIDEO
,
509 .type
= CX23885_VMUX_COMPOSITE1
,
510 .vmux
= CX25840_COMPOSITE1
,
511 .amux
= CX25840_AUDIO6
,
514 .type
= CX23885_VMUX_COMPOSITE2
,
515 .vmux
= CX25840_COMPOSITE2
,
516 .amux
= CX25840_AUDIO6
,
519 .type
= CX23885_VMUX_COMPOSITE3
,
520 .vmux
= CX25840_COMPOSITE3
,
521 .amux
= CX25840_AUDIO7
,
524 .type
= CX23885_VMUX_COMPOSITE4
,
525 .vmux
= CX25840_COMPOSITE4
,
526 .amux
= CX25840_AUDIO7
,
530 [CX23885_BOARD_MYGICA_X8507
] = {
531 .name
= "Mygica X8507",
532 .tuner_type
= TUNER_XC5000
,
535 .porta
= CX23885_ANALOG_VIDEO
,
538 .type
= CX23885_VMUX_TELEVISION
,
539 .vmux
= CX25840_COMPOSITE2
,
540 .amux
= CX25840_AUDIO8
,
543 .type
= CX23885_VMUX_COMPOSITE1
,
544 .vmux
= CX25840_COMPOSITE8
,
545 .amux
= CX25840_AUDIO7
,
548 .type
= CX23885_VMUX_SVIDEO
,
549 .vmux
= CX25840_SVIDEO_LUMA3
|
550 CX25840_SVIDEO_CHROMA4
,
551 .amux
= CX25840_AUDIO7
,
554 .type
= CX23885_VMUX_COMPONENT
,
555 .vmux
= CX25840_COMPONENT_ON
|
559 .amux
= CX25840_AUDIO7
,
563 [CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL
] = {
564 .name
= "TerraTec Cinergy T PCIe Dual",
565 .portb
= CX23885_MPEG_DVB
,
566 .portc
= CX23885_MPEG_DVB
,
568 [CX23885_BOARD_TEVII_S471
] = {
569 .name
= "TeVii S471",
570 .portb
= CX23885_MPEG_DVB
,
572 [CX23885_BOARD_PROF_8000
] = {
573 .name
= "Prof Revolution DVB-S2 8000",
574 .portb
= CX23885_MPEG_DVB
,
577 const unsigned int cx23885_bcount
= ARRAY_SIZE(cx23885_boards
);
579 /* ------------------------------------------------------------------ */
580 /* PCI subsystem IDs */
582 struct cx23885_subid cx23885_subids
[] = {
586 .card
= CX23885_BOARD_UNKNOWN
,
590 .card
= CX23885_BOARD_HAUPPAUGE_HVR1800lp
,
594 .card
= CX23885_BOARD_HAUPPAUGE_HVR1800
,
598 .card
= CX23885_BOARD_HAUPPAUGE_HVR1800
,
602 .card
= CX23885_BOARD_HAUPPAUGE_HVR1800
,
606 .card
= CX23885_BOARD_HAUPPAUGE_HVR1250
,
610 .card
= CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP
,
614 .card
= CX23885_BOARD_HAUPPAUGE_HVR1500Q
,
618 .card
= CX23885_BOARD_HAUPPAUGE_HVR1500Q
,
622 .card
= CX23885_BOARD_HAUPPAUGE_HVR1500
,
626 .card
= CX23885_BOARD_HAUPPAUGE_HVR1500
,
630 .card
= CX23885_BOARD_HAUPPAUGE_HVR1200
,
634 .card
= CX23885_BOARD_HAUPPAUGE_HVR1200
,
638 .card
= CX23885_BOARD_HAUPPAUGE_HVR1700
,
642 .card
= CX23885_BOARD_HAUPPAUGE_HVR1400
,
646 .card
= CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP
,
650 .card
= CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP
,
654 .card
= CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H
,
658 .card
= CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000
,
662 .card
= CX23885_BOARD_COMPRO_VIDEOMATE_E650F
,
666 .card
= CX23885_BOARD_TBS_6920
,
670 .card
= CX23885_BOARD_TEVII_S470
,
674 .card
= CX23885_BOARD_DVBWORLD_2005
,
678 .card
= CX23885_BOARD_NETUP_DUAL_DVBS2_CI
,
682 .card
= CX23885_BOARD_HAUPPAUGE_HVR1270
,
686 .card
= CX23885_BOARD_HAUPPAUGE_HVR1275
,
690 .card
= CX23885_BOARD_HAUPPAUGE_HVR1275
,
694 .card
= CX23885_BOARD_HAUPPAUGE_HVR1255
,
698 .card
= CX23885_BOARD_HAUPPAUGE_HVR1255_22111
,
702 .card
= CX23885_BOARD_HAUPPAUGE_HVR1210
,
706 .card
= CX23885_BOARD_HAUPPAUGE_HVR1210
,
710 .card
= CX23885_BOARD_HAUPPAUGE_HVR1210
,
714 .card
= CX23885_BOARD_HAUPPAUGE_HVR1210
, /* HVR1215 */
718 .card
= CX23885_BOARD_HAUPPAUGE_HVR1210
,
722 .card
= CX23885_BOARD_HAUPPAUGE_HVR1255
,
726 .card
= CX23885_BOARD_HAUPPAUGE_HVR1275
,
730 .card
= CX23885_BOARD_HAUPPAUGE_HVR1210
, /* HVR1215 */
734 .card
= CX23885_BOARD_HAUPPAUGE_HVR1210
,
738 .card
= CX23885_BOARD_HAUPPAUGE_HVR1210
, /* HVR1215 */
742 .card
= CX23885_BOARD_MYGICA_X8506
,
746 .card
= CX23885_BOARD_MAGICPRO_PROHDTVE2
,
750 .card
= CX23885_BOARD_HAUPPAUGE_HVR1850
,
754 .card
= CX23885_BOARD_COMPRO_VIDEOMATE_E800
,
758 .card
= CX23885_BOARD_HAUPPAUGE_HVR1290
,
762 .card
= CX23885_BOARD_MYGICA_X8558PRO
,
766 .card
= CX23885_BOARD_LEADTEK_WINFAST_PXTV1200
,
770 .card
= CX23885_BOARD_GOTVIEW_X5_3D_HYBRID
,
774 .card
= CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF
,
778 .card
= CX23885_BOARD_MYGICA_X8507
,
782 .card
= CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL
,
786 .card
= CX23885_BOARD_TEVII_S471
,
790 .card
= CX23885_BOARD_PROF_8000
,
793 const unsigned int cx23885_idcount
= ARRAY_SIZE(cx23885_subids
);
795 void cx23885_card_list(struct cx23885_dev
*dev
)
799 if (0 == dev
->pci
->subsystem_vendor
&&
800 0 == dev
->pci
->subsystem_device
) {
802 "%s: Board has no valid PCIe Subsystem ID and can't\n"
803 "%s: be autodetected. Pass card=<n> insmod option\n"
804 "%s: to workaround that. Redirect complaints to the\n"
805 "%s: vendor of the TV card. Best regards,\n"
807 dev
->name
, dev
->name
, dev
->name
, dev
->name
, dev
->name
);
810 "%s: Your board isn't known (yet) to the driver.\n"
811 "%s: Try to pick one of the existing card configs via\n"
812 "%s: card=<n> insmod option. Updating to the latest\n"
813 "%s: version might help as well.\n",
814 dev
->name
, dev
->name
, dev
->name
, dev
->name
);
816 printk(KERN_INFO
"%s: Here is a list of valid choices for the card=<n> insmod option:\n",
818 for (i
= 0; i
< cx23885_bcount
; i
++)
819 printk(KERN_INFO
"%s: card=%d -> %s\n",
820 dev
->name
, i
, cx23885_boards
[i
].name
);
823 static void hauppauge_eeprom(struct cx23885_dev
*dev
, u8
*eeprom_data
)
827 tveeprom_hauppauge_analog(&dev
->i2c_bus
[0].i2c_client
, &tv
,
830 /* Make sure we support the board model */
833 /* WinTV-HVR1270 (PCIe, Retail, half height)
834 * ATSC/QAM and basic analog, IR Blast */
836 /* WinTV-HVR1210 (PCIe, Retail, half height)
837 * DVB-T and basic analog, IR Blast */
839 /* WinTV-HVR1270 (PCIe, Retail, half height)
840 * ATSC/QAM and basic analog, IR Recv */
842 /* WinTV-HVR1210 (PCIe, Retail, half height)
843 * DVB-T and basic analog, IR Recv */
845 /* WinTV-HVR1275 (PCIe, Retail, half height)
846 * ATSC/QAM and basic analog, IR Recv */
848 /* WinTV-HVR1210 (PCIe, Retail, half height)
849 * DVB-T and basic analog, IR Recv */
851 /* WinTV-HVR1270 (PCIe, Retail, full height)
852 * ATSC/QAM and basic analog, IR Blast */
854 /* WinTV-HVR1210 (PCIe, Retail, full height)
855 * DVB-T and basic analog, IR Blast */
857 /* WinTV-HVR1270 (PCIe, Retail, full height)
858 * ATSC/QAM and basic analog, IR Recv */
860 /* WinTV-HVR1210 (PCIe, Retail, full height)
861 * DVB-T and basic analog, IR Recv */
863 /* WinTV-HVR1275 (PCIe, Retail, full height)
864 * ATSC/QAM and basic analog, IR Recv */
866 /* WinTV-HVR1210 (PCIe, Retail, full height)
867 * DVB-T and basic analog, IR Recv */
869 /* WinTV-HVR1200 (PCIe, Retail, full height)
870 * DVB-T and basic analog */
872 /* WinTV-HVR1200 (PCIe, OEM, half height)
873 * DVB-T and basic analog */
875 /* WinTV-HVR1200 (PCIe, OEM, half height)
876 * DVB-T and basic analog */
878 /* WinTV-HVR1200 (PCIe, OEM, full height)
879 * DVB-T and basic analog */
881 /* WinTV-HVR1200 (PCIe, OEM, half height)
882 * DVB-T and basic analog */
884 /* WinTV-HVR1200 (PCIe, OEM, full height)
885 * DVB-T and basic analog */
887 /* WinTV-HVR1200 (PCIe, OEM, full height)
888 * DVB-T and basic analog */
890 /* WinTV-HVR1200 (PCIe, OEM, half height)
891 * DVB-T and basic analog */
893 /* WinTV-HVR1200 (PCIe, OEM, full height)
894 * DVB-T and basic analog */
896 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
897 channel ATSC and MPEG2 HW Encoder */
899 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
902 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
905 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
908 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
911 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
912 Dual channel ATSC and MPEG2 HW Encoder */
914 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
915 Dual channel ATSC and MPEG2 HW Encoder */
917 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
918 Dual channel ATSC and MPEG2 HW Encoder */
920 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
921 Dual channel ATSC and MPEG2 HW Encoder */
923 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
924 Dual channel ATSC and MPEG2 HW Encoder */
926 /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
927 ATSC and Basic analog */
929 /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
930 ATSC and Basic analog */
932 /* WinTV-HVR1250 (PCIe, No IR, half height,
933 ATSC [at least] and Basic analog) */
935 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
936 ATSC and Basic analog */
938 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
939 ATSC and Basic analog */
941 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
942 ATSC and Basic analog */
944 /* WinTV-HVR1400 (Express Card, Retail, IR,
945 * DVB-T and Basic analog */
947 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
948 * DVB-T and MPEG2 HW Encoder */
950 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
951 * DVB-T and MPEG2 HW Encoder */
954 /* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM,
955 Dual channel ATSC and MPEG2 HW Encoder */
958 /* WinTV-HVR1290 (PCIe, OEM, RCA in, IR,
959 Dual channel ATSC and Basic analog */
962 printk(KERN_WARNING
"%s: warning: "
963 "unknown hauppauge model #%d\n",
964 dev
->name
, tv
.model
);
968 printk(KERN_INFO
"%s: hauppauge eeprom: model=%d\n",
969 dev
->name
, tv
.model
);
972 int cx23885_tuner_callback(void *priv
, int component
, int command
, int arg
)
974 struct cx23885_tsport
*port
= priv
;
975 struct cx23885_dev
*dev
= port
->dev
;
978 if ((command
== XC2028_RESET_CLK
) || (command
== XC2028_I2C_FLUSH
))
982 printk(KERN_ERR
"%s(): Unknown command 0x%x.\n",
987 switch (dev
->board
) {
988 case CX23885_BOARD_HAUPPAUGE_HVR1400
:
989 case CX23885_BOARD_HAUPPAUGE_HVR1500
:
990 case CX23885_BOARD_HAUPPAUGE_HVR1500Q
:
991 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H
:
992 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000
:
993 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F
:
994 case CX23885_BOARD_COMPRO_VIDEOMATE_E800
:
995 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200
:
996 /* Tuner Reset Command */
999 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP
:
1000 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP
:
1001 /* Two identical tuners on two different i2c buses,
1002 * we need to reset the correct gpio. */
1005 else if (port
->nr
== 2)
1008 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID
:
1009 /* Tuner Reset Command */
1012 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF
:
1013 altera_ci_tuner_reset(dev
, port
->nr
);
1018 /* Drive the tuner into reset and back out */
1019 cx_clear(GP0_IO
, bitmask
);
1021 cx_set(GP0_IO
, bitmask
);
1027 void cx23885_gpio_setup(struct cx23885_dev
*dev
)
1029 switch (dev
->board
) {
1030 case CX23885_BOARD_HAUPPAUGE_HVR1250
:
1031 /* GPIO-0 cx24227 demodulator reset */
1032 cx_set(GP0_IO
, 0x00010001); /* Bring the part out of reset */
1034 case CX23885_BOARD_HAUPPAUGE_HVR1500
:
1035 /* GPIO-0 cx24227 demodulator */
1036 /* GPIO-2 xc3028 tuner */
1038 /* Put the parts into reset */
1039 cx_set(GP0_IO
, 0x00050000);
1040 cx_clear(GP0_IO
, 0x00000005);
1043 /* Bring the parts out of reset */
1044 cx_set(GP0_IO
, 0x00050005);
1046 case CX23885_BOARD_HAUPPAUGE_HVR1500Q
:
1047 /* GPIO-0 cx24227 demodulator reset */
1048 /* GPIO-2 xc5000 tuner reset */
1049 cx_set(GP0_IO
, 0x00050005); /* Bring the part out of reset */
1051 case CX23885_BOARD_HAUPPAUGE_HVR1800
:
1052 /* GPIO-0 656_CLK */
1054 /* GPIO-2 8295A Reset */
1055 /* GPIO-3-10 cx23417 data0-7 */
1056 /* GPIO-11-14 cx23417 addr0-3 */
1057 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1060 /* CX23417 GPIO's */
1061 /* EIO15 Zilog Reset */
1062 /* EIO14 S5H1409/CX24227 Reset */
1063 mc417_gpio_enable(dev
, GPIO_15
| GPIO_14
, 1);
1065 /* Put the demod into reset and protect the eeprom */
1066 mc417_gpio_clear(dev
, GPIO_15
| GPIO_14
);
1069 /* Bring the demod and blaster out of reset */
1070 mc417_gpio_set(dev
, GPIO_15
| GPIO_14
);
1073 /* Force the TDA8295A into reset and back */
1074 cx23885_gpio_enable(dev
, GPIO_2
, 1);
1075 cx23885_gpio_set(dev
, GPIO_2
);
1077 cx23885_gpio_clear(dev
, GPIO_2
);
1079 cx23885_gpio_set(dev
, GPIO_2
);
1082 case CX23885_BOARD_HAUPPAUGE_HVR1200
:
1083 /* GPIO-0 tda10048 demodulator reset */
1084 /* GPIO-2 tda18271 tuner reset */
1086 /* Put the parts into reset and back */
1087 cx_set(GP0_IO
, 0x00050000);
1089 cx_clear(GP0_IO
, 0x00000005);
1091 cx_set(GP0_IO
, 0x00050005);
1093 case CX23885_BOARD_HAUPPAUGE_HVR1700
:
1094 /* GPIO-0 TDA10048 demodulator reset */
1095 /* GPIO-2 TDA8295A Reset */
1096 /* GPIO-3-10 cx23417 data0-7 */
1097 /* GPIO-11-14 cx23417 addr0-3 */
1098 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1100 /* The following GPIO's are on the interna AVCore (cx25840) */
1102 /* GPIO-20 IR_TX 416/DVBT Select */
1103 /* GPIO-21 IIS DAT */
1104 /* GPIO-22 IIS WCLK */
1105 /* GPIO-23 IIS BCLK */
1107 /* Put the parts into reset and back */
1108 cx_set(GP0_IO
, 0x00050000);
1110 cx_clear(GP0_IO
, 0x00000005);
1112 cx_set(GP0_IO
, 0x00050005);
1114 case CX23885_BOARD_HAUPPAUGE_HVR1400
:
1115 /* GPIO-0 Dibcom7000p demodulator reset */
1116 /* GPIO-2 xc3028L tuner reset */
1119 /* Put the parts into reset and back */
1120 cx_set(GP0_IO
, 0x00050000);
1122 cx_clear(GP0_IO
, 0x00000005);
1124 cx_set(GP0_IO
, 0x00050005);
1126 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP
:
1127 /* GPIO-0 xc5000 tuner reset i2c bus 0 */
1128 /* GPIO-1 s5h1409 demod reset i2c bus 0 */
1129 /* GPIO-2 xc5000 tuner reset i2c bus 1 */
1130 /* GPIO-3 s5h1409 demod reset i2c bus 0 */
1132 /* Put the parts into reset and back */
1133 cx_set(GP0_IO
, 0x000f0000);
1135 cx_clear(GP0_IO
, 0x0000000f);
1137 cx_set(GP0_IO
, 0x000f000f);
1139 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP
:
1140 /* GPIO-0 portb xc3028 reset */
1141 /* GPIO-1 portb zl10353 reset */
1142 /* GPIO-2 portc xc3028 reset */
1143 /* GPIO-3 portc zl10353 reset */
1145 /* Put the parts into reset and back */
1146 cx_set(GP0_IO
, 0x000f0000);
1148 cx_clear(GP0_IO
, 0x0000000f);
1150 cx_set(GP0_IO
, 0x000f000f);
1152 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H
:
1153 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000
:
1154 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F
:
1155 case CX23885_BOARD_COMPRO_VIDEOMATE_E800
:
1156 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200
:
1157 /* GPIO-2 xc3028 tuner reset */
1159 /* The following GPIO's are on the internal AVCore (cx25840) */
1160 /* GPIO-? zl10353 demod reset */
1162 /* Put the parts into reset and back */
1163 cx_set(GP0_IO
, 0x00040000);
1165 cx_clear(GP0_IO
, 0x00000004);
1167 cx_set(GP0_IO
, 0x00040004);
1169 case CX23885_BOARD_TBS_6920
:
1170 case CX23885_BOARD_PROF_8000
:
1171 cx_write(MC417_CTL
, 0x00000036);
1172 cx_write(MC417_OEN
, 0x00001000);
1173 cx_set(MC417_RWD
, 0x00000002);
1175 cx_clear(MC417_RWD
, 0x00000800);
1177 cx_set(MC417_RWD
, 0x00000800);
1180 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI
:
1181 /* GPIO-0 INTA from CiMax1
1182 GPIO-1 INTB from CiMax2
1184 GPIO-3 to GPIO-10 data/addr for CA
1185 GPIO-11 ~CS0 to CiMax1
1186 GPIO-12 ~CS1 to CiMax2
1187 GPIO-13 ADL0 load LSB addr
1188 GPIO-14 ADL1 load MSB addr
1189 GPIO-15 ~RDY from CiMax
1190 GPIO-17 ~RD to CiMax
1191 GPIO-18 ~WR to CiMax
1193 cx_set(GP0_IO
, 0x00040000); /* GPIO as out */
1194 /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
1195 cx_clear(GP0_IO
, 0x00030004);
1196 mdelay(100);/* reset delay */
1197 cx_set(GP0_IO
, 0x00040004); /* GPIO as out, reset high */
1198 cx_write(MC417_CTL
, 0x00000037);/* enable GPIO3-18 pins */
1199 /* GPIO-15 IN as ~ACK, rest as OUT */
1200 cx_write(MC417_OEN
, 0x00001000);
1201 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
1202 cx_write(MC417_RWD
, 0x0000c300);
1204 cx_write(GPIO_ISM
, 0x00000000);/* INTERRUPTS active low*/
1206 case CX23885_BOARD_HAUPPAUGE_HVR1270
:
1207 case CX23885_BOARD_HAUPPAUGE_HVR1275
:
1208 case CX23885_BOARD_HAUPPAUGE_HVR1255
:
1209 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111
:
1210 case CX23885_BOARD_HAUPPAUGE_HVR1210
:
1211 /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
1212 /* GPIO-6 I2C Gate which can isolate the demod from the bus */
1213 /* GPIO-9 Demod reset */
1215 /* Put the parts into reset and back */
1216 cx23885_gpio_enable(dev
, GPIO_9
| GPIO_6
| GPIO_5
, 1);
1217 cx23885_gpio_set(dev
, GPIO_9
| GPIO_6
| GPIO_5
);
1218 cx23885_gpio_clear(dev
, GPIO_9
);
1220 cx23885_gpio_set(dev
, GPIO_9
);
1222 case CX23885_BOARD_MYGICA_X8506
:
1223 case CX23885_BOARD_MAGICPRO_PROHDTVE2
:
1224 case CX23885_BOARD_MYGICA_X8507
:
1225 /* GPIO-0 (0)Analog / (1)Digital TV */
1226 /* GPIO-1 reset XC5000 */
1227 /* GPIO-2 reset LGS8GL5 / LGS8G75 */
1228 cx23885_gpio_enable(dev
, GPIO_0
| GPIO_1
| GPIO_2
, 1);
1229 cx23885_gpio_clear(dev
, GPIO_1
| GPIO_2
);
1231 cx23885_gpio_set(dev
, GPIO_0
| GPIO_1
| GPIO_2
);
1234 case CX23885_BOARD_MYGICA_X8558PRO
:
1235 /* GPIO-0 reset first ATBM8830 */
1236 /* GPIO-1 reset second ATBM8830 */
1237 cx23885_gpio_enable(dev
, GPIO_0
| GPIO_1
, 1);
1238 cx23885_gpio_clear(dev
, GPIO_0
| GPIO_1
);
1240 cx23885_gpio_set(dev
, GPIO_0
| GPIO_1
);
1243 case CX23885_BOARD_HAUPPAUGE_HVR1850
:
1244 case CX23885_BOARD_HAUPPAUGE_HVR1290
:
1245 /* GPIO-0 656_CLK */
1248 /* GPIO-3-10 cx23417 data0-7 */
1249 /* GPIO-11-14 cx23417 addr0-3 */
1250 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1252 /* GPIO-20 C_IR_TX */
1253 /* GPIO-21 I2S DAT */
1254 /* GPIO-22 I2S WCLK */
1255 /* GPIO-23 I2S BCLK */
1256 /* ALT GPIO: EXP GPIO LATCH */
1258 /* CX23417 GPIO's */
1259 /* GPIO-14 S5H1411/CX24228 Reset */
1260 /* GPIO-13 EEPROM write protect */
1261 mc417_gpio_enable(dev
, GPIO_14
| GPIO_13
, 1);
1263 /* Put the demod into reset and protect the eeprom */
1264 mc417_gpio_clear(dev
, GPIO_14
| GPIO_13
);
1267 /* Bring the demod out of reset */
1268 mc417_gpio_set(dev
, GPIO_14
);
1272 /* Connected to IF / Mux */
1274 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID
:
1275 cx_set(GP0_IO
, 0x00010001); /* Bring the part out of reset */
1277 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF
:
1280 GPIO-2 ~reset chips out
1281 GPIO-3 to GPIO-10 data/addr for CA in/out
1291 cx_set(GP0_IO
, 0x00060000); /* GPIO-1,2 as out */
1292 /* GPIO-0 as INT, reset & TMS low */
1293 cx_clear(GP0_IO
, 0x00010006);
1294 mdelay(100);/* reset delay */
1295 cx_set(GP0_IO
, 0x00000004); /* reset high */
1296 cx_write(MC417_CTL
, 0x00000037);/* enable GPIO-3..18 pins */
1297 /* GPIO-17 is TDO in, GPIO-15 is ~RDY in, rest is out */
1298 cx_write(MC417_OEN
, 0x00005000);
1299 /* ~RD, ~WR high; ADDR low; ~CS high */
1300 cx_write(MC417_RWD
, 0x00000d00);
1302 cx_write(GPIO_ISM
, 0x00000000);/* INTERRUPTS active low*/
1307 int cx23885_ir_init(struct cx23885_dev
*dev
)
1309 static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg
[] = {
1311 .flags
= V4L2_SUBDEV_IO_PIN_INPUT
,
1312 .pin
= CX23885_PIN_IR_RX_GPIO19
,
1313 .function
= CX23885_PAD_IR_RX
,
1315 .strength
= CX25840_PIN_DRIVE_MEDIUM
,
1317 .flags
= V4L2_SUBDEV_IO_PIN_OUTPUT
,
1318 .pin
= CX23885_PIN_IR_TX_GPIO20
,
1319 .function
= CX23885_PAD_IR_TX
,
1321 .strength
= CX25840_PIN_DRIVE_MEDIUM
,
1324 const size_t ir_rxtx_pin_cfg_count
= ARRAY_SIZE(ir_rxtx_pin_cfg
);
1326 static struct v4l2_subdev_io_pin_config ir_rx_pin_cfg
[] = {
1328 .flags
= V4L2_SUBDEV_IO_PIN_INPUT
,
1329 .pin
= CX23885_PIN_IR_RX_GPIO19
,
1330 .function
= CX23885_PAD_IR_RX
,
1332 .strength
= CX25840_PIN_DRIVE_MEDIUM
,
1335 const size_t ir_rx_pin_cfg_count
= ARRAY_SIZE(ir_rx_pin_cfg
);
1337 struct v4l2_subdev_ir_parameters params
;
1339 switch (dev
->board
) {
1340 case CX23885_BOARD_HAUPPAUGE_HVR1500
:
1341 case CX23885_BOARD_HAUPPAUGE_HVR1500Q
:
1342 case CX23885_BOARD_HAUPPAUGE_HVR1800
:
1343 case CX23885_BOARD_HAUPPAUGE_HVR1200
:
1344 case CX23885_BOARD_HAUPPAUGE_HVR1400
:
1345 case CX23885_BOARD_HAUPPAUGE_HVR1275
:
1346 case CX23885_BOARD_HAUPPAUGE_HVR1255
:
1347 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111
:
1348 case CX23885_BOARD_HAUPPAUGE_HVR1210
:
1349 /* FIXME: Implement me */
1351 case CX23885_BOARD_HAUPPAUGE_HVR1270
:
1352 ret
= cx23888_ir_probe(dev
);
1355 dev
->sd_ir
= cx23885_find_hw(dev
, CX23885_HW_888_IR
);
1356 v4l2_subdev_call(dev
->sd_cx25840
, core
, s_io_pin_config
,
1357 ir_rx_pin_cfg_count
, ir_rx_pin_cfg
);
1359 case CX23885_BOARD_HAUPPAUGE_HVR1850
:
1360 case CX23885_BOARD_HAUPPAUGE_HVR1290
:
1361 ret
= cx23888_ir_probe(dev
);
1364 dev
->sd_ir
= cx23885_find_hw(dev
, CX23885_HW_888_IR
);
1365 v4l2_subdev_call(dev
->sd_cx25840
, core
, s_io_pin_config
,
1366 ir_rxtx_pin_cfg_count
, ir_rxtx_pin_cfg
);
1368 * For these boards we need to invert the Tx output via the
1369 * IR controller to have the LED off while idle
1371 v4l2_subdev_call(dev
->sd_ir
, ir
, tx_g_parameters
, ¶ms
);
1372 params
.enable
= false;
1373 params
.shutdown
= false;
1374 params
.invert_level
= true;
1375 v4l2_subdev_call(dev
->sd_ir
, ir
, tx_s_parameters
, ¶ms
);
1376 params
.shutdown
= true;
1377 v4l2_subdev_call(dev
->sd_ir
, ir
, tx_s_parameters
, ¶ms
);
1379 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL
:
1380 case CX23885_BOARD_TEVII_S470
:
1383 dev
->sd_ir
= cx23885_find_hw(dev
, CX23885_HW_AV_CORE
);
1384 if (dev
->sd_ir
== NULL
) {
1388 v4l2_subdev_call(dev
->sd_cx25840
, core
, s_io_pin_config
,
1389 ir_rx_pin_cfg_count
, ir_rx_pin_cfg
);
1391 case CX23885_BOARD_HAUPPAUGE_HVR1250
:
1394 dev
->sd_ir
= cx23885_find_hw(dev
, CX23885_HW_AV_CORE
);
1395 if (dev
->sd_ir
== NULL
) {
1399 v4l2_subdev_call(dev
->sd_cx25840
, core
, s_io_pin_config
,
1400 ir_rxtx_pin_cfg_count
, ir_rxtx_pin_cfg
);
1402 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP
:
1403 request_module("ir-kbd-i2c");
1410 void cx23885_ir_fini(struct cx23885_dev
*dev
)
1412 switch (dev
->board
) {
1413 case CX23885_BOARD_HAUPPAUGE_HVR1270
:
1414 case CX23885_BOARD_HAUPPAUGE_HVR1850
:
1415 case CX23885_BOARD_HAUPPAUGE_HVR1290
:
1416 cx23885_irq_remove(dev
, PCI_MSK_IR
);
1417 cx23888_ir_remove(dev
);
1420 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL
:
1421 case CX23885_BOARD_TEVII_S470
:
1422 case CX23885_BOARD_HAUPPAUGE_HVR1250
:
1423 cx23885_irq_remove(dev
, PCI_MSK_AV_CORE
);
1424 /* sd_ir is a duplicate pointer to the AV Core, just clear it */
1430 static int netup_jtag_io(void *device
, int tms
, int tdi
, int read_tdo
)
1434 struct cx23885_dev
*dev
= (struct cx23885_dev
*)device
;
1436 data
= ((cx_read(GP0_IO
)) & (~0x00000002));
1437 data
|= (tms
? 0x00020002 : 0x00020000);
1438 cx_write(GP0_IO
, data
);
1441 data
= ((cx_read(MC417_RWD
)) & (~0x0000a000));
1442 data
|= (tdi
? 0x00008000 : 0);
1443 cx_write(MC417_RWD
, data
);
1445 tdo
= (data
& 0x00004000) ? 1 : 0; /*TDO*/
1447 cx_write(MC417_RWD
, data
| 0x00002000);
1450 cx_write(MC417_RWD
, data
);
1455 void cx23885_ir_pci_int_enable(struct cx23885_dev
*dev
)
1457 switch (dev
->board
) {
1458 case CX23885_BOARD_HAUPPAUGE_HVR1270
:
1459 case CX23885_BOARD_HAUPPAUGE_HVR1850
:
1460 case CX23885_BOARD_HAUPPAUGE_HVR1290
:
1462 cx23885_irq_add_enable(dev
, PCI_MSK_IR
);
1464 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL
:
1465 case CX23885_BOARD_TEVII_S470
:
1466 case CX23885_BOARD_HAUPPAUGE_HVR1250
:
1468 cx23885_irq_add_enable(dev
, PCI_MSK_AV_CORE
);
1473 void cx23885_card_setup(struct cx23885_dev
*dev
)
1475 struct cx23885_tsport
*ts1
= &dev
->ts1
;
1476 struct cx23885_tsport
*ts2
= &dev
->ts2
;
1478 static u8 eeprom
[256];
1480 if (dev
->i2c_bus
[0].i2c_rc
== 0) {
1481 dev
->i2c_bus
[0].i2c_client
.addr
= 0xa0 >> 1;
1482 tveeprom_read(&dev
->i2c_bus
[0].i2c_client
,
1483 eeprom
, sizeof(eeprom
));
1486 switch (dev
->board
) {
1487 case CX23885_BOARD_HAUPPAUGE_HVR1250
:
1488 if (dev
->i2c_bus
[0].i2c_rc
== 0) {
1489 if (eeprom
[0x80] != 0x84)
1490 hauppauge_eeprom(dev
, eeprom
+0xc0);
1492 hauppauge_eeprom(dev
, eeprom
+0x80);
1495 case CX23885_BOARD_HAUPPAUGE_HVR1500
:
1496 case CX23885_BOARD_HAUPPAUGE_HVR1500Q
:
1497 case CX23885_BOARD_HAUPPAUGE_HVR1400
:
1498 if (dev
->i2c_bus
[0].i2c_rc
== 0)
1499 hauppauge_eeprom(dev
, eeprom
+0x80);
1501 case CX23885_BOARD_HAUPPAUGE_HVR1800
:
1502 case CX23885_BOARD_HAUPPAUGE_HVR1800lp
:
1503 case CX23885_BOARD_HAUPPAUGE_HVR1200
:
1504 case CX23885_BOARD_HAUPPAUGE_HVR1700
:
1505 case CX23885_BOARD_HAUPPAUGE_HVR1270
:
1506 case CX23885_BOARD_HAUPPAUGE_HVR1275
:
1507 case CX23885_BOARD_HAUPPAUGE_HVR1255
:
1508 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111
:
1509 case CX23885_BOARD_HAUPPAUGE_HVR1210
:
1510 case CX23885_BOARD_HAUPPAUGE_HVR1850
:
1511 case CX23885_BOARD_HAUPPAUGE_HVR1290
:
1512 if (dev
->i2c_bus
[0].i2c_rc
== 0)
1513 hauppauge_eeprom(dev
, eeprom
+0xc0);
1517 switch (dev
->board
) {
1518 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP
:
1519 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP
:
1520 ts2
->gen_ctrl_val
= 0xc; /* Serial bus + punctured clock */
1521 ts2
->ts_clk_en_val
= 0x1; /* Enable TS_CLK */
1522 ts2
->src_sel_val
= CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
;
1523 /* break omitted intentionally */
1524 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP
:
1525 ts1
->gen_ctrl_val
= 0xc; /* Serial bus + punctured clock */
1526 ts1
->ts_clk_en_val
= 0x1; /* Enable TS_CLK */
1527 ts1
->src_sel_val
= CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
;
1529 case CX23885_BOARD_HAUPPAUGE_HVR1850
:
1530 case CX23885_BOARD_HAUPPAUGE_HVR1800
:
1531 /* Defaults for VID B - Analog encoder */
1532 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
1533 ts1
->gen_ctrl_val
= 0x10e;
1534 ts1
->ts_clk_en_val
= 0x1; /* Enable TS_CLK */
1535 ts1
->src_sel_val
= CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
;
1537 /* APB_TSVALERR_POL (active low)*/
1538 ts1
->vld_misc_val
= 0x2000;
1539 ts1
->hw_sop_ctrl_val
= (0x47 << 16 | 188 << 4 | 0xc);
1540 cx_write(0x130184, 0xc);
1542 /* Defaults for VID C */
1543 ts2
->gen_ctrl_val
= 0xc; /* Serial bus + punctured clock */
1544 ts2
->ts_clk_en_val
= 0x1; /* Enable TS_CLK */
1545 ts2
->src_sel_val
= CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
;
1547 case CX23885_BOARD_TBS_6920
:
1548 ts1
->gen_ctrl_val
= 0x4; /* Parallel */
1549 ts1
->ts_clk_en_val
= 0x1; /* Enable TS_CLK */
1550 ts1
->src_sel_val
= CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
;
1552 case CX23885_BOARD_TEVII_S470
:
1553 case CX23885_BOARD_TEVII_S471
:
1554 case CX23885_BOARD_DVBWORLD_2005
:
1555 case CX23885_BOARD_PROF_8000
:
1556 ts1
->gen_ctrl_val
= 0x5; /* Parallel */
1557 ts1
->ts_clk_en_val
= 0x1; /* Enable TS_CLK */
1558 ts1
->src_sel_val
= CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
;
1560 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI
:
1561 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF
:
1562 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL
:
1563 ts1
->gen_ctrl_val
= 0xc; /* Serial bus + punctured clock */
1564 ts1
->ts_clk_en_val
= 0x1; /* Enable TS_CLK */
1565 ts1
->src_sel_val
= CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
;
1566 ts2
->gen_ctrl_val
= 0xc; /* Serial bus + punctured clock */
1567 ts2
->ts_clk_en_val
= 0x1; /* Enable TS_CLK */
1568 ts2
->src_sel_val
= CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
;
1570 case CX23885_BOARD_MYGICA_X8506
:
1571 case CX23885_BOARD_MAGICPRO_PROHDTVE2
:
1572 ts1
->gen_ctrl_val
= 0x5; /* Parallel */
1573 ts1
->ts_clk_en_val
= 0x1; /* Enable TS_CLK */
1574 ts1
->src_sel_val
= CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
;
1576 case CX23885_BOARD_MYGICA_X8558PRO
:
1577 ts1
->gen_ctrl_val
= 0x5; /* Parallel */
1578 ts1
->ts_clk_en_val
= 0x1; /* Enable TS_CLK */
1579 ts1
->src_sel_val
= CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
;
1580 ts2
->gen_ctrl_val
= 0xc; /* Serial bus + punctured clock */
1581 ts2
->ts_clk_en_val
= 0x1; /* Enable TS_CLK */
1582 ts2
->src_sel_val
= CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
;
1584 case CX23885_BOARD_HAUPPAUGE_HVR1250
:
1585 case CX23885_BOARD_HAUPPAUGE_HVR1500
:
1586 case CX23885_BOARD_HAUPPAUGE_HVR1500Q
:
1587 case CX23885_BOARD_HAUPPAUGE_HVR1800lp
:
1588 case CX23885_BOARD_HAUPPAUGE_HVR1200
:
1589 case CX23885_BOARD_HAUPPAUGE_HVR1700
:
1590 case CX23885_BOARD_HAUPPAUGE_HVR1400
:
1591 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H
:
1592 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000
:
1593 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F
:
1594 case CX23885_BOARD_HAUPPAUGE_HVR1270
:
1595 case CX23885_BOARD_HAUPPAUGE_HVR1275
:
1596 case CX23885_BOARD_HAUPPAUGE_HVR1255
:
1597 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111
:
1598 case CX23885_BOARD_HAUPPAUGE_HVR1210
:
1599 case CX23885_BOARD_COMPRO_VIDEOMATE_E800
:
1600 case CX23885_BOARD_HAUPPAUGE_HVR1290
:
1601 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID
:
1603 ts2
->gen_ctrl_val
= 0xc; /* Serial bus + punctured clock */
1604 ts2
->ts_clk_en_val
= 0x1; /* Enable TS_CLK */
1605 ts2
->src_sel_val
= CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
;
1608 /* Certain boards support analog, or require the avcore to be
1609 * loaded, ensure this happens.
1611 switch (dev
->board
) {
1612 case CX23885_BOARD_TEVII_S470
:
1613 /* Currently only enabled for the integrated IR controller */
1616 case CX23885_BOARD_HAUPPAUGE_HVR1250
:
1617 case CX23885_BOARD_HAUPPAUGE_HVR1800
:
1618 case CX23885_BOARD_HAUPPAUGE_HVR1800lp
:
1619 case CX23885_BOARD_HAUPPAUGE_HVR1700
:
1620 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H
:
1621 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000
:
1622 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F
:
1623 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI
:
1624 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF
:
1625 case CX23885_BOARD_COMPRO_VIDEOMATE_E800
:
1626 case CX23885_BOARD_HAUPPAUGE_HVR1255
:
1627 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111
:
1628 case CX23885_BOARD_HAUPPAUGE_HVR1270
:
1629 case CX23885_BOARD_HAUPPAUGE_HVR1850
:
1630 case CX23885_BOARD_MYGICA_X8506
:
1631 case CX23885_BOARD_MAGICPRO_PROHDTVE2
:
1632 case CX23885_BOARD_HAUPPAUGE_HVR1290
:
1633 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200
:
1634 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID
:
1635 case CX23885_BOARD_HAUPPAUGE_HVR1500
:
1636 case CX23885_BOARD_MPX885
:
1637 case CX23885_BOARD_MYGICA_X8507
:
1638 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL
:
1639 dev
->sd_cx25840
= v4l2_i2c_new_subdev(&dev
->v4l2_dev
,
1640 &dev
->i2c_bus
[2].i2c_adap
,
1641 "cx25840", 0x88 >> 1, NULL
);
1642 if (dev
->sd_cx25840
) {
1643 dev
->sd_cx25840
->grp_id
= CX23885_HW_AV_CORE
;
1644 v4l2_subdev_call(dev
->sd_cx25840
, core
, load_fw
);
1649 /* AUX-PLL 27MHz CLK */
1650 switch (dev
->board
) {
1651 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI
:
1652 netup_initialize(dev
);
1654 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF
: {
1656 const struct firmware
*fw
;
1657 const char *filename
= "dvb-netup-altera-01.fw";
1658 char *action
= "configure";
1659 static struct netup_card_info cinfo
;
1660 struct altera_config netup_config
= {
1663 .jtag_io
= netup_jtag_io
,
1666 netup_initialize(dev
);
1668 netup_get_card_info(&dev
->i2c_bus
[0].i2c_adap
, &cinfo
);
1670 cinfo
.rev
= netup_card_rev
;
1672 switch (cinfo
.rev
) {
1674 filename
= "dvb-netup-altera-04.fw";
1677 filename
= "dvb-netup-altera-01.fw";
1680 printk(KERN_INFO
"NetUP card rev=0x%x fw_filename=%s\n",
1681 cinfo
.rev
, filename
);
1683 ret
= request_firmware(&fw
, filename
, &dev
->pci
->dev
);
1685 printk(KERN_ERR
"did not find the firmware file. (%s) "
1686 "Please see linux/Documentation/dvb/ for more details "
1687 "on firmware-problems.", filename
);
1689 altera_init(&netup_config
, fw
);
1691 release_firmware(fw
);
1697 /* ------------------------------------------------------------------ */