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[media] cx23885: add DVBSky S950C dvb-s/s2 ci PCIe card support(no RC)
[deliverable/linux.git] / drivers / media / pci / cx23885 / cx23885-dvb.c
1 /*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 */
17
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/device.h>
21 #include <linux/fs.h>
22 #include <linux/kthread.h>
23 #include <linux/file.h>
24 #include <linux/suspend.h>
25
26 #include "cx23885.h"
27 #include <media/v4l2-common.h>
28
29 #include "dvb_ca_en50221.h"
30 #include "s5h1409.h"
31 #include "s5h1411.h"
32 #include "mt2131.h"
33 #include "tda8290.h"
34 #include "tda18271.h"
35 #include "lgdt330x.h"
36 #include "xc4000.h"
37 #include "xc5000.h"
38 #include "max2165.h"
39 #include "tda10048.h"
40 #include "tuner-xc2028.h"
41 #include "tuner-simple.h"
42 #include "dib7000p.h"
43 #include "dib0070.h"
44 #include "dibx000_common.h"
45 #include "zl10353.h"
46 #include "stv0900.h"
47 #include "stv0900_reg.h"
48 #include "stv6110.h"
49 #include "lnbh24.h"
50 #include "cx24116.h"
51 #include "cx24117.h"
52 #include "cimax2.h"
53 #include "lgs8gxx.h"
54 #include "netup-eeprom.h"
55 #include "netup-init.h"
56 #include "lgdt3305.h"
57 #include "atbm8830.h"
58 #include "ts2020.h"
59 #include "ds3000.h"
60 #include "cx23885-f300.h"
61 #include "altera-ci.h"
62 #include "stv0367.h"
63 #include "drxk.h"
64 #include "mt2063.h"
65 #include "stv090x.h"
66 #include "stb6100.h"
67 #include "stb6100_cfg.h"
68 #include "tda10071.h"
69 #include "a8293.h"
70 #include "mb86a20s.h"
71 #include "si2165.h"
72 #include "si2168.h"
73 #include "si2157.h"
74 #include "sp2.h"
75 #include "m88ds3103.h"
76 #include "m88ts2022.h"
77
78 static unsigned int debug;
79
80 #define dprintk(level, fmt, arg...)\
81 do { if (debug >= level)\
82 printk(KERN_DEBUG "%s/0: " fmt, dev->name, ## arg);\
83 } while (0)
84
85 /* ------------------------------------------------------------------ */
86
87 static unsigned int alt_tuner;
88 module_param(alt_tuner, int, 0644);
89 MODULE_PARM_DESC(alt_tuner, "Enable alternate tuner configuration");
90
91 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
92
93 /* ------------------------------------------------------------------ */
94
95 static int queue_setup(struct vb2_queue *q, const struct v4l2_format *fmt,
96 unsigned int *num_buffers, unsigned int *num_planes,
97 unsigned int sizes[], void *alloc_ctxs[])
98 {
99 struct cx23885_tsport *port = q->drv_priv;
100
101 port->ts_packet_size = 188 * 4;
102 port->ts_packet_count = 32;
103 *num_planes = 1;
104 sizes[0] = port->ts_packet_size * port->ts_packet_count;
105 *num_buffers = 32;
106 return 0;
107 }
108
109
110 static int buffer_prepare(struct vb2_buffer *vb)
111 {
112 struct cx23885_tsport *port = vb->vb2_queue->drv_priv;
113 struct cx23885_buffer *buf =
114 container_of(vb, struct cx23885_buffer, vb);
115
116 return cx23885_buf_prepare(buf, port);
117 }
118
119 static void buffer_finish(struct vb2_buffer *vb)
120 {
121 struct cx23885_tsport *port = vb->vb2_queue->drv_priv;
122 struct cx23885_dev *dev = port->dev;
123 struct cx23885_buffer *buf = container_of(vb,
124 struct cx23885_buffer, vb);
125 struct sg_table *sgt = vb2_dma_sg_plane_desc(vb, 0);
126
127 cx23885_free_buffer(dev, buf);
128
129 dma_unmap_sg(&dev->pci->dev, sgt->sgl, sgt->nents, DMA_FROM_DEVICE);
130 }
131
132 static void buffer_queue(struct vb2_buffer *vb)
133 {
134 struct cx23885_tsport *port = vb->vb2_queue->drv_priv;
135 struct cx23885_buffer *buf = container_of(vb,
136 struct cx23885_buffer, vb);
137
138 cx23885_buf_queue(port, buf);
139 }
140
141 static void cx23885_dvb_gate_ctrl(struct cx23885_tsport *port, int open)
142 {
143 struct vb2_dvb_frontends *f;
144 struct vb2_dvb_frontend *fe;
145
146 f = &port->frontends;
147
148 if (f->gate <= 1) /* undefined or fe0 */
149 fe = vb2_dvb_get_frontend(f, 1);
150 else
151 fe = vb2_dvb_get_frontend(f, f->gate);
152
153 if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
154 fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
155 }
156
157 static int cx23885_start_streaming(struct vb2_queue *q, unsigned int count)
158 {
159 struct cx23885_tsport *port = q->drv_priv;
160 struct cx23885_dmaqueue *dmaq = &port->mpegq;
161 struct cx23885_buffer *buf = list_entry(dmaq->active.next,
162 struct cx23885_buffer, queue);
163
164 cx23885_start_dma(port, dmaq, buf);
165 return 0;
166 }
167
168 static void cx23885_stop_streaming(struct vb2_queue *q)
169 {
170 struct cx23885_tsport *port = q->drv_priv;
171
172 cx23885_cancel_buffers(port);
173 }
174
175 static struct vb2_ops dvb_qops = {
176 .queue_setup = queue_setup,
177 .buf_prepare = buffer_prepare,
178 .buf_finish = buffer_finish,
179 .buf_queue = buffer_queue,
180 .wait_prepare = vb2_ops_wait_prepare,
181 .wait_finish = vb2_ops_wait_finish,
182 .start_streaming = cx23885_start_streaming,
183 .stop_streaming = cx23885_stop_streaming,
184 };
185
186 static struct s5h1409_config hauppauge_generic_config = {
187 .demod_address = 0x32 >> 1,
188 .output_mode = S5H1409_SERIAL_OUTPUT,
189 .gpio = S5H1409_GPIO_ON,
190 .qam_if = 44000,
191 .inversion = S5H1409_INVERSION_OFF,
192 .status_mode = S5H1409_DEMODLOCKING,
193 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
194 };
195
196 static struct tda10048_config hauppauge_hvr1200_config = {
197 .demod_address = 0x10 >> 1,
198 .output_mode = TDA10048_SERIAL_OUTPUT,
199 .fwbulkwritelen = TDA10048_BULKWRITE_200,
200 .inversion = TDA10048_INVERSION_ON,
201 .dtv6_if_freq_khz = TDA10048_IF_3300,
202 .dtv7_if_freq_khz = TDA10048_IF_3800,
203 .dtv8_if_freq_khz = TDA10048_IF_4300,
204 .clk_freq_khz = TDA10048_CLK_16000,
205 };
206
207 static struct tda10048_config hauppauge_hvr1210_config = {
208 .demod_address = 0x10 >> 1,
209 .output_mode = TDA10048_SERIAL_OUTPUT,
210 .fwbulkwritelen = TDA10048_BULKWRITE_200,
211 .inversion = TDA10048_INVERSION_ON,
212 .dtv6_if_freq_khz = TDA10048_IF_3300,
213 .dtv7_if_freq_khz = TDA10048_IF_3500,
214 .dtv8_if_freq_khz = TDA10048_IF_4000,
215 .clk_freq_khz = TDA10048_CLK_16000,
216 };
217
218 static struct s5h1409_config hauppauge_ezqam_config = {
219 .demod_address = 0x32 >> 1,
220 .output_mode = S5H1409_SERIAL_OUTPUT,
221 .gpio = S5H1409_GPIO_OFF,
222 .qam_if = 4000,
223 .inversion = S5H1409_INVERSION_ON,
224 .status_mode = S5H1409_DEMODLOCKING,
225 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
226 };
227
228 static struct s5h1409_config hauppauge_hvr1800lp_config = {
229 .demod_address = 0x32 >> 1,
230 .output_mode = S5H1409_SERIAL_OUTPUT,
231 .gpio = S5H1409_GPIO_OFF,
232 .qam_if = 44000,
233 .inversion = S5H1409_INVERSION_OFF,
234 .status_mode = S5H1409_DEMODLOCKING,
235 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
236 };
237
238 static struct s5h1409_config hauppauge_hvr1500_config = {
239 .demod_address = 0x32 >> 1,
240 .output_mode = S5H1409_SERIAL_OUTPUT,
241 .gpio = S5H1409_GPIO_OFF,
242 .inversion = S5H1409_INVERSION_OFF,
243 .status_mode = S5H1409_DEMODLOCKING,
244 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
245 };
246
247 static struct mt2131_config hauppauge_generic_tunerconfig = {
248 0x61
249 };
250
251 static struct lgdt330x_config fusionhdtv_5_express = {
252 .demod_address = 0x0e,
253 .demod_chip = LGDT3303,
254 .serial_mpeg = 0x40,
255 };
256
257 static struct s5h1409_config hauppauge_hvr1500q_config = {
258 .demod_address = 0x32 >> 1,
259 .output_mode = S5H1409_SERIAL_OUTPUT,
260 .gpio = S5H1409_GPIO_ON,
261 .qam_if = 44000,
262 .inversion = S5H1409_INVERSION_OFF,
263 .status_mode = S5H1409_DEMODLOCKING,
264 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
265 };
266
267 static struct s5h1409_config dvico_s5h1409_config = {
268 .demod_address = 0x32 >> 1,
269 .output_mode = S5H1409_SERIAL_OUTPUT,
270 .gpio = S5H1409_GPIO_ON,
271 .qam_if = 44000,
272 .inversion = S5H1409_INVERSION_OFF,
273 .status_mode = S5H1409_DEMODLOCKING,
274 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
275 };
276
277 static struct s5h1411_config dvico_s5h1411_config = {
278 .output_mode = S5H1411_SERIAL_OUTPUT,
279 .gpio = S5H1411_GPIO_ON,
280 .qam_if = S5H1411_IF_44000,
281 .vsb_if = S5H1411_IF_44000,
282 .inversion = S5H1411_INVERSION_OFF,
283 .status_mode = S5H1411_DEMODLOCKING,
284 .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
285 };
286
287 static struct s5h1411_config hcw_s5h1411_config = {
288 .output_mode = S5H1411_SERIAL_OUTPUT,
289 .gpio = S5H1411_GPIO_OFF,
290 .vsb_if = S5H1411_IF_44000,
291 .qam_if = S5H1411_IF_4000,
292 .inversion = S5H1411_INVERSION_ON,
293 .status_mode = S5H1411_DEMODLOCKING,
294 .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
295 };
296
297 static struct xc5000_config hauppauge_hvr1500q_tunerconfig = {
298 .i2c_address = 0x61,
299 .if_khz = 5380,
300 };
301
302 static struct xc5000_config dvico_xc5000_tunerconfig = {
303 .i2c_address = 0x64,
304 .if_khz = 5380,
305 };
306
307 static struct tda829x_config tda829x_no_probe = {
308 .probe_tuner = TDA829X_DONT_PROBE,
309 };
310
311 static struct tda18271_std_map hauppauge_tda18271_std_map = {
312 .atsc_6 = { .if_freq = 5380, .agc_mode = 3, .std = 3,
313 .if_lvl = 6, .rfagc_top = 0x37 },
314 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0,
315 .if_lvl = 6, .rfagc_top = 0x37 },
316 };
317
318 static struct tda18271_std_map hauppauge_hvr1200_tda18271_std_map = {
319 .dvbt_6 = { .if_freq = 3300, .agc_mode = 3, .std = 4,
320 .if_lvl = 1, .rfagc_top = 0x37, },
321 .dvbt_7 = { .if_freq = 3800, .agc_mode = 3, .std = 5,
322 .if_lvl = 1, .rfagc_top = 0x37, },
323 .dvbt_8 = { .if_freq = 4300, .agc_mode = 3, .std = 6,
324 .if_lvl = 1, .rfagc_top = 0x37, },
325 };
326
327 static struct tda18271_config hauppauge_tda18271_config = {
328 .std_map = &hauppauge_tda18271_std_map,
329 .gate = TDA18271_GATE_ANALOG,
330 .output_opt = TDA18271_OUTPUT_LT_OFF,
331 };
332
333 static struct tda18271_config hauppauge_hvr1200_tuner_config = {
334 .std_map = &hauppauge_hvr1200_tda18271_std_map,
335 .gate = TDA18271_GATE_ANALOG,
336 .output_opt = TDA18271_OUTPUT_LT_OFF,
337 };
338
339 static struct tda18271_config hauppauge_hvr1210_tuner_config = {
340 .gate = TDA18271_GATE_DIGITAL,
341 .output_opt = TDA18271_OUTPUT_LT_OFF,
342 };
343
344 static struct tda18271_config hauppauge_hvr4400_tuner_config = {
345 .gate = TDA18271_GATE_DIGITAL,
346 .output_opt = TDA18271_OUTPUT_LT_OFF,
347 };
348
349 static struct tda18271_std_map hauppauge_hvr127x_std_map = {
350 .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 4,
351 .if_lvl = 1, .rfagc_top = 0x58 },
352 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 5,
353 .if_lvl = 1, .rfagc_top = 0x58 },
354 };
355
356 static struct tda18271_config hauppauge_hvr127x_config = {
357 .std_map = &hauppauge_hvr127x_std_map,
358 .output_opt = TDA18271_OUTPUT_LT_OFF,
359 };
360
361 static struct lgdt3305_config hauppauge_lgdt3305_config = {
362 .i2c_addr = 0x0e,
363 .mpeg_mode = LGDT3305_MPEG_SERIAL,
364 .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE,
365 .tpvalid_polarity = LGDT3305_TP_VALID_HIGH,
366 .deny_i2c_rptr = 1,
367 .spectral_inversion = 1,
368 .qam_if_khz = 4000,
369 .vsb_if_khz = 3250,
370 };
371
372 static struct dibx000_agc_config xc3028_agc_config = {
373 BAND_VHF | BAND_UHF, /* band_caps */
374
375 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
376 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
377 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0,
378 * P_agc_nb_est=2, P_agc_write=0
379 */
380 (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) |
381 (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */
382
383 712, /* inv_gain */
384 21, /* time_stabiliz */
385
386 0, /* alpha_level */
387 118, /* thlock */
388
389 0, /* wbd_inv */
390 2867, /* wbd_ref */
391 0, /* wbd_sel */
392 2, /* wbd_alpha */
393
394 0, /* agc1_max */
395 0, /* agc1_min */
396 39718, /* agc2_max */
397 9930, /* agc2_min */
398 0, /* agc1_pt1 */
399 0, /* agc1_pt2 */
400 0, /* agc1_pt3 */
401 0, /* agc1_slope1 */
402 0, /* agc1_slope2 */
403 0, /* agc2_pt1 */
404 128, /* agc2_pt2 */
405 29, /* agc2_slope1 */
406 29, /* agc2_slope2 */
407
408 17, /* alpha_mant */
409 27, /* alpha_exp */
410 23, /* beta_mant */
411 51, /* beta_exp */
412
413 1, /* perform_agc_softsplit */
414 };
415
416 /* PLL Configuration for COFDM BW_MHz = 8.000000
417 * With external clock = 30.000000 */
418 static struct dibx000_bandwidth_config xc3028_bw_config = {
419 60000, /* internal */
420 30000, /* sampling */
421 1, /* pll_cfg: prediv */
422 8, /* pll_cfg: ratio */
423 3, /* pll_cfg: range */
424 1, /* pll_cfg: reset */
425 0, /* pll_cfg: bypass */
426 0, /* misc: refdiv */
427 0, /* misc: bypclk_div */
428 1, /* misc: IO_CLK_en_core */
429 1, /* misc: ADClkSrc */
430 0, /* misc: modulo */
431 (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
432 (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
433 20452225, /* timf */
434 30000000 /* xtal_hz */
435 };
436
437 static struct dib7000p_config hauppauge_hvr1400_dib7000_config = {
438 .output_mpeg2_in_188_bytes = 1,
439 .hostbus_diversity = 1,
440 .tuner_is_baseband = 0,
441 .update_lna = NULL,
442
443 .agc_config_count = 1,
444 .agc = &xc3028_agc_config,
445 .bw = &xc3028_bw_config,
446
447 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
448 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
449 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
450
451 .pwm_freq_div = 0,
452 .agc_control = NULL,
453 .spur_protect = 0,
454
455 .output_mode = OUTMODE_MPEG2_SERIAL,
456 };
457
458 static struct zl10353_config dvico_fusionhdtv_xc3028 = {
459 .demod_address = 0x0f,
460 .if2 = 45600,
461 .no_tuner = 1,
462 .disable_i2c_gate_ctrl = 1,
463 };
464
465 static struct stv0900_reg stv0900_ts_regs[] = {
466 { R0900_TSGENERAL, 0x00 },
467 { R0900_P1_TSSPEED, 0x40 },
468 { R0900_P2_TSSPEED, 0x40 },
469 { R0900_P1_TSCFGM, 0xc0 },
470 { R0900_P2_TSCFGM, 0xc0 },
471 { R0900_P1_TSCFGH, 0xe0 },
472 { R0900_P2_TSCFGH, 0xe0 },
473 { R0900_P1_TSCFGL, 0x20 },
474 { R0900_P2_TSCFGL, 0x20 },
475 { 0xffff, 0xff }, /* terminate */
476 };
477
478 static struct stv0900_config netup_stv0900_config = {
479 .demod_address = 0x68,
480 .demod_mode = 1, /* dual */
481 .xtal = 8000000,
482 .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
483 .diseqc_mode = 2,/* 2/3 PWM */
484 .ts_config_regs = stv0900_ts_regs,
485 .tun1_maddress = 0,/* 0x60 */
486 .tun2_maddress = 3,/* 0x63 */
487 .tun1_adc = 1,/* 1 Vpp */
488 .tun2_adc = 1,/* 1 Vpp */
489 };
490
491 static struct stv6110_config netup_stv6110_tunerconfig_a = {
492 .i2c_address = 0x60,
493 .mclk = 16000000,
494 .clk_div = 1,
495 .gain = 8, /* +16 dB - maximum gain */
496 };
497
498 static struct stv6110_config netup_stv6110_tunerconfig_b = {
499 .i2c_address = 0x63,
500 .mclk = 16000000,
501 .clk_div = 1,
502 .gain = 8, /* +16 dB - maximum gain */
503 };
504
505 static struct cx24116_config tbs_cx24116_config = {
506 .demod_address = 0x55,
507 };
508
509 static struct cx24117_config tbs_cx24117_config = {
510 .demod_address = 0x55,
511 };
512
513 static struct ds3000_config tevii_ds3000_config = {
514 .demod_address = 0x68,
515 };
516
517 static struct ts2020_config tevii_ts2020_config = {
518 .tuner_address = 0x60,
519 .clk_out_div = 1,
520 .frequency_div = 1146000,
521 };
522
523 static struct cx24116_config dvbworld_cx24116_config = {
524 .demod_address = 0x05,
525 };
526
527 static struct lgs8gxx_config mygica_x8506_lgs8gl5_config = {
528 .prod = LGS8GXX_PROD_LGS8GL5,
529 .demod_address = 0x19,
530 .serial_ts = 0,
531 .ts_clk_pol = 1,
532 .ts_clk_gated = 1,
533 .if_clk_freq = 30400, /* 30.4 MHz */
534 .if_freq = 5380, /* 5.38 MHz */
535 .if_neg_center = 1,
536 .ext_adc = 0,
537 .adc_signed = 0,
538 .if_neg_edge = 0,
539 };
540
541 static struct xc5000_config mygica_x8506_xc5000_config = {
542 .i2c_address = 0x61,
543 .if_khz = 5380,
544 };
545
546 static struct mb86a20s_config mygica_x8507_mb86a20s_config = {
547 .demod_address = 0x10,
548 };
549
550 static struct xc5000_config mygica_x8507_xc5000_config = {
551 .i2c_address = 0x61,
552 .if_khz = 4000,
553 };
554
555 static struct stv090x_config prof_8000_stv090x_config = {
556 .device = STV0903,
557 .demod_mode = STV090x_SINGLE,
558 .clk_mode = STV090x_CLK_EXT,
559 .xtal = 27000000,
560 .address = 0x6A,
561 .ts1_mode = STV090x_TSMODE_PARALLEL_PUNCTURED,
562 .repeater_level = STV090x_RPTLEVEL_64,
563 .adc1_range = STV090x_ADC_2Vpp,
564 .diseqc_envelope_mode = false,
565
566 .tuner_get_frequency = stb6100_get_frequency,
567 .tuner_set_frequency = stb6100_set_frequency,
568 .tuner_set_bandwidth = stb6100_set_bandwidth,
569 .tuner_get_bandwidth = stb6100_get_bandwidth,
570 };
571
572 static struct stb6100_config prof_8000_stb6100_config = {
573 .tuner_address = 0x60,
574 .refclock = 27000000,
575 };
576
577 static int p8000_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
578 {
579 struct cx23885_tsport *port = fe->dvb->priv;
580 struct cx23885_dev *dev = port->dev;
581
582 if (voltage == SEC_VOLTAGE_18)
583 cx_write(MC417_RWD, 0x00001e00);
584 else if (voltage == SEC_VOLTAGE_13)
585 cx_write(MC417_RWD, 0x00001a00);
586 else
587 cx_write(MC417_RWD, 0x00001800);
588 return 0;
589 }
590
591 static int dvbsky_t9580_set_voltage(struct dvb_frontend *fe,
592 fe_sec_voltage_t voltage)
593 {
594 struct cx23885_tsport *port = fe->dvb->priv;
595 struct cx23885_dev *dev = port->dev;
596
597 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
598
599 switch (voltage) {
600 case SEC_VOLTAGE_13:
601 cx23885_gpio_set(dev, GPIO_1);
602 cx23885_gpio_clear(dev, GPIO_0);
603 break;
604 case SEC_VOLTAGE_18:
605 cx23885_gpio_set(dev, GPIO_1);
606 cx23885_gpio_set(dev, GPIO_0);
607 break;
608 case SEC_VOLTAGE_OFF:
609 cx23885_gpio_clear(dev, GPIO_1);
610 cx23885_gpio_clear(dev, GPIO_0);
611 break;
612 }
613
614 /* call the frontend set_voltage function */
615 port->fe_set_voltage(fe, voltage);
616
617 return 0;
618 }
619
620 static int cx23885_sp2_ci_ctrl(void *priv, u8 read, int addr,
621 u8 data, int *mem)
622 {
623 /* MC417 */
624 #define SP2_DATA 0x000000ff
625 #define SP2_WR 0x00008000
626 #define SP2_RD 0x00004000
627 #define SP2_ACK 0x00001000
628 #define SP2_ADHI 0x00000800
629 #define SP2_ADLO 0x00000400
630 #define SP2_CS1 0x00000200
631 #define SP2_CS0 0x00000100
632 #define SP2_EN_ALL 0x00001000
633 #define SP2_CTRL_OFF (SP2_CS1 | SP2_CS0 | SP2_WR | SP2_RD)
634
635 struct cx23885_tsport *port = priv;
636 struct cx23885_dev *dev = port->dev;
637 int ret;
638 int tmp = 0;
639 unsigned long timeout;
640
641 mutex_lock(&dev->gpio_lock);
642
643 /* write addr */
644 cx_write(MC417_OEN, SP2_EN_ALL);
645 cx_write(MC417_RWD, SP2_CTRL_OFF |
646 SP2_ADLO | (0xff & addr));
647 cx_clear(MC417_RWD, SP2_ADLO);
648 cx_write(MC417_RWD, SP2_CTRL_OFF |
649 SP2_ADHI | (0xff & (addr >> 8)));
650 cx_clear(MC417_RWD, SP2_ADHI);
651
652 if (read)
653 /* data in */
654 cx_write(MC417_OEN, SP2_EN_ALL | SP2_DATA);
655 else
656 /* data out */
657 cx_write(MC417_RWD, SP2_CTRL_OFF | data);
658
659 /* chip select 0 */
660 cx_clear(MC417_RWD, SP2_CS0);
661
662 /* read/write */
663 cx_clear(MC417_RWD, (read) ? SP2_RD : SP2_WR);
664
665 /* wait for a maximum of 1 msec */
666 timeout = jiffies + msecs_to_jiffies(1);
667 while (!time_after(jiffies, timeout)) {
668 tmp = cx_read(MC417_RWD);
669 if ((tmp & SP2_ACK) == 0)
670 break;
671 usleep_range(50, 100);
672 }
673
674 cx_set(MC417_RWD, SP2_CTRL_OFF);
675 *mem = tmp & 0xff;
676
677 mutex_unlock(&dev->gpio_lock);
678
679 if (!read) {
680 if (*mem < 0) {
681 ret = -EREMOTEIO;
682 goto err;
683 }
684 }
685
686 return 0;
687 err:
688 return ret;
689 }
690
691 static int cx23885_dvb_set_frontend(struct dvb_frontend *fe)
692 {
693 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
694 struct cx23885_tsport *port = fe->dvb->priv;
695 struct cx23885_dev *dev = port->dev;
696
697 switch (dev->board) {
698 case CX23885_BOARD_HAUPPAUGE_HVR1275:
699 switch (p->modulation) {
700 case VSB_8:
701 cx23885_gpio_clear(dev, GPIO_5);
702 break;
703 case QAM_64:
704 case QAM_256:
705 default:
706 cx23885_gpio_set(dev, GPIO_5);
707 break;
708 }
709 break;
710 case CX23885_BOARD_MYGICA_X8506:
711 case CX23885_BOARD_MYGICA_X8507:
712 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
713 /* Select Digital TV */
714 cx23885_gpio_set(dev, GPIO_0);
715 break;
716 }
717
718 /* Call the real set_frontend */
719 if (port->set_frontend)
720 return port->set_frontend(fe);
721
722 return 0;
723 }
724
725 static void cx23885_set_frontend_hook(struct cx23885_tsport *port,
726 struct dvb_frontend *fe)
727 {
728 port->set_frontend = fe->ops.set_frontend;
729 fe->ops.set_frontend = cx23885_dvb_set_frontend;
730 }
731
732 static struct lgs8gxx_config magicpro_prohdtve2_lgs8g75_config = {
733 .prod = LGS8GXX_PROD_LGS8G75,
734 .demod_address = 0x19,
735 .serial_ts = 0,
736 .ts_clk_pol = 1,
737 .ts_clk_gated = 1,
738 .if_clk_freq = 30400, /* 30.4 MHz */
739 .if_freq = 6500, /* 6.50 MHz */
740 .if_neg_center = 1,
741 .ext_adc = 0,
742 .adc_signed = 1,
743 .adc_vpp = 2, /* 1.6 Vpp */
744 .if_neg_edge = 1,
745 };
746
747 static struct xc5000_config magicpro_prohdtve2_xc5000_config = {
748 .i2c_address = 0x61,
749 .if_khz = 6500,
750 };
751
752 static struct atbm8830_config mygica_x8558pro_atbm8830_cfg1 = {
753 .prod = ATBM8830_PROD_8830,
754 .demod_address = 0x44,
755 .serial_ts = 0,
756 .ts_sampling_edge = 1,
757 .ts_clk_gated = 0,
758 .osc_clk_freq = 30400, /* in kHz */
759 .if_freq = 0, /* zero IF */
760 .zif_swap_iq = 1,
761 .agc_min = 0x2E,
762 .agc_max = 0xFF,
763 .agc_hold_loop = 0,
764 };
765
766 static struct max2165_config mygic_x8558pro_max2165_cfg1 = {
767 .i2c_address = 0x60,
768 .osc_clk = 20
769 };
770
771 static struct atbm8830_config mygica_x8558pro_atbm8830_cfg2 = {
772 .prod = ATBM8830_PROD_8830,
773 .demod_address = 0x44,
774 .serial_ts = 1,
775 .ts_sampling_edge = 1,
776 .ts_clk_gated = 0,
777 .osc_clk_freq = 30400, /* in kHz */
778 .if_freq = 0, /* zero IF */
779 .zif_swap_iq = 1,
780 .agc_min = 0x2E,
781 .agc_max = 0xFF,
782 .agc_hold_loop = 0,
783 };
784
785 static struct max2165_config mygic_x8558pro_max2165_cfg2 = {
786 .i2c_address = 0x60,
787 .osc_clk = 20
788 };
789 static struct stv0367_config netup_stv0367_config[] = {
790 {
791 .demod_address = 0x1c,
792 .xtal = 27000000,
793 .if_khz = 4500,
794 .if_iq_mode = 0,
795 .ts_mode = 1,
796 .clk_pol = 0,
797 }, {
798 .demod_address = 0x1d,
799 .xtal = 27000000,
800 .if_khz = 4500,
801 .if_iq_mode = 0,
802 .ts_mode = 1,
803 .clk_pol = 0,
804 },
805 };
806
807 static struct xc5000_config netup_xc5000_config[] = {
808 {
809 .i2c_address = 0x61,
810 .if_khz = 4500,
811 }, {
812 .i2c_address = 0x64,
813 .if_khz = 4500,
814 },
815 };
816
817 static struct drxk_config terratec_drxk_config[] = {
818 {
819 .adr = 0x29,
820 .no_i2c_bridge = 1,
821 }, {
822 .adr = 0x2a,
823 .no_i2c_bridge = 1,
824 },
825 };
826
827 static struct mt2063_config terratec_mt2063_config[] = {
828 {
829 .tuner_address = 0x60,
830 }, {
831 .tuner_address = 0x67,
832 },
833 };
834
835 static const struct tda10071_config hauppauge_tda10071_config = {
836 .demod_i2c_addr = 0x05,
837 .tuner_i2c_addr = 0x54,
838 .i2c_wr_max = 64,
839 .ts_mode = TDA10071_TS_SERIAL,
840 .spec_inv = 0,
841 .xtal = 40444000, /* 40.444 MHz */
842 .pll_multiplier = 20,
843 };
844
845 static const struct a8293_config hauppauge_a8293_config = {
846 .i2c_addr = 0x0b,
847 };
848
849 static const struct si2165_config hauppauge_hvr4400_si2165_config = {
850 .i2c_addr = 0x64,
851 .chip_mode = SI2165_MODE_PLL_XTAL,
852 .ref_freq_Hz = 16000000,
853 };
854
855 static const struct m88ds3103_config dvbsky_t9580_m88ds3103_config = {
856 .i2c_addr = 0x68,
857 .clock = 27000000,
858 .i2c_wr_max = 33,
859 .clock_out = 0,
860 .ts_mode = M88DS3103_TS_PARALLEL,
861 .ts_clk = 16000,
862 .ts_clk_pol = 1,
863 .lnb_en_pol = 1,
864 .lnb_hv_pol = 0,
865 .agc = 0x99,
866 };
867
868 static const struct m88ds3103_config dvbsky_s950c_m88ds3103_config = {
869 .i2c_addr = 0x68,
870 .clock = 27000000,
871 .i2c_wr_max = 33,
872 .clock_out = 0,
873 .ts_mode = M88DS3103_TS_CI,
874 .ts_clk = 10000,
875 .ts_clk_pol = 1,
876 .lnb_en_pol = 1,
877 .lnb_hv_pol = 0,
878 .agc = 0x99,
879 };
880
881 static int netup_altera_fpga_rw(void *device, int flag, int data, int read)
882 {
883 struct cx23885_dev *dev = (struct cx23885_dev *)device;
884 unsigned long timeout = jiffies + msecs_to_jiffies(1);
885 uint32_t mem = 0;
886
887 mem = cx_read(MC417_RWD);
888 if (read)
889 cx_set(MC417_OEN, ALT_DATA);
890 else {
891 cx_clear(MC417_OEN, ALT_DATA);/* D0-D7 out */
892 mem &= ~ALT_DATA;
893 mem |= (data & ALT_DATA);
894 }
895
896 if (flag)
897 mem |= ALT_AD_RG;
898 else
899 mem &= ~ALT_AD_RG;
900
901 mem &= ~ALT_CS;
902 if (read)
903 mem = (mem & ~ALT_RD) | ALT_WR;
904 else
905 mem = (mem & ~ALT_WR) | ALT_RD;
906
907 cx_write(MC417_RWD, mem); /* start RW cycle */
908
909 for (;;) {
910 mem = cx_read(MC417_RWD);
911 if ((mem & ALT_RDY) == 0)
912 break;
913 if (time_after(jiffies, timeout))
914 break;
915 udelay(1);
916 }
917
918 cx_set(MC417_RWD, ALT_RD | ALT_WR | ALT_CS);
919 if (read)
920 return mem & ALT_DATA;
921
922 return 0;
923 };
924
925 static int dib7070_tuner_reset(struct dvb_frontend *fe, int onoff)
926 {
927 struct dib7000p_ops *dib7000p_ops = fe->sec_priv;
928
929 return dib7000p_ops->set_gpio(fe, 8, 0, !onoff);
930 }
931
932 static int dib7070_tuner_sleep(struct dvb_frontend *fe, int onoff)
933 {
934 return 0;
935 }
936
937 static struct dib0070_config dib7070p_dib0070_config = {
938 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
939 .reset = dib7070_tuner_reset,
940 .sleep = dib7070_tuner_sleep,
941 .clock_khz = 12000,
942 .freq_offset_khz_vhf = 550,
943 /* .flip_chip = 1, */
944 };
945
946 /* DIB7070 generic */
947 static struct dibx000_agc_config dib7070_agc_config = {
948 .band_caps = BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND,
949
950 /*
951 * P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5,
952 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
953 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0
954 */
955 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) |
956 (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
957 .inv_gain = 600,
958 .time_stabiliz = 10,
959 .alpha_level = 0,
960 .thlock = 118,
961 .wbd_inv = 0,
962 .wbd_ref = 3530,
963 .wbd_sel = 1,
964 .wbd_alpha = 5,
965 .agc1_max = 65535,
966 .agc1_min = 0,
967 .agc2_max = 65535,
968 .agc2_min = 0,
969 .agc1_pt1 = 0,
970 .agc1_pt2 = 40,
971 .agc1_pt3 = 183,
972 .agc1_slope1 = 206,
973 .agc1_slope2 = 255,
974 .agc2_pt1 = 72,
975 .agc2_pt2 = 152,
976 .agc2_slope1 = 88,
977 .agc2_slope2 = 90,
978 .alpha_mant = 17,
979 .alpha_exp = 27,
980 .beta_mant = 23,
981 .beta_exp = 51,
982 .perform_agc_softsplit = 0,
983 };
984
985 static struct dibx000_bandwidth_config dib7070_bw_config_12_mhz = {
986 .internal = 60000,
987 .sampling = 15000,
988 .pll_prediv = 1,
989 .pll_ratio = 20,
990 .pll_range = 3,
991 .pll_reset = 1,
992 .pll_bypass = 0,
993 .enable_refdiv = 0,
994 .bypclk_div = 0,
995 .IO_CLK_en_core = 1,
996 .ADClkSrc = 1,
997 .modulo = 2,
998 /* refsel, sel, freq_15k */
999 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
1000 .ifreq = (0 << 25) | 0,
1001 .timf = 20452225,
1002 .xtal_hz = 12000000,
1003 };
1004
1005 static struct dib7000p_config dib7070p_dib7000p_config = {
1006 /* .output_mode = OUTMODE_MPEG2_FIFO, */
1007 .output_mode = OUTMODE_MPEG2_SERIAL,
1008 /* .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK, */
1009 .output_mpeg2_in_188_bytes = 1,
1010
1011 .agc_config_count = 1,
1012 .agc = &dib7070_agc_config,
1013 .bw = &dib7070_bw_config_12_mhz,
1014 .tuner_is_baseband = 1,
1015 .spur_protect = 1,
1016
1017 .gpio_dir = 0xfcef, /* DIB7000P_GPIO_DEFAULT_DIRECTIONS, */
1018 .gpio_val = 0x0110, /* DIB7000P_GPIO_DEFAULT_VALUES, */
1019 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
1020
1021 .hostbus_diversity = 1,
1022 };
1023
1024 static int dvb_register(struct cx23885_tsport *port)
1025 {
1026 struct dib7000p_ops dib7000p_ops;
1027 struct cx23885_dev *dev = port->dev;
1028 struct cx23885_i2c *i2c_bus = NULL, *i2c_bus2 = NULL;
1029 struct vb2_dvb_frontend *fe0, *fe1 = NULL;
1030 struct si2168_config si2168_config;
1031 struct si2157_config si2157_config;
1032 struct sp2_config sp2_config;
1033 struct m88ts2022_config m88ts2022_config;
1034 struct i2c_board_info info;
1035 struct i2c_adapter *adapter;
1036 struct i2c_client *client_demod = NULL, *client_tuner = NULL, *client_ci = NULL;
1037 int mfe_shared = 0; /* bus not shared by default */
1038 int ret;
1039
1040 /* Get the first frontend */
1041 fe0 = vb2_dvb_get_frontend(&port->frontends, 1);
1042 if (!fe0)
1043 return -EINVAL;
1044
1045 /* init struct vb2_dvb */
1046 fe0->dvb.name = dev->name;
1047
1048 /* multi-frontend gate control is undefined or defaults to fe0 */
1049 port->frontends.gate = 0;
1050
1051 /* Sets the gate control callback to be used by i2c command calls */
1052 port->gate_ctrl = cx23885_dvb_gate_ctrl;
1053
1054 /* init frontend */
1055 switch (dev->board) {
1056 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1057 i2c_bus = &dev->i2c_bus[0];
1058 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1059 &hauppauge_generic_config,
1060 &i2c_bus->i2c_adap);
1061 if (fe0->dvb.frontend != NULL) {
1062 dvb_attach(mt2131_attach, fe0->dvb.frontend,
1063 &i2c_bus->i2c_adap,
1064 &hauppauge_generic_tunerconfig, 0);
1065 }
1066 break;
1067 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1068 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1069 i2c_bus = &dev->i2c_bus[0];
1070 fe0->dvb.frontend = dvb_attach(lgdt3305_attach,
1071 &hauppauge_lgdt3305_config,
1072 &i2c_bus->i2c_adap);
1073 if (fe0->dvb.frontend != NULL) {
1074 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1075 0x60, &dev->i2c_bus[1].i2c_adap,
1076 &hauppauge_hvr127x_config);
1077 }
1078 if (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1275)
1079 cx23885_set_frontend_hook(port, fe0->dvb.frontend);
1080 break;
1081 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1082 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1083 i2c_bus = &dev->i2c_bus[0];
1084 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1085 &hcw_s5h1411_config,
1086 &i2c_bus->i2c_adap);
1087 if (fe0->dvb.frontend != NULL) {
1088 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1089 0x60, &dev->i2c_bus[1].i2c_adap,
1090 &hauppauge_tda18271_config);
1091 }
1092
1093 tda18271_attach(&dev->ts1.analog_fe,
1094 0x60, &dev->i2c_bus[1].i2c_adap,
1095 &hauppauge_tda18271_config);
1096
1097 break;
1098 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1099 i2c_bus = &dev->i2c_bus[0];
1100 switch (alt_tuner) {
1101 case 1:
1102 fe0->dvb.frontend =
1103 dvb_attach(s5h1409_attach,
1104 &hauppauge_ezqam_config,
1105 &i2c_bus->i2c_adap);
1106 if (fe0->dvb.frontend != NULL) {
1107 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1108 &dev->i2c_bus[1].i2c_adap, 0x42,
1109 &tda829x_no_probe);
1110 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1111 0x60, &dev->i2c_bus[1].i2c_adap,
1112 &hauppauge_tda18271_config);
1113 }
1114 break;
1115 case 0:
1116 default:
1117 fe0->dvb.frontend =
1118 dvb_attach(s5h1409_attach,
1119 &hauppauge_generic_config,
1120 &i2c_bus->i2c_adap);
1121 if (fe0->dvb.frontend != NULL)
1122 dvb_attach(mt2131_attach, fe0->dvb.frontend,
1123 &i2c_bus->i2c_adap,
1124 &hauppauge_generic_tunerconfig, 0);
1125 break;
1126 }
1127 break;
1128 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1129 i2c_bus = &dev->i2c_bus[0];
1130 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1131 &hauppauge_hvr1800lp_config,
1132 &i2c_bus->i2c_adap);
1133 if (fe0->dvb.frontend != NULL) {
1134 dvb_attach(mt2131_attach, fe0->dvb.frontend,
1135 &i2c_bus->i2c_adap,
1136 &hauppauge_generic_tunerconfig, 0);
1137 }
1138 break;
1139 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
1140 i2c_bus = &dev->i2c_bus[0];
1141 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
1142 &fusionhdtv_5_express,
1143 &i2c_bus->i2c_adap);
1144 if (fe0->dvb.frontend != NULL) {
1145 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1146 &i2c_bus->i2c_adap, 0x61,
1147 TUNER_LG_TDVS_H06XF);
1148 }
1149 break;
1150 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1151 i2c_bus = &dev->i2c_bus[1];
1152 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1153 &hauppauge_hvr1500q_config,
1154 &dev->i2c_bus[0].i2c_adap);
1155 if (fe0->dvb.frontend != NULL)
1156 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1157 &i2c_bus->i2c_adap,
1158 &hauppauge_hvr1500q_tunerconfig);
1159 break;
1160 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1161 i2c_bus = &dev->i2c_bus[1];
1162 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1163 &hauppauge_hvr1500_config,
1164 &dev->i2c_bus[0].i2c_adap);
1165 if (fe0->dvb.frontend != NULL) {
1166 struct dvb_frontend *fe;
1167 struct xc2028_config cfg = {
1168 .i2c_adap = &i2c_bus->i2c_adap,
1169 .i2c_addr = 0x61,
1170 };
1171 static struct xc2028_ctrl ctl = {
1172 .fname = XC2028_DEFAULT_FIRMWARE,
1173 .max_len = 64,
1174 .demod = XC3028_FE_OREN538,
1175 };
1176
1177 fe = dvb_attach(xc2028_attach,
1178 fe0->dvb.frontend, &cfg);
1179 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1180 fe->ops.tuner_ops.set_config(fe, &ctl);
1181 }
1182 break;
1183 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1184 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1185 i2c_bus = &dev->i2c_bus[0];
1186 fe0->dvb.frontend = dvb_attach(tda10048_attach,
1187 &hauppauge_hvr1200_config,
1188 &i2c_bus->i2c_adap);
1189 if (fe0->dvb.frontend != NULL) {
1190 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1191 &dev->i2c_bus[1].i2c_adap, 0x42,
1192 &tda829x_no_probe);
1193 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1194 0x60, &dev->i2c_bus[1].i2c_adap,
1195 &hauppauge_hvr1200_tuner_config);
1196 }
1197 break;
1198 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1199 i2c_bus = &dev->i2c_bus[0];
1200 fe0->dvb.frontend = dvb_attach(tda10048_attach,
1201 &hauppauge_hvr1210_config,
1202 &i2c_bus->i2c_adap);
1203 if (fe0->dvb.frontend != NULL) {
1204 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1205 0x60, &dev->i2c_bus[1].i2c_adap,
1206 &hauppauge_hvr1210_tuner_config);
1207 }
1208 break;
1209 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1210 i2c_bus = &dev->i2c_bus[0];
1211
1212 if (!dvb_attach(dib7000p_attach, &dib7000p_ops))
1213 return -ENODEV;
1214
1215 fe0->dvb.frontend = dib7000p_ops.init(&i2c_bus->i2c_adap,
1216 0x12, &hauppauge_hvr1400_dib7000_config);
1217 if (fe0->dvb.frontend != NULL) {
1218 struct dvb_frontend *fe;
1219 struct xc2028_config cfg = {
1220 .i2c_adap = &dev->i2c_bus[1].i2c_adap,
1221 .i2c_addr = 0x64,
1222 };
1223 static struct xc2028_ctrl ctl = {
1224 .fname = XC3028L_DEFAULT_FIRMWARE,
1225 .max_len = 64,
1226 .demod = XC3028_FE_DIBCOM52,
1227 /* This is true for all demods with
1228 v36 firmware? */
1229 .type = XC2028_D2633,
1230 };
1231
1232 fe = dvb_attach(xc2028_attach,
1233 fe0->dvb.frontend, &cfg);
1234 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1235 fe->ops.tuner_ops.set_config(fe, &ctl);
1236 }
1237 break;
1238 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1239 i2c_bus = &dev->i2c_bus[port->nr - 1];
1240
1241 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1242 &dvico_s5h1409_config,
1243 &i2c_bus->i2c_adap);
1244 if (fe0->dvb.frontend == NULL)
1245 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1246 &dvico_s5h1411_config,
1247 &i2c_bus->i2c_adap);
1248 if (fe0->dvb.frontend != NULL)
1249 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1250 &i2c_bus->i2c_adap,
1251 &dvico_xc5000_tunerconfig);
1252 break;
1253 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: {
1254 i2c_bus = &dev->i2c_bus[port->nr - 1];
1255
1256 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1257 &dvico_fusionhdtv_xc3028,
1258 &i2c_bus->i2c_adap);
1259 if (fe0->dvb.frontend != NULL) {
1260 struct dvb_frontend *fe;
1261 struct xc2028_config cfg = {
1262 .i2c_adap = &i2c_bus->i2c_adap,
1263 .i2c_addr = 0x61,
1264 };
1265 static struct xc2028_ctrl ctl = {
1266 .fname = XC2028_DEFAULT_FIRMWARE,
1267 .max_len = 64,
1268 .demod = XC3028_FE_ZARLINK456,
1269 };
1270
1271 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
1272 &cfg);
1273 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1274 fe->ops.tuner_ops.set_config(fe, &ctl);
1275 }
1276 break;
1277 }
1278 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2: {
1279 i2c_bus = &dev->i2c_bus[port->nr - 1];
1280 /* cxusb_ctrl_msg(adap->dev, CMD_DIGITAL, NULL, 0, NULL, 0); */
1281 /* cxusb_bluebird_gpio_pulse(adap->dev, 0x02, 1); */
1282
1283 if (!dvb_attach(dib7000p_attach, &dib7000p_ops))
1284 return -ENODEV;
1285
1286 if (dib7000p_ops.i2c_enumeration(&i2c_bus->i2c_adap, 1, 0x12, &dib7070p_dib7000p_config) < 0) {
1287 printk(KERN_WARNING "Unable to enumerate dib7000p\n");
1288 return -ENODEV;
1289 }
1290 fe0->dvb.frontend = dib7000p_ops.init(&i2c_bus->i2c_adap, 0x80, &dib7070p_dib7000p_config);
1291 if (fe0->dvb.frontend != NULL) {
1292 struct i2c_adapter *tun_i2c;
1293
1294 fe0->dvb.frontend->sec_priv = kmalloc(sizeof(dib7000p_ops), GFP_KERNEL);
1295 memcpy(fe0->dvb.frontend->sec_priv, &dib7000p_ops, sizeof(dib7000p_ops));
1296 tun_i2c = dib7000p_ops.get_i2c_master(fe0->dvb.frontend, DIBX000_I2C_INTERFACE_TUNER, 1);
1297 if (!dvb_attach(dib0070_attach, fe0->dvb.frontend, tun_i2c, &dib7070p_dib0070_config))
1298 return -ENODEV;
1299 }
1300 break;
1301 }
1302 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1303 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1304 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1305 i2c_bus = &dev->i2c_bus[0];
1306
1307 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1308 &dvico_fusionhdtv_xc3028,
1309 &i2c_bus->i2c_adap);
1310 if (fe0->dvb.frontend != NULL) {
1311 struct dvb_frontend *fe;
1312 struct xc2028_config cfg = {
1313 .i2c_adap = &dev->i2c_bus[1].i2c_adap,
1314 .i2c_addr = 0x61,
1315 };
1316 static struct xc2028_ctrl ctl = {
1317 .fname = XC2028_DEFAULT_FIRMWARE,
1318 .max_len = 64,
1319 .demod = XC3028_FE_ZARLINK456,
1320 };
1321
1322 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
1323 &cfg);
1324 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1325 fe->ops.tuner_ops.set_config(fe, &ctl);
1326 }
1327 break;
1328 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1329 i2c_bus = &dev->i2c_bus[0];
1330
1331 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1332 &dvico_fusionhdtv_xc3028,
1333 &i2c_bus->i2c_adap);
1334 if (fe0->dvb.frontend != NULL) {
1335 struct dvb_frontend *fe;
1336 struct xc4000_config cfg = {
1337 .i2c_address = 0x61,
1338 .default_pm = 0,
1339 .dvb_amplitude = 134,
1340 .set_smoothedcvbs = 1,
1341 .if_khz = 4560
1342 };
1343
1344 fe = dvb_attach(xc4000_attach, fe0->dvb.frontend,
1345 &dev->i2c_bus[1].i2c_adap, &cfg);
1346 if (!fe) {
1347 printk(KERN_ERR "%s/2: xc4000 attach failed\n",
1348 dev->name);
1349 goto frontend_detach;
1350 }
1351 }
1352 break;
1353 case CX23885_BOARD_TBS_6920:
1354 i2c_bus = &dev->i2c_bus[1];
1355
1356 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1357 &tbs_cx24116_config,
1358 &i2c_bus->i2c_adap);
1359 if (fe0->dvb.frontend != NULL)
1360 fe0->dvb.frontend->ops.set_voltage = f300_set_voltage;
1361
1362 break;
1363 case CX23885_BOARD_TBS_6980:
1364 case CX23885_BOARD_TBS_6981:
1365 i2c_bus = &dev->i2c_bus[1];
1366
1367 switch (port->nr) {
1368 /* PORT B */
1369 case 1:
1370 fe0->dvb.frontend = dvb_attach(cx24117_attach,
1371 &tbs_cx24117_config,
1372 &i2c_bus->i2c_adap);
1373 break;
1374 /* PORT C */
1375 case 2:
1376 fe0->dvb.frontend = dvb_attach(cx24117_attach,
1377 &tbs_cx24117_config,
1378 &i2c_bus->i2c_adap);
1379 break;
1380 }
1381 break;
1382 case CX23885_BOARD_TEVII_S470:
1383 i2c_bus = &dev->i2c_bus[1];
1384
1385 fe0->dvb.frontend = dvb_attach(ds3000_attach,
1386 &tevii_ds3000_config,
1387 &i2c_bus->i2c_adap);
1388 if (fe0->dvb.frontend != NULL) {
1389 dvb_attach(ts2020_attach, fe0->dvb.frontend,
1390 &tevii_ts2020_config, &i2c_bus->i2c_adap);
1391 fe0->dvb.frontend->ops.set_voltage = f300_set_voltage;
1392 }
1393
1394 break;
1395 case CX23885_BOARD_DVBWORLD_2005:
1396 i2c_bus = &dev->i2c_bus[1];
1397
1398 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1399 &dvbworld_cx24116_config,
1400 &i2c_bus->i2c_adap);
1401 break;
1402 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1403 i2c_bus = &dev->i2c_bus[0];
1404 switch (port->nr) {
1405 /* port B */
1406 case 1:
1407 fe0->dvb.frontend = dvb_attach(stv0900_attach,
1408 &netup_stv0900_config,
1409 &i2c_bus->i2c_adap, 0);
1410 if (fe0->dvb.frontend != NULL) {
1411 if (dvb_attach(stv6110_attach,
1412 fe0->dvb.frontend,
1413 &netup_stv6110_tunerconfig_a,
1414 &i2c_bus->i2c_adap)) {
1415 if (!dvb_attach(lnbh24_attach,
1416 fe0->dvb.frontend,
1417 &i2c_bus->i2c_adap,
1418 LNBH24_PCL | LNBH24_TTX,
1419 LNBH24_TEN, 0x09))
1420 printk(KERN_ERR
1421 "No LNBH24 found!\n");
1422
1423 }
1424 }
1425 break;
1426 /* port C */
1427 case 2:
1428 fe0->dvb.frontend = dvb_attach(stv0900_attach,
1429 &netup_stv0900_config,
1430 &i2c_bus->i2c_adap, 1);
1431 if (fe0->dvb.frontend != NULL) {
1432 if (dvb_attach(stv6110_attach,
1433 fe0->dvb.frontend,
1434 &netup_stv6110_tunerconfig_b,
1435 &i2c_bus->i2c_adap)) {
1436 if (!dvb_attach(lnbh24_attach,
1437 fe0->dvb.frontend,
1438 &i2c_bus->i2c_adap,
1439 LNBH24_PCL | LNBH24_TTX,
1440 LNBH24_TEN, 0x0a))
1441 printk(KERN_ERR
1442 "No LNBH24 found!\n");
1443
1444 }
1445 }
1446 break;
1447 }
1448 break;
1449 case CX23885_BOARD_MYGICA_X8506:
1450 i2c_bus = &dev->i2c_bus[0];
1451 i2c_bus2 = &dev->i2c_bus[1];
1452 fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
1453 &mygica_x8506_lgs8gl5_config,
1454 &i2c_bus->i2c_adap);
1455 if (fe0->dvb.frontend != NULL) {
1456 dvb_attach(xc5000_attach,
1457 fe0->dvb.frontend,
1458 &i2c_bus2->i2c_adap,
1459 &mygica_x8506_xc5000_config);
1460 }
1461 cx23885_set_frontend_hook(port, fe0->dvb.frontend);
1462 break;
1463 case CX23885_BOARD_MYGICA_X8507:
1464 i2c_bus = &dev->i2c_bus[0];
1465 i2c_bus2 = &dev->i2c_bus[1];
1466 fe0->dvb.frontend = dvb_attach(mb86a20s_attach,
1467 &mygica_x8507_mb86a20s_config,
1468 &i2c_bus->i2c_adap);
1469 if (fe0->dvb.frontend != NULL) {
1470 dvb_attach(xc5000_attach,
1471 fe0->dvb.frontend,
1472 &i2c_bus2->i2c_adap,
1473 &mygica_x8507_xc5000_config);
1474 }
1475 cx23885_set_frontend_hook(port, fe0->dvb.frontend);
1476 break;
1477 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1478 i2c_bus = &dev->i2c_bus[0];
1479 i2c_bus2 = &dev->i2c_bus[1];
1480 fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
1481 &magicpro_prohdtve2_lgs8g75_config,
1482 &i2c_bus->i2c_adap);
1483 if (fe0->dvb.frontend != NULL) {
1484 dvb_attach(xc5000_attach,
1485 fe0->dvb.frontend,
1486 &i2c_bus2->i2c_adap,
1487 &magicpro_prohdtve2_xc5000_config);
1488 }
1489 cx23885_set_frontend_hook(port, fe0->dvb.frontend);
1490 break;
1491 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1492 i2c_bus = &dev->i2c_bus[0];
1493 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1494 &hcw_s5h1411_config,
1495 &i2c_bus->i2c_adap);
1496 if (fe0->dvb.frontend != NULL)
1497 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1498 0x60, &dev->i2c_bus[0].i2c_adap,
1499 &hauppauge_tda18271_config);
1500
1501 tda18271_attach(&dev->ts1.analog_fe,
1502 0x60, &dev->i2c_bus[1].i2c_adap,
1503 &hauppauge_tda18271_config);
1504
1505 break;
1506 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1507 i2c_bus = &dev->i2c_bus[0];
1508 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1509 &hcw_s5h1411_config,
1510 &i2c_bus->i2c_adap);
1511 if (fe0->dvb.frontend != NULL)
1512 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1513 0x60, &dev->i2c_bus[0].i2c_adap,
1514 &hauppauge_tda18271_config);
1515 break;
1516 case CX23885_BOARD_MYGICA_X8558PRO:
1517 switch (port->nr) {
1518 /* port B */
1519 case 1:
1520 i2c_bus = &dev->i2c_bus[0];
1521 fe0->dvb.frontend = dvb_attach(atbm8830_attach,
1522 &mygica_x8558pro_atbm8830_cfg1,
1523 &i2c_bus->i2c_adap);
1524 if (fe0->dvb.frontend != NULL) {
1525 dvb_attach(max2165_attach,
1526 fe0->dvb.frontend,
1527 &i2c_bus->i2c_adap,
1528 &mygic_x8558pro_max2165_cfg1);
1529 }
1530 break;
1531 /* port C */
1532 case 2:
1533 i2c_bus = &dev->i2c_bus[1];
1534 fe0->dvb.frontend = dvb_attach(atbm8830_attach,
1535 &mygica_x8558pro_atbm8830_cfg2,
1536 &i2c_bus->i2c_adap);
1537 if (fe0->dvb.frontend != NULL) {
1538 dvb_attach(max2165_attach,
1539 fe0->dvb.frontend,
1540 &i2c_bus->i2c_adap,
1541 &mygic_x8558pro_max2165_cfg2);
1542 }
1543 break;
1544 }
1545 break;
1546 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1547 i2c_bus = &dev->i2c_bus[0];
1548 mfe_shared = 1;/* MFE */
1549 port->frontends.gate = 0;/* not clear for me yet */
1550 /* ports B, C */
1551 /* MFE frontend 1 DVB-T */
1552 fe0->dvb.frontend = dvb_attach(stv0367ter_attach,
1553 &netup_stv0367_config[port->nr - 1],
1554 &i2c_bus->i2c_adap);
1555 if (fe0->dvb.frontend != NULL) {
1556 if (NULL == dvb_attach(xc5000_attach,
1557 fe0->dvb.frontend,
1558 &i2c_bus->i2c_adap,
1559 &netup_xc5000_config[port->nr - 1]))
1560 goto frontend_detach;
1561 /* load xc5000 firmware */
1562 fe0->dvb.frontend->ops.tuner_ops.init(fe0->dvb.frontend);
1563 }
1564 /* MFE frontend 2 */
1565 fe1 = vb2_dvb_get_frontend(&port->frontends, 2);
1566 if (fe1 == NULL)
1567 goto frontend_detach;
1568 /* DVB-C init */
1569 fe1->dvb.frontend = dvb_attach(stv0367cab_attach,
1570 &netup_stv0367_config[port->nr - 1],
1571 &i2c_bus->i2c_adap);
1572 if (fe1->dvb.frontend != NULL) {
1573 fe1->dvb.frontend->id = 1;
1574 if (NULL == dvb_attach(xc5000_attach,
1575 fe1->dvb.frontend,
1576 &i2c_bus->i2c_adap,
1577 &netup_xc5000_config[port->nr - 1]))
1578 goto frontend_detach;
1579 }
1580 break;
1581 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1582 i2c_bus = &dev->i2c_bus[0];
1583 i2c_bus2 = &dev->i2c_bus[1];
1584
1585 switch (port->nr) {
1586 /* port b */
1587 case 1:
1588 fe0->dvb.frontend = dvb_attach(drxk_attach,
1589 &terratec_drxk_config[0],
1590 &i2c_bus->i2c_adap);
1591 if (fe0->dvb.frontend != NULL) {
1592 if (!dvb_attach(mt2063_attach,
1593 fe0->dvb.frontend,
1594 &terratec_mt2063_config[0],
1595 &i2c_bus2->i2c_adap))
1596 goto frontend_detach;
1597 }
1598 break;
1599 /* port c */
1600 case 2:
1601 fe0->dvb.frontend = dvb_attach(drxk_attach,
1602 &terratec_drxk_config[1],
1603 &i2c_bus->i2c_adap);
1604 if (fe0->dvb.frontend != NULL) {
1605 if (!dvb_attach(mt2063_attach,
1606 fe0->dvb.frontend,
1607 &terratec_mt2063_config[1],
1608 &i2c_bus2->i2c_adap))
1609 goto frontend_detach;
1610 }
1611 break;
1612 }
1613 break;
1614 case CX23885_BOARD_TEVII_S471:
1615 i2c_bus = &dev->i2c_bus[1];
1616
1617 fe0->dvb.frontend = dvb_attach(ds3000_attach,
1618 &tevii_ds3000_config,
1619 &i2c_bus->i2c_adap);
1620 if (fe0->dvb.frontend != NULL) {
1621 dvb_attach(ts2020_attach, fe0->dvb.frontend,
1622 &tevii_ts2020_config, &i2c_bus->i2c_adap);
1623 }
1624 break;
1625 case CX23885_BOARD_PROF_8000:
1626 i2c_bus = &dev->i2c_bus[0];
1627
1628 fe0->dvb.frontend = dvb_attach(stv090x_attach,
1629 &prof_8000_stv090x_config,
1630 &i2c_bus->i2c_adap,
1631 STV090x_DEMODULATOR_0);
1632 if (fe0->dvb.frontend != NULL) {
1633 if (!dvb_attach(stb6100_attach,
1634 fe0->dvb.frontend,
1635 &prof_8000_stb6100_config,
1636 &i2c_bus->i2c_adap))
1637 goto frontend_detach;
1638
1639 fe0->dvb.frontend->ops.set_voltage = p8000_set_voltage;
1640 }
1641 break;
1642 case CX23885_BOARD_HAUPPAUGE_HVR4400:
1643 i2c_bus = &dev->i2c_bus[0];
1644 i2c_bus2 = &dev->i2c_bus[1];
1645 switch (port->nr) {
1646 /* port b */
1647 case 1:
1648 fe0->dvb.frontend = dvb_attach(tda10071_attach,
1649 &hauppauge_tda10071_config,
1650 &i2c_bus->i2c_adap);
1651 if (fe0->dvb.frontend != NULL) {
1652 if (!dvb_attach(a8293_attach, fe0->dvb.frontend,
1653 &i2c_bus->i2c_adap,
1654 &hauppauge_a8293_config))
1655 goto frontend_detach;
1656 }
1657 break;
1658 /* port c */
1659 case 2:
1660 fe0->dvb.frontend = dvb_attach(si2165_attach,
1661 &hauppauge_hvr4400_si2165_config,
1662 &i2c_bus->i2c_adap);
1663 if (fe0->dvb.frontend != NULL) {
1664 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1665 if (!dvb_attach(tda18271_attach,
1666 fe0->dvb.frontend,
1667 0x60, &i2c_bus2->i2c_adap,
1668 &hauppauge_hvr4400_tuner_config))
1669 goto frontend_detach;
1670 }
1671 break;
1672 }
1673 break;
1674 case CX23885_BOARD_DVBSKY_T9580:
1675 i2c_bus = &dev->i2c_bus[0];
1676 i2c_bus2 = &dev->i2c_bus[1];
1677 switch (port->nr) {
1678 /* port b - satellite */
1679 case 1:
1680 /* attach frontend */
1681 fe0->dvb.frontend = dvb_attach(m88ds3103_attach,
1682 &dvbsky_t9580_m88ds3103_config,
1683 &i2c_bus2->i2c_adap, &adapter);
1684 if (fe0->dvb.frontend == NULL)
1685 break;
1686
1687 /* attach tuner */
1688 memset(&m88ts2022_config, 0, sizeof(m88ts2022_config));
1689 m88ts2022_config.fe = fe0->dvb.frontend;
1690 m88ts2022_config.clock = 27000000;
1691 memset(&info, 0, sizeof(struct i2c_board_info));
1692 strlcpy(info.type, "m88ts2022", I2C_NAME_SIZE);
1693 info.addr = 0x60;
1694 info.platform_data = &m88ts2022_config;
1695 request_module(info.type);
1696 client_tuner = i2c_new_device(adapter, &info);
1697 if (client_tuner == NULL ||
1698 client_tuner->dev.driver == NULL)
1699 goto frontend_detach;
1700 if (!try_module_get(client_tuner->dev.driver->owner)) {
1701 i2c_unregister_device(client_tuner);
1702 goto frontend_detach;
1703 }
1704
1705 /* delegate signal strength measurement to tuner */
1706 fe0->dvb.frontend->ops.read_signal_strength =
1707 fe0->dvb.frontend->ops.tuner_ops.get_rf_strength;
1708
1709 /*
1710 * for setting the voltage we need to set GPIOs on
1711 * the card.
1712 */
1713 port->fe_set_voltage =
1714 fe0->dvb.frontend->ops.set_voltage;
1715 fe0->dvb.frontend->ops.set_voltage =
1716 dvbsky_t9580_set_voltage;
1717
1718 port->i2c_client_tuner = client_tuner;
1719
1720 break;
1721 /* port c - terrestrial/cable */
1722 case 2:
1723 /* attach frontend */
1724 memset(&si2168_config, 0, sizeof(si2168_config));
1725 si2168_config.i2c_adapter = &adapter;
1726 si2168_config.fe = &fe0->dvb.frontend;
1727 si2168_config.ts_mode = SI2168_TS_SERIAL;
1728 memset(&info, 0, sizeof(struct i2c_board_info));
1729 strlcpy(info.type, "si2168", I2C_NAME_SIZE);
1730 info.addr = 0x64;
1731 info.platform_data = &si2168_config;
1732 request_module(info.type);
1733 client_demod = i2c_new_device(&i2c_bus->i2c_adap, &info);
1734 if (client_demod == NULL ||
1735 client_demod->dev.driver == NULL)
1736 goto frontend_detach;
1737 if (!try_module_get(client_demod->dev.driver->owner)) {
1738 i2c_unregister_device(client_demod);
1739 goto frontend_detach;
1740 }
1741 port->i2c_client_demod = client_demod;
1742
1743 /* attach tuner */
1744 memset(&si2157_config, 0, sizeof(si2157_config));
1745 si2157_config.fe = fe0->dvb.frontend;
1746 memset(&info, 0, sizeof(struct i2c_board_info));
1747 strlcpy(info.type, "si2157", I2C_NAME_SIZE);
1748 info.addr = 0x60;
1749 info.platform_data = &si2157_config;
1750 request_module(info.type);
1751 client_tuner = i2c_new_device(adapter, &info);
1752 if (client_tuner == NULL ||
1753 client_tuner->dev.driver == NULL) {
1754 module_put(client_demod->dev.driver->owner);
1755 i2c_unregister_device(client_demod);
1756 goto frontend_detach;
1757 }
1758 if (!try_module_get(client_tuner->dev.driver->owner)) {
1759 i2c_unregister_device(client_tuner);
1760 module_put(client_demod->dev.driver->owner);
1761 i2c_unregister_device(client_demod);
1762 goto frontend_detach;
1763 }
1764 port->i2c_client_tuner = client_tuner;
1765 break;
1766 }
1767 break;
1768 case CX23885_BOARD_DVBSKY_T980C:
1769 i2c_bus = &dev->i2c_bus[1];
1770 i2c_bus2 = &dev->i2c_bus[0];
1771
1772 /* attach frontend */
1773 memset(&si2168_config, 0, sizeof(si2168_config));
1774 si2168_config.i2c_adapter = &adapter;
1775 si2168_config.fe = &fe0->dvb.frontend;
1776 si2168_config.ts_mode = SI2168_TS_PARALLEL;
1777 memset(&info, 0, sizeof(struct i2c_board_info));
1778 strlcpy(info.type, "si2168", I2C_NAME_SIZE);
1779 info.addr = 0x64;
1780 info.platform_data = &si2168_config;
1781 request_module(info.type);
1782 client_demod = i2c_new_device(&i2c_bus->i2c_adap, &info);
1783 if (client_demod == NULL ||
1784 client_demod->dev.driver == NULL)
1785 goto frontend_detach;
1786 if (!try_module_get(client_demod->dev.driver->owner)) {
1787 i2c_unregister_device(client_demod);
1788 goto frontend_detach;
1789 }
1790 port->i2c_client_demod = client_demod;
1791
1792 /* attach tuner */
1793 memset(&si2157_config, 0, sizeof(si2157_config));
1794 si2157_config.fe = fe0->dvb.frontend;
1795 memset(&info, 0, sizeof(struct i2c_board_info));
1796 strlcpy(info.type, "si2157", I2C_NAME_SIZE);
1797 info.addr = 0x60;
1798 info.platform_data = &si2157_config;
1799 request_module(info.type);
1800 client_tuner = i2c_new_device(adapter, &info);
1801 if (client_tuner == NULL ||
1802 client_tuner->dev.driver == NULL) {
1803 module_put(client_demod->dev.driver->owner);
1804 i2c_unregister_device(client_demod);
1805 goto frontend_detach;
1806 }
1807 if (!try_module_get(client_tuner->dev.driver->owner)) {
1808 i2c_unregister_device(client_tuner);
1809 module_put(client_demod->dev.driver->owner);
1810 i2c_unregister_device(client_demod);
1811 goto frontend_detach;
1812 }
1813 port->i2c_client_tuner = client_tuner;
1814 break;
1815 case CX23885_BOARD_DVBSKY_S950C:
1816 i2c_bus = &dev->i2c_bus[1];
1817 i2c_bus2 = &dev->i2c_bus[0];
1818
1819 /* attach frontend */
1820 fe0->dvb.frontend = dvb_attach(m88ds3103_attach,
1821 &dvbsky_s950c_m88ds3103_config,
1822 &i2c_bus->i2c_adap, &adapter);
1823 if (fe0->dvb.frontend == NULL)
1824 break;
1825
1826 /* attach tuner */
1827 memset(&m88ts2022_config, 0, sizeof(m88ts2022_config));
1828 m88ts2022_config.fe = fe0->dvb.frontend;
1829 m88ts2022_config.clock = 27000000;
1830 memset(&info, 0, sizeof(struct i2c_board_info));
1831 strlcpy(info.type, "m88ts2022", I2C_NAME_SIZE);
1832 info.addr = 0x60;
1833 info.platform_data = &m88ts2022_config;
1834 request_module(info.type);
1835 client_tuner = i2c_new_device(adapter, &info);
1836 if (client_tuner == NULL ||
1837 client_tuner->dev.driver == NULL)
1838 goto frontend_detach;
1839 if (!try_module_get(client_tuner->dev.driver->owner)) {
1840 i2c_unregister_device(client_tuner);
1841 goto frontend_detach;
1842 }
1843
1844 /* delegate signal strength measurement to tuner */
1845 fe0->dvb.frontend->ops.read_signal_strength =
1846 fe0->dvb.frontend->ops.tuner_ops.get_rf_strength;
1847
1848 port->i2c_client_tuner = client_tuner;
1849 break;
1850 default:
1851 printk(KERN_INFO "%s: The frontend of your DVB/ATSC card "
1852 " isn't supported yet\n",
1853 dev->name);
1854 break;
1855 }
1856
1857 if ((NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend)) {
1858 printk(KERN_ERR "%s: frontend initialization failed\n",
1859 dev->name);
1860 goto frontend_detach;
1861 }
1862
1863 /* define general-purpose callback pointer */
1864 fe0->dvb.frontend->callback = cx23885_tuner_callback;
1865 if (fe1)
1866 fe1->dvb.frontend->callback = cx23885_tuner_callback;
1867 #if 0
1868 /* Ensure all frontends negotiate bus access */
1869 fe0->dvb.frontend->ops.ts_bus_ctrl = cx23885_dvb_bus_ctrl;
1870 if (fe1)
1871 fe1->dvb.frontend->ops.ts_bus_ctrl = cx23885_dvb_bus_ctrl;
1872 #endif
1873
1874 /* Put the analog decoder in standby to keep it quiet */
1875 call_all(dev, core, s_power, 0);
1876
1877 if (fe0->dvb.frontend->ops.analog_ops.standby)
1878 fe0->dvb.frontend->ops.analog_ops.standby(fe0->dvb.frontend);
1879
1880 /* register everything */
1881 ret = vb2_dvb_register_bus(&port->frontends, THIS_MODULE, port,
1882 &dev->pci->dev, adapter_nr, mfe_shared);
1883 if (ret)
1884 goto frontend_detach;
1885
1886 /* init CI & MAC */
1887 switch (dev->board) {
1888 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: {
1889 static struct netup_card_info cinfo;
1890
1891 netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
1892 memcpy(port->frontends.adapter.proposed_mac,
1893 cinfo.port[port->nr - 1].mac, 6);
1894 printk(KERN_INFO "NetUP Dual DVB-S2 CI card port%d MAC=%pM\n",
1895 port->nr, port->frontends.adapter.proposed_mac);
1896
1897 netup_ci_init(port);
1898 break;
1899 }
1900 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
1901 struct altera_ci_config netup_ci_cfg = {
1902 .dev = dev,/* magic number to identify*/
1903 .adapter = &port->frontends.adapter,/* for CI */
1904 .demux = &fe0->dvb.demux,/* for hw pid filter */
1905 .fpga_rw = netup_altera_fpga_rw,
1906 };
1907
1908 altera_ci_init(&netup_ci_cfg, port->nr);
1909 break;
1910 }
1911 case CX23885_BOARD_TEVII_S470: {
1912 u8 eeprom[256]; /* 24C02 i2c eeprom */
1913
1914 if (port->nr != 1)
1915 break;
1916
1917 /* Read entire EEPROM */
1918 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
1919 tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom, sizeof(eeprom));
1920 printk(KERN_INFO "TeVii S470 MAC= %pM\n", eeprom + 0xa0);
1921 memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xa0, 6);
1922 break;
1923 }
1924 case CX23885_BOARD_DVBSKY_T9580: {
1925 u8 eeprom[256]; /* 24C02 i2c eeprom */
1926
1927 if (port->nr > 2)
1928 break;
1929
1930 /* Read entire EEPROM */
1931 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
1932 tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom,
1933 sizeof(eeprom));
1934 printk(KERN_INFO "DVBSky T9580 port %d MAC address: %pM\n",
1935 port->nr, eeprom + 0xc0 + (port->nr-1) * 8);
1936 memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xc0 +
1937 (port->nr-1) * 8, 6);
1938 break;
1939 }
1940 case CX23885_BOARD_DVBSKY_S950C:
1941 case CX23885_BOARD_DVBSKY_T980C: {
1942 u8 eeprom[256]; /* 24C02 i2c eeprom */
1943
1944 /* attach CI */
1945 memset(&sp2_config, 0, sizeof(sp2_config));
1946 sp2_config.dvb_adap = &port->frontends.adapter;
1947 sp2_config.priv = port;
1948 sp2_config.ci_control = cx23885_sp2_ci_ctrl;
1949 memset(&info, 0, sizeof(struct i2c_board_info));
1950 strlcpy(info.type, "sp2", I2C_NAME_SIZE);
1951 info.addr = 0x40;
1952 info.platform_data = &sp2_config;
1953 request_module(info.type);
1954 client_ci = i2c_new_device(&i2c_bus2->i2c_adap, &info);
1955 if (client_ci == NULL ||
1956 client_ci->dev.driver == NULL) {
1957 if (client_tuner) {
1958 module_put(client_tuner->dev.driver->owner);
1959 i2c_unregister_device(client_tuner);
1960 }
1961 if (client_demod) {
1962 module_put(client_demod->dev.driver->owner);
1963 i2c_unregister_device(client_demod);
1964 }
1965 goto frontend_detach;
1966 }
1967 if (!try_module_get(client_ci->dev.driver->owner)) {
1968 i2c_unregister_device(client_ci);
1969 if (client_tuner) {
1970 module_put(client_tuner->dev.driver->owner);
1971 i2c_unregister_device(client_tuner);
1972 }
1973 if (client_demod) {
1974 module_put(client_demod->dev.driver->owner);
1975 i2c_unregister_device(client_demod);
1976 }
1977 goto frontend_detach;
1978 }
1979 port->i2c_client_ci = client_ci;
1980
1981 if (port->nr != 1)
1982 break;
1983
1984 /* Read entire EEPROM */
1985 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
1986 tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom,
1987 sizeof(eeprom));
1988 printk(KERN_INFO "DVBSky T980C/S950C MAC address: %pM\n",
1989 eeprom + 0xc0);
1990 memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xc0, 6);
1991 break;
1992 }
1993 }
1994
1995 return ret;
1996
1997 frontend_detach:
1998 port->gate_ctrl = NULL;
1999 vb2_dvb_dealloc_frontends(&port->frontends);
2000 return -EINVAL;
2001 }
2002
2003 int cx23885_dvb_register(struct cx23885_tsport *port)
2004 {
2005
2006 struct vb2_dvb_frontend *fe0;
2007 struct cx23885_dev *dev = port->dev;
2008 int err, i;
2009
2010 /* Here we need to allocate the correct number of frontends,
2011 * as reflected in the cards struct. The reality is that currently
2012 * no cx23885 boards support this - yet. But, if we don't modify this
2013 * code then the second frontend would never be allocated (later)
2014 * and fail with error before the attach in dvb_register().
2015 * Without these changes we risk an OOPS later. The changes here
2016 * are for safety, and should provide a good foundation for the
2017 * future addition of any multi-frontend cx23885 based boards.
2018 */
2019 printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
2020 port->num_frontends);
2021
2022 for (i = 1; i <= port->num_frontends; i++) {
2023 struct vb2_queue *q;
2024
2025 if (vb2_dvb_alloc_frontend(
2026 &port->frontends, i) == NULL) {
2027 printk(KERN_ERR "%s() failed to alloc\n", __func__);
2028 return -ENOMEM;
2029 }
2030
2031 fe0 = vb2_dvb_get_frontend(&port->frontends, i);
2032 if (!fe0)
2033 err = -EINVAL;
2034
2035 dprintk(1, "%s\n", __func__);
2036 dprintk(1, " ->probed by Card=%d Name=%s, PCI %02x:%02x\n",
2037 dev->board,
2038 dev->name,
2039 dev->pci_bus,
2040 dev->pci_slot);
2041
2042 err = -ENODEV;
2043
2044 /* dvb stuff */
2045 /* We have to init the queue for each frontend on a port. */
2046 printk(KERN_INFO "%s: cx23885 based dvb card\n", dev->name);
2047 q = &fe0->dvb.dvbq;
2048 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2049 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
2050 q->gfp_flags = GFP_DMA32;
2051 q->min_buffers_needed = 2;
2052 q->drv_priv = port;
2053 q->buf_struct_size = sizeof(struct cx23885_buffer);
2054 q->ops = &dvb_qops;
2055 q->mem_ops = &vb2_dma_sg_memops;
2056 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
2057 q->lock = &dev->lock;
2058
2059 err = vb2_queue_init(q);
2060 if (err < 0)
2061 return err;
2062 }
2063 err = dvb_register(port);
2064 if (err != 0)
2065 printk(KERN_ERR "%s() dvb_register failed err = %d\n",
2066 __func__, err);
2067
2068 return err;
2069 }
2070
2071 int cx23885_dvb_unregister(struct cx23885_tsport *port)
2072 {
2073 struct vb2_dvb_frontend *fe0;
2074 struct i2c_client *client;
2075
2076 /* remove I2C client for CI */
2077 client = port->i2c_client_ci;
2078 if (client) {
2079 module_put(client->dev.driver->owner);
2080 i2c_unregister_device(client);
2081 }
2082
2083 /* remove I2C client for tuner */
2084 client = port->i2c_client_tuner;
2085 if (client) {
2086 module_put(client->dev.driver->owner);
2087 i2c_unregister_device(client);
2088 }
2089
2090 /* remove I2C client for demodulator */
2091 client = port->i2c_client_demod;
2092 if (client) {
2093 module_put(client->dev.driver->owner);
2094 i2c_unregister_device(client);
2095 }
2096
2097 fe0 = vb2_dvb_get_frontend(&port->frontends, 1);
2098
2099 if (fe0 && fe0->dvb.frontend)
2100 vb2_dvb_unregister_bus(&port->frontends);
2101
2102 switch (port->dev->board) {
2103 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
2104 netup_ci_exit(port);
2105 break;
2106 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
2107 altera_ci_release(port->dev, port->nr);
2108 break;
2109 }
2110
2111 port->gate_ctrl = NULL;
2112
2113 return 0;
2114 }
Linux kernel - Deliverables
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