2 * Driver for the Conexant CX23885 PCIe bridge
4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 #include <linux/module.h>
23 #include <linux/init.h>
24 #include <linux/device.h>
26 #include <linux/kthread.h>
27 #include <linux/file.h>
28 #include <linux/suspend.h>
31 #include <media/v4l2-common.h>
33 #include "dvb_ca_en50221.h"
44 #include "tuner-xc2028.h"
45 #include "tuner-simple.h"
47 #include "dibx000_common.h"
50 #include "stv0900_reg.h"
56 #include "netup-eeprom.h"
57 #include "netup-init.h"
61 #include "cx23885-f300.h"
62 #include "altera-ci.h"
68 #include "stb6100_cfg.h"
70 static unsigned int debug
;
72 #define dprintk(level, fmt, arg...)\
73 do { if (debug >= level)\
74 printk(KERN_DEBUG "%s/0: " fmt, dev->name, ## arg);\
77 /* ------------------------------------------------------------------ */
79 static unsigned int alt_tuner
;
80 module_param(alt_tuner
, int, 0644);
81 MODULE_PARM_DESC(alt_tuner
, "Enable alternate tuner configuration");
83 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr
);
85 /* ------------------------------------------------------------------ */
87 static int dvb_buf_setup(struct videobuf_queue
*q
,
88 unsigned int *count
, unsigned int *size
)
90 struct cx23885_tsport
*port
= q
->priv_data
;
92 port
->ts_packet_size
= 188 * 4;
93 port
->ts_packet_count
= 32;
95 *size
= port
->ts_packet_size
* port
->ts_packet_count
;
100 static int dvb_buf_prepare(struct videobuf_queue
*q
,
101 struct videobuf_buffer
*vb
, enum v4l2_field field
)
103 struct cx23885_tsport
*port
= q
->priv_data
;
104 return cx23885_buf_prepare(q
, port
, (struct cx23885_buffer
*)vb
, field
);
107 static void dvb_buf_queue(struct videobuf_queue
*q
, struct videobuf_buffer
*vb
)
109 struct cx23885_tsport
*port
= q
->priv_data
;
110 cx23885_buf_queue(port
, (struct cx23885_buffer
*)vb
);
113 static void dvb_buf_release(struct videobuf_queue
*q
,
114 struct videobuf_buffer
*vb
)
116 cx23885_free_buffer(q
, (struct cx23885_buffer
*)vb
);
119 static int cx23885_dvb_set_frontend(struct dvb_frontend
*fe
);
121 static void cx23885_dvb_gate_ctrl(struct cx23885_tsport
*port
, int open
)
123 struct videobuf_dvb_frontends
*f
;
124 struct videobuf_dvb_frontend
*fe
;
126 f
= &port
->frontends
;
128 if (f
->gate
<= 1) /* undefined or fe0 */
129 fe
= videobuf_dvb_get_frontend(f
, 1);
131 fe
= videobuf_dvb_get_frontend(f
, f
->gate
);
133 if (fe
&& fe
->dvb
.frontend
&& fe
->dvb
.frontend
->ops
.i2c_gate_ctrl
)
134 fe
->dvb
.frontend
->ops
.i2c_gate_ctrl(fe
->dvb
.frontend
, open
);
137 * FIXME: Improve this path to avoid calling the
138 * cx23885_dvb_set_frontend() every time it passes here.
140 cx23885_dvb_set_frontend(fe
->dvb
.frontend
);
143 static struct videobuf_queue_ops dvb_qops
= {
144 .buf_setup
= dvb_buf_setup
,
145 .buf_prepare
= dvb_buf_prepare
,
146 .buf_queue
= dvb_buf_queue
,
147 .buf_release
= dvb_buf_release
,
150 static struct s5h1409_config hauppauge_generic_config
= {
151 .demod_address
= 0x32 >> 1,
152 .output_mode
= S5H1409_SERIAL_OUTPUT
,
153 .gpio
= S5H1409_GPIO_ON
,
155 .inversion
= S5H1409_INVERSION_OFF
,
156 .status_mode
= S5H1409_DEMODLOCKING
,
157 .mpeg_timing
= S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK
,
160 static struct tda10048_config hauppauge_hvr1200_config
= {
161 .demod_address
= 0x10 >> 1,
162 .output_mode
= TDA10048_SERIAL_OUTPUT
,
163 .fwbulkwritelen
= TDA10048_BULKWRITE_200
,
164 .inversion
= TDA10048_INVERSION_ON
,
165 .dtv6_if_freq_khz
= TDA10048_IF_3300
,
166 .dtv7_if_freq_khz
= TDA10048_IF_3800
,
167 .dtv8_if_freq_khz
= TDA10048_IF_4300
,
168 .clk_freq_khz
= TDA10048_CLK_16000
,
171 static struct tda10048_config hauppauge_hvr1210_config
= {
172 .demod_address
= 0x10 >> 1,
173 .output_mode
= TDA10048_SERIAL_OUTPUT
,
174 .fwbulkwritelen
= TDA10048_BULKWRITE_200
,
175 .inversion
= TDA10048_INVERSION_ON
,
176 .dtv6_if_freq_khz
= TDA10048_IF_3300
,
177 .dtv7_if_freq_khz
= TDA10048_IF_3500
,
178 .dtv8_if_freq_khz
= TDA10048_IF_4000
,
179 .clk_freq_khz
= TDA10048_CLK_16000
,
182 static struct s5h1409_config hauppauge_ezqam_config
= {
183 .demod_address
= 0x32 >> 1,
184 .output_mode
= S5H1409_SERIAL_OUTPUT
,
185 .gpio
= S5H1409_GPIO_OFF
,
187 .inversion
= S5H1409_INVERSION_ON
,
188 .status_mode
= S5H1409_DEMODLOCKING
,
189 .mpeg_timing
= S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK
,
192 static struct s5h1409_config hauppauge_hvr1800lp_config
= {
193 .demod_address
= 0x32 >> 1,
194 .output_mode
= S5H1409_SERIAL_OUTPUT
,
195 .gpio
= S5H1409_GPIO_OFF
,
197 .inversion
= S5H1409_INVERSION_OFF
,
198 .status_mode
= S5H1409_DEMODLOCKING
,
199 .mpeg_timing
= S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK
,
202 static struct s5h1409_config hauppauge_hvr1500_config
= {
203 .demod_address
= 0x32 >> 1,
204 .output_mode
= S5H1409_SERIAL_OUTPUT
,
205 .gpio
= S5H1409_GPIO_OFF
,
206 .inversion
= S5H1409_INVERSION_OFF
,
207 .status_mode
= S5H1409_DEMODLOCKING
,
208 .mpeg_timing
= S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK
,
211 static struct mt2131_config hauppauge_generic_tunerconfig
= {
215 static struct lgdt330x_config fusionhdtv_5_express
= {
216 .demod_address
= 0x0e,
217 .demod_chip
= LGDT3303
,
221 static struct s5h1409_config hauppauge_hvr1500q_config
= {
222 .demod_address
= 0x32 >> 1,
223 .output_mode
= S5H1409_SERIAL_OUTPUT
,
224 .gpio
= S5H1409_GPIO_ON
,
226 .inversion
= S5H1409_INVERSION_OFF
,
227 .status_mode
= S5H1409_DEMODLOCKING
,
228 .mpeg_timing
= S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK
,
231 static struct s5h1409_config dvico_s5h1409_config
= {
232 .demod_address
= 0x32 >> 1,
233 .output_mode
= S5H1409_SERIAL_OUTPUT
,
234 .gpio
= S5H1409_GPIO_ON
,
236 .inversion
= S5H1409_INVERSION_OFF
,
237 .status_mode
= S5H1409_DEMODLOCKING
,
238 .mpeg_timing
= S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK
,
241 static struct s5h1411_config dvico_s5h1411_config
= {
242 .output_mode
= S5H1411_SERIAL_OUTPUT
,
243 .gpio
= S5H1411_GPIO_ON
,
244 .qam_if
= S5H1411_IF_44000
,
245 .vsb_if
= S5H1411_IF_44000
,
246 .inversion
= S5H1411_INVERSION_OFF
,
247 .status_mode
= S5H1411_DEMODLOCKING
,
248 .mpeg_timing
= S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK
,
251 static struct s5h1411_config hcw_s5h1411_config
= {
252 .output_mode
= S5H1411_SERIAL_OUTPUT
,
253 .gpio
= S5H1411_GPIO_OFF
,
254 .vsb_if
= S5H1411_IF_44000
,
255 .qam_if
= S5H1411_IF_4000
,
256 .inversion
= S5H1411_INVERSION_ON
,
257 .status_mode
= S5H1411_DEMODLOCKING
,
258 .mpeg_timing
= S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK
,
261 static struct xc5000_config hauppauge_hvr1500q_tunerconfig
= {
266 static struct xc5000_config dvico_xc5000_tunerconfig
= {
271 static struct tda829x_config tda829x_no_probe
= {
272 .probe_tuner
= TDA829X_DONT_PROBE
,
275 static struct tda18271_std_map hauppauge_tda18271_std_map
= {
276 .atsc_6
= { .if_freq
= 5380, .agc_mode
= 3, .std
= 3,
277 .if_lvl
= 6, .rfagc_top
= 0x37 },
278 .qam_6
= { .if_freq
= 4000, .agc_mode
= 3, .std
= 0,
279 .if_lvl
= 6, .rfagc_top
= 0x37 },
282 static struct tda18271_std_map hauppauge_hvr1200_tda18271_std_map
= {
283 .dvbt_6
= { .if_freq
= 3300, .agc_mode
= 3, .std
= 4,
284 .if_lvl
= 1, .rfagc_top
= 0x37, },
285 .dvbt_7
= { .if_freq
= 3800, .agc_mode
= 3, .std
= 5,
286 .if_lvl
= 1, .rfagc_top
= 0x37, },
287 .dvbt_8
= { .if_freq
= 4300, .agc_mode
= 3, .std
= 6,
288 .if_lvl
= 1, .rfagc_top
= 0x37, },
291 static struct tda18271_config hauppauge_tda18271_config
= {
292 .std_map
= &hauppauge_tda18271_std_map
,
293 .gate
= TDA18271_GATE_ANALOG
,
294 .output_opt
= TDA18271_OUTPUT_LT_OFF
,
297 static struct tda18271_config hauppauge_hvr1200_tuner_config
= {
298 .std_map
= &hauppauge_hvr1200_tda18271_std_map
,
299 .gate
= TDA18271_GATE_ANALOG
,
300 .output_opt
= TDA18271_OUTPUT_LT_OFF
,
303 static struct tda18271_config hauppauge_hvr1210_tuner_config
= {
304 .gate
= TDA18271_GATE_DIGITAL
,
305 .output_opt
= TDA18271_OUTPUT_LT_OFF
,
308 static struct tda18271_std_map hauppauge_hvr127x_std_map
= {
309 .atsc_6
= { .if_freq
= 3250, .agc_mode
= 3, .std
= 4,
310 .if_lvl
= 1, .rfagc_top
= 0x58 },
311 .qam_6
= { .if_freq
= 4000, .agc_mode
= 3, .std
= 5,
312 .if_lvl
= 1, .rfagc_top
= 0x58 },
315 static struct tda18271_config hauppauge_hvr127x_config
= {
316 .std_map
= &hauppauge_hvr127x_std_map
,
317 .output_opt
= TDA18271_OUTPUT_LT_OFF
,
320 static struct lgdt3305_config hauppauge_lgdt3305_config
= {
322 .mpeg_mode
= LGDT3305_MPEG_SERIAL
,
323 .tpclk_edge
= LGDT3305_TPCLK_FALLING_EDGE
,
324 .tpvalid_polarity
= LGDT3305_TP_VALID_HIGH
,
326 .spectral_inversion
= 1,
331 static struct dibx000_agc_config xc3028_agc_config
= {
332 BAND_VHF
| BAND_UHF
, /* band_caps */
334 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
335 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
336 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0,
337 * P_agc_nb_est=2, P_agc_write=0
339 (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) |
340 (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */
343 21, /* time_stabiliz */
355 39718, /* agc2_max */
364 29, /* agc2_slope1 */
365 29, /* agc2_slope2 */
372 1, /* perform_agc_softsplit */
375 /* PLL Configuration for COFDM BW_MHz = 8.000000
376 * With external clock = 30.000000 */
377 static struct dibx000_bandwidth_config xc3028_bw_config
= {
378 60000, /* internal */
379 30000, /* sampling */
380 1, /* pll_cfg: prediv */
381 8, /* pll_cfg: ratio */
382 3, /* pll_cfg: range */
383 1, /* pll_cfg: reset */
384 0, /* pll_cfg: bypass */
385 0, /* misc: refdiv */
386 0, /* misc: bypclk_div */
387 1, /* misc: IO_CLK_en_core */
388 1, /* misc: ADClkSrc */
389 0, /* misc: modulo */
390 (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
391 (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
393 30000000 /* xtal_hz */
396 static struct dib7000p_config hauppauge_hvr1400_dib7000_config
= {
397 .output_mpeg2_in_188_bytes
= 1,
398 .hostbus_diversity
= 1,
399 .tuner_is_baseband
= 0,
402 .agc_config_count
= 1,
403 .agc
= &xc3028_agc_config
,
404 .bw
= &xc3028_bw_config
,
406 .gpio_dir
= DIB7000P_GPIO_DEFAULT_DIRECTIONS
,
407 .gpio_val
= DIB7000P_GPIO_DEFAULT_VALUES
,
408 .gpio_pwm_pos
= DIB7000P_GPIO_DEFAULT_PWM_POS
,
414 .output_mode
= OUTMODE_MPEG2_SERIAL
,
417 static struct zl10353_config dvico_fusionhdtv_xc3028
= {
418 .demod_address
= 0x0f,
421 .disable_i2c_gate_ctrl
= 1,
424 static struct stv0900_reg stv0900_ts_regs
[] = {
425 { R0900_TSGENERAL
, 0x00 },
426 { R0900_P1_TSSPEED
, 0x40 },
427 { R0900_P2_TSSPEED
, 0x40 },
428 { R0900_P1_TSCFGM
, 0xc0 },
429 { R0900_P2_TSCFGM
, 0xc0 },
430 { R0900_P1_TSCFGH
, 0xe0 },
431 { R0900_P2_TSCFGH
, 0xe0 },
432 { R0900_P1_TSCFGL
, 0x20 },
433 { R0900_P2_TSCFGL
, 0x20 },
434 { 0xffff, 0xff }, /* terminate */
437 static struct stv0900_config netup_stv0900_config
= {
438 .demod_address
= 0x68,
439 .demod_mode
= 1, /* dual */
441 .clkmode
= 3,/* 0-CLKI, 2-XTALI, else AUTO */
442 .diseqc_mode
= 2,/* 2/3 PWM */
443 .ts_config_regs
= stv0900_ts_regs
,
444 .tun1_maddress
= 0,/* 0x60 */
445 .tun2_maddress
= 3,/* 0x63 */
446 .tun1_adc
= 1,/* 1 Vpp */
447 .tun2_adc
= 1,/* 1 Vpp */
450 static struct stv6110_config netup_stv6110_tunerconfig_a
= {
454 .gain
= 8, /* +16 dB - maximum gain */
457 static struct stv6110_config netup_stv6110_tunerconfig_b
= {
461 .gain
= 8, /* +16 dB - maximum gain */
464 static struct cx24116_config tbs_cx24116_config
= {
465 .demod_address
= 0x55,
468 static struct ds3000_config tevii_ds3000_config
= {
469 .demod_address
= 0x68,
472 static struct cx24116_config dvbworld_cx24116_config
= {
473 .demod_address
= 0x05,
476 static struct lgs8gxx_config mygica_x8506_lgs8gl5_config
= {
477 .prod
= LGS8GXX_PROD_LGS8GL5
,
478 .demod_address
= 0x19,
482 .if_clk_freq
= 30400, /* 30.4 MHz */
483 .if_freq
= 5380, /* 5.38 MHz */
490 static struct xc5000_config mygica_x8506_xc5000_config
= {
495 static struct stv090x_config prof_8000_stv090x_config
= {
497 .demod_mode
= STV090x_SINGLE
,
498 .clk_mode
= STV090x_CLK_EXT
,
501 .ts1_mode
= STV090x_TSMODE_PARALLEL_PUNCTURED
,
502 .repeater_level
= STV090x_RPTLEVEL_64
,
503 .adc1_range
= STV090x_ADC_2Vpp
,
504 .diseqc_envelope_mode
= false,
506 .tuner_get_frequency
= stb6100_get_frequency
,
507 .tuner_set_frequency
= stb6100_set_frequency
,
508 .tuner_set_bandwidth
= stb6100_set_bandwidth
,
509 .tuner_get_bandwidth
= stb6100_get_bandwidth
,
512 static struct stb6100_config prof_8000_stb6100_config
= {
513 .tuner_address
= 0x60,
514 .refclock
= 27000000,
517 static int p8000_set_voltage(struct dvb_frontend
*fe
, fe_sec_voltage_t voltage
)
519 struct cx23885_tsport
*port
= fe
->dvb
->priv
;
520 struct cx23885_dev
*dev
= port
->dev
;
522 if (voltage
== SEC_VOLTAGE_18
)
523 cx_write(MC417_RWD
, 0x00001e00);
524 else if (voltage
== SEC_VOLTAGE_13
)
525 cx_write(MC417_RWD
, 0x00001a00);
527 cx_write(MC417_RWD
, 0x00001800);
531 static int cx23885_dvb_set_frontend(struct dvb_frontend
*fe
)
533 struct dtv_frontend_properties
*p
= &fe
->dtv_property_cache
;
534 struct cx23885_tsport
*port
= fe
->dvb
->priv
;
535 struct cx23885_dev
*dev
= port
->dev
;
537 switch (dev
->board
) {
538 case CX23885_BOARD_HAUPPAUGE_HVR1275
:
539 switch (p
->modulation
) {
541 cx23885_gpio_clear(dev
, GPIO_5
);
546 cx23885_gpio_set(dev
, GPIO_5
);
550 case CX23885_BOARD_MYGICA_X8506
:
551 case CX23885_BOARD_MAGICPRO_PROHDTVE2
:
552 /* Select Digital TV */
553 cx23885_gpio_set(dev
, GPIO_0
);
559 static struct lgs8gxx_config magicpro_prohdtve2_lgs8g75_config
= {
560 .prod
= LGS8GXX_PROD_LGS8G75
,
561 .demod_address
= 0x19,
565 .if_clk_freq
= 30400, /* 30.4 MHz */
566 .if_freq
= 6500, /* 6.50 MHz */
570 .adc_vpp
= 2, /* 1.6 Vpp */
574 static struct xc5000_config magicpro_prohdtve2_xc5000_config
= {
579 static struct atbm8830_config mygica_x8558pro_atbm8830_cfg1
= {
580 .prod
= ATBM8830_PROD_8830
,
581 .demod_address
= 0x44,
583 .ts_sampling_edge
= 1,
585 .osc_clk_freq
= 30400, /* in kHz */
586 .if_freq
= 0, /* zero IF */
593 static struct max2165_config mygic_x8558pro_max2165_cfg1
= {
598 static struct atbm8830_config mygica_x8558pro_atbm8830_cfg2
= {
599 .prod
= ATBM8830_PROD_8830
,
600 .demod_address
= 0x44,
602 .ts_sampling_edge
= 1,
604 .osc_clk_freq
= 30400, /* in kHz */
605 .if_freq
= 0, /* zero IF */
612 static struct max2165_config mygic_x8558pro_max2165_cfg2
= {
616 static struct stv0367_config netup_stv0367_config
[] = {
618 .demod_address
= 0x1c,
625 .demod_address
= 0x1d,
634 static struct xc5000_config netup_xc5000_config
[] = {
644 static struct drxk_config terratec_drxk_config
[] = {
654 static struct mt2063_config terratec_mt2063_config
[] = {
656 .tuner_address
= 0x60,
658 .tuner_address
= 0x67,
662 int netup_altera_fpga_rw(void *device
, int flag
, int data
, int read
)
664 struct cx23885_dev
*dev
= (struct cx23885_dev
*)device
;
665 unsigned long timeout
= jiffies
+ msecs_to_jiffies(1);
668 mem
= cx_read(MC417_RWD
);
670 cx_set(MC417_OEN
, ALT_DATA
);
672 cx_clear(MC417_OEN
, ALT_DATA
);/* D0-D7 out */
674 mem
|= (data
& ALT_DATA
);
684 mem
= (mem
& ~ALT_RD
) | ALT_WR
;
686 mem
= (mem
& ~ALT_WR
) | ALT_RD
;
688 cx_write(MC417_RWD
, mem
); /* start RW cycle */
691 mem
= cx_read(MC417_RWD
);
692 if ((mem
& ALT_RDY
) == 0)
694 if (time_after(jiffies
, timeout
))
699 cx_set(MC417_RWD
, ALT_RD
| ALT_WR
| ALT_CS
);
701 return mem
& ALT_DATA
;
706 static int dvb_register(struct cx23885_tsport
*port
)
708 struct cx23885_dev
*dev
= port
->dev
;
709 struct cx23885_i2c
*i2c_bus
= NULL
, *i2c_bus2
= NULL
;
710 struct videobuf_dvb_frontend
*fe0
, *fe1
= NULL
;
711 int mfe_shared
= 0; /* bus not shared by default */
714 /* Get the first frontend */
715 fe0
= videobuf_dvb_get_frontend(&port
->frontends
, 1);
719 /* init struct videobuf_dvb */
720 fe0
->dvb
.name
= dev
->name
;
722 /* multi-frontend gate control is undefined or defaults to fe0 */
723 port
->frontends
.gate
= 0;
725 /* Sets the gate control callback to be used by i2c command calls */
726 port
->gate_ctrl
= cx23885_dvb_gate_ctrl
;
729 switch (dev
->board
) {
730 case CX23885_BOARD_HAUPPAUGE_HVR1250
:
731 i2c_bus
= &dev
->i2c_bus
[0];
732 fe0
->dvb
.frontend
= dvb_attach(s5h1409_attach
,
733 &hauppauge_generic_config
,
735 if (fe0
->dvb
.frontend
!= NULL
) {
736 dvb_attach(mt2131_attach
, fe0
->dvb
.frontend
,
738 &hauppauge_generic_tunerconfig
, 0);
741 case CX23885_BOARD_HAUPPAUGE_HVR1270
:
742 case CX23885_BOARD_HAUPPAUGE_HVR1275
:
743 i2c_bus
= &dev
->i2c_bus
[0];
744 fe0
->dvb
.frontend
= dvb_attach(lgdt3305_attach
,
745 &hauppauge_lgdt3305_config
,
747 if (fe0
->dvb
.frontend
!= NULL
) {
748 dvb_attach(tda18271_attach
, fe0
->dvb
.frontend
,
749 0x60, &dev
->i2c_bus
[1].i2c_adap
,
750 &hauppauge_hvr127x_config
);
753 case CX23885_BOARD_HAUPPAUGE_HVR1255
:
754 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111
:
755 i2c_bus
= &dev
->i2c_bus
[0];
756 fe0
->dvb
.frontend
= dvb_attach(s5h1411_attach
,
759 if (fe0
->dvb
.frontend
!= NULL
) {
760 dvb_attach(tda18271_attach
, fe0
->dvb
.frontend
,
761 0x60, &dev
->i2c_bus
[1].i2c_adap
,
762 &hauppauge_tda18271_config
);
765 tda18271_attach(&dev
->ts1
.analog_fe
,
766 0x60, &dev
->i2c_bus
[1].i2c_adap
,
767 &hauppauge_tda18271_config
);
770 case CX23885_BOARD_HAUPPAUGE_HVR1800
:
771 i2c_bus
= &dev
->i2c_bus
[0];
775 dvb_attach(s5h1409_attach
,
776 &hauppauge_ezqam_config
,
778 if (fe0
->dvb
.frontend
!= NULL
) {
779 dvb_attach(tda829x_attach
, fe0
->dvb
.frontend
,
780 &dev
->i2c_bus
[1].i2c_adap
, 0x42,
782 dvb_attach(tda18271_attach
, fe0
->dvb
.frontend
,
783 0x60, &dev
->i2c_bus
[1].i2c_adap
,
784 &hauppauge_tda18271_config
);
790 dvb_attach(s5h1409_attach
,
791 &hauppauge_generic_config
,
793 if (fe0
->dvb
.frontend
!= NULL
)
794 dvb_attach(mt2131_attach
, fe0
->dvb
.frontend
,
796 &hauppauge_generic_tunerconfig
, 0);
800 case CX23885_BOARD_HAUPPAUGE_HVR1800lp
:
801 i2c_bus
= &dev
->i2c_bus
[0];
802 fe0
->dvb
.frontend
= dvb_attach(s5h1409_attach
,
803 &hauppauge_hvr1800lp_config
,
805 if (fe0
->dvb
.frontend
!= NULL
) {
806 dvb_attach(mt2131_attach
, fe0
->dvb
.frontend
,
808 &hauppauge_generic_tunerconfig
, 0);
811 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP
:
812 i2c_bus
= &dev
->i2c_bus
[0];
813 fe0
->dvb
.frontend
= dvb_attach(lgdt330x_attach
,
814 &fusionhdtv_5_express
,
816 if (fe0
->dvb
.frontend
!= NULL
) {
817 dvb_attach(simple_tuner_attach
, fe0
->dvb
.frontend
,
818 &i2c_bus
->i2c_adap
, 0x61,
819 TUNER_LG_TDVS_H06XF
);
822 case CX23885_BOARD_HAUPPAUGE_HVR1500Q
:
823 i2c_bus
= &dev
->i2c_bus
[1];
824 fe0
->dvb
.frontend
= dvb_attach(s5h1409_attach
,
825 &hauppauge_hvr1500q_config
,
826 &dev
->i2c_bus
[0].i2c_adap
);
827 if (fe0
->dvb
.frontend
!= NULL
)
828 dvb_attach(xc5000_attach
, fe0
->dvb
.frontend
,
830 &hauppauge_hvr1500q_tunerconfig
);
832 case CX23885_BOARD_HAUPPAUGE_HVR1500
:
833 i2c_bus
= &dev
->i2c_bus
[1];
834 fe0
->dvb
.frontend
= dvb_attach(s5h1409_attach
,
835 &hauppauge_hvr1500_config
,
836 &dev
->i2c_bus
[0].i2c_adap
);
837 if (fe0
->dvb
.frontend
!= NULL
) {
838 struct dvb_frontend
*fe
;
839 struct xc2028_config cfg
= {
840 .i2c_adap
= &i2c_bus
->i2c_adap
,
843 static struct xc2028_ctrl ctl
= {
844 .fname
= XC2028_DEFAULT_FIRMWARE
,
846 .demod
= XC3028_FE_OREN538
,
849 fe
= dvb_attach(xc2028_attach
,
850 fe0
->dvb
.frontend
, &cfg
);
851 if (fe
!= NULL
&& fe
->ops
.tuner_ops
.set_config
!= NULL
)
852 fe
->ops
.tuner_ops
.set_config(fe
, &ctl
);
855 case CX23885_BOARD_HAUPPAUGE_HVR1200
:
856 case CX23885_BOARD_HAUPPAUGE_HVR1700
:
857 i2c_bus
= &dev
->i2c_bus
[0];
858 fe0
->dvb
.frontend
= dvb_attach(tda10048_attach
,
859 &hauppauge_hvr1200_config
,
861 if (fe0
->dvb
.frontend
!= NULL
) {
862 dvb_attach(tda829x_attach
, fe0
->dvb
.frontend
,
863 &dev
->i2c_bus
[1].i2c_adap
, 0x42,
865 dvb_attach(tda18271_attach
, fe0
->dvb
.frontend
,
866 0x60, &dev
->i2c_bus
[1].i2c_adap
,
867 &hauppauge_hvr1200_tuner_config
);
870 case CX23885_BOARD_HAUPPAUGE_HVR1210
:
871 i2c_bus
= &dev
->i2c_bus
[0];
872 fe0
->dvb
.frontend
= dvb_attach(tda10048_attach
,
873 &hauppauge_hvr1210_config
,
875 if (fe0
->dvb
.frontend
!= NULL
) {
876 dvb_attach(tda18271_attach
, fe0
->dvb
.frontend
,
877 0x60, &dev
->i2c_bus
[1].i2c_adap
,
878 &hauppauge_hvr1210_tuner_config
);
881 case CX23885_BOARD_HAUPPAUGE_HVR1400
:
882 i2c_bus
= &dev
->i2c_bus
[0];
883 fe0
->dvb
.frontend
= dvb_attach(dib7000p_attach
,
885 0x12, &hauppauge_hvr1400_dib7000_config
);
886 if (fe0
->dvb
.frontend
!= NULL
) {
887 struct dvb_frontend
*fe
;
888 struct xc2028_config cfg
= {
889 .i2c_adap
= &dev
->i2c_bus
[1].i2c_adap
,
892 static struct xc2028_ctrl ctl
= {
893 .fname
= XC3028L_DEFAULT_FIRMWARE
,
895 .demod
= XC3028_FE_DIBCOM52
,
896 /* This is true for all demods with
898 .type
= XC2028_D2633
,
901 fe
= dvb_attach(xc2028_attach
,
902 fe0
->dvb
.frontend
, &cfg
);
903 if (fe
!= NULL
&& fe
->ops
.tuner_ops
.set_config
!= NULL
)
904 fe
->ops
.tuner_ops
.set_config(fe
, &ctl
);
907 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP
:
908 i2c_bus
= &dev
->i2c_bus
[port
->nr
- 1];
910 fe0
->dvb
.frontend
= dvb_attach(s5h1409_attach
,
911 &dvico_s5h1409_config
,
913 if (fe0
->dvb
.frontend
== NULL
)
914 fe0
->dvb
.frontend
= dvb_attach(s5h1411_attach
,
915 &dvico_s5h1411_config
,
917 if (fe0
->dvb
.frontend
!= NULL
)
918 dvb_attach(xc5000_attach
, fe0
->dvb
.frontend
,
920 &dvico_xc5000_tunerconfig
);
922 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP
: {
923 i2c_bus
= &dev
->i2c_bus
[port
->nr
- 1];
925 fe0
->dvb
.frontend
= dvb_attach(zl10353_attach
,
926 &dvico_fusionhdtv_xc3028
,
928 if (fe0
->dvb
.frontend
!= NULL
) {
929 struct dvb_frontend
*fe
;
930 struct xc2028_config cfg
= {
931 .i2c_adap
= &i2c_bus
->i2c_adap
,
934 static struct xc2028_ctrl ctl
= {
935 .fname
= XC2028_DEFAULT_FIRMWARE
,
937 .demod
= XC3028_FE_ZARLINK456
,
940 fe
= dvb_attach(xc2028_attach
, fe0
->dvb
.frontend
,
942 if (fe
!= NULL
&& fe
->ops
.tuner_ops
.set_config
!= NULL
)
943 fe
->ops
.tuner_ops
.set_config(fe
, &ctl
);
947 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H
:
948 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F
:
949 case CX23885_BOARD_COMPRO_VIDEOMATE_E800
:
950 i2c_bus
= &dev
->i2c_bus
[0];
952 fe0
->dvb
.frontend
= dvb_attach(zl10353_attach
,
953 &dvico_fusionhdtv_xc3028
,
955 if (fe0
->dvb
.frontend
!= NULL
) {
956 struct dvb_frontend
*fe
;
957 struct xc2028_config cfg
= {
958 .i2c_adap
= &dev
->i2c_bus
[1].i2c_adap
,
961 static struct xc2028_ctrl ctl
= {
962 .fname
= XC2028_DEFAULT_FIRMWARE
,
964 .demod
= XC3028_FE_ZARLINK456
,
967 fe
= dvb_attach(xc2028_attach
, fe0
->dvb
.frontend
,
969 if (fe
!= NULL
&& fe
->ops
.tuner_ops
.set_config
!= NULL
)
970 fe
->ops
.tuner_ops
.set_config(fe
, &ctl
);
973 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000
:
974 i2c_bus
= &dev
->i2c_bus
[0];
976 fe0
->dvb
.frontend
= dvb_attach(zl10353_attach
,
977 &dvico_fusionhdtv_xc3028
,
979 if (fe0
->dvb
.frontend
!= NULL
) {
980 struct dvb_frontend
*fe
;
981 struct xc4000_config cfg
= {
984 .dvb_amplitude
= 134,
985 .set_smoothedcvbs
= 1,
989 fe
= dvb_attach(xc4000_attach
, fe0
->dvb
.frontend
,
990 &dev
->i2c_bus
[1].i2c_adap
, &cfg
);
992 printk(KERN_ERR
"%s/2: xc4000 attach failed\n",
994 goto frontend_detach
;
998 case CX23885_BOARD_TBS_6920
:
999 i2c_bus
= &dev
->i2c_bus
[1];
1001 fe0
->dvb
.frontend
= dvb_attach(cx24116_attach
,
1002 &tbs_cx24116_config
,
1003 &i2c_bus
->i2c_adap
);
1004 if (fe0
->dvb
.frontend
!= NULL
)
1005 fe0
->dvb
.frontend
->ops
.set_voltage
= f300_set_voltage
;
1008 case CX23885_BOARD_TEVII_S470
:
1009 i2c_bus
= &dev
->i2c_bus
[1];
1011 fe0
->dvb
.frontend
= dvb_attach(ds3000_attach
,
1012 &tevii_ds3000_config
,
1013 &i2c_bus
->i2c_adap
);
1014 if (fe0
->dvb
.frontend
!= NULL
)
1015 fe0
->dvb
.frontend
->ops
.set_voltage
= f300_set_voltage
;
1018 case CX23885_BOARD_DVBWORLD_2005
:
1019 i2c_bus
= &dev
->i2c_bus
[1];
1021 fe0
->dvb
.frontend
= dvb_attach(cx24116_attach
,
1022 &dvbworld_cx24116_config
,
1023 &i2c_bus
->i2c_adap
);
1025 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI
:
1026 i2c_bus
= &dev
->i2c_bus
[0];
1030 fe0
->dvb
.frontend
= dvb_attach(stv0900_attach
,
1031 &netup_stv0900_config
,
1032 &i2c_bus
->i2c_adap
, 0);
1033 if (fe0
->dvb
.frontend
!= NULL
) {
1034 if (dvb_attach(stv6110_attach
,
1036 &netup_stv6110_tunerconfig_a
,
1037 &i2c_bus
->i2c_adap
)) {
1038 if (!dvb_attach(lnbh24_attach
,
1041 LNBH24_PCL
| LNBH24_TTX
,
1044 "No LNBH24 found!\n");
1051 fe0
->dvb
.frontend
= dvb_attach(stv0900_attach
,
1052 &netup_stv0900_config
,
1053 &i2c_bus
->i2c_adap
, 1);
1054 if (fe0
->dvb
.frontend
!= NULL
) {
1055 if (dvb_attach(stv6110_attach
,
1057 &netup_stv6110_tunerconfig_b
,
1058 &i2c_bus
->i2c_adap
)) {
1059 if (!dvb_attach(lnbh24_attach
,
1062 LNBH24_PCL
| LNBH24_TTX
,
1065 "No LNBH24 found!\n");
1072 case CX23885_BOARD_MYGICA_X8506
:
1073 i2c_bus
= &dev
->i2c_bus
[0];
1074 i2c_bus2
= &dev
->i2c_bus
[1];
1075 fe0
->dvb
.frontend
= dvb_attach(lgs8gxx_attach
,
1076 &mygica_x8506_lgs8gl5_config
,
1077 &i2c_bus
->i2c_adap
);
1078 if (fe0
->dvb
.frontend
!= NULL
) {
1079 dvb_attach(xc5000_attach
,
1081 &i2c_bus2
->i2c_adap
,
1082 &mygica_x8506_xc5000_config
);
1085 case CX23885_BOARD_MAGICPRO_PROHDTVE2
:
1086 i2c_bus
= &dev
->i2c_bus
[0];
1087 i2c_bus2
= &dev
->i2c_bus
[1];
1088 fe0
->dvb
.frontend
= dvb_attach(lgs8gxx_attach
,
1089 &magicpro_prohdtve2_lgs8g75_config
,
1090 &i2c_bus
->i2c_adap
);
1091 if (fe0
->dvb
.frontend
!= NULL
) {
1092 dvb_attach(xc5000_attach
,
1094 &i2c_bus2
->i2c_adap
,
1095 &magicpro_prohdtve2_xc5000_config
);
1098 case CX23885_BOARD_HAUPPAUGE_HVR1850
:
1099 i2c_bus
= &dev
->i2c_bus
[0];
1100 fe0
->dvb
.frontend
= dvb_attach(s5h1411_attach
,
1101 &hcw_s5h1411_config
,
1102 &i2c_bus
->i2c_adap
);
1103 if (fe0
->dvb
.frontend
!= NULL
)
1104 dvb_attach(tda18271_attach
, fe0
->dvb
.frontend
,
1105 0x60, &dev
->i2c_bus
[0].i2c_adap
,
1106 &hauppauge_tda18271_config
);
1108 tda18271_attach(&dev
->ts1
.analog_fe
,
1109 0x60, &dev
->i2c_bus
[1].i2c_adap
,
1110 &hauppauge_tda18271_config
);
1113 case CX23885_BOARD_HAUPPAUGE_HVR1290
:
1114 i2c_bus
= &dev
->i2c_bus
[0];
1115 fe0
->dvb
.frontend
= dvb_attach(s5h1411_attach
,
1116 &hcw_s5h1411_config
,
1117 &i2c_bus
->i2c_adap
);
1118 if (fe0
->dvb
.frontend
!= NULL
)
1119 dvb_attach(tda18271_attach
, fe0
->dvb
.frontend
,
1120 0x60, &dev
->i2c_bus
[0].i2c_adap
,
1121 &hauppauge_tda18271_config
);
1123 case CX23885_BOARD_MYGICA_X8558PRO
:
1127 i2c_bus
= &dev
->i2c_bus
[0];
1128 fe0
->dvb
.frontend
= dvb_attach(atbm8830_attach
,
1129 &mygica_x8558pro_atbm8830_cfg1
,
1130 &i2c_bus
->i2c_adap
);
1131 if (fe0
->dvb
.frontend
!= NULL
) {
1132 dvb_attach(max2165_attach
,
1135 &mygic_x8558pro_max2165_cfg1
);
1140 i2c_bus
= &dev
->i2c_bus
[1];
1141 fe0
->dvb
.frontend
= dvb_attach(atbm8830_attach
,
1142 &mygica_x8558pro_atbm8830_cfg2
,
1143 &i2c_bus
->i2c_adap
);
1144 if (fe0
->dvb
.frontend
!= NULL
) {
1145 dvb_attach(max2165_attach
,
1148 &mygic_x8558pro_max2165_cfg2
);
1153 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF
:
1154 i2c_bus
= &dev
->i2c_bus
[0];
1155 mfe_shared
= 1;/* MFE */
1156 port
->frontends
.gate
= 0;/* not clear for me yet */
1158 /* MFE frontend 1 DVB-T */
1159 fe0
->dvb
.frontend
= dvb_attach(stv0367ter_attach
,
1160 &netup_stv0367_config
[port
->nr
- 1],
1161 &i2c_bus
->i2c_adap
);
1162 if (fe0
->dvb
.frontend
!= NULL
) {
1163 if (NULL
== dvb_attach(xc5000_attach
,
1166 &netup_xc5000_config
[port
->nr
- 1]))
1167 goto frontend_detach
;
1168 /* load xc5000 firmware */
1169 fe0
->dvb
.frontend
->ops
.tuner_ops
.init(fe0
->dvb
.frontend
);
1171 /* MFE frontend 2 */
1172 fe1
= videobuf_dvb_get_frontend(&port
->frontends
, 2);
1174 goto frontend_detach
;
1176 fe1
->dvb
.frontend
= dvb_attach(stv0367cab_attach
,
1177 &netup_stv0367_config
[port
->nr
- 1],
1178 &i2c_bus
->i2c_adap
);
1179 if (fe1
->dvb
.frontend
!= NULL
) {
1180 fe1
->dvb
.frontend
->id
= 1;
1181 if (NULL
== dvb_attach(xc5000_attach
,
1184 &netup_xc5000_config
[port
->nr
- 1]))
1185 goto frontend_detach
;
1188 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL
:
1189 i2c_bus
= &dev
->i2c_bus
[0];
1190 i2c_bus2
= &dev
->i2c_bus
[1];
1195 fe0
->dvb
.frontend
= dvb_attach(drxk_attach
,
1196 &terratec_drxk_config
[0],
1197 &i2c_bus
->i2c_adap
);
1198 if (fe0
->dvb
.frontend
!= NULL
) {
1199 if (!dvb_attach(mt2063_attach
,
1201 &terratec_mt2063_config
[0],
1202 &i2c_bus2
->i2c_adap
))
1203 goto frontend_detach
;
1208 fe0
->dvb
.frontend
= dvb_attach(drxk_attach
,
1209 &terratec_drxk_config
[1],
1210 &i2c_bus
->i2c_adap
);
1211 if (fe0
->dvb
.frontend
!= NULL
) {
1212 if (!dvb_attach(mt2063_attach
,
1214 &terratec_mt2063_config
[1],
1215 &i2c_bus2
->i2c_adap
))
1216 goto frontend_detach
;
1221 case CX23885_BOARD_TEVII_S471
:
1222 i2c_bus
= &dev
->i2c_bus
[1];
1224 fe0
->dvb
.frontend
= dvb_attach(ds3000_attach
,
1225 &tevii_ds3000_config
,
1226 &i2c_bus
->i2c_adap
);
1228 case CX23885_BOARD_PROF_8000
:
1229 i2c_bus
= &dev
->i2c_bus
[0];
1231 fe0
->dvb
.frontend
= dvb_attach(stv090x_attach
,
1232 &prof_8000_stv090x_config
,
1234 STV090x_DEMODULATOR_0
);
1235 if (fe0
->dvb
.frontend
!= NULL
) {
1236 if (!dvb_attach(stb6100_attach
,
1238 &prof_8000_stb6100_config
,
1239 &i2c_bus
->i2c_adap
))
1240 goto frontend_detach
;
1242 fe0
->dvb
.frontend
->ops
.set_voltage
= p8000_set_voltage
;
1246 printk(KERN_INFO
"%s: The frontend of your DVB/ATSC card "
1247 " isn't supported yet\n",
1252 if ((NULL
== fe0
->dvb
.frontend
) || (fe1
&& NULL
== fe1
->dvb
.frontend
)) {
1253 printk(KERN_ERR
"%s: frontend initialization failed\n",
1255 goto frontend_detach
;
1258 /* define general-purpose callback pointer */
1259 fe0
->dvb
.frontend
->callback
= cx23885_tuner_callback
;
1261 fe1
->dvb
.frontend
->callback
= cx23885_tuner_callback
;
1263 /* Ensure all frontends negotiate bus access */
1264 fe0
->dvb
.frontend
->ops
.ts_bus_ctrl
= cx23885_dvb_bus_ctrl
;
1266 fe1
->dvb
.frontend
->ops
.ts_bus_ctrl
= cx23885_dvb_bus_ctrl
;
1269 /* Put the analog decoder in standby to keep it quiet */
1270 call_all(dev
, core
, s_power
, 0);
1272 if (fe0
->dvb
.frontend
->ops
.analog_ops
.standby
)
1273 fe0
->dvb
.frontend
->ops
.analog_ops
.standby(fe0
->dvb
.frontend
);
1275 /* register everything */
1276 ret
= videobuf_dvb_register_bus(&port
->frontends
, THIS_MODULE
, port
,
1277 &dev
->pci
->dev
, adapter_nr
, mfe_shared
);
1279 goto frontend_detach
;
1282 switch (dev
->board
) {
1283 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI
: {
1284 static struct netup_card_info cinfo
;
1286 netup_get_card_info(&dev
->i2c_bus
[0].i2c_adap
, &cinfo
);
1287 memcpy(port
->frontends
.adapter
.proposed_mac
,
1288 cinfo
.port
[port
->nr
- 1].mac
, 6);
1289 printk(KERN_INFO
"NetUP Dual DVB-S2 CI card port%d MAC=%pM\n",
1290 port
->nr
, port
->frontends
.adapter
.proposed_mac
);
1292 netup_ci_init(port
);
1295 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF
: {
1296 struct altera_ci_config netup_ci_cfg
= {
1297 .dev
= dev
,/* magic number to identify*/
1298 .adapter
= &port
->frontends
.adapter
,/* for CI */
1299 .demux
= &fe0
->dvb
.demux
,/* for hw pid filter */
1300 .fpga_rw
= netup_altera_fpga_rw
,
1303 altera_ci_init(&netup_ci_cfg
, port
->nr
);
1306 case CX23885_BOARD_TEVII_S470
: {
1307 u8 eeprom
[256]; /* 24C02 i2c eeprom */
1312 /* Read entire EEPROM */
1313 dev
->i2c_bus
[0].i2c_client
.addr
= 0xa0 >> 1;
1314 tveeprom_read(&dev
->i2c_bus
[0].i2c_client
, eeprom
, sizeof(eeprom
));
1315 printk(KERN_INFO
"TeVii S470 MAC= %pM\n", eeprom
+ 0xa0);
1316 memcpy(port
->frontends
.adapter
.proposed_mac
, eeprom
+ 0xa0, 6);
1324 port
->gate_ctrl
= NULL
;
1325 videobuf_dvb_dealloc_frontends(&port
->frontends
);
1329 int cx23885_dvb_register(struct cx23885_tsport
*port
)
1332 struct videobuf_dvb_frontend
*fe0
;
1333 struct cx23885_dev
*dev
= port
->dev
;
1336 /* Here we need to allocate the correct number of frontends,
1337 * as reflected in the cards struct. The reality is that currently
1338 * no cx23885 boards support this - yet. But, if we don't modify this
1339 * code then the second frontend would never be allocated (later)
1340 * and fail with error before the attach in dvb_register().
1341 * Without these changes we risk an OOPS later. The changes here
1342 * are for safety, and should provide a good foundation for the
1343 * future addition of any multi-frontend cx23885 based boards.
1345 printk(KERN_INFO
"%s() allocating %d frontend(s)\n", __func__
,
1346 port
->num_frontends
);
1348 for (i
= 1; i
<= port
->num_frontends
; i
++) {
1349 if (videobuf_dvb_alloc_frontend(
1350 &port
->frontends
, i
) == NULL
) {
1351 printk(KERN_ERR
"%s() failed to alloc\n", __func__
);
1355 fe0
= videobuf_dvb_get_frontend(&port
->frontends
, i
);
1359 dprintk(1, "%s\n", __func__
);
1360 dprintk(1, " ->probed by Card=%d Name=%s, PCI %02x:%02x\n",
1369 /* We have to init the queue for each frontend on a port. */
1370 printk(KERN_INFO
"%s: cx23885 based dvb card\n", dev
->name
);
1371 videobuf_queue_sg_init(&fe0
->dvb
.dvbq
, &dvb_qops
,
1372 &dev
->pci
->dev
, &port
->slock
,
1373 V4L2_BUF_TYPE_VIDEO_CAPTURE
, V4L2_FIELD_TOP
,
1374 sizeof(struct cx23885_buffer
), port
, NULL
);
1376 err
= dvb_register(port
);
1378 printk(KERN_ERR
"%s() dvb_register failed err = %d\n",
1384 int cx23885_dvb_unregister(struct cx23885_tsport
*port
)
1386 struct videobuf_dvb_frontend
*fe0
;
1388 /* FIXME: in an error condition where the we have
1389 * an expected number of frontends (attach problem)
1390 * then this might not clean up correctly, if 1
1392 * This comment only applies to future boards IF they
1393 * implement MFE support.
1395 fe0
= videobuf_dvb_get_frontend(&port
->frontends
, 1);
1396 if (fe0
&& fe0
->dvb
.frontend
)
1397 videobuf_dvb_unregister_bus(&port
->frontends
);
1399 switch (port
->dev
->board
) {
1400 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI
:
1401 netup_ci_exit(port
);
1403 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF
:
1404 altera_ci_release(port
->dev
, port
->nr
);
1408 port
->gate_ctrl
= NULL
;