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[media] media: coda: enable user pointer support
[deliverable/linux.git] / drivers / media / platform / coda.c
1 /*
2 * Coda multi-standard codec IP
3 *
4 * Copyright (C) 2012 Vista Silicon S.L.
5 * Javier Martin, <javier.martin@vista-silicon.com>
6 * Xavier Duret
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14 #include <linux/clk.h>
15 #include <linux/delay.h>
16 #include <linux/firmware.h>
17 #include <linux/interrupt.h>
18 #include <linux/io.h>
19 #include <linux/irq.h>
20 #include <linux/module.h>
21 #include <linux/of_device.h>
22 #include <linux/platform_device.h>
23 #include <linux/slab.h>
24 #include <linux/videodev2.h>
25 #include <linux/of.h>
26
27 #include <mach/iram.h>
28 #include <media/v4l2-ctrls.h>
29 #include <media/v4l2-device.h>
30 #include <media/v4l2-ioctl.h>
31 #include <media/v4l2-mem2mem.h>
32 #include <media/videobuf2-core.h>
33 #include <media/videobuf2-dma-contig.h>
34
35 #include "coda.h"
36
37 #define CODA_NAME "coda"
38
39 #define CODA_MAX_INSTANCES 4
40
41 #define CODA_FMO_BUF_SIZE 32
42 #define CODADX6_WORK_BUF_SIZE (288 * 1024 + CODA_FMO_BUF_SIZE * 8 * 1024)
43 #define CODA7_WORK_BUF_SIZE (512 * 1024 + CODA_FMO_BUF_SIZE * 8 * 1024)
44 #define CODA_PARA_BUF_SIZE (10 * 1024)
45 #define CODA_ISRAM_SIZE (2048 * 2)
46 #define CODA7_IRAM_SIZE 0x14000 /* 81920 bytes */
47
48 #define CODA_MAX_FRAMEBUFFERS 2
49
50 #define MAX_W 720
51 #define MAX_H 576
52 #define CODA_MAX_FRAME_SIZE 0x90000
53 #define FMO_SLICE_SAVE_BUF_SIZE (32)
54 #define CODA_DEFAULT_GAMMA 4096
55
56 #define MIN_W 176
57 #define MIN_H 144
58 #define MAX_W 720
59 #define MAX_H 576
60
61 #define S_ALIGN 1 /* multiple of 2 */
62 #define W_ALIGN 1 /* multiple of 2 */
63 #define H_ALIGN 1 /* multiple of 2 */
64
65 #define fh_to_ctx(__fh) container_of(__fh, struct coda_ctx, fh)
66
67 static int coda_debug;
68 module_param(coda_debug, int, 0);
69 MODULE_PARM_DESC(coda_debug, "Debug level (0-1)");
70
71 enum {
72 V4L2_M2M_SRC = 0,
73 V4L2_M2M_DST = 1,
74 };
75
76 enum coda_fmt_type {
77 CODA_FMT_ENC,
78 CODA_FMT_RAW,
79 };
80
81 enum coda_inst_type {
82 CODA_INST_ENCODER,
83 CODA_INST_DECODER,
84 };
85
86 enum coda_product {
87 CODA_DX6 = 0xf001,
88 CODA_7541 = 0xf012,
89 };
90
91 struct coda_fmt {
92 char *name;
93 u32 fourcc;
94 enum coda_fmt_type type;
95 };
96
97 struct coda_devtype {
98 char *firmware;
99 enum coda_product product;
100 struct coda_fmt *formats;
101 unsigned int num_formats;
102 size_t workbuf_size;
103 };
104
105 /* Per-queue, driver-specific private data */
106 struct coda_q_data {
107 unsigned int width;
108 unsigned int height;
109 unsigned int sizeimage;
110 struct coda_fmt *fmt;
111 };
112
113 struct coda_aux_buf {
114 void *vaddr;
115 dma_addr_t paddr;
116 u32 size;
117 };
118
119 struct coda_dev {
120 struct v4l2_device v4l2_dev;
121 struct video_device vfd;
122 struct platform_device *plat_dev;
123 const struct coda_devtype *devtype;
124
125 void __iomem *regs_base;
126 struct clk *clk_per;
127 struct clk *clk_ahb;
128
129 struct coda_aux_buf codebuf;
130 struct coda_aux_buf workbuf;
131 long unsigned int iram_paddr;
132
133 spinlock_t irqlock;
134 struct mutex dev_mutex;
135 struct v4l2_m2m_dev *m2m_dev;
136 struct vb2_alloc_ctx *alloc_ctx;
137 struct list_head instances;
138 unsigned long instance_mask;
139 struct delayed_work timeout;
140 };
141
142 struct coda_params {
143 u8 h264_intra_qp;
144 u8 h264_inter_qp;
145 u8 mpeg4_intra_qp;
146 u8 mpeg4_inter_qp;
147 u8 gop_size;
148 int codec_mode;
149 enum v4l2_mpeg_video_multi_slice_mode slice_mode;
150 u32 framerate;
151 u16 bitrate;
152 u32 slice_max_mb;
153 };
154
155 struct coda_ctx {
156 struct coda_dev *dev;
157 struct list_head list;
158 int aborting;
159 int rawstreamon;
160 int compstreamon;
161 u32 isequence;
162 struct coda_q_data q_data[2];
163 enum coda_inst_type inst_type;
164 enum v4l2_colorspace colorspace;
165 struct coda_params params;
166 struct v4l2_m2m_ctx *m2m_ctx;
167 struct v4l2_ctrl_handler ctrls;
168 struct v4l2_fh fh;
169 int gopcounter;
170 char vpu_header[3][64];
171 int vpu_header_size[3];
172 struct coda_aux_buf parabuf;
173 struct coda_aux_buf internal_frames[CODA_MAX_FRAMEBUFFERS];
174 int num_internal_frames;
175 int idx;
176 };
177
178 static inline void coda_write(struct coda_dev *dev, u32 data, u32 reg)
179 {
180 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
181 "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
182 writel(data, dev->regs_base + reg);
183 }
184
185 static inline unsigned int coda_read(struct coda_dev *dev, u32 reg)
186 {
187 u32 data;
188 data = readl(dev->regs_base + reg);
189 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
190 "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
191 return data;
192 }
193
194 static inline unsigned long coda_isbusy(struct coda_dev *dev)
195 {
196 return coda_read(dev, CODA_REG_BIT_BUSY);
197 }
198
199 static inline int coda_is_initialized(struct coda_dev *dev)
200 {
201 return (coda_read(dev, CODA_REG_BIT_CUR_PC) != 0);
202 }
203
204 static int coda_wait_timeout(struct coda_dev *dev)
205 {
206 unsigned long timeout = jiffies + msecs_to_jiffies(1000);
207
208 while (coda_isbusy(dev)) {
209 if (time_after(jiffies, timeout))
210 return -ETIMEDOUT;
211 }
212 return 0;
213 }
214
215 static void coda_command_async(struct coda_ctx *ctx, int cmd)
216 {
217 struct coda_dev *dev = ctx->dev;
218 coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
219
220 coda_write(dev, ctx->idx, CODA_REG_BIT_RUN_INDEX);
221 coda_write(dev, ctx->params.codec_mode, CODA_REG_BIT_RUN_COD_STD);
222 coda_write(dev, cmd, CODA_REG_BIT_RUN_COMMAND);
223 }
224
225 static int coda_command_sync(struct coda_ctx *ctx, int cmd)
226 {
227 struct coda_dev *dev = ctx->dev;
228
229 coda_command_async(ctx, cmd);
230 return coda_wait_timeout(dev);
231 }
232
233 static struct coda_q_data *get_q_data(struct coda_ctx *ctx,
234 enum v4l2_buf_type type)
235 {
236 switch (type) {
237 case V4L2_BUF_TYPE_VIDEO_OUTPUT:
238 return &(ctx->q_data[V4L2_M2M_SRC]);
239 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
240 return &(ctx->q_data[V4L2_M2M_DST]);
241 default:
242 BUG();
243 }
244 return NULL;
245 }
246
247 /*
248 * Add one array of supported formats for each version of Coda:
249 * i.MX27 -> codadx6
250 * i.MX51 -> coda7
251 * i.MX6 -> coda960
252 */
253 static struct coda_fmt codadx6_formats[] = {
254 {
255 .name = "YUV 4:2:0 Planar",
256 .fourcc = V4L2_PIX_FMT_YUV420,
257 .type = CODA_FMT_RAW,
258 },
259 {
260 .name = "H264 Encoded Stream",
261 .fourcc = V4L2_PIX_FMT_H264,
262 .type = CODA_FMT_ENC,
263 },
264 {
265 .name = "MPEG4 Encoded Stream",
266 .fourcc = V4L2_PIX_FMT_MPEG4,
267 .type = CODA_FMT_ENC,
268 },
269 };
270
271 static struct coda_fmt coda7_formats[] = {
272 {
273 .name = "YUV 4:2:0 Planar",
274 .fourcc = V4L2_PIX_FMT_YUV420,
275 .type = CODA_FMT_RAW,
276 },
277 {
278 .name = "H264 Encoded Stream",
279 .fourcc = V4L2_PIX_FMT_H264,
280 .type = CODA_FMT_ENC,
281 },
282 {
283 .name = "MPEG4 Encoded Stream",
284 .fourcc = V4L2_PIX_FMT_MPEG4,
285 .type = CODA_FMT_ENC,
286 },
287 };
288
289 static struct coda_fmt *find_format(struct coda_dev *dev, struct v4l2_format *f)
290 {
291 struct coda_fmt *formats = dev->devtype->formats;
292 int num_formats = dev->devtype->num_formats;
293 unsigned int k;
294
295 for (k = 0; k < num_formats; k++) {
296 if (formats[k].fourcc == f->fmt.pix.pixelformat)
297 break;
298 }
299
300 if (k == num_formats)
301 return NULL;
302
303 return &formats[k];
304 }
305
306 /*
307 * V4L2 ioctl() operations.
308 */
309 static int vidioc_querycap(struct file *file, void *priv,
310 struct v4l2_capability *cap)
311 {
312 strlcpy(cap->driver, CODA_NAME, sizeof(cap->driver));
313 strlcpy(cap->card, CODA_NAME, sizeof(cap->card));
314 strlcpy(cap->bus_info, CODA_NAME, sizeof(cap->bus_info));
315 /*
316 * This is only a mem-to-mem video device. The capture and output
317 * device capability flags are left only for backward compatibility
318 * and are scheduled for removal.
319 */
320 cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VIDEO_OUTPUT |
321 V4L2_CAP_VIDEO_M2M | V4L2_CAP_STREAMING;
322 cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
323
324 return 0;
325 }
326
327 static int enum_fmt(void *priv, struct v4l2_fmtdesc *f,
328 enum coda_fmt_type type)
329 {
330 struct coda_ctx *ctx = fh_to_ctx(priv);
331 struct coda_dev *dev = ctx->dev;
332 struct coda_fmt *formats = dev->devtype->formats;
333 struct coda_fmt *fmt;
334 int num_formats = dev->devtype->num_formats;
335 int i, num = 0;
336
337 for (i = 0; i < num_formats; i++) {
338 if (formats[i].type == type) {
339 if (num == f->index)
340 break;
341 ++num;
342 }
343 }
344
345 if (i < num_formats) {
346 fmt = &formats[i];
347 strlcpy(f->description, fmt->name, sizeof(f->description));
348 f->pixelformat = fmt->fourcc;
349 return 0;
350 }
351
352 /* Format not found */
353 return -EINVAL;
354 }
355
356 static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,
357 struct v4l2_fmtdesc *f)
358 {
359 return enum_fmt(priv, f, CODA_FMT_ENC);
360 }
361
362 static int vidioc_enum_fmt_vid_out(struct file *file, void *priv,
363 struct v4l2_fmtdesc *f)
364 {
365 return enum_fmt(priv, f, CODA_FMT_RAW);
366 }
367
368 static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f)
369 {
370 struct vb2_queue *vq;
371 struct coda_q_data *q_data;
372 struct coda_ctx *ctx = fh_to_ctx(priv);
373
374 vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
375 if (!vq)
376 return -EINVAL;
377
378 q_data = get_q_data(ctx, f->type);
379
380 f->fmt.pix.field = V4L2_FIELD_NONE;
381 f->fmt.pix.pixelformat = q_data->fmt->fourcc;
382 f->fmt.pix.width = q_data->width;
383 f->fmt.pix.height = q_data->height;
384 if (f->fmt.pix.pixelformat == V4L2_PIX_FMT_YUV420)
385 f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 2);
386 else /* encoded formats h.264/mpeg4 */
387 f->fmt.pix.bytesperline = 0;
388
389 f->fmt.pix.sizeimage = q_data->sizeimage;
390 f->fmt.pix.colorspace = ctx->colorspace;
391
392 return 0;
393 }
394
395 static int vidioc_try_fmt(struct coda_dev *dev, struct v4l2_format *f)
396 {
397 enum v4l2_field field;
398
399 field = f->fmt.pix.field;
400 if (field == V4L2_FIELD_ANY)
401 field = V4L2_FIELD_NONE;
402 else if (V4L2_FIELD_NONE != field)
403 return -EINVAL;
404
405 /* V4L2 specification suggests the driver corrects the format struct
406 * if any of the dimensions is unsupported */
407 f->fmt.pix.field = field;
408
409 if (f->fmt.pix.pixelformat == V4L2_PIX_FMT_YUV420) {
410 v4l_bound_align_image(&f->fmt.pix.width, MIN_W, MAX_W,
411 W_ALIGN, &f->fmt.pix.height,
412 MIN_H, MAX_H, H_ALIGN, S_ALIGN);
413 f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 2);
414 f->fmt.pix.sizeimage = f->fmt.pix.height *
415 f->fmt.pix.bytesperline;
416 } else { /*encoded formats h.264/mpeg4 */
417 f->fmt.pix.bytesperline = 0;
418 f->fmt.pix.sizeimage = CODA_MAX_FRAME_SIZE;
419 }
420
421 return 0;
422 }
423
424 static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
425 struct v4l2_format *f)
426 {
427 int ret;
428 struct coda_fmt *fmt;
429 struct coda_ctx *ctx = fh_to_ctx(priv);
430
431 fmt = find_format(ctx->dev, f);
432 /*
433 * Since decoding support is not implemented yet do not allow
434 * CODA_FMT_RAW formats in the capture interface.
435 */
436 if (!fmt || !(fmt->type == CODA_FMT_ENC))
437 f->fmt.pix.pixelformat = V4L2_PIX_FMT_H264;
438
439 f->fmt.pix.colorspace = ctx->colorspace;
440
441 ret = vidioc_try_fmt(ctx->dev, f);
442 if (ret < 0)
443 return ret;
444
445 return 0;
446 }
447
448 static int vidioc_try_fmt_vid_out(struct file *file, void *priv,
449 struct v4l2_format *f)
450 {
451 struct coda_ctx *ctx = fh_to_ctx(priv);
452 struct coda_fmt *fmt;
453 int ret;
454
455 fmt = find_format(ctx->dev, f);
456 /*
457 * Since decoding support is not implemented yet do not allow
458 * CODA_FMT formats in the capture interface.
459 */
460 if (!fmt || !(fmt->type == CODA_FMT_RAW))
461 f->fmt.pix.pixelformat = V4L2_PIX_FMT_YUV420;
462
463 if (!f->fmt.pix.colorspace)
464 f->fmt.pix.colorspace = V4L2_COLORSPACE_REC709;
465
466 ret = vidioc_try_fmt(ctx->dev, f);
467 if (ret < 0)
468 return ret;
469
470 return 0;
471 }
472
473 static int vidioc_s_fmt(struct coda_ctx *ctx, struct v4l2_format *f)
474 {
475 struct coda_q_data *q_data;
476 struct vb2_queue *vq;
477 int ret;
478
479 vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
480 if (!vq)
481 return -EINVAL;
482
483 q_data = get_q_data(ctx, f->type);
484 if (!q_data)
485 return -EINVAL;
486
487 if (vb2_is_busy(vq)) {
488 v4l2_err(&ctx->dev->v4l2_dev, "%s queue busy\n", __func__);
489 return -EBUSY;
490 }
491
492 ret = vidioc_try_fmt(ctx->dev, f);
493 if (ret)
494 return ret;
495
496 q_data->fmt = find_format(ctx->dev, f);
497 q_data->width = f->fmt.pix.width;
498 q_data->height = f->fmt.pix.height;
499 if (q_data->fmt->fourcc == V4L2_PIX_FMT_YUV420) {
500 q_data->sizeimage = q_data->width * q_data->height * 3 / 2;
501 } else { /* encoded format h.264/mpeg-4 */
502 q_data->sizeimage = CODA_MAX_FRAME_SIZE;
503 }
504
505 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
506 "Setting format for type %d, wxh: %dx%d, fmt: %d\n",
507 f->type, q_data->width, q_data->height, q_data->fmt->fourcc);
508
509 return 0;
510 }
511
512 static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
513 struct v4l2_format *f)
514 {
515 int ret;
516
517 ret = vidioc_try_fmt_vid_cap(file, priv, f);
518 if (ret)
519 return ret;
520
521 return vidioc_s_fmt(fh_to_ctx(priv), f);
522 }
523
524 static int vidioc_s_fmt_vid_out(struct file *file, void *priv,
525 struct v4l2_format *f)
526 {
527 struct coda_ctx *ctx = fh_to_ctx(priv);
528 int ret;
529
530 ret = vidioc_try_fmt_vid_out(file, priv, f);
531 if (ret)
532 return ret;
533
534 ret = vidioc_s_fmt(ctx, f);
535 if (ret)
536 ctx->colorspace = f->fmt.pix.colorspace;
537
538 return ret;
539 }
540
541 static int vidioc_reqbufs(struct file *file, void *priv,
542 struct v4l2_requestbuffers *reqbufs)
543 {
544 struct coda_ctx *ctx = fh_to_ctx(priv);
545
546 return v4l2_m2m_reqbufs(file, ctx->m2m_ctx, reqbufs);
547 }
548
549 static int vidioc_querybuf(struct file *file, void *priv,
550 struct v4l2_buffer *buf)
551 {
552 struct coda_ctx *ctx = fh_to_ctx(priv);
553
554 return v4l2_m2m_querybuf(file, ctx->m2m_ctx, buf);
555 }
556
557 static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
558 {
559 struct coda_ctx *ctx = fh_to_ctx(priv);
560
561 return v4l2_m2m_qbuf(file, ctx->m2m_ctx, buf);
562 }
563
564 static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
565 {
566 struct coda_ctx *ctx = fh_to_ctx(priv);
567
568 return v4l2_m2m_dqbuf(file, ctx->m2m_ctx, buf);
569 }
570
571 static int vidioc_streamon(struct file *file, void *priv,
572 enum v4l2_buf_type type)
573 {
574 struct coda_ctx *ctx = fh_to_ctx(priv);
575
576 return v4l2_m2m_streamon(file, ctx->m2m_ctx, type);
577 }
578
579 static int vidioc_streamoff(struct file *file, void *priv,
580 enum v4l2_buf_type type)
581 {
582 struct coda_ctx *ctx = fh_to_ctx(priv);
583
584 return v4l2_m2m_streamoff(file, ctx->m2m_ctx, type);
585 }
586
587 static const struct v4l2_ioctl_ops coda_ioctl_ops = {
588 .vidioc_querycap = vidioc_querycap,
589
590 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
591 .vidioc_g_fmt_vid_cap = vidioc_g_fmt,
592 .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
593 .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
594
595 .vidioc_enum_fmt_vid_out = vidioc_enum_fmt_vid_out,
596 .vidioc_g_fmt_vid_out = vidioc_g_fmt,
597 .vidioc_try_fmt_vid_out = vidioc_try_fmt_vid_out,
598 .vidioc_s_fmt_vid_out = vidioc_s_fmt_vid_out,
599
600 .vidioc_reqbufs = vidioc_reqbufs,
601 .vidioc_querybuf = vidioc_querybuf,
602
603 .vidioc_qbuf = vidioc_qbuf,
604 .vidioc_dqbuf = vidioc_dqbuf,
605
606 .vidioc_streamon = vidioc_streamon,
607 .vidioc_streamoff = vidioc_streamoff,
608 };
609
610 /*
611 * Mem-to-mem operations.
612 */
613 static void coda_device_run(void *m2m_priv)
614 {
615 struct coda_ctx *ctx = m2m_priv;
616 struct coda_q_data *q_data_src, *q_data_dst;
617 struct vb2_buffer *src_buf, *dst_buf;
618 struct coda_dev *dev = ctx->dev;
619 int force_ipicture;
620 int quant_param = 0;
621 u32 picture_y, picture_cb, picture_cr;
622 u32 pic_stream_buffer_addr, pic_stream_buffer_size;
623 u32 dst_fourcc;
624
625 src_buf = v4l2_m2m_next_src_buf(ctx->m2m_ctx);
626 dst_buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
627 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
628 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
629 dst_fourcc = q_data_dst->fmt->fourcc;
630
631 src_buf->v4l2_buf.sequence = ctx->isequence;
632 dst_buf->v4l2_buf.sequence = ctx->isequence;
633 ctx->isequence++;
634
635 /*
636 * Workaround coda firmware BUG that only marks the first
637 * frame as IDR. This is a problem for some decoders that can't
638 * recover when a frame is lost.
639 */
640 if (src_buf->v4l2_buf.sequence % ctx->params.gop_size) {
641 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
642 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
643 } else {
644 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
645 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
646 }
647
648 /*
649 * Copy headers at the beginning of the first frame for H.264 only.
650 * In MPEG4 they are already copied by the coda.
651 */
652 if (src_buf->v4l2_buf.sequence == 0) {
653 pic_stream_buffer_addr =
654 vb2_dma_contig_plane_dma_addr(dst_buf, 0) +
655 ctx->vpu_header_size[0] +
656 ctx->vpu_header_size[1] +
657 ctx->vpu_header_size[2];
658 pic_stream_buffer_size = CODA_MAX_FRAME_SIZE -
659 ctx->vpu_header_size[0] -
660 ctx->vpu_header_size[1] -
661 ctx->vpu_header_size[2];
662 memcpy(vb2_plane_vaddr(dst_buf, 0),
663 &ctx->vpu_header[0][0], ctx->vpu_header_size[0]);
664 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0],
665 &ctx->vpu_header[1][0], ctx->vpu_header_size[1]);
666 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0] +
667 ctx->vpu_header_size[1], &ctx->vpu_header[2][0],
668 ctx->vpu_header_size[2]);
669 } else {
670 pic_stream_buffer_addr =
671 vb2_dma_contig_plane_dma_addr(dst_buf, 0);
672 pic_stream_buffer_size = CODA_MAX_FRAME_SIZE;
673 }
674
675 if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) {
676 force_ipicture = 1;
677 switch (dst_fourcc) {
678 case V4L2_PIX_FMT_H264:
679 quant_param = ctx->params.h264_intra_qp;
680 break;
681 case V4L2_PIX_FMT_MPEG4:
682 quant_param = ctx->params.mpeg4_intra_qp;
683 break;
684 default:
685 v4l2_warn(&ctx->dev->v4l2_dev,
686 "cannot set intra qp, fmt not supported\n");
687 break;
688 }
689 } else {
690 force_ipicture = 0;
691 switch (dst_fourcc) {
692 case V4L2_PIX_FMT_H264:
693 quant_param = ctx->params.h264_inter_qp;
694 break;
695 case V4L2_PIX_FMT_MPEG4:
696 quant_param = ctx->params.mpeg4_inter_qp;
697 break;
698 default:
699 v4l2_warn(&ctx->dev->v4l2_dev,
700 "cannot set inter qp, fmt not supported\n");
701 break;
702 }
703 }
704
705 /* submit */
706 coda_write(dev, 0, CODA_CMD_ENC_PIC_ROT_MODE);
707 coda_write(dev, quant_param, CODA_CMD_ENC_PIC_QS);
708
709
710 picture_y = vb2_dma_contig_plane_dma_addr(src_buf, 0);
711 picture_cb = picture_y + q_data_src->width * q_data_src->height;
712 picture_cr = picture_cb + q_data_src->width / 2 *
713 q_data_src->height / 2;
714
715 coda_write(dev, picture_y, CODA_CMD_ENC_PIC_SRC_ADDR_Y);
716 coda_write(dev, picture_cb, CODA_CMD_ENC_PIC_SRC_ADDR_CB);
717 coda_write(dev, picture_cr, CODA_CMD_ENC_PIC_SRC_ADDR_CR);
718 coda_write(dev, force_ipicture << 1 & 0x2,
719 CODA_CMD_ENC_PIC_OPTION);
720
721 coda_write(dev, pic_stream_buffer_addr, CODA_CMD_ENC_PIC_BB_START);
722 coda_write(dev, pic_stream_buffer_size / 1024,
723 CODA_CMD_ENC_PIC_BB_SIZE);
724
725 if (dev->devtype->product == CODA_7541) {
726 coda_write(dev, CODA7_USE_BIT_ENABLE | CODA7_USE_HOST_BIT_ENABLE |
727 CODA7_USE_ME_ENABLE | CODA7_USE_HOST_ME_ENABLE,
728 CODA7_REG_BIT_AXI_SRAM_USE);
729 }
730
731 /* 1 second timeout in case CODA locks up */
732 schedule_delayed_work(&dev->timeout, HZ);
733
734 coda_command_async(ctx, CODA_COMMAND_PIC_RUN);
735 }
736
737 static int coda_job_ready(void *m2m_priv)
738 {
739 struct coda_ctx *ctx = m2m_priv;
740
741 /*
742 * For both 'P' and 'key' frame cases 1 picture
743 * and 1 frame are needed.
744 */
745 if (!v4l2_m2m_num_src_bufs_ready(ctx->m2m_ctx) ||
746 !v4l2_m2m_num_dst_bufs_ready(ctx->m2m_ctx)) {
747 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
748 "not ready: not enough video buffers.\n");
749 return 0;
750 }
751
752 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
753 "job ready\n");
754 return 1;
755 }
756
757 static void coda_job_abort(void *priv)
758 {
759 struct coda_ctx *ctx = priv;
760 struct coda_dev *dev = ctx->dev;
761
762 ctx->aborting = 1;
763
764 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
765 "Aborting task\n");
766
767 v4l2_m2m_job_finish(dev->m2m_dev, ctx->m2m_ctx);
768 }
769
770 static void coda_lock(void *m2m_priv)
771 {
772 struct coda_ctx *ctx = m2m_priv;
773 struct coda_dev *pcdev = ctx->dev;
774 mutex_lock(&pcdev->dev_mutex);
775 }
776
777 static void coda_unlock(void *m2m_priv)
778 {
779 struct coda_ctx *ctx = m2m_priv;
780 struct coda_dev *pcdev = ctx->dev;
781 mutex_unlock(&pcdev->dev_mutex);
782 }
783
784 static struct v4l2_m2m_ops coda_m2m_ops = {
785 .device_run = coda_device_run,
786 .job_ready = coda_job_ready,
787 .job_abort = coda_job_abort,
788 .lock = coda_lock,
789 .unlock = coda_unlock,
790 };
791
792 static void set_default_params(struct coda_ctx *ctx)
793 {
794 struct coda_dev *dev = ctx->dev;
795
796 ctx->params.codec_mode = CODA_MODE_INVALID;
797 ctx->colorspace = V4L2_COLORSPACE_REC709;
798 ctx->params.framerate = 30;
799 ctx->aborting = 0;
800
801 /* Default formats for output and input queues */
802 ctx->q_data[V4L2_M2M_SRC].fmt = &dev->devtype->formats[0];
803 ctx->q_data[V4L2_M2M_DST].fmt = &dev->devtype->formats[1];
804 ctx->q_data[V4L2_M2M_SRC].width = MAX_W;
805 ctx->q_data[V4L2_M2M_SRC].height = MAX_H;
806 ctx->q_data[V4L2_M2M_SRC].sizeimage = (MAX_W * MAX_H * 3) / 2;
807 ctx->q_data[V4L2_M2M_DST].width = MAX_W;
808 ctx->q_data[V4L2_M2M_DST].height = MAX_H;
809 ctx->q_data[V4L2_M2M_DST].sizeimage = CODA_MAX_FRAME_SIZE;
810 }
811
812 /*
813 * Queue operations
814 */
815 static int coda_queue_setup(struct vb2_queue *vq,
816 const struct v4l2_format *fmt,
817 unsigned int *nbuffers, unsigned int *nplanes,
818 unsigned int sizes[], void *alloc_ctxs[])
819 {
820 struct coda_ctx *ctx = vb2_get_drv_priv(vq);
821 unsigned int size;
822
823 if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
824 if (fmt)
825 size = fmt->fmt.pix.width *
826 fmt->fmt.pix.height * 3 / 2;
827 else
828 size = MAX_W *
829 MAX_H * 3 / 2;
830 } else {
831 size = CODA_MAX_FRAME_SIZE;
832 }
833
834 *nplanes = 1;
835 sizes[0] = size;
836
837 alloc_ctxs[0] = ctx->dev->alloc_ctx;
838
839 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
840 "get %d buffer(s) of size %d each.\n", *nbuffers, size);
841
842 return 0;
843 }
844
845 static int coda_buf_prepare(struct vb2_buffer *vb)
846 {
847 struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
848 struct coda_q_data *q_data;
849
850 q_data = get_q_data(ctx, vb->vb2_queue->type);
851
852 if (vb2_plane_size(vb, 0) < q_data->sizeimage) {
853 v4l2_warn(&ctx->dev->v4l2_dev,
854 "%s data will not fit into plane (%lu < %lu)\n",
855 __func__, vb2_plane_size(vb, 0),
856 (long)q_data->sizeimage);
857 return -EINVAL;
858 }
859
860 vb2_set_plane_payload(vb, 0, q_data->sizeimage);
861
862 return 0;
863 }
864
865 static void coda_buf_queue(struct vb2_buffer *vb)
866 {
867 struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
868 v4l2_m2m_buf_queue(ctx->m2m_ctx, vb);
869 }
870
871 static void coda_wait_prepare(struct vb2_queue *q)
872 {
873 struct coda_ctx *ctx = vb2_get_drv_priv(q);
874 coda_unlock(ctx);
875 }
876
877 static void coda_wait_finish(struct vb2_queue *q)
878 {
879 struct coda_ctx *ctx = vb2_get_drv_priv(q);
880 coda_lock(ctx);
881 }
882
883 static void coda_free_framebuffers(struct coda_ctx *ctx)
884 {
885 int i;
886
887 for (i = 0; i < CODA_MAX_FRAMEBUFFERS; i++) {
888 if (ctx->internal_frames[i].vaddr) {
889 dma_free_coherent(&ctx->dev->plat_dev->dev,
890 ctx->internal_frames[i].size,
891 ctx->internal_frames[i].vaddr,
892 ctx->internal_frames[i].paddr);
893 ctx->internal_frames[i].vaddr = NULL;
894 }
895 }
896 }
897
898 static int coda_alloc_framebuffers(struct coda_ctx *ctx, struct coda_q_data *q_data, u32 fourcc)
899 {
900 struct coda_dev *dev = ctx->dev;
901
902 int height = q_data->height;
903 int width = q_data->width;
904 u32 *p;
905 int i;
906
907 /* Allocate frame buffers */
908 ctx->num_internal_frames = CODA_MAX_FRAMEBUFFERS;
909 for (i = 0; i < ctx->num_internal_frames; i++) {
910 ctx->internal_frames[i].size = q_data->sizeimage;
911 if (fourcc == V4L2_PIX_FMT_H264 && dev->devtype->product != CODA_DX6)
912 ctx->internal_frames[i].size += width / 2 * height / 2;
913 ctx->internal_frames[i].vaddr = dma_alloc_coherent(
914 &dev->plat_dev->dev, ctx->internal_frames[i].size,
915 &ctx->internal_frames[i].paddr, GFP_KERNEL);
916 if (!ctx->internal_frames[i].vaddr) {
917 coda_free_framebuffers(ctx);
918 return -ENOMEM;
919 }
920 }
921
922 /* Register frame buffers in the parameter buffer */
923 p = ctx->parabuf.vaddr;
924
925 if (dev->devtype->product == CODA_DX6) {
926 for (i = 0; i < ctx->num_internal_frames; i++) {
927 p[i * 3] = ctx->internal_frames[i].paddr; /* Y */
928 p[i * 3 + 1] = p[i * 3] + width * height; /* Cb */
929 p[i * 3 + 2] = p[i * 3 + 1] + width / 2 * height / 2; /* Cr */
930 }
931 } else {
932 for (i = 0; i < ctx->num_internal_frames; i += 2) {
933 p[i * 3 + 1] = ctx->internal_frames[i].paddr; /* Y */
934 p[i * 3] = p[i * 3 + 1] + width * height; /* Cb */
935 p[i * 3 + 3] = p[i * 3] + (width / 2) * (height / 2); /* Cr */
936
937 if (fourcc == V4L2_PIX_FMT_H264)
938 p[96 + i + 1] = p[i * 3 + 3] + (width / 2) * (height / 2);
939
940 if (i + 1 < ctx->num_internal_frames) {
941 p[i * 3 + 2] = ctx->internal_frames[i+1].paddr; /* Y */
942 p[i * 3 + 5] = p[i * 3 + 2] + width * height ; /* Cb */
943 p[i * 3 + 4] = p[i * 3 + 5] + (width / 2) * (height / 2); /* Cr */
944
945 if (fourcc == V4L2_PIX_FMT_H264)
946 p[96 + i] = p[i * 3 + 4] + (width / 2) * (height / 2);
947 }
948 }
949 }
950
951 return 0;
952 }
953
954 static int coda_start_streaming(struct vb2_queue *q, unsigned int count)
955 {
956 struct coda_ctx *ctx = vb2_get_drv_priv(q);
957 struct v4l2_device *v4l2_dev = &ctx->dev->v4l2_dev;
958 u32 bitstream_buf, bitstream_size;
959 struct coda_dev *dev = ctx->dev;
960 struct coda_q_data *q_data_src, *q_data_dst;
961 struct vb2_buffer *buf;
962 u32 dst_fourcc;
963 u32 value;
964 int ret;
965
966 if (count < 1)
967 return -EINVAL;
968
969 if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT)
970 ctx->rawstreamon = 1;
971 else
972 ctx->compstreamon = 1;
973
974 /* Don't start the coda unless both queues are on */
975 if (!(ctx->rawstreamon & ctx->compstreamon))
976 return 0;
977
978 ctx->gopcounter = ctx->params.gop_size - 1;
979
980 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
981 buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
982 bitstream_buf = vb2_dma_contig_plane_dma_addr(buf, 0);
983 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
984 bitstream_size = q_data_dst->sizeimage;
985 dst_fourcc = q_data_dst->fmt->fourcc;
986
987 /* Find out whether coda must encode or decode */
988 if (q_data_src->fmt->type == CODA_FMT_RAW &&
989 q_data_dst->fmt->type == CODA_FMT_ENC) {
990 ctx->inst_type = CODA_INST_ENCODER;
991 } else if (q_data_src->fmt->type == CODA_FMT_ENC &&
992 q_data_dst->fmt->type == CODA_FMT_RAW) {
993 ctx->inst_type = CODA_INST_DECODER;
994 v4l2_err(v4l2_dev, "decoding not supported.\n");
995 return -EINVAL;
996 } else {
997 v4l2_err(v4l2_dev, "couldn't tell instance type.\n");
998 return -EINVAL;
999 }
1000
1001 if (!coda_is_initialized(dev)) {
1002 v4l2_err(v4l2_dev, "coda is not initialized.\n");
1003 return -EFAULT;
1004 }
1005 coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
1006 coda_write(dev, bitstream_buf, CODA_REG_BIT_RD_PTR(ctx->idx));
1007 coda_write(dev, bitstream_buf, CODA_REG_BIT_WR_PTR(ctx->idx));
1008 switch (dev->devtype->product) {
1009 case CODA_DX6:
1010 coda_write(dev, CODADX6_STREAM_BUF_DYNALLOC_EN |
1011 CODADX6_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
1012 break;
1013 default:
1014 coda_write(dev, CODA7_STREAM_BUF_DYNALLOC_EN |
1015 CODA7_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
1016 }
1017
1018 if (dev->devtype->product == CODA_DX6) {
1019 /* Configure the coda */
1020 coda_write(dev, dev->iram_paddr, CODADX6_REG_BIT_SEARCH_RAM_BASE_ADDR);
1021 }
1022
1023 /* Could set rotation here if needed */
1024 switch (dev->devtype->product) {
1025 case CODA_DX6:
1026 value = (q_data_src->width & CODADX6_PICWIDTH_MASK) << CODADX6_PICWIDTH_OFFSET;
1027 break;
1028 default:
1029 value = (q_data_src->width & CODA7_PICWIDTH_MASK) << CODA7_PICWIDTH_OFFSET;
1030 }
1031 value |= (q_data_src->height & CODA_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
1032 coda_write(dev, value, CODA_CMD_ENC_SEQ_SRC_SIZE);
1033 coda_write(dev, ctx->params.framerate,
1034 CODA_CMD_ENC_SEQ_SRC_F_RATE);
1035
1036 switch (dst_fourcc) {
1037 case V4L2_PIX_FMT_MPEG4:
1038 if (dev->devtype->product == CODA_DX6)
1039 ctx->params.codec_mode = CODADX6_MODE_ENCODE_MP4;
1040 else
1041 ctx->params.codec_mode = CODA7_MODE_ENCODE_MP4;
1042
1043 coda_write(dev, CODA_STD_MPEG4, CODA_CMD_ENC_SEQ_COD_STD);
1044 coda_write(dev, 0, CODA_CMD_ENC_SEQ_MP4_PARA);
1045 break;
1046 case V4L2_PIX_FMT_H264:
1047 if (dev->devtype->product == CODA_DX6)
1048 ctx->params.codec_mode = CODADX6_MODE_ENCODE_H264;
1049 else
1050 ctx->params.codec_mode = CODA7_MODE_ENCODE_H264;
1051
1052 coda_write(dev, CODA_STD_H264, CODA_CMD_ENC_SEQ_COD_STD);
1053 coda_write(dev, 0, CODA_CMD_ENC_SEQ_264_PARA);
1054 break;
1055 default:
1056 v4l2_err(v4l2_dev,
1057 "dst format (0x%08x) invalid.\n", dst_fourcc);
1058 return -EINVAL;
1059 }
1060
1061 value = (ctx->params.slice_max_mb & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET;
1062 value |= (1 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET;
1063 if (ctx->params.slice_mode == V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB)
1064 value |= 1 & CODA_SLICING_MODE_MASK;
1065 coda_write(dev, value, CODA_CMD_ENC_SEQ_SLICE_MODE);
1066 value = ctx->params.gop_size & CODA_GOP_SIZE_MASK;
1067 coda_write(dev, value, CODA_CMD_ENC_SEQ_GOP_SIZE);
1068
1069 if (ctx->params.bitrate) {
1070 /* Rate control enabled */
1071 value = (ctx->params.bitrate & CODA_RATECONTROL_BITRATE_MASK) << CODA_RATECONTROL_BITRATE_OFFSET;
1072 value |= 1 & CODA_RATECONTROL_ENABLE_MASK;
1073 } else {
1074 value = 0;
1075 }
1076 coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_PARA);
1077
1078 coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_BUF_SIZE);
1079 coda_write(dev, 0, CODA_CMD_ENC_SEQ_INTRA_REFRESH);
1080
1081 coda_write(dev, bitstream_buf, CODA_CMD_ENC_SEQ_BB_START);
1082 coda_write(dev, bitstream_size / 1024, CODA_CMD_ENC_SEQ_BB_SIZE);
1083
1084 /* set default gamma */
1085 value = (CODA_DEFAULT_GAMMA & CODA_GAMMA_MASK) << CODA_GAMMA_OFFSET;
1086 coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_GAMMA);
1087
1088 value = (CODA_DEFAULT_GAMMA > 0) << CODA_OPTION_GAMMA_OFFSET;
1089 value |= (0 & CODA_OPTION_SLICEREPORT_MASK) << CODA_OPTION_SLICEREPORT_OFFSET;
1090 coda_write(dev, value, CODA_CMD_ENC_SEQ_OPTION);
1091
1092 if (dst_fourcc == V4L2_PIX_FMT_H264) {
1093 value = (FMO_SLICE_SAVE_BUF_SIZE << 7);
1094 value |= (0 & CODA_FMOPARAM_TYPE_MASK) << CODA_FMOPARAM_TYPE_OFFSET;
1095 value |= 0 & CODA_FMOPARAM_SLICENUM_MASK;
1096 if (dev->devtype->product == CODA_DX6) {
1097 coda_write(dev, value, CODADX6_CMD_ENC_SEQ_FMO);
1098 } else {
1099 coda_write(dev, dev->iram_paddr, CODA7_CMD_ENC_SEQ_SEARCH_BASE);
1100 coda_write(dev, 48 * 1024, CODA7_CMD_ENC_SEQ_SEARCH_SIZE);
1101 }
1102 }
1103
1104 if (coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT)) {
1105 v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
1106 return -ETIMEDOUT;
1107 }
1108
1109 if (coda_read(dev, CODA_RET_ENC_SEQ_SUCCESS) == 0)
1110 return -EFAULT;
1111
1112 ret = coda_alloc_framebuffers(ctx, q_data_src, dst_fourcc);
1113 if (ret < 0)
1114 return ret;
1115
1116 coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM);
1117 coda_write(dev, round_up(q_data_src->width, 8), CODA_CMD_SET_FRAME_BUF_STRIDE);
1118 if (dev->devtype->product != CODA_DX6) {
1119 coda_write(dev, round_up(q_data_src->width, 8), CODA7_CMD_SET_FRAME_SOURCE_BUF_STRIDE);
1120 coda_write(dev, dev->iram_paddr + 48 * 1024, CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
1121 coda_write(dev, dev->iram_paddr + 53 * 1024, CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
1122 coda_write(dev, dev->iram_paddr + 58 * 1024, CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
1123 coda_write(dev, dev->iram_paddr + 68 * 1024, CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
1124 coda_write(dev, 0x0, CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
1125 }
1126 if (coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF)) {
1127 v4l2_err(v4l2_dev, "CODA_COMMAND_SET_FRAME_BUF timeout\n");
1128 return -ETIMEDOUT;
1129 }
1130
1131 /* Save stream headers */
1132 buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
1133 switch (dst_fourcc) {
1134 case V4L2_PIX_FMT_H264:
1135 /*
1136 * Get SPS in the first frame and copy it to an
1137 * intermediate buffer.
1138 */
1139 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1140 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1141 coda_write(dev, CODA_HEADER_H264_SPS, CODA_CMD_ENC_HEADER_CODE);
1142 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1143 v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
1144 return -ETIMEDOUT;
1145 }
1146 ctx->vpu_header_size[0] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1147 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1148 memcpy(&ctx->vpu_header[0][0], vb2_plane_vaddr(buf, 0),
1149 ctx->vpu_header_size[0]);
1150
1151 /*
1152 * Get PPS in the first frame and copy it to an
1153 * intermediate buffer.
1154 */
1155 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1156 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1157 coda_write(dev, CODA_HEADER_H264_PPS, CODA_CMD_ENC_HEADER_CODE);
1158 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1159 v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
1160 return -ETIMEDOUT;
1161 }
1162 ctx->vpu_header_size[1] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1163 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1164 memcpy(&ctx->vpu_header[1][0], vb2_plane_vaddr(buf, 0),
1165 ctx->vpu_header_size[1]);
1166 ctx->vpu_header_size[2] = 0;
1167 break;
1168 case V4L2_PIX_FMT_MPEG4:
1169 /*
1170 * Get VOS in the first frame and copy it to an
1171 * intermediate buffer
1172 */
1173 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1174 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1175 coda_write(dev, CODA_HEADER_MP4V_VOS, CODA_CMD_ENC_HEADER_CODE);
1176 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1177 v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
1178 return -ETIMEDOUT;
1179 }
1180 ctx->vpu_header_size[0] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1181 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1182 memcpy(&ctx->vpu_header[0][0], vb2_plane_vaddr(buf, 0),
1183 ctx->vpu_header_size[0]);
1184
1185 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1186 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1187 coda_write(dev, CODA_HEADER_MP4V_VIS, CODA_CMD_ENC_HEADER_CODE);
1188 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1189 v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER failed\n");
1190 return -ETIMEDOUT;
1191 }
1192 ctx->vpu_header_size[1] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1193 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1194 memcpy(&ctx->vpu_header[1][0], vb2_plane_vaddr(buf, 0),
1195 ctx->vpu_header_size[1]);
1196
1197 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1198 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1199 coda_write(dev, CODA_HEADER_MP4V_VOL, CODA_CMD_ENC_HEADER_CODE);
1200 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1201 v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER failed\n");
1202 return -ETIMEDOUT;
1203 }
1204 ctx->vpu_header_size[2] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1205 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1206 memcpy(&ctx->vpu_header[2][0], vb2_plane_vaddr(buf, 0),
1207 ctx->vpu_header_size[2]);
1208 break;
1209 default:
1210 /* No more formats need to save headers at the moment */
1211 break;
1212 }
1213
1214 return 0;
1215 }
1216
1217 static int coda_stop_streaming(struct vb2_queue *q)
1218 {
1219 struct coda_ctx *ctx = vb2_get_drv_priv(q);
1220 struct coda_dev *dev = ctx->dev;
1221
1222 if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
1223 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1224 "%s: output\n", __func__);
1225 ctx->rawstreamon = 0;
1226 } else {
1227 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1228 "%s: capture\n", __func__);
1229 ctx->compstreamon = 0;
1230 }
1231
1232 if (!ctx->rawstreamon && !ctx->compstreamon) {
1233 cancel_delayed_work(&dev->timeout);
1234
1235 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1236 "%s: sent command 'SEQ_END' to coda\n", __func__);
1237 if (coda_command_sync(ctx, CODA_COMMAND_SEQ_END)) {
1238 v4l2_err(&ctx->dev->v4l2_dev,
1239 "CODA_COMMAND_SEQ_END failed\n");
1240 return -ETIMEDOUT;
1241 }
1242
1243 coda_free_framebuffers(ctx);
1244 }
1245
1246 return 0;
1247 }
1248
1249 static struct vb2_ops coda_qops = {
1250 .queue_setup = coda_queue_setup,
1251 .buf_prepare = coda_buf_prepare,
1252 .buf_queue = coda_buf_queue,
1253 .wait_prepare = coda_wait_prepare,
1254 .wait_finish = coda_wait_finish,
1255 .start_streaming = coda_start_streaming,
1256 .stop_streaming = coda_stop_streaming,
1257 };
1258
1259 static int coda_s_ctrl(struct v4l2_ctrl *ctrl)
1260 {
1261 struct coda_ctx *ctx =
1262 container_of(ctrl->handler, struct coda_ctx, ctrls);
1263
1264 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1265 "s_ctrl: id = %d, val = %d\n", ctrl->id, ctrl->val);
1266
1267 switch (ctrl->id) {
1268 case V4L2_CID_MPEG_VIDEO_BITRATE:
1269 ctx->params.bitrate = ctrl->val / 1000;
1270 break;
1271 case V4L2_CID_MPEG_VIDEO_GOP_SIZE:
1272 ctx->params.gop_size = ctrl->val;
1273 break;
1274 case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP:
1275 ctx->params.h264_intra_qp = ctrl->val;
1276 break;
1277 case V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP:
1278 ctx->params.h264_inter_qp = ctrl->val;
1279 break;
1280 case V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP:
1281 ctx->params.mpeg4_intra_qp = ctrl->val;
1282 break;
1283 case V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP:
1284 ctx->params.mpeg4_inter_qp = ctrl->val;
1285 break;
1286 case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE:
1287 ctx->params.slice_mode = ctrl->val;
1288 break;
1289 case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB:
1290 ctx->params.slice_max_mb = ctrl->val;
1291 break;
1292 case V4L2_CID_MPEG_VIDEO_HEADER_MODE:
1293 break;
1294 default:
1295 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1296 "Invalid control, id=%d, val=%d\n",
1297 ctrl->id, ctrl->val);
1298 return -EINVAL;
1299 }
1300
1301 return 0;
1302 }
1303
1304 static struct v4l2_ctrl_ops coda_ctrl_ops = {
1305 .s_ctrl = coda_s_ctrl,
1306 };
1307
1308 static int coda_ctrls_setup(struct coda_ctx *ctx)
1309 {
1310 v4l2_ctrl_handler_init(&ctx->ctrls, 9);
1311
1312 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1313 V4L2_CID_MPEG_VIDEO_BITRATE, 0, 32767000, 1, 0);
1314 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1315 V4L2_CID_MPEG_VIDEO_GOP_SIZE, 1, 60, 1, 16);
1316 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1317 V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, 1, 51, 1, 25);
1318 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1319 V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, 1, 51, 1, 25);
1320 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1321 V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP, 1, 31, 1, 2);
1322 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1323 V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP, 1, 31, 1, 2);
1324 v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
1325 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE,
1326 V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB, 0,
1327 V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB);
1328 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1329 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, 1, 0x3fffffff, 1, 1);
1330 v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
1331 V4L2_CID_MPEG_VIDEO_HEADER_MODE,
1332 V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME,
1333 (1 << V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE),
1334 V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME);
1335
1336 if (ctx->ctrls.error) {
1337 v4l2_err(&ctx->dev->v4l2_dev, "control initialization error (%d)",
1338 ctx->ctrls.error);
1339 return -EINVAL;
1340 }
1341
1342 return v4l2_ctrl_handler_setup(&ctx->ctrls);
1343 }
1344
1345 static int coda_queue_init(void *priv, struct vb2_queue *src_vq,
1346 struct vb2_queue *dst_vq)
1347 {
1348 struct coda_ctx *ctx = priv;
1349 int ret;
1350
1351 src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
1352 src_vq->io_modes = VB2_MMAP | VB2_USERPTR;
1353 src_vq->drv_priv = ctx;
1354 src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
1355 src_vq->ops = &coda_qops;
1356 src_vq->mem_ops = &vb2_dma_contig_memops;
1357
1358 ret = vb2_queue_init(src_vq);
1359 if (ret)
1360 return ret;
1361
1362 dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1363 dst_vq->io_modes = VB2_MMAP | VB2_USERPTR;
1364 dst_vq->drv_priv = ctx;
1365 dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
1366 dst_vq->ops = &coda_qops;
1367 dst_vq->mem_ops = &vb2_dma_contig_memops;
1368
1369 return vb2_queue_init(dst_vq);
1370 }
1371
1372 static int coda_next_free_instance(struct coda_dev *dev)
1373 {
1374 return ffz(dev->instance_mask);
1375 }
1376
1377 static int coda_open(struct file *file)
1378 {
1379 struct coda_dev *dev = video_drvdata(file);
1380 struct coda_ctx *ctx = NULL;
1381 int ret = 0;
1382 int idx;
1383
1384 idx = coda_next_free_instance(dev);
1385 if (idx >= CODA_MAX_INSTANCES)
1386 return -EBUSY;
1387 set_bit(idx, &dev->instance_mask);
1388
1389 ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
1390 if (!ctx)
1391 return -ENOMEM;
1392
1393 v4l2_fh_init(&ctx->fh, video_devdata(file));
1394 file->private_data = &ctx->fh;
1395 v4l2_fh_add(&ctx->fh);
1396 ctx->dev = dev;
1397 ctx->idx = idx;
1398
1399 set_default_params(ctx);
1400 ctx->m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev, ctx,
1401 &coda_queue_init);
1402 if (IS_ERR(ctx->m2m_ctx)) {
1403 int ret = PTR_ERR(ctx->m2m_ctx);
1404
1405 v4l2_err(&dev->v4l2_dev, "%s return error (%d)\n",
1406 __func__, ret);
1407 goto err;
1408 }
1409 ret = coda_ctrls_setup(ctx);
1410 if (ret) {
1411 v4l2_err(&dev->v4l2_dev, "failed to setup coda controls\n");
1412 goto err;
1413 }
1414
1415 ctx->fh.ctrl_handler = &ctx->ctrls;
1416
1417 ctx->parabuf.vaddr = dma_alloc_coherent(&dev->plat_dev->dev,
1418 CODA_PARA_BUF_SIZE, &ctx->parabuf.paddr, GFP_KERNEL);
1419 if (!ctx->parabuf.vaddr) {
1420 v4l2_err(&dev->v4l2_dev, "failed to allocate parabuf");
1421 ret = -ENOMEM;
1422 goto err;
1423 }
1424
1425 coda_lock(ctx);
1426 list_add(&ctx->list, &dev->instances);
1427 coda_unlock(ctx);
1428
1429 clk_prepare_enable(dev->clk_per);
1430 clk_prepare_enable(dev->clk_ahb);
1431
1432 v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Created instance %d (%p)\n",
1433 ctx->idx, ctx);
1434
1435 return 0;
1436
1437 err:
1438 v4l2_fh_del(&ctx->fh);
1439 v4l2_fh_exit(&ctx->fh);
1440 kfree(ctx);
1441 return ret;
1442 }
1443
1444 static int coda_release(struct file *file)
1445 {
1446 struct coda_dev *dev = video_drvdata(file);
1447 struct coda_ctx *ctx = fh_to_ctx(file->private_data);
1448
1449 v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Releasing instance %p\n",
1450 ctx);
1451
1452 coda_lock(ctx);
1453 list_del(&ctx->list);
1454 coda_unlock(ctx);
1455
1456 dma_free_coherent(&dev->plat_dev->dev, CODA_PARA_BUF_SIZE,
1457 ctx->parabuf.vaddr, ctx->parabuf.paddr);
1458 v4l2_m2m_ctx_release(ctx->m2m_ctx);
1459 v4l2_ctrl_handler_free(&ctx->ctrls);
1460 clk_disable_unprepare(dev->clk_per);
1461 clk_disable_unprepare(dev->clk_ahb);
1462 v4l2_fh_del(&ctx->fh);
1463 v4l2_fh_exit(&ctx->fh);
1464 clear_bit(ctx->idx, &dev->instance_mask);
1465 kfree(ctx);
1466
1467 return 0;
1468 }
1469
1470 static unsigned int coda_poll(struct file *file,
1471 struct poll_table_struct *wait)
1472 {
1473 struct coda_ctx *ctx = fh_to_ctx(file->private_data);
1474 int ret;
1475
1476 coda_lock(ctx);
1477 ret = v4l2_m2m_poll(file, ctx->m2m_ctx, wait);
1478 coda_unlock(ctx);
1479 return ret;
1480 }
1481
1482 static int coda_mmap(struct file *file, struct vm_area_struct *vma)
1483 {
1484 struct coda_ctx *ctx = fh_to_ctx(file->private_data);
1485
1486 return v4l2_m2m_mmap(file, ctx->m2m_ctx, vma);
1487 }
1488
1489 static const struct v4l2_file_operations coda_fops = {
1490 .owner = THIS_MODULE,
1491 .open = coda_open,
1492 .release = coda_release,
1493 .poll = coda_poll,
1494 .unlocked_ioctl = video_ioctl2,
1495 .mmap = coda_mmap,
1496 };
1497
1498 static irqreturn_t coda_irq_handler(int irq, void *data)
1499 {
1500 struct vb2_buffer *src_buf, *dst_buf;
1501 struct coda_dev *dev = data;
1502 u32 wr_ptr, start_ptr;
1503 struct coda_ctx *ctx;
1504
1505 __cancel_delayed_work(&dev->timeout);
1506
1507 /* read status register to attend the IRQ */
1508 coda_read(dev, CODA_REG_BIT_INT_STATUS);
1509 coda_write(dev, CODA_REG_BIT_INT_CLEAR_SET,
1510 CODA_REG_BIT_INT_CLEAR);
1511
1512 ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev);
1513 if (ctx == NULL) {
1514 v4l2_err(&dev->v4l2_dev, "Instance released before the end of transaction\n");
1515 return IRQ_HANDLED;
1516 }
1517
1518 if (ctx->aborting) {
1519 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1520 "task has been aborted\n");
1521 return IRQ_HANDLED;
1522 }
1523
1524 if (coda_isbusy(ctx->dev)) {
1525 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1526 "coda is still busy!!!!\n");
1527 return IRQ_NONE;
1528 }
1529
1530 src_buf = v4l2_m2m_src_buf_remove(ctx->m2m_ctx);
1531 dst_buf = v4l2_m2m_dst_buf_remove(ctx->m2m_ctx);
1532
1533 /* Get results from the coda */
1534 coda_read(dev, CODA_RET_ENC_PIC_TYPE);
1535 start_ptr = coda_read(dev, CODA_CMD_ENC_PIC_BB_START);
1536 wr_ptr = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx));
1537 /* Calculate bytesused field */
1538 if (dst_buf->v4l2_buf.sequence == 0) {
1539 dst_buf->v4l2_planes[0].bytesused = (wr_ptr - start_ptr) +
1540 ctx->vpu_header_size[0] +
1541 ctx->vpu_header_size[1] +
1542 ctx->vpu_header_size[2];
1543 } else {
1544 dst_buf->v4l2_planes[0].bytesused = (wr_ptr - start_ptr);
1545 }
1546
1547 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, "frame size = %u\n",
1548 wr_ptr - start_ptr);
1549
1550 coda_read(dev, CODA_RET_ENC_PIC_SLICE_NUM);
1551 coda_read(dev, CODA_RET_ENC_PIC_FLAG);
1552
1553 if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) {
1554 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
1555 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
1556 } else {
1557 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
1558 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
1559 }
1560
1561 v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
1562 v4l2_m2m_buf_done(dst_buf, VB2_BUF_STATE_DONE);
1563
1564 ctx->gopcounter--;
1565 if (ctx->gopcounter < 0)
1566 ctx->gopcounter = ctx->params.gop_size - 1;
1567
1568 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1569 "job finished: encoding frame (%d) (%s)\n",
1570 dst_buf->v4l2_buf.sequence,
1571 (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ?
1572 "KEYFRAME" : "PFRAME");
1573
1574 v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->m2m_ctx);
1575
1576 return IRQ_HANDLED;
1577 }
1578
1579 static void coda_timeout(struct work_struct *work)
1580 {
1581 struct coda_ctx *ctx;
1582 struct coda_dev *dev = container_of(to_delayed_work(work),
1583 struct coda_dev, timeout);
1584
1585 v4l2_err(&dev->v4l2_dev, "CODA PIC_RUN timeout, stopping all streams\n");
1586
1587 mutex_lock(&dev->dev_mutex);
1588 list_for_each_entry(ctx, &dev->instances, list) {
1589 v4l2_m2m_streamoff(NULL, ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1590 v4l2_m2m_streamoff(NULL, ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1591 }
1592 mutex_unlock(&dev->dev_mutex);
1593 }
1594
1595 static u32 coda_supported_firmwares[] = {
1596 CODA_FIRMWARE_VERNUM(CODA_DX6, 2, 2, 5),
1597 CODA_FIRMWARE_VERNUM(CODA_7541, 13, 4, 29),
1598 };
1599
1600 static bool coda_firmware_supported(u32 vernum)
1601 {
1602 int i;
1603
1604 for (i = 0; i < ARRAY_SIZE(coda_supported_firmwares); i++)
1605 if (vernum == coda_supported_firmwares[i])
1606 return true;
1607 return false;
1608 }
1609
1610 static char *coda_product_name(int product)
1611 {
1612 static char buf[9];
1613
1614 switch (product) {
1615 case CODA_DX6:
1616 return "CodaDx6";
1617 case CODA_7541:
1618 return "CODA7541";
1619 default:
1620 snprintf(buf, sizeof(buf), "(0x%04x)", product);
1621 return buf;
1622 }
1623 }
1624
1625 static int coda_hw_init(struct coda_dev *dev)
1626 {
1627 u16 product, major, minor, release;
1628 u32 data;
1629 u16 *p;
1630 int i;
1631
1632 clk_prepare_enable(dev->clk_per);
1633 clk_prepare_enable(dev->clk_ahb);
1634
1635 /*
1636 * Copy the first CODA_ISRAM_SIZE in the internal SRAM.
1637 * The 16-bit chars in the code buffer are in memory access
1638 * order, re-sort them to CODA order for register download.
1639 * Data in this SRAM survives a reboot.
1640 */
1641 p = (u16 *)dev->codebuf.vaddr;
1642 if (dev->devtype->product == CODA_DX6) {
1643 for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) {
1644 data = CODA_DOWN_ADDRESS_SET(i) |
1645 CODA_DOWN_DATA_SET(p[i ^ 1]);
1646 coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
1647 }
1648 } else {
1649 for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) {
1650 data = CODA_DOWN_ADDRESS_SET(i) |
1651 CODA_DOWN_DATA_SET(p[round_down(i, 4) +
1652 3 - (i % 4)]);
1653 coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
1654 }
1655 }
1656
1657 /* Tell the BIT where to find everything it needs */
1658 coda_write(dev, dev->workbuf.paddr,
1659 CODA_REG_BIT_WORK_BUF_ADDR);
1660 coda_write(dev, dev->codebuf.paddr,
1661 CODA_REG_BIT_CODE_BUF_ADDR);
1662 coda_write(dev, 0, CODA_REG_BIT_CODE_RUN);
1663
1664 /* Set default values */
1665 switch (dev->devtype->product) {
1666 case CODA_DX6:
1667 coda_write(dev, CODADX6_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
1668 break;
1669 default:
1670 coda_write(dev, CODA7_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
1671 }
1672 coda_write(dev, 0, CODA_REG_BIT_FRAME_MEM_CTRL);
1673
1674 if (dev->devtype->product != CODA_DX6)
1675 coda_write(dev, 0, CODA7_REG_BIT_AXI_SRAM_USE);
1676
1677 coda_write(dev, CODA_INT_INTERRUPT_ENABLE,
1678 CODA_REG_BIT_INT_ENABLE);
1679
1680 /* Reset VPU and start processor */
1681 data = coda_read(dev, CODA_REG_BIT_CODE_RESET);
1682 data |= CODA_REG_RESET_ENABLE;
1683 coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
1684 udelay(10);
1685 data &= ~CODA_REG_RESET_ENABLE;
1686 coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
1687 coda_write(dev, CODA_REG_RUN_ENABLE, CODA_REG_BIT_CODE_RUN);
1688
1689 /* Load firmware */
1690 coda_write(dev, 0, CODA_CMD_FIRMWARE_VERNUM);
1691 coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
1692 coda_write(dev, 0, CODA_REG_BIT_RUN_INDEX);
1693 coda_write(dev, 0, CODA_REG_BIT_RUN_COD_STD);
1694 coda_write(dev, CODA_COMMAND_FIRMWARE_GET, CODA_REG_BIT_RUN_COMMAND);
1695 if (coda_wait_timeout(dev)) {
1696 clk_disable_unprepare(dev->clk_per);
1697 clk_disable_unprepare(dev->clk_ahb);
1698 v4l2_err(&dev->v4l2_dev, "firmware get command error\n");
1699 return -EIO;
1700 }
1701
1702 /* Check we are compatible with the loaded firmware */
1703 data = coda_read(dev, CODA_CMD_FIRMWARE_VERNUM);
1704 product = CODA_FIRMWARE_PRODUCT(data);
1705 major = CODA_FIRMWARE_MAJOR(data);
1706 minor = CODA_FIRMWARE_MINOR(data);
1707 release = CODA_FIRMWARE_RELEASE(data);
1708
1709 clk_disable_unprepare(dev->clk_per);
1710 clk_disable_unprepare(dev->clk_ahb);
1711
1712 if (product != dev->devtype->product) {
1713 v4l2_err(&dev->v4l2_dev, "Wrong firmware. Hw: %s, Fw: %s,"
1714 " Version: %u.%u.%u\n",
1715 coda_product_name(dev->devtype->product),
1716 coda_product_name(product), major, minor, release);
1717 return -EINVAL;
1718 }
1719
1720 v4l2_info(&dev->v4l2_dev, "Initialized %s.\n",
1721 coda_product_name(product));
1722
1723 if (coda_firmware_supported(data)) {
1724 v4l2_info(&dev->v4l2_dev, "Firmware version: %u.%u.%u\n",
1725 major, minor, release);
1726 } else {
1727 v4l2_warn(&dev->v4l2_dev, "Unsupported firmware version: "
1728 "%u.%u.%u\n", major, minor, release);
1729 }
1730
1731 return 0;
1732 }
1733
1734 static void coda_fw_callback(const struct firmware *fw, void *context)
1735 {
1736 struct coda_dev *dev = context;
1737 struct platform_device *pdev = dev->plat_dev;
1738 int ret;
1739
1740 if (!fw) {
1741 v4l2_err(&dev->v4l2_dev, "firmware request failed\n");
1742 return;
1743 }
1744
1745 /* allocate auxiliary per-device code buffer for the BIT processor */
1746 dev->codebuf.size = fw->size;
1747 dev->codebuf.vaddr = dma_alloc_coherent(&pdev->dev, fw->size,
1748 &dev->codebuf.paddr,
1749 GFP_KERNEL);
1750 if (!dev->codebuf.vaddr) {
1751 dev_err(&pdev->dev, "failed to allocate code buffer\n");
1752 return;
1753 }
1754
1755 /* Copy the whole firmware image to the code buffer */
1756 memcpy(dev->codebuf.vaddr, fw->data, fw->size);
1757 release_firmware(fw);
1758
1759 ret = coda_hw_init(dev);
1760 if (ret) {
1761 v4l2_err(&dev->v4l2_dev, "HW initialization failed\n");
1762 return;
1763 }
1764
1765 dev->vfd.fops = &coda_fops,
1766 dev->vfd.ioctl_ops = &coda_ioctl_ops;
1767 dev->vfd.release = video_device_release_empty,
1768 dev->vfd.lock = &dev->dev_mutex;
1769 dev->vfd.v4l2_dev = &dev->v4l2_dev;
1770 dev->vfd.vfl_dir = VFL_DIR_M2M;
1771 snprintf(dev->vfd.name, sizeof(dev->vfd.name), "%s", CODA_NAME);
1772 video_set_drvdata(&dev->vfd, dev);
1773
1774 dev->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
1775 if (IS_ERR(dev->alloc_ctx)) {
1776 v4l2_err(&dev->v4l2_dev, "Failed to alloc vb2 context\n");
1777 return;
1778 }
1779
1780 dev->m2m_dev = v4l2_m2m_init(&coda_m2m_ops);
1781 if (IS_ERR(dev->m2m_dev)) {
1782 v4l2_err(&dev->v4l2_dev, "Failed to init mem2mem device\n");
1783 goto rel_ctx;
1784 }
1785
1786 ret = video_register_device(&dev->vfd, VFL_TYPE_GRABBER, 0);
1787 if (ret) {
1788 v4l2_err(&dev->v4l2_dev, "Failed to register video device\n");
1789 goto rel_m2m;
1790 }
1791 v4l2_info(&dev->v4l2_dev, "codec registered as /dev/video%d\n",
1792 dev->vfd.num);
1793
1794 return;
1795
1796 rel_m2m:
1797 v4l2_m2m_release(dev->m2m_dev);
1798 rel_ctx:
1799 vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
1800 }
1801
1802 static int coda_firmware_request(struct coda_dev *dev)
1803 {
1804 char *fw = dev->devtype->firmware;
1805
1806 dev_dbg(&dev->plat_dev->dev, "requesting firmware '%s' for %s\n", fw,
1807 coda_product_name(dev->devtype->product));
1808
1809 return request_firmware_nowait(THIS_MODULE, true,
1810 fw, &dev->plat_dev->dev, GFP_KERNEL, dev, coda_fw_callback);
1811 }
1812
1813 enum coda_platform {
1814 CODA_IMX27,
1815 CODA_IMX53,
1816 };
1817
1818 static const struct coda_devtype coda_devdata[] = {
1819 [CODA_IMX27] = {
1820 .firmware = "v4l-codadx6-imx27.bin",
1821 .product = CODA_DX6,
1822 .formats = codadx6_formats,
1823 .num_formats = ARRAY_SIZE(codadx6_formats),
1824 },
1825 [CODA_IMX53] = {
1826 .firmware = "v4l-coda7541-imx53.bin",
1827 .product = CODA_7541,
1828 .formats = coda7_formats,
1829 .num_formats = ARRAY_SIZE(coda7_formats),
1830 },
1831 };
1832
1833 static struct platform_device_id coda_platform_ids[] = {
1834 { .name = "coda-imx27", .driver_data = CODA_IMX27 },
1835 { .name = "coda-imx53", .driver_data = CODA_7541 },
1836 { /* sentinel */ }
1837 };
1838 MODULE_DEVICE_TABLE(platform, coda_platform_ids);
1839
1840 #ifdef CONFIG_OF
1841 static const struct of_device_id coda_dt_ids[] = {
1842 { .compatible = "fsl,imx27-vpu", .data = &coda_platform_ids[CODA_IMX27] },
1843 { .compatible = "fsl,imx53-vpu", .data = &coda_devdata[CODA_IMX53] },
1844 { /* sentinel */ }
1845 };
1846 MODULE_DEVICE_TABLE(of, coda_dt_ids);
1847 #endif
1848
1849 static int __devinit coda_probe(struct platform_device *pdev)
1850 {
1851 const struct of_device_id *of_id =
1852 of_match_device(of_match_ptr(coda_dt_ids), &pdev->dev);
1853 const struct platform_device_id *pdev_id;
1854 struct coda_dev *dev;
1855 struct resource *res;
1856 int ret, irq;
1857
1858 dev = devm_kzalloc(&pdev->dev, sizeof *dev, GFP_KERNEL);
1859 if (!dev) {
1860 dev_err(&pdev->dev, "Not enough memory for %s\n",
1861 CODA_NAME);
1862 return -ENOMEM;
1863 }
1864
1865 spin_lock_init(&dev->irqlock);
1866 INIT_LIST_HEAD(&dev->instances);
1867 INIT_DELAYED_WORK(&dev->timeout, coda_timeout);
1868
1869 dev->plat_dev = pdev;
1870 dev->clk_per = devm_clk_get(&pdev->dev, "per");
1871 if (IS_ERR(dev->clk_per)) {
1872 dev_err(&pdev->dev, "Could not get per clock\n");
1873 return PTR_ERR(dev->clk_per);
1874 }
1875
1876 dev->clk_ahb = devm_clk_get(&pdev->dev, "ahb");
1877 if (IS_ERR(dev->clk_ahb)) {
1878 dev_err(&pdev->dev, "Could not get ahb clock\n");
1879 return PTR_ERR(dev->clk_ahb);
1880 }
1881
1882 /* Get memory for physical registers */
1883 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1884 if (res == NULL) {
1885 dev_err(&pdev->dev, "failed to get memory region resource\n");
1886 return -ENOENT;
1887 }
1888
1889 if (devm_request_mem_region(&pdev->dev, res->start,
1890 resource_size(res), CODA_NAME) == NULL) {
1891 dev_err(&pdev->dev, "failed to request memory region\n");
1892 return -ENOENT;
1893 }
1894 dev->regs_base = devm_ioremap(&pdev->dev, res->start,
1895 resource_size(res));
1896 if (!dev->regs_base) {
1897 dev_err(&pdev->dev, "failed to ioremap address region\n");
1898 return -ENOENT;
1899 }
1900
1901 /* IRQ */
1902 irq = platform_get_irq(pdev, 0);
1903 if (irq < 0) {
1904 dev_err(&pdev->dev, "failed to get irq resource\n");
1905 return -ENOENT;
1906 }
1907
1908 if (devm_request_irq(&pdev->dev, irq, coda_irq_handler,
1909 0, CODA_NAME, dev) < 0) {
1910 dev_err(&pdev->dev, "failed to request irq\n");
1911 return -ENOENT;
1912 }
1913
1914 ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev);
1915 if (ret)
1916 return ret;
1917
1918 mutex_init(&dev->dev_mutex);
1919
1920 pdev_id = of_id ? of_id->data : platform_get_device_id(pdev);
1921
1922 if (of_id) {
1923 dev->devtype = of_id->data;
1924 } else if (pdev_id) {
1925 dev->devtype = &coda_devdata[pdev_id->driver_data];
1926 } else {
1927 v4l2_device_unregister(&dev->v4l2_dev);
1928 return -EINVAL;
1929 }
1930
1931 /* allocate auxiliary per-device buffers for the BIT processor */
1932 switch (dev->devtype->product) {
1933 case CODA_DX6:
1934 dev->workbuf.size = CODADX6_WORK_BUF_SIZE;
1935 break;
1936 default:
1937 dev->workbuf.size = CODA7_WORK_BUF_SIZE;
1938 }
1939 dev->workbuf.vaddr = dma_alloc_coherent(&pdev->dev, dev->workbuf.size,
1940 &dev->workbuf.paddr,
1941 GFP_KERNEL);
1942 if (!dev->workbuf.vaddr) {
1943 dev_err(&pdev->dev, "failed to allocate work buffer\n");
1944 v4l2_device_unregister(&dev->v4l2_dev);
1945 return -ENOMEM;
1946 }
1947
1948 if (dev->devtype->product == CODA_DX6) {
1949 dev->iram_paddr = 0xffff4c00;
1950 } else {
1951 void __iomem *iram_vaddr;
1952
1953 iram_vaddr = iram_alloc(CODA7_IRAM_SIZE,
1954 &dev->iram_paddr);
1955 if (!iram_vaddr) {
1956 dev_err(&pdev->dev, "unable to alloc iram\n");
1957 return -ENOMEM;
1958 }
1959 }
1960
1961 platform_set_drvdata(pdev, dev);
1962
1963 return coda_firmware_request(dev);
1964 }
1965
1966 static int coda_remove(struct platform_device *pdev)
1967 {
1968 struct coda_dev *dev = platform_get_drvdata(pdev);
1969
1970 video_unregister_device(&dev->vfd);
1971 if (dev->m2m_dev)
1972 v4l2_m2m_release(dev->m2m_dev);
1973 if (dev->alloc_ctx)
1974 vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
1975 v4l2_device_unregister(&dev->v4l2_dev);
1976 if (dev->iram_paddr)
1977 iram_free(dev->iram_paddr, CODA7_IRAM_SIZE);
1978 if (dev->codebuf.vaddr)
1979 dma_free_coherent(&pdev->dev, dev->codebuf.size,
1980 &dev->codebuf.vaddr, dev->codebuf.paddr);
1981 if (dev->workbuf.vaddr)
1982 dma_free_coherent(&pdev->dev, dev->workbuf.size, &dev->workbuf.vaddr,
1983 dev->workbuf.paddr);
1984 return 0;
1985 }
1986
1987 static struct platform_driver coda_driver = {
1988 .probe = coda_probe,
1989 .remove = __devexit_p(coda_remove),
1990 .driver = {
1991 .name = CODA_NAME,
1992 .owner = THIS_MODULE,
1993 .of_match_table = of_match_ptr(coda_dt_ids),
1994 },
1995 .id_table = coda_platform_ids,
1996 };
1997
1998 module_platform_driver(coda_driver);
1999
2000 MODULE_LICENSE("GPL");
2001 MODULE_AUTHOR("Javier Martin <javier.martin@vista-silicon.com>");
2002 MODULE_DESCRIPTION("Coda multi-standard codec V4L2 driver");
Linux kernel - Deliverables
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