2 * The Marvell camera core. This device appears in a number of settings,
3 * so it needs platform-specific support outside of the core.
5 * Copyright 2011 Jonathan Corbet corbet@lwn.net
7 #include <linux/kernel.h>
8 #include <linux/module.h>
11 #include <linux/i2c.h>
12 #include <linux/interrupt.h>
13 #include <linux/spinlock.h>
14 #include <linux/slab.h>
15 #include <linux/device.h>
16 #include <linux/wait.h>
17 #include <linux/list.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/delay.h>
20 #include <linux/vmalloc.h>
22 #include <linux/clk.h>
23 #include <linux/videodev2.h>
24 #include <media/v4l2-device.h>
25 #include <media/v4l2-ioctl.h>
26 #include <media/v4l2-ctrls.h>
27 #include <media/ov7670.h>
28 #include <media/videobuf2-vmalloc.h>
29 #include <media/videobuf2-dma-contig.h>
30 #include <media/videobuf2-dma-sg.h>
32 #include "mcam-core.h"
34 #ifdef MCAM_MODE_VMALLOC
36 * Internal DMA buffer management. Since the controller cannot do S/G I/O,
37 * we must have physically contiguous buffers to bring frames into.
38 * These parameters control how many buffers we use, whether we
39 * allocate them at load time (better chance of success, but nails down
40 * memory) or when somebody tries to use the camera (riskier), and,
41 * for load-time allocation, how big they should be.
43 * The controller can cycle through three buffers. We could use
44 * more by flipping pointers around, but it probably makes little
48 static bool alloc_bufs_at_read
;
49 module_param(alloc_bufs_at_read
, bool, 0444);
50 MODULE_PARM_DESC(alloc_bufs_at_read
,
51 "Non-zero value causes DMA buffers to be allocated when the "
52 "video capture device is read, rather than at module load "
53 "time. This saves memory, but decreases the chances of "
54 "successfully getting those buffers. This parameter is "
55 "only used in the vmalloc buffer mode");
57 static int n_dma_bufs
= 3;
58 module_param(n_dma_bufs
, uint
, 0644);
59 MODULE_PARM_DESC(n_dma_bufs
,
60 "The number of DMA buffers to allocate. Can be either two "
61 "(saves memory, makes timing tighter) or three.");
63 static int dma_buf_size
= VGA_WIDTH
* VGA_HEIGHT
* 2; /* Worst case */
64 module_param(dma_buf_size
, uint
, 0444);
65 MODULE_PARM_DESC(dma_buf_size
,
66 "The size of the allocated DMA buffers. If actual operating "
67 "parameters require larger buffers, an attempt to reallocate "
69 #else /* MCAM_MODE_VMALLOC */
70 static const bool alloc_bufs_at_read
;
71 static const int n_dma_bufs
= 3; /* Used by S/G_PARM */
72 #endif /* MCAM_MODE_VMALLOC */
75 module_param(flip
, bool, 0444);
76 MODULE_PARM_DESC(flip
,
77 "If set, the sensor will be instructed to flip the image "
80 static int buffer_mode
= -1;
81 module_param(buffer_mode
, int, 0444);
82 MODULE_PARM_DESC(buffer_mode
,
83 "Set the buffer mode to be used; default is to go with what "
84 "the platform driver asks for. Set to 0 for vmalloc, 1 for "
88 * Status flags. Always manipulated with bit operations.
90 #define CF_BUF0_VALID 0 /* Buffers valid - first three */
91 #define CF_BUF1_VALID 1
92 #define CF_BUF2_VALID 2
93 #define CF_DMA_ACTIVE 3 /* A frame is incoming */
94 #define CF_CONFIG_NEEDED 4 /* Must configure hardware */
95 #define CF_SINGLE_BUFFER 5 /* Running with a single buffer */
96 #define CF_SG_RESTART 6 /* SG restart needed */
97 #define CF_FRAME_SOF0 7 /* Frame 0 started */
98 #define CF_FRAME_SOF1 8
99 #define CF_FRAME_SOF2 9
101 #define sensor_call(cam, o, f, args...) \
102 v4l2_subdev_call(cam->sensor, o, f, ##args)
104 static struct mcam_format_struct
{
107 int bpp
; /* Bytes per pixel */
112 .desc
= "YUYV 4:2:2",
113 .pixelformat
= V4L2_PIX_FMT_YUYV
,
114 .mbus_code
= MEDIA_BUS_FMT_YUYV8_2X8
,
119 .desc
= "UYVY 4:2:2",
120 .pixelformat
= V4L2_PIX_FMT_UYVY
,
121 .mbus_code
= MEDIA_BUS_FMT_YUYV8_2X8
,
126 .desc
= "YUV 4:2:2 PLANAR",
127 .pixelformat
= V4L2_PIX_FMT_YUV422P
,
128 .mbus_code
= MEDIA_BUS_FMT_YUYV8_2X8
,
133 .desc
= "YUV 4:2:0 PLANAR",
134 .pixelformat
= V4L2_PIX_FMT_YUV420
,
135 .mbus_code
= MEDIA_BUS_FMT_YUYV8_2X8
,
140 .desc
= "YVU 4:2:0 PLANAR",
141 .pixelformat
= V4L2_PIX_FMT_YVU420
,
142 .mbus_code
= MEDIA_BUS_FMT_YUYV8_2X8
,
148 .pixelformat
= V4L2_PIX_FMT_RGB444
,
149 .mbus_code
= MEDIA_BUS_FMT_RGB444_2X8_PADHI_LE
,
155 .pixelformat
= V4L2_PIX_FMT_RGB565
,
156 .mbus_code
= MEDIA_BUS_FMT_RGB565_2X8_LE
,
161 .desc
= "Raw RGB Bayer",
162 .pixelformat
= V4L2_PIX_FMT_SBGGR8
,
163 .mbus_code
= MEDIA_BUS_FMT_SBGGR8_1X8
,
168 #define N_MCAM_FMTS ARRAY_SIZE(mcam_formats)
170 static struct mcam_format_struct
*mcam_find_format(u32 pixelformat
)
174 for (i
= 0; i
< N_MCAM_FMTS
; i
++)
175 if (mcam_formats
[i
].pixelformat
== pixelformat
)
176 return mcam_formats
+ i
;
177 /* Not found? Then return the first format. */
182 * The default format we use until somebody says otherwise.
184 static const struct v4l2_pix_format mcam_def_pix_format
= {
186 .height
= VGA_HEIGHT
,
187 .pixelformat
= V4L2_PIX_FMT_YUYV
,
188 .field
= V4L2_FIELD_NONE
,
189 .bytesperline
= VGA_WIDTH
*2,
190 .sizeimage
= VGA_WIDTH
*VGA_HEIGHT
*2,
191 .colorspace
= V4L2_COLORSPACE_SRGB
,
194 static const u32 mcam_def_mbus_code
= MEDIA_BUS_FMT_YUYV8_2X8
;
198 * The two-word DMA descriptor format used by the Armada 610 and like. There
199 * Is a three-word format as well (set C1_DESC_3WORD) where the third
200 * word is a pointer to the next descriptor, but we don't use it. Two-word
201 * descriptors have to be contiguous in memory.
203 struct mcam_dma_desc
{
208 struct yuv_pointer_t
{
215 * Our buffer type for working with videobuf2. Note that the vb2
216 * developers have decreed that struct vb2_buffer must be at the
217 * beginning of this structure.
219 struct mcam_vb_buffer
{
220 struct vb2_buffer vb_buf
;
221 struct list_head queue
;
222 struct mcam_dma_desc
*dma_desc
; /* Descriptor virtual address */
223 dma_addr_t dma_desc_pa
; /* Descriptor physical address */
224 int dma_desc_nent
; /* Number of mapped descriptors */
225 struct yuv_pointer_t yuv_p
;
228 static inline struct mcam_vb_buffer
*vb_to_mvb(struct vb2_buffer
*vb
)
230 return container_of(vb
, struct mcam_vb_buffer
, vb_buf
);
234 * Hand a completed buffer back to user space.
236 static void mcam_buffer_done(struct mcam_camera
*cam
, int frame
,
237 struct vb2_buffer
*vbuf
)
239 vbuf
->v4l2_buf
.bytesused
= cam
->pix_format
.sizeimage
;
240 vbuf
->v4l2_buf
.sequence
= cam
->buf_seq
[frame
];
241 vb2_set_plane_payload(vbuf
, 0, cam
->pix_format
.sizeimage
);
242 vb2_buffer_done(vbuf
, VB2_BUF_STATE_DONE
);
248 * Debugging and related.
250 #define cam_err(cam, fmt, arg...) \
251 dev_err((cam)->dev, fmt, ##arg);
252 #define cam_warn(cam, fmt, arg...) \
253 dev_warn((cam)->dev, fmt, ##arg);
254 #define cam_dbg(cam, fmt, arg...) \
255 dev_dbg((cam)->dev, fmt, ##arg);
259 * Flag manipulation helpers
261 static void mcam_reset_buffers(struct mcam_camera
*cam
)
266 for (i
= 0; i
< cam
->nbufs
; i
++) {
267 clear_bit(i
, &cam
->flags
);
268 clear_bit(CF_FRAME_SOF0
+ i
, &cam
->flags
);
272 static inline int mcam_needs_config(struct mcam_camera
*cam
)
274 return test_bit(CF_CONFIG_NEEDED
, &cam
->flags
);
277 static void mcam_set_config_needed(struct mcam_camera
*cam
, int needed
)
280 set_bit(CF_CONFIG_NEEDED
, &cam
->flags
);
282 clear_bit(CF_CONFIG_NEEDED
, &cam
->flags
);
285 /* ------------------------------------------------------------------- */
287 * Make the controller start grabbing images. Everything must
288 * be set up before doing this.
290 static void mcam_ctlr_start(struct mcam_camera
*cam
)
292 /* set_bit performs a read, so no other barrier should be
294 mcam_reg_set_bit(cam
, REG_CTRL0
, C0_ENABLE
);
297 static void mcam_ctlr_stop(struct mcam_camera
*cam
)
299 mcam_reg_clear_bit(cam
, REG_CTRL0
, C0_ENABLE
);
302 static void mcam_enable_mipi(struct mcam_camera
*mcam
)
304 /* Using MIPI mode and enable MIPI */
305 cam_dbg(mcam
, "camera: DPHY3=0x%x, DPHY5=0x%x, DPHY6=0x%x\n",
306 mcam
->dphy
[0], mcam
->dphy
[1], mcam
->dphy
[2]);
307 mcam_reg_write(mcam
, REG_CSI2_DPHY3
, mcam
->dphy
[0]);
308 mcam_reg_write(mcam
, REG_CSI2_DPHY5
, mcam
->dphy
[1]);
309 mcam_reg_write(mcam
, REG_CSI2_DPHY6
, mcam
->dphy
[2]);
311 if (!mcam
->mipi_enabled
) {
312 if (mcam
->lane
> 4 || mcam
->lane
<= 0) {
313 cam_warn(mcam
, "lane number error\n");
314 mcam
->lane
= 1; /* set the default value */
317 * 0x41 actives 1 lane
318 * 0x43 actives 2 lanes
319 * 0x45 actives 3 lanes (never happen)
320 * 0x47 actives 4 lanes
322 mcam_reg_write(mcam
, REG_CSI2_CTRL0
,
323 CSI2_C0_MIPI_EN
| CSI2_C0_ACT_LANE(mcam
->lane
));
324 mcam_reg_write(mcam
, REG_CLKCTRL
,
325 (mcam
->mclk_src
<< 29) | mcam
->mclk_div
);
327 mcam
->mipi_enabled
= true;
331 static void mcam_disable_mipi(struct mcam_camera
*mcam
)
333 /* Using Parallel mode or disable MIPI */
334 mcam_reg_write(mcam
, REG_CSI2_CTRL0
, 0x0);
335 mcam_reg_write(mcam
, REG_CSI2_DPHY3
, 0x0);
336 mcam_reg_write(mcam
, REG_CSI2_DPHY5
, 0x0);
337 mcam_reg_write(mcam
, REG_CSI2_DPHY6
, 0x0);
338 mcam
->mipi_enabled
= false;
341 /* ------------------------------------------------------------------- */
343 #ifdef MCAM_MODE_VMALLOC
345 * Code specific to the vmalloc buffer mode.
349 * Allocate in-kernel DMA buffers for vmalloc mode.
351 static int mcam_alloc_dma_bufs(struct mcam_camera
*cam
, int loadtime
)
355 mcam_set_config_needed(cam
, 1);
357 cam
->dma_buf_size
= dma_buf_size
;
359 cam
->dma_buf_size
= cam
->pix_format
.sizeimage
;
364 for (i
= 0; i
< n_dma_bufs
; i
++) {
365 cam
->dma_bufs
[i
] = dma_alloc_coherent(cam
->dev
,
366 cam
->dma_buf_size
, cam
->dma_handles
+ i
,
368 if (cam
->dma_bufs
[i
] == NULL
) {
369 cam_warn(cam
, "Failed to allocate DMA buffer\n");
375 switch (cam
->nbufs
) {
377 dma_free_coherent(cam
->dev
, cam
->dma_buf_size
,
378 cam
->dma_bufs
[0], cam
->dma_handles
[0]);
381 cam_err(cam
, "Insufficient DMA buffers, cannot operate\n");
386 cam_warn(cam
, "Will limp along with only 2 buffers\n");
392 static void mcam_free_dma_bufs(struct mcam_camera
*cam
)
396 for (i
= 0; i
< cam
->nbufs
; i
++) {
397 dma_free_coherent(cam
->dev
, cam
->dma_buf_size
,
398 cam
->dma_bufs
[i
], cam
->dma_handles
[i
]);
399 cam
->dma_bufs
[i
] = NULL
;
406 * Set up DMA buffers when operating in vmalloc mode
408 static void mcam_ctlr_dma_vmalloc(struct mcam_camera
*cam
)
411 * Store the first two Y buffers (we aren't supporting
412 * planar formats for now, so no UV bufs). Then either
413 * set the third if it exists, or tell the controller
416 mcam_reg_write(cam
, REG_Y0BAR
, cam
->dma_handles
[0]);
417 mcam_reg_write(cam
, REG_Y1BAR
, cam
->dma_handles
[1]);
418 if (cam
->nbufs
> 2) {
419 mcam_reg_write(cam
, REG_Y2BAR
, cam
->dma_handles
[2]);
420 mcam_reg_clear_bit(cam
, REG_CTRL1
, C1_TWOBUFS
);
422 mcam_reg_set_bit(cam
, REG_CTRL1
, C1_TWOBUFS
);
423 if (cam
->chip_id
== MCAM_CAFE
)
424 mcam_reg_write(cam
, REG_UBAR
, 0); /* 32 bits only */
428 * Copy data out to user space in the vmalloc case
430 static void mcam_frame_tasklet(unsigned long data
)
432 struct mcam_camera
*cam
= (struct mcam_camera
*) data
;
435 struct mcam_vb_buffer
*buf
;
437 spin_lock_irqsave(&cam
->dev_lock
, flags
);
438 for (i
= 0; i
< cam
->nbufs
; i
++) {
439 int bufno
= cam
->next_buf
;
441 if (cam
->state
!= S_STREAMING
|| bufno
< 0)
442 break; /* I/O got stopped */
443 if (++(cam
->next_buf
) >= cam
->nbufs
)
445 if (!test_bit(bufno
, &cam
->flags
))
447 if (list_empty(&cam
->buffers
)) {
448 cam
->frame_state
.singles
++;
449 break; /* Leave it valid, hope for better later */
451 cam
->frame_state
.delivered
++;
452 clear_bit(bufno
, &cam
->flags
);
453 buf
= list_first_entry(&cam
->buffers
, struct mcam_vb_buffer
,
455 list_del_init(&buf
->queue
);
457 * Drop the lock during the big copy. This *should* be safe...
459 spin_unlock_irqrestore(&cam
->dev_lock
, flags
);
460 memcpy(vb2_plane_vaddr(&buf
->vb_buf
, 0), cam
->dma_bufs
[bufno
],
461 cam
->pix_format
.sizeimage
);
462 mcam_buffer_done(cam
, bufno
, &buf
->vb_buf
);
463 spin_lock_irqsave(&cam
->dev_lock
, flags
);
465 spin_unlock_irqrestore(&cam
->dev_lock
, flags
);
470 * Make sure our allocated buffers are up to the task.
472 static int mcam_check_dma_buffers(struct mcam_camera
*cam
)
474 if (cam
->nbufs
> 0 && cam
->dma_buf_size
< cam
->pix_format
.sizeimage
)
475 mcam_free_dma_bufs(cam
);
477 return mcam_alloc_dma_bufs(cam
, 0);
481 static void mcam_vmalloc_done(struct mcam_camera
*cam
, int frame
)
483 tasklet_schedule(&cam
->s_tasklet
);
486 #else /* MCAM_MODE_VMALLOC */
488 static inline int mcam_alloc_dma_bufs(struct mcam_camera
*cam
, int loadtime
)
493 static inline void mcam_free_dma_bufs(struct mcam_camera
*cam
)
498 static inline int mcam_check_dma_buffers(struct mcam_camera
*cam
)
505 #endif /* MCAM_MODE_VMALLOC */
508 #ifdef MCAM_MODE_DMA_CONTIG
509 /* ---------------------------------------------------------------------- */
511 * DMA-contiguous code.
514 static bool mcam_fmt_is_planar(__u32 pfmt
)
516 struct mcam_format_struct
*f
;
518 f
= mcam_find_format(pfmt
);
523 * Set up a contiguous buffer for the given frame. Here also is where
524 * the underrun strategy is set: if there is no buffer available, reuse
525 * the buffer from the other BAR and set the CF_SINGLE_BUFFER flag to
526 * keep the interrupt handler from giving that buffer back to user
527 * space. In this way, we always have a buffer to DMA to and don't
528 * have to try to play games stopping and restarting the controller.
530 static void mcam_set_contig_buffer(struct mcam_camera
*cam
, int frame
)
532 struct mcam_vb_buffer
*buf
;
533 struct v4l2_pix_format
*fmt
= &cam
->pix_format
;
534 dma_addr_t dma_handle
;
535 u32 pixel_count
= fmt
->width
* fmt
->height
;
536 struct vb2_buffer
*vb
;
539 * If there are no available buffers, go into single mode
541 if (list_empty(&cam
->buffers
)) {
542 buf
= cam
->vb_bufs
[frame
^ 0x1];
543 set_bit(CF_SINGLE_BUFFER
, &cam
->flags
);
544 cam
->frame_state
.singles
++;
547 * OK, we have a buffer we can use.
549 buf
= list_first_entry(&cam
->buffers
, struct mcam_vb_buffer
,
551 list_del_init(&buf
->queue
);
552 clear_bit(CF_SINGLE_BUFFER
, &cam
->flags
);
555 cam
->vb_bufs
[frame
] = buf
;
558 dma_handle
= vb2_dma_contig_plane_dma_addr(vb
, 0);
559 buf
->yuv_p
.y
= dma_handle
;
561 switch (cam
->pix_format
.pixelformat
) {
562 case V4L2_PIX_FMT_YUV422P
:
563 buf
->yuv_p
.u
= buf
->yuv_p
.y
+ pixel_count
;
564 buf
->yuv_p
.v
= buf
->yuv_p
.u
+ pixel_count
/ 2;
566 case V4L2_PIX_FMT_YUV420
:
567 buf
->yuv_p
.u
= buf
->yuv_p
.y
+ pixel_count
;
568 buf
->yuv_p
.v
= buf
->yuv_p
.u
+ pixel_count
/ 4;
570 case V4L2_PIX_FMT_YVU420
:
571 buf
->yuv_p
.v
= buf
->yuv_p
.y
+ pixel_count
;
572 buf
->yuv_p
.u
= buf
->yuv_p
.v
+ pixel_count
/ 4;
578 mcam_reg_write(cam
, frame
== 0 ? REG_Y0BAR
: REG_Y1BAR
, buf
->yuv_p
.y
);
579 if (mcam_fmt_is_planar(fmt
->pixelformat
)) {
580 mcam_reg_write(cam
, frame
== 0 ?
581 REG_U0BAR
: REG_U1BAR
, buf
->yuv_p
.u
);
582 mcam_reg_write(cam
, frame
== 0 ?
583 REG_V0BAR
: REG_V1BAR
, buf
->yuv_p
.v
);
588 * Initial B_DMA_contig setup.
590 static void mcam_ctlr_dma_contig(struct mcam_camera
*cam
)
592 mcam_reg_set_bit(cam
, REG_CTRL1
, C1_TWOBUFS
);
594 mcam_set_contig_buffer(cam
, 0);
595 mcam_set_contig_buffer(cam
, 1);
599 * Frame completion handling.
601 static void mcam_dma_contig_done(struct mcam_camera
*cam
, int frame
)
603 struct mcam_vb_buffer
*buf
= cam
->vb_bufs
[frame
];
605 if (!test_bit(CF_SINGLE_BUFFER
, &cam
->flags
)) {
606 cam
->frame_state
.delivered
++;
607 mcam_buffer_done(cam
, frame
, &buf
->vb_buf
);
609 mcam_set_contig_buffer(cam
, frame
);
612 #endif /* MCAM_MODE_DMA_CONTIG */
614 #ifdef MCAM_MODE_DMA_SG
615 /* ---------------------------------------------------------------------- */
617 * Scatter/gather-specific code.
621 * Set up the next buffer for S/G I/O; caller should be sure that
622 * the controller is stopped and a buffer is available.
624 static void mcam_sg_next_buffer(struct mcam_camera
*cam
)
626 struct mcam_vb_buffer
*buf
;
628 buf
= list_first_entry(&cam
->buffers
, struct mcam_vb_buffer
, queue
);
629 list_del_init(&buf
->queue
);
631 * Very Bad Not Good Things happen if you don't clear
632 * C1_DESC_ENA before making any descriptor changes.
634 mcam_reg_clear_bit(cam
, REG_CTRL1
, C1_DESC_ENA
);
635 mcam_reg_write(cam
, REG_DMA_DESC_Y
, buf
->dma_desc_pa
);
636 mcam_reg_write(cam
, REG_DESC_LEN_Y
,
637 buf
->dma_desc_nent
*sizeof(struct mcam_dma_desc
));
638 mcam_reg_write(cam
, REG_DESC_LEN_U
, 0);
639 mcam_reg_write(cam
, REG_DESC_LEN_V
, 0);
640 mcam_reg_set_bit(cam
, REG_CTRL1
, C1_DESC_ENA
);
641 cam
->vb_bufs
[0] = buf
;
645 * Initial B_DMA_sg setup
647 static void mcam_ctlr_dma_sg(struct mcam_camera
*cam
)
650 * The list-empty condition can hit us at resume time
651 * if the buffer list was empty when the system was suspended.
653 if (list_empty(&cam
->buffers
)) {
654 set_bit(CF_SG_RESTART
, &cam
->flags
);
658 mcam_reg_clear_bit(cam
, REG_CTRL1
, C1_DESC_3WORD
);
659 mcam_sg_next_buffer(cam
);
665 * Frame completion with S/G is trickier. We can't muck with
666 * a descriptor chain on the fly, since the controller buffers it
667 * internally. So we have to actually stop and restart; Marvell
668 * says this is the way to do it.
670 * Of course, stopping is easier said than done; experience shows
671 * that the controller can start a frame *after* C0_ENABLE has been
672 * cleared. So when running in S/G mode, the controller is "stopped"
673 * on receipt of the start-of-frame interrupt. That means we can
674 * safely change the DMA descriptor array here and restart things
675 * (assuming there's another buffer waiting to go).
677 static void mcam_dma_sg_done(struct mcam_camera
*cam
, int frame
)
679 struct mcam_vb_buffer
*buf
= cam
->vb_bufs
[0];
682 * If we're no longer supposed to be streaming, don't do anything.
684 if (cam
->state
!= S_STREAMING
)
687 * If we have another buffer available, put it in and
688 * restart the engine.
690 if (!list_empty(&cam
->buffers
)) {
691 mcam_sg_next_buffer(cam
);
692 mcam_ctlr_start(cam
);
694 * Otherwise set CF_SG_RESTART and the controller will
695 * be restarted once another buffer shows up.
698 set_bit(CF_SG_RESTART
, &cam
->flags
);
699 cam
->frame_state
.singles
++;
700 cam
->vb_bufs
[0] = NULL
;
703 * Now we can give the completed frame back to user space.
705 cam
->frame_state
.delivered
++;
706 mcam_buffer_done(cam
, frame
, &buf
->vb_buf
);
711 * Scatter/gather mode requires stopping the controller between
712 * frames so we can put in a new DMA descriptor array. If no new
713 * buffer exists at frame completion, the controller is left stopped;
714 * this function is charged with gettig things going again.
716 static void mcam_sg_restart(struct mcam_camera
*cam
)
718 mcam_ctlr_dma_sg(cam
);
719 mcam_ctlr_start(cam
);
720 clear_bit(CF_SG_RESTART
, &cam
->flags
);
723 #else /* MCAM_MODE_DMA_SG */
725 static inline void mcam_sg_restart(struct mcam_camera
*cam
)
730 #endif /* MCAM_MODE_DMA_SG */
732 /* ---------------------------------------------------------------------- */
734 * Buffer-mode-independent controller code.
740 static void mcam_ctlr_image(struct mcam_camera
*cam
)
742 struct v4l2_pix_format
*fmt
= &cam
->pix_format
;
743 u32 widthy
= 0, widthuv
= 0, imgsz_h
, imgsz_w
;
745 cam_dbg(cam
, "camera: bytesperline = %d; height = %d\n",
746 fmt
->bytesperline
, fmt
->sizeimage
/ fmt
->bytesperline
);
747 imgsz_h
= (fmt
->height
<< IMGSZ_V_SHIFT
) & IMGSZ_V_MASK
;
748 imgsz_w
= (fmt
->width
* 2) & IMGSZ_H_MASK
;
750 switch (fmt
->pixelformat
) {
751 case V4L2_PIX_FMT_YUYV
:
752 case V4L2_PIX_FMT_UYVY
:
753 widthy
= fmt
->width
* 2;
756 case V4L2_PIX_FMT_JPEG
:
757 imgsz_h
= (fmt
->sizeimage
/ fmt
->bytesperline
) << IMGSZ_V_SHIFT
;
758 widthy
= fmt
->bytesperline
;
761 case V4L2_PIX_FMT_YUV422P
:
762 case V4L2_PIX_FMT_YUV420
:
763 case V4L2_PIX_FMT_YVU420
:
765 widthuv
= fmt
->width
/ 2;
768 widthy
= fmt
->bytesperline
;
772 mcam_reg_write_mask(cam
, REG_IMGPITCH
, widthuv
<< 16 | widthy
,
773 IMGP_YP_MASK
| IMGP_UVP_MASK
);
774 mcam_reg_write(cam
, REG_IMGSIZE
, imgsz_h
| imgsz_w
);
775 mcam_reg_write(cam
, REG_IMGOFFSET
, 0x0);
778 * Tell the controller about the image format we are using.
780 switch (fmt
->pixelformat
) {
781 case V4L2_PIX_FMT_YUV422P
:
782 mcam_reg_write_mask(cam
, REG_CTRL0
,
783 C0_DF_YUV
| C0_YUV_PLANAR
| C0_YUVE_YVYU
, C0_DF_MASK
);
785 case V4L2_PIX_FMT_YUV420
:
786 case V4L2_PIX_FMT_YVU420
:
787 mcam_reg_write_mask(cam
, REG_CTRL0
,
788 C0_DF_YUV
| C0_YUV_420PL
| C0_YUVE_YVYU
, C0_DF_MASK
);
790 case V4L2_PIX_FMT_YUYV
:
791 mcam_reg_write_mask(cam
, REG_CTRL0
,
792 C0_DF_YUV
| C0_YUV_PACKED
| C0_YUVE_UYVY
, C0_DF_MASK
);
794 case V4L2_PIX_FMT_UYVY
:
795 mcam_reg_write_mask(cam
, REG_CTRL0
,
796 C0_DF_YUV
| C0_YUV_PACKED
| C0_YUVE_YUYV
, C0_DF_MASK
);
798 case V4L2_PIX_FMT_JPEG
:
799 mcam_reg_write_mask(cam
, REG_CTRL0
,
800 C0_DF_YUV
| C0_YUV_PACKED
| C0_YUVE_YUYV
, C0_DF_MASK
);
802 case V4L2_PIX_FMT_RGB444
:
803 mcam_reg_write_mask(cam
, REG_CTRL0
,
804 C0_DF_RGB
| C0_RGBF_444
| C0_RGB4_XRGB
, C0_DF_MASK
);
807 case V4L2_PIX_FMT_RGB565
:
808 mcam_reg_write_mask(cam
, REG_CTRL0
,
809 C0_DF_RGB
| C0_RGBF_565
| C0_RGB5_BGGR
, C0_DF_MASK
);
812 cam_err(cam
, "camera: unknown format: %#x\n", fmt
->pixelformat
);
817 * Make sure it knows we want to use hsync/vsync.
819 mcam_reg_write_mask(cam
, REG_CTRL0
, C0_SIF_HVSYNC
, C0_SIFM_MASK
);
821 * This field controls the generation of EOF(DVP only)
823 if (cam
->bus_type
!= V4L2_MBUS_CSI2
)
824 mcam_reg_set_bit(cam
, REG_CTRL0
,
825 C0_EOF_VSYNC
| C0_VEDGE_CTRL
);
830 * Configure the controller for operation; caller holds the
833 static int mcam_ctlr_configure(struct mcam_camera
*cam
)
837 spin_lock_irqsave(&cam
->dev_lock
, flags
);
838 clear_bit(CF_SG_RESTART
, &cam
->flags
);
840 mcam_ctlr_image(cam
);
841 mcam_set_config_needed(cam
, 0);
842 spin_unlock_irqrestore(&cam
->dev_lock
, flags
);
846 static void mcam_ctlr_irq_enable(struct mcam_camera
*cam
)
849 * Clear any pending interrupts, since we do not
850 * expect to have I/O active prior to enabling.
852 mcam_reg_write(cam
, REG_IRQSTAT
, FRAMEIRQS
);
853 mcam_reg_set_bit(cam
, REG_IRQMASK
, FRAMEIRQS
);
856 static void mcam_ctlr_irq_disable(struct mcam_camera
*cam
)
858 mcam_reg_clear_bit(cam
, REG_IRQMASK
, FRAMEIRQS
);
863 static void mcam_ctlr_init(struct mcam_camera
*cam
)
867 spin_lock_irqsave(&cam
->dev_lock
, flags
);
869 * Make sure it's not powered down.
871 mcam_reg_clear_bit(cam
, REG_CTRL1
, C1_PWRDWN
);
873 * Turn off the enable bit. It sure should be off anyway,
874 * but it's good to be sure.
876 mcam_reg_clear_bit(cam
, REG_CTRL0
, C0_ENABLE
);
878 * Clock the sensor appropriately. Controller clock should
879 * be 48MHz, sensor "typical" value is half that.
881 mcam_reg_write_mask(cam
, REG_CLKCTRL
, 2, CLK_DIV_MASK
);
882 spin_unlock_irqrestore(&cam
->dev_lock
, flags
);
887 * Stop the controller, and don't return until we're really sure that no
888 * further DMA is going on.
890 static void mcam_ctlr_stop_dma(struct mcam_camera
*cam
)
895 * Theory: stop the camera controller (whether it is operating
896 * or not). Delay briefly just in case we race with the SOF
897 * interrupt, then wait until no DMA is active.
899 spin_lock_irqsave(&cam
->dev_lock
, flags
);
900 clear_bit(CF_SG_RESTART
, &cam
->flags
);
903 spin_unlock_irqrestore(&cam
->dev_lock
, flags
);
905 * This is a brutally long sleep, but experience shows that
906 * it can take the controller a while to get the message that
907 * it needs to stop grabbing frames. In particular, we can
908 * sometimes (on mmp) get a frame at the end WITHOUT the
909 * start-of-frame indication.
912 if (test_bit(CF_DMA_ACTIVE
, &cam
->flags
))
913 cam_err(cam
, "Timeout waiting for DMA to end\n");
914 /* This would be bad news - what now? */
915 spin_lock_irqsave(&cam
->dev_lock
, flags
);
916 mcam_ctlr_irq_disable(cam
);
917 spin_unlock_irqrestore(&cam
->dev_lock
, flags
);
923 static int mcam_ctlr_power_up(struct mcam_camera
*cam
)
928 spin_lock_irqsave(&cam
->dev_lock
, flags
);
929 ret
= cam
->plat_power_up(cam
);
931 spin_unlock_irqrestore(&cam
->dev_lock
, flags
);
934 mcam_reg_clear_bit(cam
, REG_CTRL1
, C1_PWRDWN
);
935 spin_unlock_irqrestore(&cam
->dev_lock
, flags
);
936 msleep(5); /* Just to be sure */
940 static void mcam_ctlr_power_down(struct mcam_camera
*cam
)
944 spin_lock_irqsave(&cam
->dev_lock
, flags
);
946 * School of hard knocks department: be sure we do any register
947 * twiddling on the controller *before* calling the platform
948 * power down routine.
950 mcam_reg_set_bit(cam
, REG_CTRL1
, C1_PWRDWN
);
951 cam
->plat_power_down(cam
);
952 spin_unlock_irqrestore(&cam
->dev_lock
, flags
);
955 /* -------------------------------------------------------------------- */
957 * Communications with the sensor.
960 static int __mcam_cam_reset(struct mcam_camera
*cam
)
962 return sensor_call(cam
, core
, reset
, 0);
966 * We have found the sensor on the i2c. Let's try to have a
969 static int mcam_cam_init(struct mcam_camera
*cam
)
973 mutex_lock(&cam
->s_mutex
);
974 if (cam
->state
!= S_NOTREADY
)
975 cam_warn(cam
, "Cam init with device in funky state %d",
977 ret
= __mcam_cam_reset(cam
);
978 /* Get/set parameters? */
980 mcam_ctlr_power_down(cam
);
981 mutex_unlock(&cam
->s_mutex
);
986 * Configure the sensor to match the parameters we have. Caller should
989 static int mcam_cam_set_flip(struct mcam_camera
*cam
)
991 struct v4l2_control ctrl
;
993 memset(&ctrl
, 0, sizeof(ctrl
));
994 ctrl
.id
= V4L2_CID_VFLIP
;
996 return sensor_call(cam
, core
, s_ctrl
, &ctrl
);
1000 static int mcam_cam_configure(struct mcam_camera
*cam
)
1002 struct v4l2_mbus_framefmt mbus_fmt
;
1005 v4l2_fill_mbus_format(&mbus_fmt
, &cam
->pix_format
, cam
->mbus_code
);
1006 ret
= sensor_call(cam
, core
, init
, 0);
1008 ret
= sensor_call(cam
, video
, s_mbus_fmt
, &mbus_fmt
);
1010 * OV7670 does weird things if flip is set *before* format...
1012 ret
+= mcam_cam_set_flip(cam
);
1017 * Get everything ready, and start grabbing frames.
1019 static int mcam_read_setup(struct mcam_camera
*cam
)
1022 unsigned long flags
;
1025 * Configuration. If we still don't have DMA buffers,
1026 * make one last, desperate attempt.
1028 if (cam
->buffer_mode
== B_vmalloc
&& cam
->nbufs
== 0 &&
1029 mcam_alloc_dma_bufs(cam
, 0))
1032 if (mcam_needs_config(cam
)) {
1033 mcam_cam_configure(cam
);
1034 ret
= mcam_ctlr_configure(cam
);
1042 spin_lock_irqsave(&cam
->dev_lock
, flags
);
1043 clear_bit(CF_DMA_ACTIVE
, &cam
->flags
);
1044 mcam_reset_buffers(cam
);
1046 * Update CSI2_DPHY value
1049 cam
->calc_dphy(cam
);
1050 cam_dbg(cam
, "camera: DPHY sets: dphy3=0x%x, dphy5=0x%x, dphy6=0x%x\n",
1051 cam
->dphy
[0], cam
->dphy
[1], cam
->dphy
[2]);
1052 if (cam
->bus_type
== V4L2_MBUS_CSI2
)
1053 mcam_enable_mipi(cam
);
1055 mcam_disable_mipi(cam
);
1056 mcam_ctlr_irq_enable(cam
);
1057 cam
->state
= S_STREAMING
;
1058 if (!test_bit(CF_SG_RESTART
, &cam
->flags
))
1059 mcam_ctlr_start(cam
);
1060 spin_unlock_irqrestore(&cam
->dev_lock
, flags
);
1064 /* ----------------------------------------------------------------------- */
1066 * Videobuf2 interface code.
1069 static int mcam_vb_queue_setup(struct vb2_queue
*vq
,
1070 const struct v4l2_format
*fmt
, unsigned int *nbufs
,
1071 unsigned int *num_planes
, unsigned int sizes
[],
1074 struct mcam_camera
*cam
= vb2_get_drv_priv(vq
);
1075 int minbufs
= (cam
->buffer_mode
== B_DMA_contig
) ? 3 : 2;
1077 sizes
[0] = cam
->pix_format
.sizeimage
;
1078 *num_planes
= 1; /* Someday we have to support planar formats... */
1079 if (*nbufs
< minbufs
)
1081 if (cam
->buffer_mode
== B_DMA_contig
)
1082 alloc_ctxs
[0] = cam
->vb_alloc_ctx
;
1083 else if (cam
->buffer_mode
== B_DMA_sg
)
1084 alloc_ctxs
[0] = cam
->vb_alloc_ctx_sg
;
1089 static void mcam_vb_buf_queue(struct vb2_buffer
*vb
)
1091 struct mcam_vb_buffer
*mvb
= vb_to_mvb(vb
);
1092 struct mcam_camera
*cam
= vb2_get_drv_priv(vb
->vb2_queue
);
1093 unsigned long flags
;
1096 spin_lock_irqsave(&cam
->dev_lock
, flags
);
1097 start
= (cam
->state
== S_BUFWAIT
) && !list_empty(&cam
->buffers
);
1098 list_add(&mvb
->queue
, &cam
->buffers
);
1099 if (cam
->state
== S_STREAMING
&& test_bit(CF_SG_RESTART
, &cam
->flags
))
1100 mcam_sg_restart(cam
);
1101 spin_unlock_irqrestore(&cam
->dev_lock
, flags
);
1103 mcam_read_setup(cam
);
1107 * These need to be called with the mutex held from vb2
1109 static int mcam_vb_start_streaming(struct vb2_queue
*vq
, unsigned int count
)
1111 struct mcam_camera
*cam
= vb2_get_drv_priv(vq
);
1114 if (cam
->state
!= S_IDLE
) {
1115 INIT_LIST_HEAD(&cam
->buffers
);
1120 * Videobuf2 sneakily hoards all the buffers and won't
1121 * give them to us until *after* streaming starts. But
1122 * we can't actually start streaming until we have a
1123 * destination. So go into a wait state and hope they
1124 * give us buffers soon.
1126 if (cam
->buffer_mode
!= B_vmalloc
&& list_empty(&cam
->buffers
)) {
1127 cam
->state
= S_BUFWAIT
;
1132 * Ensure clear the left over frame flags
1133 * before every really start streaming
1135 for (frame
= 0; frame
< cam
->nbufs
; frame
++)
1136 clear_bit(CF_FRAME_SOF0
+ frame
, &cam
->flags
);
1138 return mcam_read_setup(cam
);
1141 static void mcam_vb_stop_streaming(struct vb2_queue
*vq
)
1143 struct mcam_camera
*cam
= vb2_get_drv_priv(vq
);
1144 unsigned long flags
;
1146 if (cam
->state
== S_BUFWAIT
) {
1147 /* They never gave us buffers */
1148 cam
->state
= S_IDLE
;
1151 if (cam
->state
!= S_STREAMING
)
1153 mcam_ctlr_stop_dma(cam
);
1155 * Reset the CCIC PHY after stopping streaming,
1156 * otherwise, the CCIC may be unstable.
1158 if (cam
->ctlr_reset
)
1159 cam
->ctlr_reset(cam
);
1161 * VB2 reclaims the buffers, so we need to forget
1164 spin_lock_irqsave(&cam
->dev_lock
, flags
);
1165 INIT_LIST_HEAD(&cam
->buffers
);
1166 spin_unlock_irqrestore(&cam
->dev_lock
, flags
);
1170 static const struct vb2_ops mcam_vb2_ops
= {
1171 .queue_setup
= mcam_vb_queue_setup
,
1172 .buf_queue
= mcam_vb_buf_queue
,
1173 .start_streaming
= mcam_vb_start_streaming
,
1174 .stop_streaming
= mcam_vb_stop_streaming
,
1175 .wait_prepare
= vb2_ops_wait_prepare
,
1176 .wait_finish
= vb2_ops_wait_finish
,
1180 #ifdef MCAM_MODE_DMA_SG
1182 * Scatter/gather mode uses all of the above functions plus a
1183 * few extras to deal with DMA mapping.
1185 static int mcam_vb_sg_buf_init(struct vb2_buffer
*vb
)
1187 struct mcam_vb_buffer
*mvb
= vb_to_mvb(vb
);
1188 struct mcam_camera
*cam
= vb2_get_drv_priv(vb
->vb2_queue
);
1189 int ndesc
= cam
->pix_format
.sizeimage
/PAGE_SIZE
+ 1;
1191 mvb
->dma_desc
= dma_alloc_coherent(cam
->dev
,
1192 ndesc
* sizeof(struct mcam_dma_desc
),
1193 &mvb
->dma_desc_pa
, GFP_KERNEL
);
1194 if (mvb
->dma_desc
== NULL
) {
1195 cam_err(cam
, "Unable to get DMA descriptor array\n");
1201 static int mcam_vb_sg_buf_prepare(struct vb2_buffer
*vb
)
1203 struct mcam_vb_buffer
*mvb
= vb_to_mvb(vb
);
1204 struct sg_table
*sg_table
= vb2_dma_sg_plane_desc(vb
, 0);
1205 struct mcam_dma_desc
*desc
= mvb
->dma_desc
;
1206 struct scatterlist
*sg
;
1209 for_each_sg(sg_table
->sgl
, sg
, sg_table
->nents
, i
) {
1210 desc
->dma_addr
= sg_dma_address(sg
);
1211 desc
->segment_len
= sg_dma_len(sg
);
1217 static void mcam_vb_sg_buf_cleanup(struct vb2_buffer
*vb
)
1219 struct mcam_camera
*cam
= vb2_get_drv_priv(vb
->vb2_queue
);
1220 struct mcam_vb_buffer
*mvb
= vb_to_mvb(vb
);
1221 int ndesc
= cam
->pix_format
.sizeimage
/PAGE_SIZE
+ 1;
1223 dma_free_coherent(cam
->dev
, ndesc
* sizeof(struct mcam_dma_desc
),
1224 mvb
->dma_desc
, mvb
->dma_desc_pa
);
1228 static const struct vb2_ops mcam_vb2_sg_ops
= {
1229 .queue_setup
= mcam_vb_queue_setup
,
1230 .buf_init
= mcam_vb_sg_buf_init
,
1231 .buf_prepare
= mcam_vb_sg_buf_prepare
,
1232 .buf_queue
= mcam_vb_buf_queue
,
1233 .buf_cleanup
= mcam_vb_sg_buf_cleanup
,
1234 .start_streaming
= mcam_vb_start_streaming
,
1235 .stop_streaming
= mcam_vb_stop_streaming
,
1236 .wait_prepare
= vb2_ops_wait_prepare
,
1237 .wait_finish
= vb2_ops_wait_finish
,
1240 #endif /* MCAM_MODE_DMA_SG */
1242 static int mcam_setup_vb2(struct mcam_camera
*cam
)
1244 struct vb2_queue
*vq
= &cam
->vb_queue
;
1246 memset(vq
, 0, sizeof(*vq
));
1247 vq
->type
= V4L2_BUF_TYPE_VIDEO_CAPTURE
;
1249 vq
->lock
= &cam
->s_mutex
;
1250 vq
->timestamp_flags
= V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC
;
1251 INIT_LIST_HEAD(&cam
->buffers
);
1252 switch (cam
->buffer_mode
) {
1254 #ifdef MCAM_MODE_DMA_CONTIG
1255 vq
->ops
= &mcam_vb2_ops
;
1256 vq
->mem_ops
= &vb2_dma_contig_memops
;
1257 vq
->buf_struct_size
= sizeof(struct mcam_vb_buffer
);
1258 vq
->io_modes
= VB2_MMAP
| VB2_USERPTR
;
1259 cam
->dma_setup
= mcam_ctlr_dma_contig
;
1260 cam
->frame_complete
= mcam_dma_contig_done
;
1261 cam
->vb_alloc_ctx
= vb2_dma_contig_init_ctx(cam
->dev
);
1262 if (IS_ERR(cam
->vb_alloc_ctx
))
1263 return PTR_ERR(cam
->vb_alloc_ctx
);
1267 #ifdef MCAM_MODE_DMA_SG
1268 vq
->ops
= &mcam_vb2_sg_ops
;
1269 vq
->mem_ops
= &vb2_dma_sg_memops
;
1270 vq
->buf_struct_size
= sizeof(struct mcam_vb_buffer
);
1271 vq
->io_modes
= VB2_MMAP
| VB2_USERPTR
;
1272 cam
->dma_setup
= mcam_ctlr_dma_sg
;
1273 cam
->frame_complete
= mcam_dma_sg_done
;
1274 cam
->vb_alloc_ctx_sg
= vb2_dma_sg_init_ctx(cam
->dev
);
1275 if (IS_ERR(cam
->vb_alloc_ctx_sg
))
1276 return PTR_ERR(cam
->vb_alloc_ctx_sg
);
1280 #ifdef MCAM_MODE_VMALLOC
1281 tasklet_init(&cam
->s_tasklet
, mcam_frame_tasklet
,
1282 (unsigned long) cam
);
1283 vq
->ops
= &mcam_vb2_ops
;
1284 vq
->mem_ops
= &vb2_vmalloc_memops
;
1285 vq
->buf_struct_size
= sizeof(struct mcam_vb_buffer
);
1286 vq
->io_modes
= VB2_MMAP
;
1287 cam
->dma_setup
= mcam_ctlr_dma_vmalloc
;
1288 cam
->frame_complete
= mcam_vmalloc_done
;
1292 return vb2_queue_init(vq
);
1295 static void mcam_cleanup_vb2(struct mcam_camera
*cam
)
1297 vb2_queue_release(&cam
->vb_queue
);
1298 #ifdef MCAM_MODE_DMA_CONTIG
1299 if (cam
->buffer_mode
== B_DMA_contig
)
1300 vb2_dma_contig_cleanup_ctx(cam
->vb_alloc_ctx
);
1302 #ifdef MCAM_MODE_DMA_SG
1303 if (cam
->buffer_mode
== B_DMA_sg
)
1304 vb2_dma_sg_cleanup_ctx(cam
->vb_alloc_ctx_sg
);
1309 /* ---------------------------------------------------------------------- */
1311 * The long list of V4L2 ioctl() operations.
1314 static int mcam_vidioc_streamon(struct file
*filp
, void *priv
,
1315 enum v4l2_buf_type type
)
1317 struct mcam_camera
*cam
= video_drvdata(filp
);
1320 mutex_lock(&cam
->s_mutex
);
1321 ret
= vb2_streamon(&cam
->vb_queue
, type
);
1322 mutex_unlock(&cam
->s_mutex
);
1327 static int mcam_vidioc_streamoff(struct file
*filp
, void *priv
,
1328 enum v4l2_buf_type type
)
1330 struct mcam_camera
*cam
= video_drvdata(filp
);
1333 mutex_lock(&cam
->s_mutex
);
1334 ret
= vb2_streamoff(&cam
->vb_queue
, type
);
1335 mutex_unlock(&cam
->s_mutex
);
1340 static int mcam_vidioc_reqbufs(struct file
*filp
, void *priv
,
1341 struct v4l2_requestbuffers
*req
)
1343 struct mcam_camera
*cam
= video_drvdata(filp
);
1346 mutex_lock(&cam
->s_mutex
);
1347 ret
= vb2_reqbufs(&cam
->vb_queue
, req
);
1348 mutex_unlock(&cam
->s_mutex
);
1353 static int mcam_vidioc_querybuf(struct file
*filp
, void *priv
,
1354 struct v4l2_buffer
*buf
)
1356 struct mcam_camera
*cam
= video_drvdata(filp
);
1359 mutex_lock(&cam
->s_mutex
);
1360 ret
= vb2_querybuf(&cam
->vb_queue
, buf
);
1361 mutex_unlock(&cam
->s_mutex
);
1365 static int mcam_vidioc_qbuf(struct file
*filp
, void *priv
,
1366 struct v4l2_buffer
*buf
)
1368 struct mcam_camera
*cam
= video_drvdata(filp
);
1371 mutex_lock(&cam
->s_mutex
);
1372 ret
= vb2_qbuf(&cam
->vb_queue
, buf
);
1373 mutex_unlock(&cam
->s_mutex
);
1377 static int mcam_vidioc_dqbuf(struct file
*filp
, void *priv
,
1378 struct v4l2_buffer
*buf
)
1380 struct mcam_camera
*cam
= video_drvdata(filp
);
1383 mutex_lock(&cam
->s_mutex
);
1384 ret
= vb2_dqbuf(&cam
->vb_queue
, buf
, filp
->f_flags
& O_NONBLOCK
);
1385 mutex_unlock(&cam
->s_mutex
);
1389 static int mcam_vidioc_querycap(struct file
*file
, void *priv
,
1390 struct v4l2_capability
*cap
)
1392 struct mcam_camera
*cam
= video_drvdata(file
);
1394 strcpy(cap
->driver
, "marvell_ccic");
1395 strcpy(cap
->card
, "marvell_ccic");
1396 strlcpy(cap
->bus_info
, cam
->bus_info
, sizeof(cap
->bus_info
));
1397 cap
->device_caps
= V4L2_CAP_VIDEO_CAPTURE
|
1398 V4L2_CAP_READWRITE
| V4L2_CAP_STREAMING
;
1399 cap
->capabilities
= cap
->device_caps
| V4L2_CAP_DEVICE_CAPS
;
1404 static int mcam_vidioc_enum_fmt_vid_cap(struct file
*filp
,
1405 void *priv
, struct v4l2_fmtdesc
*fmt
)
1407 if (fmt
->index
>= N_MCAM_FMTS
)
1409 strlcpy(fmt
->description
, mcam_formats
[fmt
->index
].desc
,
1410 sizeof(fmt
->description
));
1411 fmt
->pixelformat
= mcam_formats
[fmt
->index
].pixelformat
;
1415 static int mcam_vidioc_try_fmt_vid_cap(struct file
*filp
, void *priv
,
1416 struct v4l2_format
*fmt
)
1418 struct mcam_camera
*cam
= video_drvdata(filp
);
1419 struct mcam_format_struct
*f
;
1420 struct v4l2_pix_format
*pix
= &fmt
->fmt
.pix
;
1421 struct v4l2_mbus_framefmt mbus_fmt
;
1424 f
= mcam_find_format(pix
->pixelformat
);
1425 pix
->pixelformat
= f
->pixelformat
;
1426 v4l2_fill_mbus_format(&mbus_fmt
, pix
, f
->mbus_code
);
1427 mutex_lock(&cam
->s_mutex
);
1428 ret
= sensor_call(cam
, video
, try_mbus_fmt
, &mbus_fmt
);
1429 mutex_unlock(&cam
->s_mutex
);
1430 v4l2_fill_pix_format(pix
, &mbus_fmt
);
1431 switch (f
->pixelformat
) {
1432 case V4L2_PIX_FMT_YUV420
:
1433 case V4L2_PIX_FMT_YVU420
:
1434 pix
->bytesperline
= pix
->width
* 3 / 2;
1437 pix
->bytesperline
= pix
->width
* f
->bpp
;
1440 pix
->sizeimage
= pix
->height
* pix
->bytesperline
;
1441 pix
->colorspace
= V4L2_COLORSPACE_SRGB
;
1445 static int mcam_vidioc_s_fmt_vid_cap(struct file
*filp
, void *priv
,
1446 struct v4l2_format
*fmt
)
1448 struct mcam_camera
*cam
= video_drvdata(filp
);
1449 struct mcam_format_struct
*f
;
1453 * Can't do anything if the device is not idle
1454 * Also can't if there are streaming buffers in place.
1456 if (cam
->state
!= S_IDLE
|| cam
->vb_queue
.num_buffers
> 0)
1459 f
= mcam_find_format(fmt
->fmt
.pix
.pixelformat
);
1462 * See if the formatting works in principle.
1464 ret
= mcam_vidioc_try_fmt_vid_cap(filp
, priv
, fmt
);
1468 * Now we start to change things for real, so let's do it
1471 mutex_lock(&cam
->s_mutex
);
1472 cam
->pix_format
= fmt
->fmt
.pix
;
1473 cam
->mbus_code
= f
->mbus_code
;
1476 * Make sure we have appropriate DMA buffers.
1478 if (cam
->buffer_mode
== B_vmalloc
) {
1479 ret
= mcam_check_dma_buffers(cam
);
1483 mcam_set_config_needed(cam
, 1);
1485 mutex_unlock(&cam
->s_mutex
);
1490 * Return our stored notion of how the camera is/should be configured.
1491 * The V4l2 spec wants us to be smarter, and actually get this from
1492 * the camera (and not mess with it at open time). Someday.
1494 static int mcam_vidioc_g_fmt_vid_cap(struct file
*filp
, void *priv
,
1495 struct v4l2_format
*f
)
1497 struct mcam_camera
*cam
= video_drvdata(filp
);
1499 f
->fmt
.pix
= cam
->pix_format
;
1504 * We only have one input - the sensor - so minimize the nonsense here.
1506 static int mcam_vidioc_enum_input(struct file
*filp
, void *priv
,
1507 struct v4l2_input
*input
)
1509 if (input
->index
!= 0)
1512 input
->type
= V4L2_INPUT_TYPE_CAMERA
;
1513 strcpy(input
->name
, "Camera");
1517 static int mcam_vidioc_g_input(struct file
*filp
, void *priv
, unsigned int *i
)
1523 static int mcam_vidioc_s_input(struct file
*filp
, void *priv
, unsigned int i
)
1531 * G/S_PARM. Most of this is done by the sensor, but we are
1532 * the level which controls the number of read buffers.
1534 static int mcam_vidioc_g_parm(struct file
*filp
, void *priv
,
1535 struct v4l2_streamparm
*parms
)
1537 struct mcam_camera
*cam
= video_drvdata(filp
);
1540 mutex_lock(&cam
->s_mutex
);
1541 ret
= sensor_call(cam
, video
, g_parm
, parms
);
1542 mutex_unlock(&cam
->s_mutex
);
1543 parms
->parm
.capture
.readbuffers
= n_dma_bufs
;
1547 static int mcam_vidioc_s_parm(struct file
*filp
, void *priv
,
1548 struct v4l2_streamparm
*parms
)
1550 struct mcam_camera
*cam
= video_drvdata(filp
);
1553 mutex_lock(&cam
->s_mutex
);
1554 ret
= sensor_call(cam
, video
, s_parm
, parms
);
1555 mutex_unlock(&cam
->s_mutex
);
1556 parms
->parm
.capture
.readbuffers
= n_dma_bufs
;
1560 static int mcam_vidioc_enum_framesizes(struct file
*filp
, void *priv
,
1561 struct v4l2_frmsizeenum
*sizes
)
1563 struct mcam_camera
*cam
= video_drvdata(filp
);
1564 struct mcam_format_struct
*f
;
1565 struct v4l2_subdev_frame_size_enum fse
= {
1566 .index
= sizes
->index
,
1567 .which
= V4L2_SUBDEV_FORMAT_ACTIVE
,
1571 f
= mcam_find_format(sizes
->pixel_format
);
1572 if (f
->pixelformat
!= sizes
->pixel_format
)
1574 fse
.code
= f
->mbus_code
;
1575 mutex_lock(&cam
->s_mutex
);
1576 ret
= sensor_call(cam
, pad
, enum_frame_size
, NULL
, &fse
);
1577 mutex_unlock(&cam
->s_mutex
);
1580 if (fse
.min_width
== fse
.max_width
&&
1581 fse
.min_height
== fse
.max_height
) {
1582 sizes
->type
= V4L2_FRMSIZE_TYPE_DISCRETE
;
1583 sizes
->discrete
.width
= fse
.min_width
;
1584 sizes
->discrete
.height
= fse
.min_height
;
1587 sizes
->type
= V4L2_FRMSIZE_TYPE_CONTINUOUS
;
1588 sizes
->stepwise
.min_width
= fse
.min_width
;
1589 sizes
->stepwise
.max_width
= fse
.max_width
;
1590 sizes
->stepwise
.min_height
= fse
.min_height
;
1591 sizes
->stepwise
.max_height
= fse
.max_height
;
1592 sizes
->stepwise
.step_width
= 1;
1593 sizes
->stepwise
.step_height
= 1;
1597 static int mcam_vidioc_enum_frameintervals(struct file
*filp
, void *priv
,
1598 struct v4l2_frmivalenum
*interval
)
1600 struct mcam_camera
*cam
= video_drvdata(filp
);
1601 struct mcam_format_struct
*f
;
1602 struct v4l2_subdev_frame_interval_enum fie
= {
1603 .index
= interval
->index
,
1604 .width
= interval
->width
,
1605 .height
= interval
->height
,
1606 .which
= V4L2_SUBDEV_FORMAT_ACTIVE
,
1610 f
= mcam_find_format(interval
->pixel_format
);
1611 if (f
->pixelformat
!= interval
->pixel_format
)
1613 fie
.code
= f
->mbus_code
;
1614 mutex_lock(&cam
->s_mutex
);
1615 ret
= sensor_call(cam
, pad
, enum_frame_interval
, NULL
, &fie
);
1616 mutex_unlock(&cam
->s_mutex
);
1619 interval
->type
= V4L2_FRMIVAL_TYPE_DISCRETE
;
1620 interval
->discrete
= fie
.interval
;
1624 #ifdef CONFIG_VIDEO_ADV_DEBUG
1625 static int mcam_vidioc_g_register(struct file
*file
, void *priv
,
1626 struct v4l2_dbg_register
*reg
)
1628 struct mcam_camera
*cam
= video_drvdata(file
);
1630 if (reg
->reg
> cam
->regs_size
- 4)
1632 reg
->val
= mcam_reg_read(cam
, reg
->reg
);
1637 static int mcam_vidioc_s_register(struct file
*file
, void *priv
,
1638 const struct v4l2_dbg_register
*reg
)
1640 struct mcam_camera
*cam
= video_drvdata(file
);
1642 if (reg
->reg
> cam
->regs_size
- 4)
1644 mcam_reg_write(cam
, reg
->reg
, reg
->val
);
1649 static const struct v4l2_ioctl_ops mcam_v4l_ioctl_ops
= {
1650 .vidioc_querycap
= mcam_vidioc_querycap
,
1651 .vidioc_enum_fmt_vid_cap
= mcam_vidioc_enum_fmt_vid_cap
,
1652 .vidioc_try_fmt_vid_cap
= mcam_vidioc_try_fmt_vid_cap
,
1653 .vidioc_s_fmt_vid_cap
= mcam_vidioc_s_fmt_vid_cap
,
1654 .vidioc_g_fmt_vid_cap
= mcam_vidioc_g_fmt_vid_cap
,
1655 .vidioc_enum_input
= mcam_vidioc_enum_input
,
1656 .vidioc_g_input
= mcam_vidioc_g_input
,
1657 .vidioc_s_input
= mcam_vidioc_s_input
,
1658 .vidioc_reqbufs
= mcam_vidioc_reqbufs
,
1659 .vidioc_querybuf
= mcam_vidioc_querybuf
,
1660 .vidioc_qbuf
= mcam_vidioc_qbuf
,
1661 .vidioc_dqbuf
= mcam_vidioc_dqbuf
,
1662 .vidioc_streamon
= mcam_vidioc_streamon
,
1663 .vidioc_streamoff
= mcam_vidioc_streamoff
,
1664 .vidioc_g_parm
= mcam_vidioc_g_parm
,
1665 .vidioc_s_parm
= mcam_vidioc_s_parm
,
1666 .vidioc_enum_framesizes
= mcam_vidioc_enum_framesizes
,
1667 .vidioc_enum_frameintervals
= mcam_vidioc_enum_frameintervals
,
1668 #ifdef CONFIG_VIDEO_ADV_DEBUG
1669 .vidioc_g_register
= mcam_vidioc_g_register
,
1670 .vidioc_s_register
= mcam_vidioc_s_register
,
1674 /* ---------------------------------------------------------------------- */
1676 * Our various file operations.
1678 static int mcam_v4l_open(struct file
*filp
)
1680 struct mcam_camera
*cam
= video_drvdata(filp
);
1681 int ret
= v4l2_fh_open(filp
);
1686 cam
->frame_state
.frames
= 0;
1687 cam
->frame_state
.singles
= 0;
1688 cam
->frame_state
.delivered
= 0;
1689 mutex_lock(&cam
->s_mutex
);
1690 if (cam
->users
== 0) {
1691 ret
= mcam_setup_vb2(cam
);
1694 ret
= mcam_ctlr_power_up(cam
);
1697 __mcam_cam_reset(cam
);
1698 mcam_set_config_needed(cam
, 1);
1702 mutex_unlock(&cam
->s_mutex
);
1704 v4l2_fh_release(filp
);
1709 static int mcam_v4l_release(struct file
*filp
)
1711 struct mcam_camera
*cam
= video_drvdata(filp
);
1713 cam_dbg(cam
, "Release, %d frames, %d singles, %d delivered\n",
1714 cam
->frame_state
.frames
, cam
->frame_state
.singles
,
1715 cam
->frame_state
.delivered
);
1716 mutex_lock(&cam
->s_mutex
);
1718 if (cam
->users
== 0) {
1719 mcam_ctlr_stop_dma(cam
);
1720 mcam_cleanup_vb2(cam
);
1721 mcam_disable_mipi(cam
);
1722 mcam_ctlr_power_down(cam
);
1723 if (cam
->buffer_mode
== B_vmalloc
&& alloc_bufs_at_read
)
1724 mcam_free_dma_bufs(cam
);
1727 mutex_unlock(&cam
->s_mutex
);
1728 v4l2_fh_release(filp
);
1732 static ssize_t
mcam_v4l_read(struct file
*filp
,
1733 char __user
*buffer
, size_t len
, loff_t
*pos
)
1735 struct mcam_camera
*cam
= video_drvdata(filp
);
1738 mutex_lock(&cam
->s_mutex
);
1739 ret
= vb2_read(&cam
->vb_queue
, buffer
, len
, pos
,
1740 filp
->f_flags
& O_NONBLOCK
);
1741 mutex_unlock(&cam
->s_mutex
);
1747 static unsigned int mcam_v4l_poll(struct file
*filp
,
1748 struct poll_table_struct
*pt
)
1750 struct mcam_camera
*cam
= video_drvdata(filp
);
1753 mutex_lock(&cam
->s_mutex
);
1754 ret
= vb2_poll(&cam
->vb_queue
, filp
, pt
);
1755 mutex_unlock(&cam
->s_mutex
);
1760 static int mcam_v4l_mmap(struct file
*filp
, struct vm_area_struct
*vma
)
1762 struct mcam_camera
*cam
= video_drvdata(filp
);
1765 mutex_lock(&cam
->s_mutex
);
1766 ret
= vb2_mmap(&cam
->vb_queue
, vma
);
1767 mutex_unlock(&cam
->s_mutex
);
1773 static const struct v4l2_file_operations mcam_v4l_fops
= {
1774 .owner
= THIS_MODULE
,
1775 .open
= mcam_v4l_open
,
1776 .release
= mcam_v4l_release
,
1777 .read
= mcam_v4l_read
,
1778 .poll
= mcam_v4l_poll
,
1779 .mmap
= mcam_v4l_mmap
,
1780 .unlocked_ioctl
= video_ioctl2
,
1785 * This template device holds all of those v4l2 methods; we
1786 * clone it for specific real devices.
1788 static struct video_device mcam_v4l_template
= {
1790 .tvnorms
= V4L2_STD_NTSC_M
,
1792 .fops
= &mcam_v4l_fops
,
1793 .ioctl_ops
= &mcam_v4l_ioctl_ops
,
1794 .release
= video_device_release_empty
,
1797 /* ---------------------------------------------------------------------- */
1799 * Interrupt handler stuff
1801 static void mcam_frame_complete(struct mcam_camera
*cam
, int frame
)
1804 * Basic frame housekeeping.
1806 set_bit(frame
, &cam
->flags
);
1807 clear_bit(CF_DMA_ACTIVE
, &cam
->flags
);
1808 cam
->next_buf
= frame
;
1809 cam
->buf_seq
[frame
] = ++(cam
->sequence
);
1810 cam
->frame_state
.frames
++;
1812 * "This should never happen"
1814 if (cam
->state
!= S_STREAMING
)
1817 * Process the frame and set up the next one.
1819 cam
->frame_complete(cam
, frame
);
1824 * The interrupt handler; this needs to be called from the
1825 * platform irq handler with the lock held.
1827 int mccic_irq(struct mcam_camera
*cam
, unsigned int irqs
)
1829 unsigned int frame
, handled
= 0;
1831 mcam_reg_write(cam
, REG_IRQSTAT
, FRAMEIRQS
); /* Clear'em all */
1833 * Handle any frame completions. There really should
1834 * not be more than one of these, or we have fallen
1837 * When running in S/G mode, the frame number lacks any
1838 * real meaning - there's only one descriptor array - but
1839 * the controller still picks a different one to signal
1842 for (frame
= 0; frame
< cam
->nbufs
; frame
++)
1843 if (irqs
& (IRQ_EOF0
<< frame
) &&
1844 test_bit(CF_FRAME_SOF0
+ frame
, &cam
->flags
)) {
1845 mcam_frame_complete(cam
, frame
);
1847 clear_bit(CF_FRAME_SOF0
+ frame
, &cam
->flags
);
1848 if (cam
->buffer_mode
== B_DMA_sg
)
1852 * If a frame starts, note that we have DMA active. This
1853 * code assumes that we won't get multiple frame interrupts
1854 * at once; may want to rethink that.
1856 for (frame
= 0; frame
< cam
->nbufs
; frame
++) {
1857 if (irqs
& (IRQ_SOF0
<< frame
)) {
1858 set_bit(CF_FRAME_SOF0
+ frame
, &cam
->flags
);
1859 handled
= IRQ_HANDLED
;
1863 if (handled
== IRQ_HANDLED
) {
1864 set_bit(CF_DMA_ACTIVE
, &cam
->flags
);
1865 if (cam
->buffer_mode
== B_DMA_sg
)
1866 mcam_ctlr_stop(cam
);
1871 /* ---------------------------------------------------------------------- */
1873 * Registration and such.
1875 static struct ov7670_config sensor_cfg
= {
1877 * Exclude QCIF mode, because it only captures a tiny portion
1885 int mccic_register(struct mcam_camera
*cam
)
1887 struct i2c_board_info ov7670_info
= {
1890 .platform_data
= &sensor_cfg
,
1895 * Validate the requested buffer mode.
1897 if (buffer_mode
>= 0)
1898 cam
->buffer_mode
= buffer_mode
;
1899 if (cam
->buffer_mode
== B_DMA_sg
&&
1900 cam
->chip_id
== MCAM_CAFE
) {
1901 printk(KERN_ERR
"marvell-cam: Cafe can't do S/G I/O, "
1902 "attempting vmalloc mode instead\n");
1903 cam
->buffer_mode
= B_vmalloc
;
1905 if (!mcam_buffer_mode_supported(cam
->buffer_mode
)) {
1906 printk(KERN_ERR
"marvell-cam: buffer mode %d unsupported\n",
1913 ret
= v4l2_device_register(cam
->dev
, &cam
->v4l2_dev
);
1917 mutex_init(&cam
->s_mutex
);
1918 cam
->state
= S_NOTREADY
;
1919 mcam_set_config_needed(cam
, 1);
1920 cam
->pix_format
= mcam_def_pix_format
;
1921 cam
->mbus_code
= mcam_def_mbus_code
;
1922 INIT_LIST_HEAD(&cam
->buffers
);
1923 mcam_ctlr_init(cam
);
1926 * Get the v4l2 setup done.
1928 ret
= v4l2_ctrl_handler_init(&cam
->ctrl_handler
, 10);
1930 goto out_unregister
;
1931 cam
->v4l2_dev
.ctrl_handler
= &cam
->ctrl_handler
;
1934 * Try to find the sensor.
1936 sensor_cfg
.clock_speed
= cam
->clock_speed
;
1937 sensor_cfg
.use_smbus
= cam
->use_smbus
;
1938 cam
->sensor_addr
= ov7670_info
.addr
;
1939 cam
->sensor
= v4l2_i2c_new_subdev_board(&cam
->v4l2_dev
,
1940 cam
->i2c_adapter
, &ov7670_info
, NULL
);
1941 if (cam
->sensor
== NULL
) {
1943 goto out_unregister
;
1946 ret
= mcam_cam_init(cam
);
1948 goto out_unregister
;
1950 mutex_lock(&cam
->s_mutex
);
1951 cam
->vdev
= mcam_v4l_template
;
1952 cam
->vdev
.v4l2_dev
= &cam
->v4l2_dev
;
1953 video_set_drvdata(&cam
->vdev
, cam
);
1954 ret
= video_register_device(&cam
->vdev
, VFL_TYPE_GRABBER
, -1);
1959 * If so requested, try to get our DMA buffers now.
1961 if (cam
->buffer_mode
== B_vmalloc
&& !alloc_bufs_at_read
) {
1962 if (mcam_alloc_dma_bufs(cam
, 1))
1963 cam_warn(cam
, "Unable to alloc DMA buffers at load"
1964 " will try again later.");
1969 v4l2_ctrl_handler_free(&cam
->ctrl_handler
);
1970 mutex_unlock(&cam
->s_mutex
);
1973 v4l2_ctrl_handler_free(&cam
->ctrl_handler
);
1974 v4l2_device_unregister(&cam
->v4l2_dev
);
1979 void mccic_shutdown(struct mcam_camera
*cam
)
1982 * If we have no users (and we really, really should have no
1983 * users) the device will already be powered down. Trying to
1984 * take it down again will wedge the machine, which is frowned
1987 if (cam
->users
> 0) {
1988 cam_warn(cam
, "Removing a device with users!\n");
1989 mcam_ctlr_power_down(cam
);
1991 vb2_queue_release(&cam
->vb_queue
);
1992 if (cam
->buffer_mode
== B_vmalloc
)
1993 mcam_free_dma_bufs(cam
);
1994 video_unregister_device(&cam
->vdev
);
1995 v4l2_ctrl_handler_free(&cam
->ctrl_handler
);
1996 v4l2_device_unregister(&cam
->v4l2_dev
);
2004 void mccic_suspend(struct mcam_camera
*cam
)
2006 mutex_lock(&cam
->s_mutex
);
2007 if (cam
->users
> 0) {
2008 enum mcam_state cstate
= cam
->state
;
2010 mcam_ctlr_stop_dma(cam
);
2011 mcam_ctlr_power_down(cam
);
2012 cam
->state
= cstate
;
2014 mutex_unlock(&cam
->s_mutex
);
2017 int mccic_resume(struct mcam_camera
*cam
)
2021 mutex_lock(&cam
->s_mutex
);
2022 if (cam
->users
> 0) {
2023 ret
= mcam_ctlr_power_up(cam
);
2025 mutex_unlock(&cam
->s_mutex
);
2028 __mcam_cam_reset(cam
);
2030 mcam_ctlr_power_down(cam
);
2032 mutex_unlock(&cam
->s_mutex
);
2034 set_bit(CF_CONFIG_NEEDED
, &cam
->flags
);
2035 if (cam
->state
== S_STREAMING
) {
2037 * If there was a buffer in the DMA engine at suspend
2038 * time, put it back on the queue or we'll forget about it.
2040 if (cam
->buffer_mode
== B_DMA_sg
&& cam
->vb_bufs
[0])
2041 list_add(&cam
->vb_bufs
[0]->queue
, &cam
->buffers
);
2042 ret
= mcam_read_setup(cam
);
2046 #endif /* CONFIG_PM */