2 * The Marvell camera core. This device appears in a number of settings,
3 * so it needs platform-specific support outside of the core.
5 * Copyright 2011 Jonathan Corbet corbet@lwn.net
7 #include <linux/kernel.h>
8 #include <linux/module.h>
11 #include <linux/i2c.h>
12 #include <linux/interrupt.h>
13 #include <linux/spinlock.h>
14 #include <linux/slab.h>
15 #include <linux/device.h>
16 #include <linux/wait.h>
17 #include <linux/list.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/delay.h>
20 #include <linux/vmalloc.h>
22 #include <linux/clk.h>
23 #include <linux/videodev2.h>
24 #include <media/v4l2-device.h>
25 #include <media/v4l2-ioctl.h>
26 #include <media/v4l2-ctrls.h>
27 #include <media/ov7670.h>
28 #include <media/videobuf2-vmalloc.h>
29 #include <media/videobuf2-dma-contig.h>
30 #include <media/videobuf2-dma-sg.h>
32 #include "mcam-core.h"
34 #ifdef MCAM_MODE_VMALLOC
36 * Internal DMA buffer management. Since the controller cannot do S/G I/O,
37 * we must have physically contiguous buffers to bring frames into.
38 * These parameters control how many buffers we use, whether we
39 * allocate them at load time (better chance of success, but nails down
40 * memory) or when somebody tries to use the camera (riskier), and,
41 * for load-time allocation, how big they should be.
43 * The controller can cycle through three buffers. We could use
44 * more by flipping pointers around, but it probably makes little
48 static bool alloc_bufs_at_read
;
49 module_param(alloc_bufs_at_read
, bool, 0444);
50 MODULE_PARM_DESC(alloc_bufs_at_read
,
51 "Non-zero value causes DMA buffers to be allocated when the "
52 "video capture device is read, rather than at module load "
53 "time. This saves memory, but decreases the chances of "
54 "successfully getting those buffers. This parameter is "
55 "only used in the vmalloc buffer mode");
57 static int n_dma_bufs
= 3;
58 module_param(n_dma_bufs
, uint
, 0644);
59 MODULE_PARM_DESC(n_dma_bufs
,
60 "The number of DMA buffers to allocate. Can be either two "
61 "(saves memory, makes timing tighter) or three.");
63 static int dma_buf_size
= VGA_WIDTH
* VGA_HEIGHT
* 2; /* Worst case */
64 module_param(dma_buf_size
, uint
, 0444);
65 MODULE_PARM_DESC(dma_buf_size
,
66 "The size of the allocated DMA buffers. If actual operating "
67 "parameters require larger buffers, an attempt to reallocate "
69 #else /* MCAM_MODE_VMALLOC */
70 static const bool alloc_bufs_at_read
;
71 static const int n_dma_bufs
= 3; /* Used by S/G_PARM */
72 #endif /* MCAM_MODE_VMALLOC */
75 module_param(flip
, bool, 0444);
76 MODULE_PARM_DESC(flip
,
77 "If set, the sensor will be instructed to flip the image "
80 static int buffer_mode
= -1;
81 module_param(buffer_mode
, int, 0444);
82 MODULE_PARM_DESC(buffer_mode
,
83 "Set the buffer mode to be used; default is to go with what "
84 "the platform driver asks for. Set to 0 for vmalloc, 1 for "
88 * Status flags. Always manipulated with bit operations.
90 #define CF_BUF0_VALID 0 /* Buffers valid - first three */
91 #define CF_BUF1_VALID 1
92 #define CF_BUF2_VALID 2
93 #define CF_DMA_ACTIVE 3 /* A frame is incoming */
94 #define CF_CONFIG_NEEDED 4 /* Must configure hardware */
95 #define CF_SINGLE_BUFFER 5 /* Running with a single buffer */
96 #define CF_SG_RESTART 6 /* SG restart needed */
97 #define CF_FRAME_SOF0 7 /* Frame 0 started */
98 #define CF_FRAME_SOF1 8
99 #define CF_FRAME_SOF2 9
101 #define sensor_call(cam, o, f, args...) \
102 v4l2_subdev_call(cam->sensor, o, f, ##args)
104 static struct mcam_format_struct
{
107 int bpp
; /* Bytes per pixel */
112 .desc
= "YUYV 4:2:2",
113 .pixelformat
= V4L2_PIX_FMT_YUYV
,
114 .mbus_code
= MEDIA_BUS_FMT_YUYV8_2X8
,
119 .desc
= "UYVY 4:2:2",
120 .pixelformat
= V4L2_PIX_FMT_UYVY
,
121 .mbus_code
= MEDIA_BUS_FMT_YUYV8_2X8
,
126 .desc
= "YUV 4:2:2 PLANAR",
127 .pixelformat
= V4L2_PIX_FMT_YUV422P
,
128 .mbus_code
= MEDIA_BUS_FMT_YUYV8_2X8
,
133 .desc
= "YUV 4:2:0 PLANAR",
134 .pixelformat
= V4L2_PIX_FMT_YUV420
,
135 .mbus_code
= MEDIA_BUS_FMT_YUYV8_2X8
,
140 .desc
= "YVU 4:2:0 PLANAR",
141 .pixelformat
= V4L2_PIX_FMT_YVU420
,
142 .mbus_code
= MEDIA_BUS_FMT_YUYV8_2X8
,
148 .pixelformat
= V4L2_PIX_FMT_RGB444
,
149 .mbus_code
= MEDIA_BUS_FMT_RGB444_2X8_PADHI_LE
,
155 .pixelformat
= V4L2_PIX_FMT_RGB565
,
156 .mbus_code
= MEDIA_BUS_FMT_RGB565_2X8_LE
,
161 .desc
= "Raw RGB Bayer",
162 .pixelformat
= V4L2_PIX_FMT_SBGGR8
,
163 .mbus_code
= MEDIA_BUS_FMT_SBGGR8_1X8
,
168 #define N_MCAM_FMTS ARRAY_SIZE(mcam_formats)
170 static struct mcam_format_struct
*mcam_find_format(u32 pixelformat
)
174 for (i
= 0; i
< N_MCAM_FMTS
; i
++)
175 if (mcam_formats
[i
].pixelformat
== pixelformat
)
176 return mcam_formats
+ i
;
177 /* Not found? Then return the first format. */
182 * The default format we use until somebody says otherwise.
184 static const struct v4l2_pix_format mcam_def_pix_format
= {
186 .height
= VGA_HEIGHT
,
187 .pixelformat
= V4L2_PIX_FMT_YUYV
,
188 .field
= V4L2_FIELD_NONE
,
189 .bytesperline
= VGA_WIDTH
*2,
190 .sizeimage
= VGA_WIDTH
*VGA_HEIGHT
*2,
193 static const u32 mcam_def_mbus_code
= MEDIA_BUS_FMT_YUYV8_2X8
;
197 * The two-word DMA descriptor format used by the Armada 610 and like. There
198 * Is a three-word format as well (set C1_DESC_3WORD) where the third
199 * word is a pointer to the next descriptor, but we don't use it. Two-word
200 * descriptors have to be contiguous in memory.
202 struct mcam_dma_desc
{
207 struct yuv_pointer_t
{
214 * Our buffer type for working with videobuf2. Note that the vb2
215 * developers have decreed that struct vb2_buffer must be at the
216 * beginning of this structure.
218 struct mcam_vb_buffer
{
219 struct vb2_buffer vb_buf
;
220 struct list_head queue
;
221 struct mcam_dma_desc
*dma_desc
; /* Descriptor virtual address */
222 dma_addr_t dma_desc_pa
; /* Descriptor physical address */
223 int dma_desc_nent
; /* Number of mapped descriptors */
224 struct yuv_pointer_t yuv_p
;
227 static inline struct mcam_vb_buffer
*vb_to_mvb(struct vb2_buffer
*vb
)
229 return container_of(vb
, struct mcam_vb_buffer
, vb_buf
);
233 * Hand a completed buffer back to user space.
235 static void mcam_buffer_done(struct mcam_camera
*cam
, int frame
,
236 struct vb2_buffer
*vbuf
)
238 vbuf
->v4l2_buf
.bytesused
= cam
->pix_format
.sizeimage
;
239 vbuf
->v4l2_buf
.sequence
= cam
->buf_seq
[frame
];
240 vb2_set_plane_payload(vbuf
, 0, cam
->pix_format
.sizeimage
);
241 vb2_buffer_done(vbuf
, VB2_BUF_STATE_DONE
);
247 * Debugging and related.
249 #define cam_err(cam, fmt, arg...) \
250 dev_err((cam)->dev, fmt, ##arg);
251 #define cam_warn(cam, fmt, arg...) \
252 dev_warn((cam)->dev, fmt, ##arg);
253 #define cam_dbg(cam, fmt, arg...) \
254 dev_dbg((cam)->dev, fmt, ##arg);
258 * Flag manipulation helpers
260 static void mcam_reset_buffers(struct mcam_camera
*cam
)
265 for (i
= 0; i
< cam
->nbufs
; i
++) {
266 clear_bit(i
, &cam
->flags
);
267 clear_bit(CF_FRAME_SOF0
+ i
, &cam
->flags
);
271 static inline int mcam_needs_config(struct mcam_camera
*cam
)
273 return test_bit(CF_CONFIG_NEEDED
, &cam
->flags
);
276 static void mcam_set_config_needed(struct mcam_camera
*cam
, int needed
)
279 set_bit(CF_CONFIG_NEEDED
, &cam
->flags
);
281 clear_bit(CF_CONFIG_NEEDED
, &cam
->flags
);
284 /* ------------------------------------------------------------------- */
286 * Make the controller start grabbing images. Everything must
287 * be set up before doing this.
289 static void mcam_ctlr_start(struct mcam_camera
*cam
)
291 /* set_bit performs a read, so no other barrier should be
293 mcam_reg_set_bit(cam
, REG_CTRL0
, C0_ENABLE
);
296 static void mcam_ctlr_stop(struct mcam_camera
*cam
)
298 mcam_reg_clear_bit(cam
, REG_CTRL0
, C0_ENABLE
);
301 static void mcam_enable_mipi(struct mcam_camera
*mcam
)
303 /* Using MIPI mode and enable MIPI */
304 cam_dbg(mcam
, "camera: DPHY3=0x%x, DPHY5=0x%x, DPHY6=0x%x\n",
305 mcam
->dphy
[0], mcam
->dphy
[1], mcam
->dphy
[2]);
306 mcam_reg_write(mcam
, REG_CSI2_DPHY3
, mcam
->dphy
[0]);
307 mcam_reg_write(mcam
, REG_CSI2_DPHY5
, mcam
->dphy
[1]);
308 mcam_reg_write(mcam
, REG_CSI2_DPHY6
, mcam
->dphy
[2]);
310 if (!mcam
->mipi_enabled
) {
311 if (mcam
->lane
> 4 || mcam
->lane
<= 0) {
312 cam_warn(mcam
, "lane number error\n");
313 mcam
->lane
= 1; /* set the default value */
316 * 0x41 actives 1 lane
317 * 0x43 actives 2 lanes
318 * 0x45 actives 3 lanes (never happen)
319 * 0x47 actives 4 lanes
321 mcam_reg_write(mcam
, REG_CSI2_CTRL0
,
322 CSI2_C0_MIPI_EN
| CSI2_C0_ACT_LANE(mcam
->lane
));
323 mcam_reg_write(mcam
, REG_CLKCTRL
,
324 (mcam
->mclk_src
<< 29) | mcam
->mclk_div
);
326 mcam
->mipi_enabled
= true;
330 static void mcam_disable_mipi(struct mcam_camera
*mcam
)
332 /* Using Parallel mode or disable MIPI */
333 mcam_reg_write(mcam
, REG_CSI2_CTRL0
, 0x0);
334 mcam_reg_write(mcam
, REG_CSI2_DPHY3
, 0x0);
335 mcam_reg_write(mcam
, REG_CSI2_DPHY5
, 0x0);
336 mcam_reg_write(mcam
, REG_CSI2_DPHY6
, 0x0);
337 mcam
->mipi_enabled
= false;
340 /* ------------------------------------------------------------------- */
342 #ifdef MCAM_MODE_VMALLOC
344 * Code specific to the vmalloc buffer mode.
348 * Allocate in-kernel DMA buffers for vmalloc mode.
350 static int mcam_alloc_dma_bufs(struct mcam_camera
*cam
, int loadtime
)
354 mcam_set_config_needed(cam
, 1);
356 cam
->dma_buf_size
= dma_buf_size
;
358 cam
->dma_buf_size
= cam
->pix_format
.sizeimage
;
363 for (i
= 0; i
< n_dma_bufs
; i
++) {
364 cam
->dma_bufs
[i
] = dma_alloc_coherent(cam
->dev
,
365 cam
->dma_buf_size
, cam
->dma_handles
+ i
,
367 if (cam
->dma_bufs
[i
] == NULL
) {
368 cam_warn(cam
, "Failed to allocate DMA buffer\n");
374 switch (cam
->nbufs
) {
376 dma_free_coherent(cam
->dev
, cam
->dma_buf_size
,
377 cam
->dma_bufs
[0], cam
->dma_handles
[0]);
380 cam_err(cam
, "Insufficient DMA buffers, cannot operate\n");
385 cam_warn(cam
, "Will limp along with only 2 buffers\n");
391 static void mcam_free_dma_bufs(struct mcam_camera
*cam
)
395 for (i
= 0; i
< cam
->nbufs
; i
++) {
396 dma_free_coherent(cam
->dev
, cam
->dma_buf_size
,
397 cam
->dma_bufs
[i
], cam
->dma_handles
[i
]);
398 cam
->dma_bufs
[i
] = NULL
;
405 * Set up DMA buffers when operating in vmalloc mode
407 static void mcam_ctlr_dma_vmalloc(struct mcam_camera
*cam
)
410 * Store the first two Y buffers (we aren't supporting
411 * planar formats for now, so no UV bufs). Then either
412 * set the third if it exists, or tell the controller
415 mcam_reg_write(cam
, REG_Y0BAR
, cam
->dma_handles
[0]);
416 mcam_reg_write(cam
, REG_Y1BAR
, cam
->dma_handles
[1]);
417 if (cam
->nbufs
> 2) {
418 mcam_reg_write(cam
, REG_Y2BAR
, cam
->dma_handles
[2]);
419 mcam_reg_clear_bit(cam
, REG_CTRL1
, C1_TWOBUFS
);
421 mcam_reg_set_bit(cam
, REG_CTRL1
, C1_TWOBUFS
);
422 if (cam
->chip_id
== MCAM_CAFE
)
423 mcam_reg_write(cam
, REG_UBAR
, 0); /* 32 bits only */
427 * Copy data out to user space in the vmalloc case
429 static void mcam_frame_tasklet(unsigned long data
)
431 struct mcam_camera
*cam
= (struct mcam_camera
*) data
;
434 struct mcam_vb_buffer
*buf
;
436 spin_lock_irqsave(&cam
->dev_lock
, flags
);
437 for (i
= 0; i
< cam
->nbufs
; i
++) {
438 int bufno
= cam
->next_buf
;
440 if (cam
->state
!= S_STREAMING
|| bufno
< 0)
441 break; /* I/O got stopped */
442 if (++(cam
->next_buf
) >= cam
->nbufs
)
444 if (!test_bit(bufno
, &cam
->flags
))
446 if (list_empty(&cam
->buffers
)) {
447 cam
->frame_state
.singles
++;
448 break; /* Leave it valid, hope for better later */
450 cam
->frame_state
.delivered
++;
451 clear_bit(bufno
, &cam
->flags
);
452 buf
= list_first_entry(&cam
->buffers
, struct mcam_vb_buffer
,
454 list_del_init(&buf
->queue
);
456 * Drop the lock during the big copy. This *should* be safe...
458 spin_unlock_irqrestore(&cam
->dev_lock
, flags
);
459 memcpy(vb2_plane_vaddr(&buf
->vb_buf
, 0), cam
->dma_bufs
[bufno
],
460 cam
->pix_format
.sizeimage
);
461 mcam_buffer_done(cam
, bufno
, &buf
->vb_buf
);
462 spin_lock_irqsave(&cam
->dev_lock
, flags
);
464 spin_unlock_irqrestore(&cam
->dev_lock
, flags
);
469 * Make sure our allocated buffers are up to the task.
471 static int mcam_check_dma_buffers(struct mcam_camera
*cam
)
473 if (cam
->nbufs
> 0 && cam
->dma_buf_size
< cam
->pix_format
.sizeimage
)
474 mcam_free_dma_bufs(cam
);
476 return mcam_alloc_dma_bufs(cam
, 0);
480 static void mcam_vmalloc_done(struct mcam_camera
*cam
, int frame
)
482 tasklet_schedule(&cam
->s_tasklet
);
485 #else /* MCAM_MODE_VMALLOC */
487 static inline int mcam_alloc_dma_bufs(struct mcam_camera
*cam
, int loadtime
)
492 static inline void mcam_free_dma_bufs(struct mcam_camera
*cam
)
497 static inline int mcam_check_dma_buffers(struct mcam_camera
*cam
)
504 #endif /* MCAM_MODE_VMALLOC */
507 #ifdef MCAM_MODE_DMA_CONTIG
508 /* ---------------------------------------------------------------------- */
510 * DMA-contiguous code.
513 static bool mcam_fmt_is_planar(__u32 pfmt
)
515 struct mcam_format_struct
*f
;
517 f
= mcam_find_format(pfmt
);
522 * Set up a contiguous buffer for the given frame. Here also is where
523 * the underrun strategy is set: if there is no buffer available, reuse
524 * the buffer from the other BAR and set the CF_SINGLE_BUFFER flag to
525 * keep the interrupt handler from giving that buffer back to user
526 * space. In this way, we always have a buffer to DMA to and don't
527 * have to try to play games stopping and restarting the controller.
529 static void mcam_set_contig_buffer(struct mcam_camera
*cam
, int frame
)
531 struct mcam_vb_buffer
*buf
;
532 struct v4l2_pix_format
*fmt
= &cam
->pix_format
;
533 dma_addr_t dma_handle
;
534 u32 pixel_count
= fmt
->width
* fmt
->height
;
535 struct vb2_buffer
*vb
;
538 * If there are no available buffers, go into single mode
540 if (list_empty(&cam
->buffers
)) {
541 buf
= cam
->vb_bufs
[frame
^ 0x1];
542 set_bit(CF_SINGLE_BUFFER
, &cam
->flags
);
543 cam
->frame_state
.singles
++;
546 * OK, we have a buffer we can use.
548 buf
= list_first_entry(&cam
->buffers
, struct mcam_vb_buffer
,
550 list_del_init(&buf
->queue
);
551 clear_bit(CF_SINGLE_BUFFER
, &cam
->flags
);
554 cam
->vb_bufs
[frame
] = buf
;
557 dma_handle
= vb2_dma_contig_plane_dma_addr(vb
, 0);
558 buf
->yuv_p
.y
= dma_handle
;
560 switch (cam
->pix_format
.pixelformat
) {
561 case V4L2_PIX_FMT_YUV422P
:
562 buf
->yuv_p
.u
= buf
->yuv_p
.y
+ pixel_count
;
563 buf
->yuv_p
.v
= buf
->yuv_p
.u
+ pixel_count
/ 2;
565 case V4L2_PIX_FMT_YUV420
:
566 buf
->yuv_p
.u
= buf
->yuv_p
.y
+ pixel_count
;
567 buf
->yuv_p
.v
= buf
->yuv_p
.u
+ pixel_count
/ 4;
569 case V4L2_PIX_FMT_YVU420
:
570 buf
->yuv_p
.v
= buf
->yuv_p
.y
+ pixel_count
;
571 buf
->yuv_p
.u
= buf
->yuv_p
.v
+ pixel_count
/ 4;
577 mcam_reg_write(cam
, frame
== 0 ? REG_Y0BAR
: REG_Y1BAR
, buf
->yuv_p
.y
);
578 if (mcam_fmt_is_planar(fmt
->pixelformat
)) {
579 mcam_reg_write(cam
, frame
== 0 ?
580 REG_U0BAR
: REG_U1BAR
, buf
->yuv_p
.u
);
581 mcam_reg_write(cam
, frame
== 0 ?
582 REG_V0BAR
: REG_V1BAR
, buf
->yuv_p
.v
);
587 * Initial B_DMA_contig setup.
589 static void mcam_ctlr_dma_contig(struct mcam_camera
*cam
)
591 mcam_reg_set_bit(cam
, REG_CTRL1
, C1_TWOBUFS
);
593 mcam_set_contig_buffer(cam
, 0);
594 mcam_set_contig_buffer(cam
, 1);
598 * Frame completion handling.
600 static void mcam_dma_contig_done(struct mcam_camera
*cam
, int frame
)
602 struct mcam_vb_buffer
*buf
= cam
->vb_bufs
[frame
];
604 if (!test_bit(CF_SINGLE_BUFFER
, &cam
->flags
)) {
605 cam
->frame_state
.delivered
++;
606 mcam_buffer_done(cam
, frame
, &buf
->vb_buf
);
608 mcam_set_contig_buffer(cam
, frame
);
611 #endif /* MCAM_MODE_DMA_CONTIG */
613 #ifdef MCAM_MODE_DMA_SG
614 /* ---------------------------------------------------------------------- */
616 * Scatter/gather-specific code.
620 * Set up the next buffer for S/G I/O; caller should be sure that
621 * the controller is stopped and a buffer is available.
623 static void mcam_sg_next_buffer(struct mcam_camera
*cam
)
625 struct mcam_vb_buffer
*buf
;
627 buf
= list_first_entry(&cam
->buffers
, struct mcam_vb_buffer
, queue
);
628 list_del_init(&buf
->queue
);
630 * Very Bad Not Good Things happen if you don't clear
631 * C1_DESC_ENA before making any descriptor changes.
633 mcam_reg_clear_bit(cam
, REG_CTRL1
, C1_DESC_ENA
);
634 mcam_reg_write(cam
, REG_DMA_DESC_Y
, buf
->dma_desc_pa
);
635 mcam_reg_write(cam
, REG_DESC_LEN_Y
,
636 buf
->dma_desc_nent
*sizeof(struct mcam_dma_desc
));
637 mcam_reg_write(cam
, REG_DESC_LEN_U
, 0);
638 mcam_reg_write(cam
, REG_DESC_LEN_V
, 0);
639 mcam_reg_set_bit(cam
, REG_CTRL1
, C1_DESC_ENA
);
640 cam
->vb_bufs
[0] = buf
;
644 * Initial B_DMA_sg setup
646 static void mcam_ctlr_dma_sg(struct mcam_camera
*cam
)
649 * The list-empty condition can hit us at resume time
650 * if the buffer list was empty when the system was suspended.
652 if (list_empty(&cam
->buffers
)) {
653 set_bit(CF_SG_RESTART
, &cam
->flags
);
657 mcam_reg_clear_bit(cam
, REG_CTRL1
, C1_DESC_3WORD
);
658 mcam_sg_next_buffer(cam
);
664 * Frame completion with S/G is trickier. We can't muck with
665 * a descriptor chain on the fly, since the controller buffers it
666 * internally. So we have to actually stop and restart; Marvell
667 * says this is the way to do it.
669 * Of course, stopping is easier said than done; experience shows
670 * that the controller can start a frame *after* C0_ENABLE has been
671 * cleared. So when running in S/G mode, the controller is "stopped"
672 * on receipt of the start-of-frame interrupt. That means we can
673 * safely change the DMA descriptor array here and restart things
674 * (assuming there's another buffer waiting to go).
676 static void mcam_dma_sg_done(struct mcam_camera
*cam
, int frame
)
678 struct mcam_vb_buffer
*buf
= cam
->vb_bufs
[0];
681 * If we're no longer supposed to be streaming, don't do anything.
683 if (cam
->state
!= S_STREAMING
)
686 * If we have another buffer available, put it in and
687 * restart the engine.
689 if (!list_empty(&cam
->buffers
)) {
690 mcam_sg_next_buffer(cam
);
691 mcam_ctlr_start(cam
);
693 * Otherwise set CF_SG_RESTART and the controller will
694 * be restarted once another buffer shows up.
697 set_bit(CF_SG_RESTART
, &cam
->flags
);
698 cam
->frame_state
.singles
++;
699 cam
->vb_bufs
[0] = NULL
;
702 * Now we can give the completed frame back to user space.
704 cam
->frame_state
.delivered
++;
705 mcam_buffer_done(cam
, frame
, &buf
->vb_buf
);
710 * Scatter/gather mode requires stopping the controller between
711 * frames so we can put in a new DMA descriptor array. If no new
712 * buffer exists at frame completion, the controller is left stopped;
713 * this function is charged with gettig things going again.
715 static void mcam_sg_restart(struct mcam_camera
*cam
)
717 mcam_ctlr_dma_sg(cam
);
718 mcam_ctlr_start(cam
);
719 clear_bit(CF_SG_RESTART
, &cam
->flags
);
722 #else /* MCAM_MODE_DMA_SG */
724 static inline void mcam_sg_restart(struct mcam_camera
*cam
)
729 #endif /* MCAM_MODE_DMA_SG */
731 /* ---------------------------------------------------------------------- */
733 * Buffer-mode-independent controller code.
739 static void mcam_ctlr_image(struct mcam_camera
*cam
)
741 struct v4l2_pix_format
*fmt
= &cam
->pix_format
;
742 u32 widthy
= 0, widthuv
= 0, imgsz_h
, imgsz_w
;
744 cam_dbg(cam
, "camera: bytesperline = %d; height = %d\n",
745 fmt
->bytesperline
, fmt
->sizeimage
/ fmt
->bytesperline
);
746 imgsz_h
= (fmt
->height
<< IMGSZ_V_SHIFT
) & IMGSZ_V_MASK
;
747 imgsz_w
= (fmt
->width
* 2) & IMGSZ_H_MASK
;
749 switch (fmt
->pixelformat
) {
750 case V4L2_PIX_FMT_YUYV
:
751 case V4L2_PIX_FMT_UYVY
:
752 widthy
= fmt
->width
* 2;
755 case V4L2_PIX_FMT_JPEG
:
756 imgsz_h
= (fmt
->sizeimage
/ fmt
->bytesperline
) << IMGSZ_V_SHIFT
;
757 widthy
= fmt
->bytesperline
;
760 case V4L2_PIX_FMT_YUV422P
:
761 case V4L2_PIX_FMT_YUV420
:
762 case V4L2_PIX_FMT_YVU420
:
764 widthuv
= fmt
->width
/ 2;
767 widthy
= fmt
->bytesperline
;
771 mcam_reg_write_mask(cam
, REG_IMGPITCH
, widthuv
<< 16 | widthy
,
772 IMGP_YP_MASK
| IMGP_UVP_MASK
);
773 mcam_reg_write(cam
, REG_IMGSIZE
, imgsz_h
| imgsz_w
);
774 mcam_reg_write(cam
, REG_IMGOFFSET
, 0x0);
777 * Tell the controller about the image format we are using.
779 switch (fmt
->pixelformat
) {
780 case V4L2_PIX_FMT_YUV422P
:
781 mcam_reg_write_mask(cam
, REG_CTRL0
,
782 C0_DF_YUV
| C0_YUV_PLANAR
| C0_YUVE_YVYU
, C0_DF_MASK
);
784 case V4L2_PIX_FMT_YUV420
:
785 case V4L2_PIX_FMT_YVU420
:
786 mcam_reg_write_mask(cam
, REG_CTRL0
,
787 C0_DF_YUV
| C0_YUV_420PL
| C0_YUVE_YVYU
, C0_DF_MASK
);
789 case V4L2_PIX_FMT_YUYV
:
790 mcam_reg_write_mask(cam
, REG_CTRL0
,
791 C0_DF_YUV
| C0_YUV_PACKED
| C0_YUVE_UYVY
, C0_DF_MASK
);
793 case V4L2_PIX_FMT_UYVY
:
794 mcam_reg_write_mask(cam
, REG_CTRL0
,
795 C0_DF_YUV
| C0_YUV_PACKED
| C0_YUVE_YUYV
, C0_DF_MASK
);
797 case V4L2_PIX_FMT_JPEG
:
798 mcam_reg_write_mask(cam
, REG_CTRL0
,
799 C0_DF_YUV
| C0_YUV_PACKED
| C0_YUVE_YUYV
, C0_DF_MASK
);
801 case V4L2_PIX_FMT_RGB444
:
802 mcam_reg_write_mask(cam
, REG_CTRL0
,
803 C0_DF_RGB
| C0_RGBF_444
| C0_RGB4_XRGB
, C0_DF_MASK
);
806 case V4L2_PIX_FMT_RGB565
:
807 mcam_reg_write_mask(cam
, REG_CTRL0
,
808 C0_DF_RGB
| C0_RGBF_565
| C0_RGB5_BGGR
, C0_DF_MASK
);
811 cam_err(cam
, "camera: unknown format: %#x\n", fmt
->pixelformat
);
816 * Make sure it knows we want to use hsync/vsync.
818 mcam_reg_write_mask(cam
, REG_CTRL0
, C0_SIF_HVSYNC
, C0_SIFM_MASK
);
820 * This field controls the generation of EOF(DVP only)
822 if (cam
->bus_type
!= V4L2_MBUS_CSI2
)
823 mcam_reg_set_bit(cam
, REG_CTRL0
,
824 C0_EOF_VSYNC
| C0_VEDGE_CTRL
);
829 * Configure the controller for operation; caller holds the
832 static int mcam_ctlr_configure(struct mcam_camera
*cam
)
836 spin_lock_irqsave(&cam
->dev_lock
, flags
);
837 clear_bit(CF_SG_RESTART
, &cam
->flags
);
839 mcam_ctlr_image(cam
);
840 mcam_set_config_needed(cam
, 0);
841 spin_unlock_irqrestore(&cam
->dev_lock
, flags
);
845 static void mcam_ctlr_irq_enable(struct mcam_camera
*cam
)
848 * Clear any pending interrupts, since we do not
849 * expect to have I/O active prior to enabling.
851 mcam_reg_write(cam
, REG_IRQSTAT
, FRAMEIRQS
);
852 mcam_reg_set_bit(cam
, REG_IRQMASK
, FRAMEIRQS
);
855 static void mcam_ctlr_irq_disable(struct mcam_camera
*cam
)
857 mcam_reg_clear_bit(cam
, REG_IRQMASK
, FRAMEIRQS
);
862 static void mcam_ctlr_init(struct mcam_camera
*cam
)
866 spin_lock_irqsave(&cam
->dev_lock
, flags
);
868 * Make sure it's not powered down.
870 mcam_reg_clear_bit(cam
, REG_CTRL1
, C1_PWRDWN
);
872 * Turn off the enable bit. It sure should be off anyway,
873 * but it's good to be sure.
875 mcam_reg_clear_bit(cam
, REG_CTRL0
, C0_ENABLE
);
877 * Clock the sensor appropriately. Controller clock should
878 * be 48MHz, sensor "typical" value is half that.
880 mcam_reg_write_mask(cam
, REG_CLKCTRL
, 2, CLK_DIV_MASK
);
881 spin_unlock_irqrestore(&cam
->dev_lock
, flags
);
886 * Stop the controller, and don't return until we're really sure that no
887 * further DMA is going on.
889 static void mcam_ctlr_stop_dma(struct mcam_camera
*cam
)
894 * Theory: stop the camera controller (whether it is operating
895 * or not). Delay briefly just in case we race with the SOF
896 * interrupt, then wait until no DMA is active.
898 spin_lock_irqsave(&cam
->dev_lock
, flags
);
899 clear_bit(CF_SG_RESTART
, &cam
->flags
);
902 spin_unlock_irqrestore(&cam
->dev_lock
, flags
);
904 * This is a brutally long sleep, but experience shows that
905 * it can take the controller a while to get the message that
906 * it needs to stop grabbing frames. In particular, we can
907 * sometimes (on mmp) get a frame at the end WITHOUT the
908 * start-of-frame indication.
911 if (test_bit(CF_DMA_ACTIVE
, &cam
->flags
))
912 cam_err(cam
, "Timeout waiting for DMA to end\n");
913 /* This would be bad news - what now? */
914 spin_lock_irqsave(&cam
->dev_lock
, flags
);
915 mcam_ctlr_irq_disable(cam
);
916 spin_unlock_irqrestore(&cam
->dev_lock
, flags
);
922 static int mcam_ctlr_power_up(struct mcam_camera
*cam
)
927 spin_lock_irqsave(&cam
->dev_lock
, flags
);
928 ret
= cam
->plat_power_up(cam
);
930 spin_unlock_irqrestore(&cam
->dev_lock
, flags
);
933 mcam_reg_clear_bit(cam
, REG_CTRL1
, C1_PWRDWN
);
934 spin_unlock_irqrestore(&cam
->dev_lock
, flags
);
935 msleep(5); /* Just to be sure */
939 static void mcam_ctlr_power_down(struct mcam_camera
*cam
)
943 spin_lock_irqsave(&cam
->dev_lock
, flags
);
945 * School of hard knocks department: be sure we do any register
946 * twiddling on the controller *before* calling the platform
947 * power down routine.
949 mcam_reg_set_bit(cam
, REG_CTRL1
, C1_PWRDWN
);
950 cam
->plat_power_down(cam
);
951 spin_unlock_irqrestore(&cam
->dev_lock
, flags
);
954 /* -------------------------------------------------------------------- */
956 * Communications with the sensor.
959 static int __mcam_cam_reset(struct mcam_camera
*cam
)
961 return sensor_call(cam
, core
, reset
, 0);
965 * We have found the sensor on the i2c. Let's try to have a
968 static int mcam_cam_init(struct mcam_camera
*cam
)
972 mutex_lock(&cam
->s_mutex
);
973 if (cam
->state
!= S_NOTREADY
)
974 cam_warn(cam
, "Cam init with device in funky state %d",
976 ret
= __mcam_cam_reset(cam
);
977 /* Get/set parameters? */
979 mcam_ctlr_power_down(cam
);
980 mutex_unlock(&cam
->s_mutex
);
985 * Configure the sensor to match the parameters we have. Caller should
988 static int mcam_cam_set_flip(struct mcam_camera
*cam
)
990 struct v4l2_control ctrl
;
992 memset(&ctrl
, 0, sizeof(ctrl
));
993 ctrl
.id
= V4L2_CID_VFLIP
;
995 return sensor_call(cam
, core
, s_ctrl
, &ctrl
);
999 static int mcam_cam_configure(struct mcam_camera
*cam
)
1001 struct v4l2_mbus_framefmt mbus_fmt
;
1004 v4l2_fill_mbus_format(&mbus_fmt
, &cam
->pix_format
, cam
->mbus_code
);
1005 ret
= sensor_call(cam
, core
, init
, 0);
1007 ret
= sensor_call(cam
, video
, s_mbus_fmt
, &mbus_fmt
);
1009 * OV7670 does weird things if flip is set *before* format...
1011 ret
+= mcam_cam_set_flip(cam
);
1016 * Get everything ready, and start grabbing frames.
1018 static int mcam_read_setup(struct mcam_camera
*cam
)
1021 unsigned long flags
;
1024 * Configuration. If we still don't have DMA buffers,
1025 * make one last, desperate attempt.
1027 if (cam
->buffer_mode
== B_vmalloc
&& cam
->nbufs
== 0 &&
1028 mcam_alloc_dma_bufs(cam
, 0))
1031 if (mcam_needs_config(cam
)) {
1032 mcam_cam_configure(cam
);
1033 ret
= mcam_ctlr_configure(cam
);
1041 spin_lock_irqsave(&cam
->dev_lock
, flags
);
1042 clear_bit(CF_DMA_ACTIVE
, &cam
->flags
);
1043 mcam_reset_buffers(cam
);
1045 * Update CSI2_DPHY value
1048 cam
->calc_dphy(cam
);
1049 cam_dbg(cam
, "camera: DPHY sets: dphy3=0x%x, dphy5=0x%x, dphy6=0x%x\n",
1050 cam
->dphy
[0], cam
->dphy
[1], cam
->dphy
[2]);
1051 if (cam
->bus_type
== V4L2_MBUS_CSI2
)
1052 mcam_enable_mipi(cam
);
1054 mcam_disable_mipi(cam
);
1055 mcam_ctlr_irq_enable(cam
);
1056 cam
->state
= S_STREAMING
;
1057 if (!test_bit(CF_SG_RESTART
, &cam
->flags
))
1058 mcam_ctlr_start(cam
);
1059 spin_unlock_irqrestore(&cam
->dev_lock
, flags
);
1063 /* ----------------------------------------------------------------------- */
1065 * Videobuf2 interface code.
1068 static int mcam_vb_queue_setup(struct vb2_queue
*vq
,
1069 const struct v4l2_format
*fmt
, unsigned int *nbufs
,
1070 unsigned int *num_planes
, unsigned int sizes
[],
1073 struct mcam_camera
*cam
= vb2_get_drv_priv(vq
);
1074 int minbufs
= (cam
->buffer_mode
== B_DMA_contig
) ? 3 : 2;
1076 sizes
[0] = cam
->pix_format
.sizeimage
;
1077 *num_planes
= 1; /* Someday we have to support planar formats... */
1078 if (*nbufs
< minbufs
)
1080 if (cam
->buffer_mode
== B_DMA_contig
)
1081 alloc_ctxs
[0] = cam
->vb_alloc_ctx
;
1082 else if (cam
->buffer_mode
== B_DMA_sg
)
1083 alloc_ctxs
[0] = cam
->vb_alloc_ctx_sg
;
1088 static void mcam_vb_buf_queue(struct vb2_buffer
*vb
)
1090 struct mcam_vb_buffer
*mvb
= vb_to_mvb(vb
);
1091 struct mcam_camera
*cam
= vb2_get_drv_priv(vb
->vb2_queue
);
1092 unsigned long flags
;
1095 spin_lock_irqsave(&cam
->dev_lock
, flags
);
1096 start
= (cam
->state
== S_BUFWAIT
) && !list_empty(&cam
->buffers
);
1097 list_add(&mvb
->queue
, &cam
->buffers
);
1098 if (cam
->state
== S_STREAMING
&& test_bit(CF_SG_RESTART
, &cam
->flags
))
1099 mcam_sg_restart(cam
);
1100 spin_unlock_irqrestore(&cam
->dev_lock
, flags
);
1102 mcam_read_setup(cam
);
1106 * These need to be called with the mutex held from vb2
1108 static int mcam_vb_start_streaming(struct vb2_queue
*vq
, unsigned int count
)
1110 struct mcam_camera
*cam
= vb2_get_drv_priv(vq
);
1113 if (cam
->state
!= S_IDLE
) {
1114 INIT_LIST_HEAD(&cam
->buffers
);
1119 * Videobuf2 sneakily hoards all the buffers and won't
1120 * give them to us until *after* streaming starts. But
1121 * we can't actually start streaming until we have a
1122 * destination. So go into a wait state and hope they
1123 * give us buffers soon.
1125 if (cam
->buffer_mode
!= B_vmalloc
&& list_empty(&cam
->buffers
)) {
1126 cam
->state
= S_BUFWAIT
;
1131 * Ensure clear the left over frame flags
1132 * before every really start streaming
1134 for (frame
= 0; frame
< cam
->nbufs
; frame
++)
1135 clear_bit(CF_FRAME_SOF0
+ frame
, &cam
->flags
);
1137 return mcam_read_setup(cam
);
1140 static void mcam_vb_stop_streaming(struct vb2_queue
*vq
)
1142 struct mcam_camera
*cam
= vb2_get_drv_priv(vq
);
1143 unsigned long flags
;
1145 if (cam
->state
== S_BUFWAIT
) {
1146 /* They never gave us buffers */
1147 cam
->state
= S_IDLE
;
1150 if (cam
->state
!= S_STREAMING
)
1152 mcam_ctlr_stop_dma(cam
);
1154 * Reset the CCIC PHY after stopping streaming,
1155 * otherwise, the CCIC may be unstable.
1157 if (cam
->ctlr_reset
)
1158 cam
->ctlr_reset(cam
);
1160 * VB2 reclaims the buffers, so we need to forget
1163 spin_lock_irqsave(&cam
->dev_lock
, flags
);
1164 INIT_LIST_HEAD(&cam
->buffers
);
1165 spin_unlock_irqrestore(&cam
->dev_lock
, flags
);
1169 static const struct vb2_ops mcam_vb2_ops
= {
1170 .queue_setup
= mcam_vb_queue_setup
,
1171 .buf_queue
= mcam_vb_buf_queue
,
1172 .start_streaming
= mcam_vb_start_streaming
,
1173 .stop_streaming
= mcam_vb_stop_streaming
,
1174 .wait_prepare
= vb2_ops_wait_prepare
,
1175 .wait_finish
= vb2_ops_wait_finish
,
1179 #ifdef MCAM_MODE_DMA_SG
1181 * Scatter/gather mode uses all of the above functions plus a
1182 * few extras to deal with DMA mapping.
1184 static int mcam_vb_sg_buf_init(struct vb2_buffer
*vb
)
1186 struct mcam_vb_buffer
*mvb
= vb_to_mvb(vb
);
1187 struct mcam_camera
*cam
= vb2_get_drv_priv(vb
->vb2_queue
);
1188 int ndesc
= cam
->pix_format
.sizeimage
/PAGE_SIZE
+ 1;
1190 mvb
->dma_desc
= dma_alloc_coherent(cam
->dev
,
1191 ndesc
* sizeof(struct mcam_dma_desc
),
1192 &mvb
->dma_desc_pa
, GFP_KERNEL
);
1193 if (mvb
->dma_desc
== NULL
) {
1194 cam_err(cam
, "Unable to get DMA descriptor array\n");
1200 static int mcam_vb_sg_buf_prepare(struct vb2_buffer
*vb
)
1202 struct mcam_vb_buffer
*mvb
= vb_to_mvb(vb
);
1203 struct sg_table
*sg_table
= vb2_dma_sg_plane_desc(vb
, 0);
1204 struct mcam_dma_desc
*desc
= mvb
->dma_desc
;
1205 struct scatterlist
*sg
;
1208 for_each_sg(sg_table
->sgl
, sg
, sg_table
->nents
, i
) {
1209 desc
->dma_addr
= sg_dma_address(sg
);
1210 desc
->segment_len
= sg_dma_len(sg
);
1216 static void mcam_vb_sg_buf_cleanup(struct vb2_buffer
*vb
)
1218 struct mcam_camera
*cam
= vb2_get_drv_priv(vb
->vb2_queue
);
1219 struct mcam_vb_buffer
*mvb
= vb_to_mvb(vb
);
1220 int ndesc
= cam
->pix_format
.sizeimage
/PAGE_SIZE
+ 1;
1222 dma_free_coherent(cam
->dev
, ndesc
* sizeof(struct mcam_dma_desc
),
1223 mvb
->dma_desc
, mvb
->dma_desc_pa
);
1227 static const struct vb2_ops mcam_vb2_sg_ops
= {
1228 .queue_setup
= mcam_vb_queue_setup
,
1229 .buf_init
= mcam_vb_sg_buf_init
,
1230 .buf_prepare
= mcam_vb_sg_buf_prepare
,
1231 .buf_queue
= mcam_vb_buf_queue
,
1232 .buf_cleanup
= mcam_vb_sg_buf_cleanup
,
1233 .start_streaming
= mcam_vb_start_streaming
,
1234 .stop_streaming
= mcam_vb_stop_streaming
,
1235 .wait_prepare
= vb2_ops_wait_prepare
,
1236 .wait_finish
= vb2_ops_wait_finish
,
1239 #endif /* MCAM_MODE_DMA_SG */
1241 static int mcam_setup_vb2(struct mcam_camera
*cam
)
1243 struct vb2_queue
*vq
= &cam
->vb_queue
;
1245 memset(vq
, 0, sizeof(*vq
));
1246 vq
->type
= V4L2_BUF_TYPE_VIDEO_CAPTURE
;
1248 vq
->lock
= &cam
->s_mutex
;
1249 INIT_LIST_HEAD(&cam
->buffers
);
1250 switch (cam
->buffer_mode
) {
1252 #ifdef MCAM_MODE_DMA_CONTIG
1253 vq
->ops
= &mcam_vb2_ops
;
1254 vq
->mem_ops
= &vb2_dma_contig_memops
;
1255 vq
->buf_struct_size
= sizeof(struct mcam_vb_buffer
);
1256 vq
->io_modes
= VB2_MMAP
| VB2_USERPTR
;
1257 cam
->dma_setup
= mcam_ctlr_dma_contig
;
1258 cam
->frame_complete
= mcam_dma_contig_done
;
1259 cam
->vb_alloc_ctx
= vb2_dma_contig_init_ctx(cam
->dev
);
1260 if (IS_ERR(cam
->vb_alloc_ctx
))
1261 return PTR_ERR(cam
->vb_alloc_ctx
);
1265 #ifdef MCAM_MODE_DMA_SG
1266 vq
->ops
= &mcam_vb2_sg_ops
;
1267 vq
->mem_ops
= &vb2_dma_sg_memops
;
1268 vq
->buf_struct_size
= sizeof(struct mcam_vb_buffer
);
1269 vq
->io_modes
= VB2_MMAP
| VB2_USERPTR
;
1270 cam
->dma_setup
= mcam_ctlr_dma_sg
;
1271 cam
->frame_complete
= mcam_dma_sg_done
;
1272 cam
->vb_alloc_ctx_sg
= vb2_dma_sg_init_ctx(cam
->dev
);
1273 if (IS_ERR(cam
->vb_alloc_ctx_sg
))
1274 return PTR_ERR(cam
->vb_alloc_ctx_sg
);
1278 #ifdef MCAM_MODE_VMALLOC
1279 tasklet_init(&cam
->s_tasklet
, mcam_frame_tasklet
,
1280 (unsigned long) cam
);
1281 vq
->ops
= &mcam_vb2_ops
;
1282 vq
->mem_ops
= &vb2_vmalloc_memops
;
1283 vq
->buf_struct_size
= sizeof(struct mcam_vb_buffer
);
1284 vq
->io_modes
= VB2_MMAP
;
1285 cam
->dma_setup
= mcam_ctlr_dma_vmalloc
;
1286 cam
->frame_complete
= mcam_vmalloc_done
;
1290 return vb2_queue_init(vq
);
1293 static void mcam_cleanup_vb2(struct mcam_camera
*cam
)
1295 vb2_queue_release(&cam
->vb_queue
);
1296 #ifdef MCAM_MODE_DMA_CONTIG
1297 if (cam
->buffer_mode
== B_DMA_contig
)
1298 vb2_dma_contig_cleanup_ctx(cam
->vb_alloc_ctx
);
1300 #ifdef MCAM_MODE_DMA_SG
1301 if (cam
->buffer_mode
== B_DMA_sg
)
1302 vb2_dma_sg_cleanup_ctx(cam
->vb_alloc_ctx_sg
);
1307 /* ---------------------------------------------------------------------- */
1309 * The long list of V4L2 ioctl() operations.
1312 static int mcam_vidioc_streamon(struct file
*filp
, void *priv
,
1313 enum v4l2_buf_type type
)
1315 struct mcam_camera
*cam
= filp
->private_data
;
1318 mutex_lock(&cam
->s_mutex
);
1319 ret
= vb2_streamon(&cam
->vb_queue
, type
);
1320 mutex_unlock(&cam
->s_mutex
);
1325 static int mcam_vidioc_streamoff(struct file
*filp
, void *priv
,
1326 enum v4l2_buf_type type
)
1328 struct mcam_camera
*cam
= filp
->private_data
;
1331 mutex_lock(&cam
->s_mutex
);
1332 ret
= vb2_streamoff(&cam
->vb_queue
, type
);
1333 mutex_unlock(&cam
->s_mutex
);
1338 static int mcam_vidioc_reqbufs(struct file
*filp
, void *priv
,
1339 struct v4l2_requestbuffers
*req
)
1341 struct mcam_camera
*cam
= filp
->private_data
;
1344 mutex_lock(&cam
->s_mutex
);
1345 ret
= vb2_reqbufs(&cam
->vb_queue
, req
);
1346 mutex_unlock(&cam
->s_mutex
);
1351 static int mcam_vidioc_querybuf(struct file
*filp
, void *priv
,
1352 struct v4l2_buffer
*buf
)
1354 struct mcam_camera
*cam
= filp
->private_data
;
1357 mutex_lock(&cam
->s_mutex
);
1358 ret
= vb2_querybuf(&cam
->vb_queue
, buf
);
1359 mutex_unlock(&cam
->s_mutex
);
1363 static int mcam_vidioc_qbuf(struct file
*filp
, void *priv
,
1364 struct v4l2_buffer
*buf
)
1366 struct mcam_camera
*cam
= filp
->private_data
;
1369 mutex_lock(&cam
->s_mutex
);
1370 ret
= vb2_qbuf(&cam
->vb_queue
, buf
);
1371 mutex_unlock(&cam
->s_mutex
);
1375 static int mcam_vidioc_dqbuf(struct file
*filp
, void *priv
,
1376 struct v4l2_buffer
*buf
)
1378 struct mcam_camera
*cam
= filp
->private_data
;
1381 mutex_lock(&cam
->s_mutex
);
1382 ret
= vb2_dqbuf(&cam
->vb_queue
, buf
, filp
->f_flags
& O_NONBLOCK
);
1383 mutex_unlock(&cam
->s_mutex
);
1387 static int mcam_vidioc_querycap(struct file
*file
, void *priv
,
1388 struct v4l2_capability
*cap
)
1390 strcpy(cap
->driver
, "marvell_ccic");
1391 strcpy(cap
->card
, "marvell_ccic");
1392 cap
->device_caps
= V4L2_CAP_VIDEO_CAPTURE
|
1393 V4L2_CAP_READWRITE
| V4L2_CAP_STREAMING
;
1394 cap
->capabilities
= cap
->device_caps
| V4L2_CAP_DEVICE_CAPS
;
1399 static int mcam_vidioc_enum_fmt_vid_cap(struct file
*filp
,
1400 void *priv
, struct v4l2_fmtdesc
*fmt
)
1402 if (fmt
->index
>= N_MCAM_FMTS
)
1404 strlcpy(fmt
->description
, mcam_formats
[fmt
->index
].desc
,
1405 sizeof(fmt
->description
));
1406 fmt
->pixelformat
= mcam_formats
[fmt
->index
].pixelformat
;
1410 static int mcam_vidioc_try_fmt_vid_cap(struct file
*filp
, void *priv
,
1411 struct v4l2_format
*fmt
)
1413 struct mcam_camera
*cam
= priv
;
1414 struct mcam_format_struct
*f
;
1415 struct v4l2_pix_format
*pix
= &fmt
->fmt
.pix
;
1416 struct v4l2_mbus_framefmt mbus_fmt
;
1419 f
= mcam_find_format(pix
->pixelformat
);
1420 pix
->pixelformat
= f
->pixelformat
;
1421 v4l2_fill_mbus_format(&mbus_fmt
, pix
, f
->mbus_code
);
1422 mutex_lock(&cam
->s_mutex
);
1423 ret
= sensor_call(cam
, video
, try_mbus_fmt
, &mbus_fmt
);
1424 mutex_unlock(&cam
->s_mutex
);
1425 v4l2_fill_pix_format(pix
, &mbus_fmt
);
1426 switch (f
->pixelformat
) {
1427 case V4L2_PIX_FMT_YUV420
:
1428 case V4L2_PIX_FMT_YVU420
:
1429 pix
->bytesperline
= pix
->width
* 3 / 2;
1432 pix
->bytesperline
= pix
->width
* f
->bpp
;
1435 pix
->sizeimage
= pix
->height
* pix
->bytesperline
;
1439 static int mcam_vidioc_s_fmt_vid_cap(struct file
*filp
, void *priv
,
1440 struct v4l2_format
*fmt
)
1442 struct mcam_camera
*cam
= priv
;
1443 struct mcam_format_struct
*f
;
1447 * Can't do anything if the device is not idle
1448 * Also can't if there are streaming buffers in place.
1450 if (cam
->state
!= S_IDLE
|| cam
->vb_queue
.num_buffers
> 0)
1453 f
= mcam_find_format(fmt
->fmt
.pix
.pixelformat
);
1456 * See if the formatting works in principle.
1458 ret
= mcam_vidioc_try_fmt_vid_cap(filp
, priv
, fmt
);
1462 * Now we start to change things for real, so let's do it
1465 mutex_lock(&cam
->s_mutex
);
1466 cam
->pix_format
= fmt
->fmt
.pix
;
1467 cam
->mbus_code
= f
->mbus_code
;
1470 * Make sure we have appropriate DMA buffers.
1472 if (cam
->buffer_mode
== B_vmalloc
) {
1473 ret
= mcam_check_dma_buffers(cam
);
1477 mcam_set_config_needed(cam
, 1);
1479 mutex_unlock(&cam
->s_mutex
);
1484 * Return our stored notion of how the camera is/should be configured.
1485 * The V4l2 spec wants us to be smarter, and actually get this from
1486 * the camera (and not mess with it at open time). Someday.
1488 static int mcam_vidioc_g_fmt_vid_cap(struct file
*filp
, void *priv
,
1489 struct v4l2_format
*f
)
1491 struct mcam_camera
*cam
= priv
;
1493 f
->fmt
.pix
= cam
->pix_format
;
1498 * We only have one input - the sensor - so minimize the nonsense here.
1500 static int mcam_vidioc_enum_input(struct file
*filp
, void *priv
,
1501 struct v4l2_input
*input
)
1503 if (input
->index
!= 0)
1506 input
->type
= V4L2_INPUT_TYPE_CAMERA
;
1507 input
->std
= V4L2_STD_ALL
; /* Not sure what should go here */
1508 strcpy(input
->name
, "Camera");
1512 static int mcam_vidioc_g_input(struct file
*filp
, void *priv
, unsigned int *i
)
1518 static int mcam_vidioc_s_input(struct file
*filp
, void *priv
, unsigned int i
)
1526 static int mcam_vidioc_s_std(struct file
*filp
, void *priv
, v4l2_std_id a
)
1531 static int mcam_vidioc_g_std(struct file
*filp
, void *priv
, v4l2_std_id
*a
)
1533 *a
= V4L2_STD_NTSC_M
;
1538 * G/S_PARM. Most of this is done by the sensor, but we are
1539 * the level which controls the number of read buffers.
1541 static int mcam_vidioc_g_parm(struct file
*filp
, void *priv
,
1542 struct v4l2_streamparm
*parms
)
1544 struct mcam_camera
*cam
= priv
;
1547 mutex_lock(&cam
->s_mutex
);
1548 ret
= sensor_call(cam
, video
, g_parm
, parms
);
1549 mutex_unlock(&cam
->s_mutex
);
1550 parms
->parm
.capture
.readbuffers
= n_dma_bufs
;
1554 static int mcam_vidioc_s_parm(struct file
*filp
, void *priv
,
1555 struct v4l2_streamparm
*parms
)
1557 struct mcam_camera
*cam
= priv
;
1560 mutex_lock(&cam
->s_mutex
);
1561 ret
= sensor_call(cam
, video
, s_parm
, parms
);
1562 mutex_unlock(&cam
->s_mutex
);
1563 parms
->parm
.capture
.readbuffers
= n_dma_bufs
;
1567 static int mcam_vidioc_enum_framesizes(struct file
*filp
, void *priv
,
1568 struct v4l2_frmsizeenum
*sizes
)
1570 struct mcam_camera
*cam
= priv
;
1571 struct mcam_format_struct
*f
;
1572 struct v4l2_subdev_frame_size_enum fse
= {
1573 .index
= sizes
->index
,
1574 .which
= V4L2_SUBDEV_FORMAT_ACTIVE
,
1578 f
= mcam_find_format(sizes
->pixel_format
);
1579 if (f
->pixelformat
!= sizes
->pixel_format
)
1581 fse
.code
= f
->mbus_code
;
1582 mutex_lock(&cam
->s_mutex
);
1583 ret
= sensor_call(cam
, pad
, enum_frame_size
, NULL
, &fse
);
1584 mutex_unlock(&cam
->s_mutex
);
1587 if (fse
.min_width
== fse
.max_width
&&
1588 fse
.min_height
== fse
.max_height
) {
1589 sizes
->type
= V4L2_FRMSIZE_TYPE_DISCRETE
;
1590 sizes
->discrete
.width
= fse
.min_width
;
1591 sizes
->discrete
.height
= fse
.min_height
;
1594 sizes
->type
= V4L2_FRMSIZE_TYPE_CONTINUOUS
;
1595 sizes
->stepwise
.min_width
= fse
.min_width
;
1596 sizes
->stepwise
.max_width
= fse
.max_width
;
1597 sizes
->stepwise
.min_height
= fse
.min_height
;
1598 sizes
->stepwise
.max_height
= fse
.max_height
;
1599 sizes
->stepwise
.step_width
= 1;
1600 sizes
->stepwise
.step_height
= 1;
1604 static int mcam_vidioc_enum_frameintervals(struct file
*filp
, void *priv
,
1605 struct v4l2_frmivalenum
*interval
)
1607 struct mcam_camera
*cam
= priv
;
1608 struct mcam_format_struct
*f
;
1609 struct v4l2_subdev_frame_interval_enum fie
= {
1610 .index
= interval
->index
,
1611 .width
= interval
->width
,
1612 .height
= interval
->height
,
1613 .which
= V4L2_SUBDEV_FORMAT_ACTIVE
,
1617 f
= mcam_find_format(interval
->pixel_format
);
1618 if (f
->pixelformat
!= interval
->pixel_format
)
1620 fie
.code
= f
->mbus_code
;
1621 mutex_lock(&cam
->s_mutex
);
1622 ret
= sensor_call(cam
, pad
, enum_frame_interval
, NULL
, &fie
);
1623 mutex_unlock(&cam
->s_mutex
);
1626 interval
->type
= V4L2_FRMIVAL_TYPE_DISCRETE
;
1627 interval
->discrete
= fie
.interval
;
1631 #ifdef CONFIG_VIDEO_ADV_DEBUG
1632 static int mcam_vidioc_g_register(struct file
*file
, void *priv
,
1633 struct v4l2_dbg_register
*reg
)
1635 struct mcam_camera
*cam
= priv
;
1637 if (reg
->reg
> cam
->regs_size
- 4)
1639 reg
->val
= mcam_reg_read(cam
, reg
->reg
);
1644 static int mcam_vidioc_s_register(struct file
*file
, void *priv
,
1645 const struct v4l2_dbg_register
*reg
)
1647 struct mcam_camera
*cam
= priv
;
1649 if (reg
->reg
> cam
->regs_size
- 4)
1651 mcam_reg_write(cam
, reg
->reg
, reg
->val
);
1656 static const struct v4l2_ioctl_ops mcam_v4l_ioctl_ops
= {
1657 .vidioc_querycap
= mcam_vidioc_querycap
,
1658 .vidioc_enum_fmt_vid_cap
= mcam_vidioc_enum_fmt_vid_cap
,
1659 .vidioc_try_fmt_vid_cap
= mcam_vidioc_try_fmt_vid_cap
,
1660 .vidioc_s_fmt_vid_cap
= mcam_vidioc_s_fmt_vid_cap
,
1661 .vidioc_g_fmt_vid_cap
= mcam_vidioc_g_fmt_vid_cap
,
1662 .vidioc_enum_input
= mcam_vidioc_enum_input
,
1663 .vidioc_g_input
= mcam_vidioc_g_input
,
1664 .vidioc_s_input
= mcam_vidioc_s_input
,
1665 .vidioc_s_std
= mcam_vidioc_s_std
,
1666 .vidioc_g_std
= mcam_vidioc_g_std
,
1667 .vidioc_reqbufs
= mcam_vidioc_reqbufs
,
1668 .vidioc_querybuf
= mcam_vidioc_querybuf
,
1669 .vidioc_qbuf
= mcam_vidioc_qbuf
,
1670 .vidioc_dqbuf
= mcam_vidioc_dqbuf
,
1671 .vidioc_streamon
= mcam_vidioc_streamon
,
1672 .vidioc_streamoff
= mcam_vidioc_streamoff
,
1673 .vidioc_g_parm
= mcam_vidioc_g_parm
,
1674 .vidioc_s_parm
= mcam_vidioc_s_parm
,
1675 .vidioc_enum_framesizes
= mcam_vidioc_enum_framesizes
,
1676 .vidioc_enum_frameintervals
= mcam_vidioc_enum_frameintervals
,
1677 #ifdef CONFIG_VIDEO_ADV_DEBUG
1678 .vidioc_g_register
= mcam_vidioc_g_register
,
1679 .vidioc_s_register
= mcam_vidioc_s_register
,
1683 /* ---------------------------------------------------------------------- */
1685 * Our various file operations.
1687 static int mcam_v4l_open(struct file
*filp
)
1689 struct mcam_camera
*cam
= video_drvdata(filp
);
1692 filp
->private_data
= cam
;
1694 cam
->frame_state
.frames
= 0;
1695 cam
->frame_state
.singles
= 0;
1696 cam
->frame_state
.delivered
= 0;
1697 mutex_lock(&cam
->s_mutex
);
1698 if (cam
->users
== 0) {
1699 ret
= mcam_setup_vb2(cam
);
1702 ret
= mcam_ctlr_power_up(cam
);
1705 __mcam_cam_reset(cam
);
1706 mcam_set_config_needed(cam
, 1);
1710 mutex_unlock(&cam
->s_mutex
);
1715 static int mcam_v4l_release(struct file
*filp
)
1717 struct mcam_camera
*cam
= filp
->private_data
;
1719 cam_dbg(cam
, "Release, %d frames, %d singles, %d delivered\n",
1720 cam
->frame_state
.frames
, cam
->frame_state
.singles
,
1721 cam
->frame_state
.delivered
);
1722 mutex_lock(&cam
->s_mutex
);
1724 if (cam
->users
== 0) {
1725 mcam_ctlr_stop_dma(cam
);
1726 mcam_cleanup_vb2(cam
);
1727 mcam_disable_mipi(cam
);
1728 mcam_ctlr_power_down(cam
);
1729 if (cam
->buffer_mode
== B_vmalloc
&& alloc_bufs_at_read
)
1730 mcam_free_dma_bufs(cam
);
1733 mutex_unlock(&cam
->s_mutex
);
1737 static ssize_t
mcam_v4l_read(struct file
*filp
,
1738 char __user
*buffer
, size_t len
, loff_t
*pos
)
1740 struct mcam_camera
*cam
= filp
->private_data
;
1743 mutex_lock(&cam
->s_mutex
);
1744 ret
= vb2_read(&cam
->vb_queue
, buffer
, len
, pos
,
1745 filp
->f_flags
& O_NONBLOCK
);
1746 mutex_unlock(&cam
->s_mutex
);
1752 static unsigned int mcam_v4l_poll(struct file
*filp
,
1753 struct poll_table_struct
*pt
)
1755 struct mcam_camera
*cam
= filp
->private_data
;
1758 mutex_lock(&cam
->s_mutex
);
1759 ret
= vb2_poll(&cam
->vb_queue
, filp
, pt
);
1760 mutex_unlock(&cam
->s_mutex
);
1765 static int mcam_v4l_mmap(struct file
*filp
, struct vm_area_struct
*vma
)
1767 struct mcam_camera
*cam
= filp
->private_data
;
1770 mutex_lock(&cam
->s_mutex
);
1771 ret
= vb2_mmap(&cam
->vb_queue
, vma
);
1772 mutex_unlock(&cam
->s_mutex
);
1778 static const struct v4l2_file_operations mcam_v4l_fops
= {
1779 .owner
= THIS_MODULE
,
1780 .open
= mcam_v4l_open
,
1781 .release
= mcam_v4l_release
,
1782 .read
= mcam_v4l_read
,
1783 .poll
= mcam_v4l_poll
,
1784 .mmap
= mcam_v4l_mmap
,
1785 .unlocked_ioctl
= video_ioctl2
,
1790 * This template device holds all of those v4l2 methods; we
1791 * clone it for specific real devices.
1793 static struct video_device mcam_v4l_template
= {
1795 .tvnorms
= V4L2_STD_NTSC_M
,
1797 .fops
= &mcam_v4l_fops
,
1798 .ioctl_ops
= &mcam_v4l_ioctl_ops
,
1799 .release
= video_device_release_empty
,
1802 /* ---------------------------------------------------------------------- */
1804 * Interrupt handler stuff
1806 static void mcam_frame_complete(struct mcam_camera
*cam
, int frame
)
1809 * Basic frame housekeeping.
1811 set_bit(frame
, &cam
->flags
);
1812 clear_bit(CF_DMA_ACTIVE
, &cam
->flags
);
1813 cam
->next_buf
= frame
;
1814 cam
->buf_seq
[frame
] = ++(cam
->sequence
);
1815 cam
->frame_state
.frames
++;
1817 * "This should never happen"
1819 if (cam
->state
!= S_STREAMING
)
1822 * Process the frame and set up the next one.
1824 cam
->frame_complete(cam
, frame
);
1829 * The interrupt handler; this needs to be called from the
1830 * platform irq handler with the lock held.
1832 int mccic_irq(struct mcam_camera
*cam
, unsigned int irqs
)
1834 unsigned int frame
, handled
= 0;
1836 mcam_reg_write(cam
, REG_IRQSTAT
, FRAMEIRQS
); /* Clear'em all */
1838 * Handle any frame completions. There really should
1839 * not be more than one of these, or we have fallen
1842 * When running in S/G mode, the frame number lacks any
1843 * real meaning - there's only one descriptor array - but
1844 * the controller still picks a different one to signal
1847 for (frame
= 0; frame
< cam
->nbufs
; frame
++)
1848 if (irqs
& (IRQ_EOF0
<< frame
) &&
1849 test_bit(CF_FRAME_SOF0
+ frame
, &cam
->flags
)) {
1850 mcam_frame_complete(cam
, frame
);
1852 clear_bit(CF_FRAME_SOF0
+ frame
, &cam
->flags
);
1853 if (cam
->buffer_mode
== B_DMA_sg
)
1857 * If a frame starts, note that we have DMA active. This
1858 * code assumes that we won't get multiple frame interrupts
1859 * at once; may want to rethink that.
1861 for (frame
= 0; frame
< cam
->nbufs
; frame
++) {
1862 if (irqs
& (IRQ_SOF0
<< frame
)) {
1863 set_bit(CF_FRAME_SOF0
+ frame
, &cam
->flags
);
1864 handled
= IRQ_HANDLED
;
1868 if (handled
== IRQ_HANDLED
) {
1869 set_bit(CF_DMA_ACTIVE
, &cam
->flags
);
1870 if (cam
->buffer_mode
== B_DMA_sg
)
1871 mcam_ctlr_stop(cam
);
1876 /* ---------------------------------------------------------------------- */
1878 * Registration and such.
1880 static struct ov7670_config sensor_cfg
= {
1882 * Exclude QCIF mode, because it only captures a tiny portion
1890 int mccic_register(struct mcam_camera
*cam
)
1892 struct i2c_board_info ov7670_info
= {
1895 .platform_data
= &sensor_cfg
,
1900 * Validate the requested buffer mode.
1902 if (buffer_mode
>= 0)
1903 cam
->buffer_mode
= buffer_mode
;
1904 if (cam
->buffer_mode
== B_DMA_sg
&&
1905 cam
->chip_id
== MCAM_CAFE
) {
1906 printk(KERN_ERR
"marvell-cam: Cafe can't do S/G I/O, "
1907 "attempting vmalloc mode instead\n");
1908 cam
->buffer_mode
= B_vmalloc
;
1910 if (!mcam_buffer_mode_supported(cam
->buffer_mode
)) {
1911 printk(KERN_ERR
"marvell-cam: buffer mode %d unsupported\n",
1918 ret
= v4l2_device_register(cam
->dev
, &cam
->v4l2_dev
);
1922 mutex_init(&cam
->s_mutex
);
1923 cam
->state
= S_NOTREADY
;
1924 mcam_set_config_needed(cam
, 1);
1925 cam
->pix_format
= mcam_def_pix_format
;
1926 cam
->mbus_code
= mcam_def_mbus_code
;
1927 INIT_LIST_HEAD(&cam
->buffers
);
1928 mcam_ctlr_init(cam
);
1931 * Try to find the sensor.
1933 sensor_cfg
.clock_speed
= cam
->clock_speed
;
1934 sensor_cfg
.use_smbus
= cam
->use_smbus
;
1935 cam
->sensor_addr
= ov7670_info
.addr
;
1936 cam
->sensor
= v4l2_i2c_new_subdev_board(&cam
->v4l2_dev
,
1937 cam
->i2c_adapter
, &ov7670_info
, NULL
);
1938 if (cam
->sensor
== NULL
) {
1940 goto out_unregister
;
1943 ret
= mcam_cam_init(cam
);
1945 goto out_unregister
;
1947 * Get the v4l2 setup done.
1949 ret
= v4l2_ctrl_handler_init(&cam
->ctrl_handler
, 10);
1951 goto out_unregister
;
1952 cam
->v4l2_dev
.ctrl_handler
= &cam
->ctrl_handler
;
1954 mutex_lock(&cam
->s_mutex
);
1955 cam
->vdev
= mcam_v4l_template
;
1956 cam
->vdev
.v4l2_dev
= &cam
->v4l2_dev
;
1957 video_set_drvdata(&cam
->vdev
, cam
);
1958 ret
= video_register_device(&cam
->vdev
, VFL_TYPE_GRABBER
, -1);
1963 * If so requested, try to get our DMA buffers now.
1965 if (cam
->buffer_mode
== B_vmalloc
&& !alloc_bufs_at_read
) {
1966 if (mcam_alloc_dma_bufs(cam
, 1))
1967 cam_warn(cam
, "Unable to alloc DMA buffers at load"
1968 " will try again later.");
1972 v4l2_ctrl_handler_free(&cam
->ctrl_handler
);
1973 mutex_unlock(&cam
->s_mutex
);
1976 v4l2_device_unregister(&cam
->v4l2_dev
);
1981 void mccic_shutdown(struct mcam_camera
*cam
)
1984 * If we have no users (and we really, really should have no
1985 * users) the device will already be powered down. Trying to
1986 * take it down again will wedge the machine, which is frowned
1989 if (cam
->users
> 0) {
1990 cam_warn(cam
, "Removing a device with users!\n");
1991 mcam_ctlr_power_down(cam
);
1993 vb2_queue_release(&cam
->vb_queue
);
1994 if (cam
->buffer_mode
== B_vmalloc
)
1995 mcam_free_dma_bufs(cam
);
1996 video_unregister_device(&cam
->vdev
);
1997 v4l2_ctrl_handler_free(&cam
->ctrl_handler
);
1998 v4l2_device_unregister(&cam
->v4l2_dev
);
2006 void mccic_suspend(struct mcam_camera
*cam
)
2008 mutex_lock(&cam
->s_mutex
);
2009 if (cam
->users
> 0) {
2010 enum mcam_state cstate
= cam
->state
;
2012 mcam_ctlr_stop_dma(cam
);
2013 mcam_ctlr_power_down(cam
);
2014 cam
->state
= cstate
;
2016 mutex_unlock(&cam
->s_mutex
);
2019 int mccic_resume(struct mcam_camera
*cam
)
2023 mutex_lock(&cam
->s_mutex
);
2024 if (cam
->users
> 0) {
2025 ret
= mcam_ctlr_power_up(cam
);
2027 mutex_unlock(&cam
->s_mutex
);
2030 __mcam_cam_reset(cam
);
2032 mcam_ctlr_power_down(cam
);
2034 mutex_unlock(&cam
->s_mutex
);
2036 set_bit(CF_CONFIG_NEEDED
, &cam
->flags
);
2037 if (cam
->state
== S_STREAMING
) {
2039 * If there was a buffer in the DMA engine at suspend
2040 * time, put it back on the queue or we'll forget about it.
2042 if (cam
->buffer_mode
== B_DMA_sg
&& cam
->vb_bufs
[0])
2043 list_add(&cam
->vb_bufs
[0]->queue
, &cam
->buffers
);
2044 ret
= mcam_read_setup(cam
);
2048 #endif /* CONFIG_PM */