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ACPI / LPSS: make code less confusing for reader
[deliverable/linux.git] / drivers / media / platform / s5p-mfc / s5p_mfc_enc.c
1 /*
2 * linux/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
3 *
4 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com/
6 *
7 * Jeongtae Park <jtp.park@samsung.com>
8 * Kamil Debski <k.debski@samsung.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16 #include <linux/clk.h>
17 #include <linux/interrupt.h>
18 #include <linux/io.h>
19 #include <linux/module.h>
20 #include <linux/platform_device.h>
21 #include <linux/sched.h>
22 #include <linux/version.h>
23 #include <linux/videodev2.h>
24 #include <media/v4l2-event.h>
25 #include <linux/workqueue.h>
26 #include <media/v4l2-ctrls.h>
27 #include <media/videobuf2-core.h>
28 #include "s5p_mfc_common.h"
29 #include "s5p_mfc_debug.h"
30 #include "s5p_mfc_enc.h"
31 #include "s5p_mfc_intr.h"
32 #include "s5p_mfc_opr.h"
33
34 #define DEF_SRC_FMT_ENC V4L2_PIX_FMT_NV12MT
35 #define DEF_DST_FMT_ENC V4L2_PIX_FMT_H264
36
37 static struct s5p_mfc_fmt formats[] = {
38 {
39 .name = "4:2:0 2 Planes 16x16 Tiles",
40 .fourcc = V4L2_PIX_FMT_NV12MT_16X16,
41 .codec_mode = S5P_MFC_CODEC_NONE,
42 .type = MFC_FMT_RAW,
43 .num_planes = 2,
44 },
45 {
46 .name = "4:2:0 2 Planes 64x32 Tiles",
47 .fourcc = V4L2_PIX_FMT_NV12MT,
48 .codec_mode = S5P_MFC_CODEC_NONE,
49 .type = MFC_FMT_RAW,
50 .num_planes = 2,
51 },
52 {
53 .name = "4:2:0 2 Planes Y/CbCr",
54 .fourcc = V4L2_PIX_FMT_NV12M,
55 .codec_mode = S5P_MFC_CODEC_NONE,
56 .type = MFC_FMT_RAW,
57 .num_planes = 2,
58 },
59 {
60 .name = "4:2:0 2 Planes Y/CrCb",
61 .fourcc = V4L2_PIX_FMT_NV21M,
62 .codec_mode = S5P_MFC_CODEC_NONE,
63 .type = MFC_FMT_RAW,
64 .num_planes = 2,
65 },
66 {
67 .name = "H264 Encoded Stream",
68 .fourcc = V4L2_PIX_FMT_H264,
69 .codec_mode = S5P_MFC_CODEC_H264_ENC,
70 .type = MFC_FMT_ENC,
71 .num_planes = 1,
72 },
73 {
74 .name = "MPEG4 Encoded Stream",
75 .fourcc = V4L2_PIX_FMT_MPEG4,
76 .codec_mode = S5P_MFC_CODEC_MPEG4_ENC,
77 .type = MFC_FMT_ENC,
78 .num_planes = 1,
79 },
80 {
81 .name = "H263 Encoded Stream",
82 .fourcc = V4L2_PIX_FMT_H263,
83 .codec_mode = S5P_MFC_CODEC_H263_ENC,
84 .type = MFC_FMT_ENC,
85 .num_planes = 1,
86 },
87 };
88
89 #define NUM_FORMATS ARRAY_SIZE(formats)
90 static struct s5p_mfc_fmt *find_format(struct v4l2_format *f, unsigned int t)
91 {
92 unsigned int i;
93
94 for (i = 0; i < NUM_FORMATS; i++) {
95 if (formats[i].fourcc == f->fmt.pix_mp.pixelformat &&
96 formats[i].type == t)
97 return &formats[i];
98 }
99 return NULL;
100 }
101
102 static struct mfc_control controls[] = {
103 {
104 .id = V4L2_CID_MPEG_VIDEO_GOP_SIZE,
105 .type = V4L2_CTRL_TYPE_INTEGER,
106 .minimum = 0,
107 .maximum = (1 << 16) - 1,
108 .step = 1,
109 .default_value = 0,
110 },
111 {
112 .id = V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE,
113 .type = V4L2_CTRL_TYPE_MENU,
114 .minimum = V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE,
115 .maximum = V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES,
116 .default_value = V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE,
117 .menu_skip_mask = 0,
118 },
119 {
120 .id = V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB,
121 .type = V4L2_CTRL_TYPE_INTEGER,
122 .minimum = 1,
123 .maximum = (1 << 16) - 1,
124 .step = 1,
125 .default_value = 1,
126 },
127 {
128 .id = V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES,
129 .type = V4L2_CTRL_TYPE_INTEGER,
130 .minimum = 1900,
131 .maximum = (1 << 30) - 1,
132 .step = 1,
133 .default_value = 1900,
134 },
135 {
136 .id = V4L2_CID_MPEG_VIDEO_CYCLIC_INTRA_REFRESH_MB,
137 .type = V4L2_CTRL_TYPE_INTEGER,
138 .minimum = 0,
139 .maximum = (1 << 16) - 1,
140 .step = 1,
141 .default_value = 0,
142 },
143 {
144 .id = V4L2_CID_MPEG_MFC51_VIDEO_PADDING,
145 .type = V4L2_CTRL_TYPE_BOOLEAN,
146 .name = "Padding Control Enable",
147 .minimum = 0,
148 .maximum = 1,
149 .step = 1,
150 .default_value = 0,
151 },
152 {
153 .id = V4L2_CID_MPEG_MFC51_VIDEO_PADDING_YUV,
154 .type = V4L2_CTRL_TYPE_INTEGER,
155 .name = "Padding Color YUV Value",
156 .minimum = 0,
157 .maximum = (1 << 25) - 1,
158 .step = 1,
159 .default_value = 0,
160 },
161 {
162 .id = V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE,
163 .type = V4L2_CTRL_TYPE_BOOLEAN,
164 .minimum = 0,
165 .maximum = 1,
166 .step = 1,
167 .default_value = 0,
168 },
169 {
170 .id = V4L2_CID_MPEG_VIDEO_BITRATE,
171 .type = V4L2_CTRL_TYPE_INTEGER,
172 .minimum = 1,
173 .maximum = (1 << 30) - 1,
174 .step = 1,
175 .default_value = 1,
176 },
177 {
178 .id = V4L2_CID_MPEG_MFC51_VIDEO_RC_REACTION_COEFF,
179 .type = V4L2_CTRL_TYPE_INTEGER,
180 .name = "Rate Control Reaction Coeff.",
181 .minimum = 1,
182 .maximum = (1 << 16) - 1,
183 .step = 1,
184 .default_value = 1,
185 },
186 {
187 .id = V4L2_CID_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE,
188 .type = V4L2_CTRL_TYPE_MENU,
189 .name = "Force frame type",
190 .minimum = V4L2_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE_DISABLED,
191 .maximum = V4L2_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE_NOT_CODED,
192 .default_value = V4L2_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE_DISABLED,
193 .menu_skip_mask = 0,
194 },
195 {
196 .id = V4L2_CID_MPEG_VIDEO_VBV_SIZE,
197 .type = V4L2_CTRL_TYPE_INTEGER,
198 .minimum = 0,
199 .maximum = (1 << 16) - 1,
200 .step = 1,
201 .default_value = 0,
202 },
203 {
204 .id = V4L2_CID_MPEG_VIDEO_H264_CPB_SIZE,
205 .type = V4L2_CTRL_TYPE_INTEGER,
206 .minimum = 0,
207 .maximum = (1 << 16) - 1,
208 .step = 1,
209 .default_value = 0,
210 },
211 {
212 .id = V4L2_CID_MPEG_VIDEO_HEADER_MODE,
213 .type = V4L2_CTRL_TYPE_MENU,
214 .minimum = V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE,
215 .maximum = V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME,
216 .default_value = V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE,
217 .menu_skip_mask = 0,
218 },
219 {
220 .id = V4L2_CID_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE,
221 .type = V4L2_CTRL_TYPE_MENU,
222 .name = "Frame Skip Enable",
223 .minimum = V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_DISABLED,
224 .maximum = V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT,
225 .menu_skip_mask = 0,
226 .default_value = V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_DISABLED,
227 },
228 {
229 .id = V4L2_CID_MPEG_MFC51_VIDEO_RC_FIXED_TARGET_BIT,
230 .type = V4L2_CTRL_TYPE_BOOLEAN,
231 .name = "Fixed Target Bit Enable",
232 .minimum = 0,
233 .maximum = 1,
234 .default_value = 0,
235 .menu_skip_mask = 0,
236 },
237 {
238 .id = V4L2_CID_MPEG_VIDEO_B_FRAMES,
239 .type = V4L2_CTRL_TYPE_INTEGER,
240 .minimum = 0,
241 .maximum = 2,
242 .step = 1,
243 .default_value = 0,
244 },
245 {
246 .id = V4L2_CID_MPEG_VIDEO_H264_PROFILE,
247 .type = V4L2_CTRL_TYPE_MENU,
248 .minimum = V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE,
249 .maximum = V4L2_MPEG_VIDEO_H264_PROFILE_MULTIVIEW_HIGH,
250 .default_value = V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE,
251 .menu_skip_mask = ~(
252 (1 << V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) |
253 (1 << V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) |
254 (1 << V4L2_MPEG_VIDEO_H264_PROFILE_HIGH)
255 ),
256 },
257 {
258 .id = V4L2_CID_MPEG_VIDEO_H264_LEVEL,
259 .type = V4L2_CTRL_TYPE_MENU,
260 .minimum = V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
261 .maximum = V4L2_MPEG_VIDEO_H264_LEVEL_4_0,
262 .default_value = V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
263 },
264 {
265 .id = V4L2_CID_MPEG_VIDEO_MPEG4_LEVEL,
266 .type = V4L2_CTRL_TYPE_MENU,
267 .minimum = V4L2_MPEG_VIDEO_MPEG4_LEVEL_0,
268 .maximum = V4L2_MPEG_VIDEO_MPEG4_LEVEL_5,
269 .default_value = V4L2_MPEG_VIDEO_MPEG4_LEVEL_0,
270 .menu_skip_mask = 0,
271 },
272 {
273 .id = V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE,
274 .type = V4L2_CTRL_TYPE_MENU,
275 .minimum = V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED,
276 .maximum = V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED_AT_SLICE_BOUNDARY,
277 .default_value = V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED,
278 .menu_skip_mask = 0,
279 },
280 {
281 .id = V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA,
282 .type = V4L2_CTRL_TYPE_INTEGER,
283 .minimum = -6,
284 .maximum = 6,
285 .step = 1,
286 .default_value = 0,
287 },
288 {
289 .id = V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA,
290 .type = V4L2_CTRL_TYPE_INTEGER,
291 .minimum = -6,
292 .maximum = 6,
293 .step = 1,
294 .default_value = 0,
295 },
296 {
297 .id = V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE,
298 .type = V4L2_CTRL_TYPE_MENU,
299 .minimum = V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC,
300 .maximum = V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC,
301 .default_value = V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC,
302 .menu_skip_mask = 0,
303 },
304 {
305 .id = V4L2_CID_MPEG_MFC51_VIDEO_H264_NUM_REF_PIC_FOR_P,
306 .type = V4L2_CTRL_TYPE_INTEGER,
307 .name = "The Number of Ref. Pic for P",
308 .minimum = 1,
309 .maximum = 2,
310 .step = 1,
311 .default_value = 1,
312 },
313 {
314 .id = V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM,
315 .type = V4L2_CTRL_TYPE_BOOLEAN,
316 .minimum = 0,
317 .maximum = 1,
318 .step = 1,
319 .default_value = 0,
320 },
321 {
322 .id = V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE,
323 .type = V4L2_CTRL_TYPE_BOOLEAN,
324 .minimum = 0,
325 .maximum = 1,
326 .step = 1,
327 .default_value = 0,
328 },
329 {
330 .id = V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP,
331 .type = V4L2_CTRL_TYPE_INTEGER,
332 .minimum = 0,
333 .maximum = 51,
334 .step = 1,
335 .default_value = 1,
336 },
337 {
338 .id = V4L2_CID_MPEG_VIDEO_H264_MIN_QP,
339 .type = V4L2_CTRL_TYPE_INTEGER,
340 .minimum = 0,
341 .maximum = 51,
342 .step = 1,
343 .default_value = 1,
344 },
345 {
346 .id = V4L2_CID_MPEG_VIDEO_H264_MAX_QP,
347 .type = V4L2_CTRL_TYPE_INTEGER,
348 .minimum = 0,
349 .maximum = 51,
350 .step = 1,
351 .default_value = 1,
352 },
353 {
354 .id = V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP,
355 .type = V4L2_CTRL_TYPE_INTEGER,
356 .minimum = 0,
357 .maximum = 51,
358 .step = 1,
359 .default_value = 1,
360 },
361 {
362 .id = V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP,
363 .type = V4L2_CTRL_TYPE_INTEGER,
364 .minimum = 0,
365 .maximum = 51,
366 .step = 1,
367 .default_value = 1,
368 },
369 {
370 .id = V4L2_CID_MPEG_VIDEO_H263_I_FRAME_QP,
371 .type = V4L2_CTRL_TYPE_INTEGER,
372 .name = "H263 I-Frame QP value",
373 .minimum = 1,
374 .maximum = 31,
375 .step = 1,
376 .default_value = 1,
377 },
378 {
379 .id = V4L2_CID_MPEG_VIDEO_H263_MIN_QP,
380 .type = V4L2_CTRL_TYPE_INTEGER,
381 .name = "H263 Minimum QP value",
382 .minimum = 1,
383 .maximum = 31,
384 .step = 1,
385 .default_value = 1,
386 },
387 {
388 .id = V4L2_CID_MPEG_VIDEO_H263_MAX_QP,
389 .type = V4L2_CTRL_TYPE_INTEGER,
390 .name = "H263 Maximum QP value",
391 .minimum = 1,
392 .maximum = 31,
393 .step = 1,
394 .default_value = 1,
395 },
396 {
397 .id = V4L2_CID_MPEG_VIDEO_H263_P_FRAME_QP,
398 .type = V4L2_CTRL_TYPE_INTEGER,
399 .name = "H263 P frame QP value",
400 .minimum = 1,
401 .maximum = 31,
402 .step = 1,
403 .default_value = 1,
404 },
405 {
406 .id = V4L2_CID_MPEG_VIDEO_H263_B_FRAME_QP,
407 .type = V4L2_CTRL_TYPE_INTEGER,
408 .name = "H263 B frame QP value",
409 .minimum = 1,
410 .maximum = 31,
411 .step = 1,
412 .default_value = 1,
413 },
414 {
415 .id = V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP,
416 .type = V4L2_CTRL_TYPE_INTEGER,
417 .name = "MPEG4 I-Frame QP value",
418 .minimum = 1,
419 .maximum = 31,
420 .step = 1,
421 .default_value = 1,
422 },
423 {
424 .id = V4L2_CID_MPEG_VIDEO_MPEG4_MIN_QP,
425 .type = V4L2_CTRL_TYPE_INTEGER,
426 .name = "MPEG4 Minimum QP value",
427 .minimum = 1,
428 .maximum = 31,
429 .step = 1,
430 .default_value = 1,
431 },
432 {
433 .id = V4L2_CID_MPEG_VIDEO_MPEG4_MAX_QP,
434 .type = V4L2_CTRL_TYPE_INTEGER,
435 .name = "MPEG4 Maximum QP value",
436 .minimum = 0,
437 .maximum = 51,
438 .step = 1,
439 .default_value = 1,
440 },
441 {
442 .id = V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP,
443 .type = V4L2_CTRL_TYPE_INTEGER,
444 .name = "MPEG4 P frame QP value",
445 .minimum = 1,
446 .maximum = 31,
447 .step = 1,
448 .default_value = 1,
449 },
450 {
451 .id = V4L2_CID_MPEG_VIDEO_MPEG4_B_FRAME_QP,
452 .type = V4L2_CTRL_TYPE_INTEGER,
453 .name = "MPEG4 B frame QP value",
454 .minimum = 1,
455 .maximum = 31,
456 .step = 1,
457 .default_value = 1,
458 },
459 {
460 .id = V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_DARK,
461 .type = V4L2_CTRL_TYPE_BOOLEAN,
462 .name = "H264 Dark Reg Adaptive RC",
463 .minimum = 0,
464 .maximum = 1,
465 .step = 1,
466 .default_value = 0,
467 },
468 {
469 .id = V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_SMOOTH,
470 .type = V4L2_CTRL_TYPE_BOOLEAN,
471 .name = "H264 Smooth Reg Adaptive RC",
472 .minimum = 0,
473 .maximum = 1,
474 .step = 1,
475 .default_value = 0,
476 },
477 {
478 .id = V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_STATIC,
479 .type = V4L2_CTRL_TYPE_BOOLEAN,
480 .name = "H264 Static Reg Adaptive RC",
481 .minimum = 0,
482 .maximum = 1,
483 .step = 1,
484 .default_value = 0,
485 },
486 {
487 .id = V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_ACTIVITY,
488 .type = V4L2_CTRL_TYPE_BOOLEAN,
489 .name = "H264 Activity Reg Adaptive RC",
490 .minimum = 0,
491 .maximum = 1,
492 .step = 1,
493 .default_value = 0,
494 },
495 {
496 .id = V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_ENABLE,
497 .type = V4L2_CTRL_TYPE_BOOLEAN,
498 .minimum = 0,
499 .maximum = 1,
500 .step = 1,
501 .default_value = 0,
502 },
503 {
504 .id = V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_IDC,
505 .type = V4L2_CTRL_TYPE_MENU,
506 .minimum = V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_UNSPECIFIED,
507 .maximum = V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_EXTENDED,
508 .default_value = V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_UNSPECIFIED,
509 .menu_skip_mask = 0,
510 },
511 {
512 .id = V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_WIDTH,
513 .type = V4L2_CTRL_TYPE_INTEGER,
514 .minimum = 0,
515 .maximum = (1 << 16) - 1,
516 .step = 1,
517 .default_value = 0,
518 },
519 {
520 .id = V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_HEIGHT,
521 .type = V4L2_CTRL_TYPE_INTEGER,
522 .minimum = 0,
523 .maximum = (1 << 16) - 1,
524 .step = 1,
525 .default_value = 0,
526 },
527 {
528 .id = V4L2_CID_MPEG_VIDEO_GOP_CLOSURE,
529 .type = V4L2_CTRL_TYPE_BOOLEAN,
530 .minimum = 0,
531 .maximum = 1,
532 .step = 1,
533 .default_value = 1,
534 },
535 {
536 .id = V4L2_CID_MPEG_VIDEO_H264_I_PERIOD,
537 .type = V4L2_CTRL_TYPE_INTEGER,
538 .minimum = 0,
539 .maximum = (1 << 16) - 1,
540 .step = 1,
541 .default_value = 0,
542 },
543 {
544 .id = V4L2_CID_MPEG_VIDEO_MPEG4_PROFILE,
545 .type = V4L2_CTRL_TYPE_MENU,
546 .minimum = V4L2_MPEG_VIDEO_MPEG4_PROFILE_SIMPLE,
547 .maximum = V4L2_MPEG_VIDEO_MPEG4_PROFILE_ADVANCED_SIMPLE,
548 .default_value = V4L2_MPEG_VIDEO_MPEG4_PROFILE_SIMPLE,
549 .menu_skip_mask = 0,
550 },
551 {
552 .id = V4L2_CID_MPEG_VIDEO_MPEG4_QPEL,
553 .type = V4L2_CTRL_TYPE_BOOLEAN,
554 .minimum = 0,
555 .maximum = 1,
556 .step = 1,
557 .default_value = 0,
558 },
559 };
560
561 #define NUM_CTRLS ARRAY_SIZE(controls)
562 static const char * const *mfc51_get_menu(u32 id)
563 {
564 static const char * const mfc51_video_frame_skip[] = {
565 "Disabled",
566 "Level Limit",
567 "VBV/CPB Limit",
568 NULL,
569 };
570 static const char * const mfc51_video_force_frame[] = {
571 "Disabled",
572 "I Frame",
573 "Not Coded",
574 NULL,
575 };
576 switch (id) {
577 case V4L2_CID_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE:
578 return mfc51_video_frame_skip;
579 case V4L2_CID_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE:
580 return mfc51_video_force_frame;
581 }
582 return NULL;
583 }
584
585 static int s5p_mfc_ctx_ready(struct s5p_mfc_ctx *ctx)
586 {
587 mfc_debug(2, "src=%d, dst=%d, state=%d\n",
588 ctx->src_queue_cnt, ctx->dst_queue_cnt, ctx->state);
589 /* context is ready to make header */
590 if (ctx->state == MFCINST_GOT_INST && ctx->dst_queue_cnt >= 1)
591 return 1;
592 /* context is ready to encode a frame */
593 if ((ctx->state == MFCINST_RUNNING ||
594 ctx->state == MFCINST_HEAD_PARSED) &&
595 ctx->src_queue_cnt >= 1 && ctx->dst_queue_cnt >= 1)
596 return 1;
597 /* context is ready to encode remaining frames */
598 if (ctx->state == MFCINST_FINISHING &&
599 ctx->dst_queue_cnt >= 1)
600 return 1;
601 mfc_debug(2, "ctx is not ready\n");
602 return 0;
603 }
604
605 static void cleanup_ref_queue(struct s5p_mfc_ctx *ctx)
606 {
607 struct s5p_mfc_buf *mb_entry;
608 unsigned long mb_y_addr, mb_c_addr;
609
610 /* move buffers in ref queue to src queue */
611 while (!list_empty(&ctx->ref_queue)) {
612 mb_entry = list_entry((&ctx->ref_queue)->next,
613 struct s5p_mfc_buf, list);
614 mb_y_addr = vb2_dma_contig_plane_dma_addr(mb_entry->b, 0);
615 mb_c_addr = vb2_dma_contig_plane_dma_addr(mb_entry->b, 1);
616 list_del(&mb_entry->list);
617 ctx->ref_queue_cnt--;
618 list_add_tail(&mb_entry->list, &ctx->src_queue);
619 ctx->src_queue_cnt++;
620 }
621 mfc_debug(2, "enc src count: %d, enc ref count: %d\n",
622 ctx->src_queue_cnt, ctx->ref_queue_cnt);
623 INIT_LIST_HEAD(&ctx->ref_queue);
624 ctx->ref_queue_cnt = 0;
625 }
626
627 static int enc_pre_seq_start(struct s5p_mfc_ctx *ctx)
628 {
629 struct s5p_mfc_dev *dev = ctx->dev;
630 struct s5p_mfc_buf *dst_mb;
631 unsigned long dst_addr;
632 unsigned int dst_size;
633 unsigned long flags;
634
635 spin_lock_irqsave(&dev->irqlock, flags);
636 dst_mb = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf, list);
637 dst_addr = vb2_dma_contig_plane_dma_addr(dst_mb->b, 0);
638 dst_size = vb2_plane_size(dst_mb->b, 0);
639 s5p_mfc_hw_call(dev->mfc_ops, set_enc_stream_buffer, ctx, dst_addr,
640 dst_size);
641 spin_unlock_irqrestore(&dev->irqlock, flags);
642 return 0;
643 }
644
645 static int enc_post_seq_start(struct s5p_mfc_ctx *ctx)
646 {
647 struct s5p_mfc_dev *dev = ctx->dev;
648 struct s5p_mfc_enc_params *p = &ctx->enc_params;
649 struct s5p_mfc_buf *dst_mb;
650 unsigned long flags;
651
652 if (p->seq_hdr_mode == V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) {
653 spin_lock_irqsave(&dev->irqlock, flags);
654 dst_mb = list_entry(ctx->dst_queue.next,
655 struct s5p_mfc_buf, list);
656 list_del(&dst_mb->list);
657 ctx->dst_queue_cnt--;
658 vb2_set_plane_payload(dst_mb->b, 0,
659 s5p_mfc_hw_call(dev->mfc_ops, get_enc_strm_size, dev));
660 vb2_buffer_done(dst_mb->b, VB2_BUF_STATE_DONE);
661 spin_unlock_irqrestore(&dev->irqlock, flags);
662 }
663 if (IS_MFCV6(dev)) {
664 ctx->state = MFCINST_HEAD_PARSED; /* for INIT_BUFFER cmd */
665 } else {
666 ctx->state = MFCINST_RUNNING;
667 if (s5p_mfc_ctx_ready(ctx))
668 set_work_bit_irqsave(ctx);
669 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev);
670 }
671
672 if (IS_MFCV6(dev))
673 ctx->dpb_count = s5p_mfc_hw_call(dev->mfc_ops,
674 get_enc_dpb_count, dev);
675
676 return 0;
677 }
678
679 static int enc_pre_frame_start(struct s5p_mfc_ctx *ctx)
680 {
681 struct s5p_mfc_dev *dev = ctx->dev;
682 struct s5p_mfc_buf *dst_mb;
683 struct s5p_mfc_buf *src_mb;
684 unsigned long flags;
685 unsigned long src_y_addr, src_c_addr, dst_addr;
686 unsigned int dst_size;
687
688 spin_lock_irqsave(&dev->irqlock, flags);
689 src_mb = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list);
690 src_y_addr = vb2_dma_contig_plane_dma_addr(src_mb->b, 0);
691 src_c_addr = vb2_dma_contig_plane_dma_addr(src_mb->b, 1);
692 s5p_mfc_hw_call(dev->mfc_ops, set_enc_frame_buffer, ctx, src_y_addr,
693 src_c_addr);
694 spin_unlock_irqrestore(&dev->irqlock, flags);
695
696 spin_lock_irqsave(&dev->irqlock, flags);
697 dst_mb = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf, list);
698 dst_addr = vb2_dma_contig_plane_dma_addr(dst_mb->b, 0);
699 dst_size = vb2_plane_size(dst_mb->b, 0);
700 s5p_mfc_hw_call(dev->mfc_ops, set_enc_stream_buffer, ctx, dst_addr,
701 dst_size);
702 spin_unlock_irqrestore(&dev->irqlock, flags);
703
704 return 0;
705 }
706
707 static int enc_post_frame_start(struct s5p_mfc_ctx *ctx)
708 {
709 struct s5p_mfc_dev *dev = ctx->dev;
710 struct s5p_mfc_buf *mb_entry;
711 unsigned long enc_y_addr, enc_c_addr;
712 unsigned long mb_y_addr, mb_c_addr;
713 int slice_type;
714 unsigned int strm_size;
715 unsigned long flags;
716
717 slice_type = s5p_mfc_hw_call(dev->mfc_ops, get_enc_slice_type, dev);
718 strm_size = s5p_mfc_hw_call(dev->mfc_ops, get_enc_strm_size, dev);
719 mfc_debug(2, "Encoded slice type: %d", slice_type);
720 mfc_debug(2, "Encoded stream size: %d", strm_size);
721 mfc_debug(2, "Display order: %d",
722 mfc_read(dev, S5P_FIMV_ENC_SI_PIC_CNT));
723 spin_lock_irqsave(&dev->irqlock, flags);
724 if (slice_type >= 0) {
725 s5p_mfc_hw_call(dev->mfc_ops, get_enc_frame_buffer, ctx,
726 &enc_y_addr, &enc_c_addr);
727 list_for_each_entry(mb_entry, &ctx->src_queue, list) {
728 mb_y_addr = vb2_dma_contig_plane_dma_addr(mb_entry->b, 0);
729 mb_c_addr = vb2_dma_contig_plane_dma_addr(mb_entry->b, 1);
730 if ((enc_y_addr == mb_y_addr) &&
731 (enc_c_addr == mb_c_addr)) {
732 list_del(&mb_entry->list);
733 ctx->src_queue_cnt--;
734 vb2_buffer_done(mb_entry->b,
735 VB2_BUF_STATE_DONE);
736 break;
737 }
738 }
739 list_for_each_entry(mb_entry, &ctx->ref_queue, list) {
740 mb_y_addr = vb2_dma_contig_plane_dma_addr(mb_entry->b, 0);
741 mb_c_addr = vb2_dma_contig_plane_dma_addr(mb_entry->b, 1);
742 if ((enc_y_addr == mb_y_addr) &&
743 (enc_c_addr == mb_c_addr)) {
744 list_del(&mb_entry->list);
745 ctx->ref_queue_cnt--;
746 vb2_buffer_done(mb_entry->b,
747 VB2_BUF_STATE_DONE);
748 break;
749 }
750 }
751 }
752 if ((ctx->src_queue_cnt > 0) && (ctx->state == MFCINST_RUNNING)) {
753 mb_entry = list_entry(ctx->src_queue.next, struct s5p_mfc_buf,
754 list);
755 if (mb_entry->flags & MFC_BUF_FLAG_USED) {
756 list_del(&mb_entry->list);
757 ctx->src_queue_cnt--;
758 list_add_tail(&mb_entry->list, &ctx->ref_queue);
759 ctx->ref_queue_cnt++;
760 }
761 mfc_debug(2, "enc src count: %d, enc ref count: %d\n",
762 ctx->src_queue_cnt, ctx->ref_queue_cnt);
763 }
764 if (strm_size > 0) {
765 /* at least one more dest. buffers exist always */
766 mb_entry = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf,
767 list);
768 list_del(&mb_entry->list);
769 ctx->dst_queue_cnt--;
770 switch (slice_type) {
771 case S5P_FIMV_ENC_SI_SLICE_TYPE_I:
772 mb_entry->b->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
773 break;
774 case S5P_FIMV_ENC_SI_SLICE_TYPE_P:
775 mb_entry->b->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
776 break;
777 case S5P_FIMV_ENC_SI_SLICE_TYPE_B:
778 mb_entry->b->v4l2_buf.flags |= V4L2_BUF_FLAG_BFRAME;
779 break;
780 }
781 vb2_set_plane_payload(mb_entry->b, 0, strm_size);
782 vb2_buffer_done(mb_entry->b, VB2_BUF_STATE_DONE);
783 }
784 spin_unlock_irqrestore(&dev->irqlock, flags);
785 if ((ctx->src_queue_cnt == 0) || (ctx->dst_queue_cnt == 0))
786 clear_work_bit(ctx);
787 return 0;
788 }
789
790 static struct s5p_mfc_codec_ops encoder_codec_ops = {
791 .pre_seq_start = enc_pre_seq_start,
792 .post_seq_start = enc_post_seq_start,
793 .pre_frame_start = enc_pre_frame_start,
794 .post_frame_start = enc_post_frame_start,
795 };
796
797 /* Query capabilities of the device */
798 static int vidioc_querycap(struct file *file, void *priv,
799 struct v4l2_capability *cap)
800 {
801 struct s5p_mfc_dev *dev = video_drvdata(file);
802
803 strncpy(cap->driver, dev->plat_dev->name, sizeof(cap->driver) - 1);
804 strncpy(cap->card, dev->plat_dev->name, sizeof(cap->card) - 1);
805 cap->bus_info[0] = 0;
806 cap->version = KERNEL_VERSION(1, 0, 0);
807 /*
808 * This is only a mem-to-mem video device. The capture and output
809 * device capability flags are left only for backward compatibility
810 * and are scheduled for removal.
811 */
812 cap->capabilities = V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_STREAMING |
813 V4L2_CAP_VIDEO_CAPTURE_MPLANE |
814 V4L2_CAP_VIDEO_OUTPUT_MPLANE;
815 return 0;
816 }
817
818 static int vidioc_enum_fmt(struct v4l2_fmtdesc *f, bool mplane, bool out)
819 {
820 struct s5p_mfc_fmt *fmt;
821 int i, j = 0;
822
823 for (i = 0; i < ARRAY_SIZE(formats); ++i) {
824 if (mplane && formats[i].num_planes == 1)
825 continue;
826 else if (!mplane && formats[i].num_planes > 1)
827 continue;
828 if (out && formats[i].type != MFC_FMT_RAW)
829 continue;
830 else if (!out && formats[i].type != MFC_FMT_ENC)
831 continue;
832 if (j == f->index) {
833 fmt = &formats[i];
834 strlcpy(f->description, fmt->name,
835 sizeof(f->description));
836 f->pixelformat = fmt->fourcc;
837 return 0;
838 }
839 ++j;
840 }
841 return -EINVAL;
842 }
843
844 static int vidioc_enum_fmt_vid_cap(struct file *file, void *pirv,
845 struct v4l2_fmtdesc *f)
846 {
847 return vidioc_enum_fmt(f, false, false);
848 }
849
850 static int vidioc_enum_fmt_vid_cap_mplane(struct file *file, void *pirv,
851 struct v4l2_fmtdesc *f)
852 {
853 return vidioc_enum_fmt(f, true, false);
854 }
855
856 static int vidioc_enum_fmt_vid_out(struct file *file, void *prov,
857 struct v4l2_fmtdesc *f)
858 {
859 return vidioc_enum_fmt(f, false, true);
860 }
861
862 static int vidioc_enum_fmt_vid_out_mplane(struct file *file, void *prov,
863 struct v4l2_fmtdesc *f)
864 {
865 return vidioc_enum_fmt(f, true, true);
866 }
867
868 static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f)
869 {
870 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
871 struct v4l2_pix_format_mplane *pix_fmt_mp = &f->fmt.pix_mp;
872
873 mfc_debug(2, "f->type = %d ctx->state = %d\n", f->type, ctx->state);
874 if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
875 /* This is run on output (encoder dest) */
876 pix_fmt_mp->width = 0;
877 pix_fmt_mp->height = 0;
878 pix_fmt_mp->field = V4L2_FIELD_NONE;
879 pix_fmt_mp->pixelformat = ctx->dst_fmt->fourcc;
880 pix_fmt_mp->num_planes = ctx->dst_fmt->num_planes;
881
882 pix_fmt_mp->plane_fmt[0].bytesperline = ctx->enc_dst_buf_size;
883 pix_fmt_mp->plane_fmt[0].sizeimage = ctx->enc_dst_buf_size;
884 } else if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
885 /* This is run on capture (encoder src) */
886 pix_fmt_mp->width = ctx->img_width;
887 pix_fmt_mp->height = ctx->img_height;
888
889 pix_fmt_mp->field = V4L2_FIELD_NONE;
890 pix_fmt_mp->pixelformat = ctx->src_fmt->fourcc;
891 pix_fmt_mp->num_planes = ctx->src_fmt->num_planes;
892
893 pix_fmt_mp->plane_fmt[0].bytesperline = ctx->buf_width;
894 pix_fmt_mp->plane_fmt[0].sizeimage = ctx->luma_size;
895 pix_fmt_mp->plane_fmt[1].bytesperline = ctx->buf_width;
896 pix_fmt_mp->plane_fmt[1].sizeimage = ctx->chroma_size;
897 } else {
898 mfc_err("invalid buf type\n");
899 return -EINVAL;
900 }
901 return 0;
902 }
903
904 static int vidioc_try_fmt(struct file *file, void *priv, struct v4l2_format *f)
905 {
906 struct s5p_mfc_fmt *fmt;
907 struct v4l2_pix_format_mplane *pix_fmt_mp = &f->fmt.pix_mp;
908
909 if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
910 fmt = find_format(f, MFC_FMT_ENC);
911 if (!fmt) {
912 mfc_err("failed to try output format\n");
913 return -EINVAL;
914 }
915
916 if (pix_fmt_mp->plane_fmt[0].sizeimage == 0) {
917 mfc_err("must be set encoding output size\n");
918 return -EINVAL;
919 }
920
921 pix_fmt_mp->plane_fmt[0].bytesperline =
922 pix_fmt_mp->plane_fmt[0].sizeimage;
923 } else if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
924 fmt = find_format(f, MFC_FMT_RAW);
925 if (!fmt) {
926 mfc_err("failed to try output format\n");
927 return -EINVAL;
928 }
929
930 if (fmt->num_planes != pix_fmt_mp->num_planes) {
931 mfc_err("failed to try output format\n");
932 return -EINVAL;
933 }
934 v4l_bound_align_image(&pix_fmt_mp->width, 8, 1920, 1,
935 &pix_fmt_mp->height, 4, 1080, 1, 0);
936 } else {
937 mfc_err("invalid buf type\n");
938 return -EINVAL;
939 }
940 return 0;
941 }
942
943 static int vidioc_s_fmt(struct file *file, void *priv, struct v4l2_format *f)
944 {
945 struct s5p_mfc_dev *dev = video_drvdata(file);
946 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
947 struct s5p_mfc_fmt *fmt;
948 struct v4l2_pix_format_mplane *pix_fmt_mp = &f->fmt.pix_mp;
949 int ret = 0;
950
951 ret = vidioc_try_fmt(file, priv, f);
952 if (ret)
953 return ret;
954 if (ctx->vq_src.streaming || ctx->vq_dst.streaming) {
955 v4l2_err(&dev->v4l2_dev, "%s queue busy\n", __func__);
956 ret = -EBUSY;
957 goto out;
958 }
959 if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
960 fmt = find_format(f, MFC_FMT_ENC);
961 if (!fmt) {
962 mfc_err("failed to set capture format\n");
963 return -EINVAL;
964 }
965 ctx->state = MFCINST_INIT;
966 ctx->dst_fmt = fmt;
967 ctx->codec_mode = ctx->dst_fmt->codec_mode;
968 ctx->enc_dst_buf_size = pix_fmt_mp->plane_fmt[0].sizeimage;
969 pix_fmt_mp->plane_fmt[0].bytesperline = 0;
970 ctx->dst_bufs_cnt = 0;
971 ctx->capture_state = QUEUE_FREE;
972 s5p_mfc_hw_call(dev->mfc_ops, alloc_instance_buffer, ctx);
973 set_work_bit_irqsave(ctx);
974 s5p_mfc_clean_ctx_int_flags(ctx);
975 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev);
976 if (s5p_mfc_wait_for_done_ctx(ctx, \
977 S5P_MFC_R2H_CMD_OPEN_INSTANCE_RET, 1)) {
978 /* Error or timeout */
979 mfc_err("Error getting instance from hardware\n");
980 s5p_mfc_hw_call(dev->mfc_ops, release_instance_buffer,
981 ctx);
982 ret = -EIO;
983 goto out;
984 }
985 mfc_debug(2, "Got instance number: %d\n", ctx->inst_no);
986 } else if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
987 fmt = find_format(f, MFC_FMT_RAW);
988 if (!fmt) {
989 mfc_err("failed to set output format\n");
990 return -EINVAL;
991 }
992
993 if (!IS_MFCV6(dev) &&
994 (fmt->fourcc == V4L2_PIX_FMT_NV12MT_16X16)) {
995 mfc_err("Not supported format.\n");
996 return -EINVAL;
997 } else if (IS_MFCV6(dev) &&
998 (fmt->fourcc == V4L2_PIX_FMT_NV12MT)) {
999 mfc_err("Not supported format.\n");
1000 return -EINVAL;
1001 }
1002
1003 if (fmt->num_planes != pix_fmt_mp->num_planes) {
1004 mfc_err("failed to set output format\n");
1005 ret = -EINVAL;
1006 goto out;
1007 }
1008 ctx->src_fmt = fmt;
1009 ctx->img_width = pix_fmt_mp->width;
1010 ctx->img_height = pix_fmt_mp->height;
1011 mfc_debug(2, "codec number: %d\n", ctx->src_fmt->codec_mode);
1012 mfc_debug(2, "fmt - w: %d, h: %d, ctx - w: %d, h: %d\n",
1013 pix_fmt_mp->width, pix_fmt_mp->height,
1014 ctx->img_width, ctx->img_height);
1015
1016 s5p_mfc_hw_call(dev->mfc_ops, enc_calc_src_size, ctx);
1017 pix_fmt_mp->plane_fmt[0].sizeimage = ctx->luma_size;
1018 pix_fmt_mp->plane_fmt[0].bytesperline = ctx->buf_width;
1019 pix_fmt_mp->plane_fmt[1].sizeimage = ctx->chroma_size;
1020 pix_fmt_mp->plane_fmt[1].bytesperline = ctx->buf_width;
1021
1022 ctx->src_bufs_cnt = 0;
1023 ctx->output_state = QUEUE_FREE;
1024 } else {
1025 mfc_err("invalid buf type\n");
1026 return -EINVAL;
1027 }
1028 out:
1029 mfc_debug_leave();
1030 return ret;
1031 }
1032
1033 static int vidioc_reqbufs(struct file *file, void *priv,
1034 struct v4l2_requestbuffers *reqbufs)
1035 {
1036 struct s5p_mfc_dev *dev = video_drvdata(file);
1037 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
1038 int ret = 0;
1039
1040 /* if memory is not mmp or userptr return error */
1041 if ((reqbufs->memory != V4L2_MEMORY_MMAP) &&
1042 (reqbufs->memory != V4L2_MEMORY_USERPTR))
1043 return -EINVAL;
1044 if (reqbufs->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1045 if (ctx->capture_state != QUEUE_FREE) {
1046 mfc_err("invalid capture state: %d\n",
1047 ctx->capture_state);
1048 return -EINVAL;
1049 }
1050 ret = vb2_reqbufs(&ctx->vq_dst, reqbufs);
1051 if (ret != 0) {
1052 mfc_err("error in vb2_reqbufs() for E(D)\n");
1053 return ret;
1054 }
1055 ctx->capture_state = QUEUE_BUFS_REQUESTED;
1056
1057 if (!IS_MFCV6(dev)) {
1058 ret = s5p_mfc_hw_call(ctx->dev->mfc_ops,
1059 alloc_codec_buffers, ctx);
1060 if (ret) {
1061 mfc_err("Failed to allocate encoding buffers\n");
1062 reqbufs->count = 0;
1063 ret = vb2_reqbufs(&ctx->vq_dst, reqbufs);
1064 return -ENOMEM;
1065 }
1066 }
1067 } else if (reqbufs->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1068 if (ctx->output_state != QUEUE_FREE) {
1069 mfc_err("invalid output state: %d\n",
1070 ctx->output_state);
1071 return -EINVAL;
1072 }
1073 ret = vb2_reqbufs(&ctx->vq_src, reqbufs);
1074 if (ret != 0) {
1075 mfc_err("error in vb2_reqbufs() for E(S)\n");
1076 return ret;
1077 }
1078 ctx->output_state = QUEUE_BUFS_REQUESTED;
1079 } else {
1080 mfc_err("invalid buf type\n");
1081 return -EINVAL;
1082 }
1083 return ret;
1084 }
1085
1086 static int vidioc_querybuf(struct file *file, void *priv,
1087 struct v4l2_buffer *buf)
1088 {
1089 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
1090 int ret = 0;
1091
1092 /* if memory is not mmp or userptr return error */
1093 if ((buf->memory != V4L2_MEMORY_MMAP) &&
1094 (buf->memory != V4L2_MEMORY_USERPTR))
1095 return -EINVAL;
1096 if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1097 if (ctx->state != MFCINST_GOT_INST) {
1098 mfc_err("invalid context state: %d\n", ctx->state);
1099 return -EINVAL;
1100 }
1101 ret = vb2_querybuf(&ctx->vq_dst, buf);
1102 if (ret != 0) {
1103 mfc_err("error in vb2_querybuf() for E(D)\n");
1104 return ret;
1105 }
1106 buf->m.planes[0].m.mem_offset += DST_QUEUE_OFF_BASE;
1107 } else if (buf->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1108 ret = vb2_querybuf(&ctx->vq_src, buf);
1109 if (ret != 0) {
1110 mfc_err("error in vb2_querybuf() for E(S)\n");
1111 return ret;
1112 }
1113 } else {
1114 mfc_err("invalid buf type\n");
1115 return -EINVAL;
1116 }
1117 return ret;
1118 }
1119
1120 /* Queue a buffer */
1121 static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
1122 {
1123 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
1124
1125 if (ctx->state == MFCINST_ERROR) {
1126 mfc_err("Call on QBUF after unrecoverable error\n");
1127 return -EIO;
1128 }
1129 if (buf->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1130 if (ctx->state == MFCINST_FINISHING) {
1131 mfc_err("Call on QBUF after EOS command\n");
1132 return -EIO;
1133 }
1134 return vb2_qbuf(&ctx->vq_src, buf);
1135 } else if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1136 return vb2_qbuf(&ctx->vq_dst, buf);
1137 }
1138 return -EINVAL;
1139 }
1140
1141 /* Dequeue a buffer */
1142 static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
1143 {
1144 const struct v4l2_event ev = {
1145 .type = V4L2_EVENT_EOS
1146 };
1147 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
1148 int ret;
1149
1150 if (ctx->state == MFCINST_ERROR) {
1151 mfc_err("Call on DQBUF after unrecoverable error\n");
1152 return -EIO;
1153 }
1154 if (buf->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1155 ret = vb2_dqbuf(&ctx->vq_src, buf, file->f_flags & O_NONBLOCK);
1156 } else if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1157 ret = vb2_dqbuf(&ctx->vq_dst, buf, file->f_flags & O_NONBLOCK);
1158 if (ret == 0 && ctx->state == MFCINST_FINISHED
1159 && list_empty(&ctx->vq_dst.done_list))
1160 v4l2_event_queue_fh(&ctx->fh, &ev);
1161 } else {
1162 ret = -EINVAL;
1163 }
1164
1165 return ret;
1166 }
1167
1168 /* Export DMA buffer */
1169 static int vidioc_expbuf(struct file *file, void *priv,
1170 struct v4l2_exportbuffer *eb)
1171 {
1172 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
1173
1174 if (eb->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
1175 return vb2_expbuf(&ctx->vq_src, eb);
1176 if (eb->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
1177 return vb2_expbuf(&ctx->vq_dst, eb);
1178 return -EINVAL;
1179 }
1180
1181 /* Stream on */
1182 static int vidioc_streamon(struct file *file, void *priv,
1183 enum v4l2_buf_type type)
1184 {
1185 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
1186
1187 if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
1188 return vb2_streamon(&ctx->vq_src, type);
1189 else if (type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
1190 return vb2_streamon(&ctx->vq_dst, type);
1191 return -EINVAL;
1192 }
1193
1194 /* Stream off, which equals to a pause */
1195 static int vidioc_streamoff(struct file *file, void *priv,
1196 enum v4l2_buf_type type)
1197 {
1198 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
1199
1200 if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
1201 return vb2_streamoff(&ctx->vq_src, type);
1202 else if (type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
1203 return vb2_streamoff(&ctx->vq_dst, type);
1204 return -EINVAL;
1205 }
1206
1207 static inline int h264_level(enum v4l2_mpeg_video_h264_level lvl)
1208 {
1209 static unsigned int t[V4L2_MPEG_VIDEO_H264_LEVEL_4_0 + 1] = {
1210 /* V4L2_MPEG_VIDEO_H264_LEVEL_1_0 */ 10,
1211 /* V4L2_MPEG_VIDEO_H264_LEVEL_1B */ 9,
1212 /* V4L2_MPEG_VIDEO_H264_LEVEL_1_1 */ 11,
1213 /* V4L2_MPEG_VIDEO_H264_LEVEL_1_2 */ 12,
1214 /* V4L2_MPEG_VIDEO_H264_LEVEL_1_3 */ 13,
1215 /* V4L2_MPEG_VIDEO_H264_LEVEL_2_0 */ 20,
1216 /* V4L2_MPEG_VIDEO_H264_LEVEL_2_1 */ 21,
1217 /* V4L2_MPEG_VIDEO_H264_LEVEL_2_2 */ 22,
1218 /* V4L2_MPEG_VIDEO_H264_LEVEL_3_0 */ 30,
1219 /* V4L2_MPEG_VIDEO_H264_LEVEL_3_1 */ 31,
1220 /* V4L2_MPEG_VIDEO_H264_LEVEL_3_2 */ 32,
1221 /* V4L2_MPEG_VIDEO_H264_LEVEL_4_0 */ 40,
1222 };
1223 return t[lvl];
1224 }
1225
1226 static inline int mpeg4_level(enum v4l2_mpeg_video_mpeg4_level lvl)
1227 {
1228 static unsigned int t[V4L2_MPEG_VIDEO_MPEG4_LEVEL_5 + 1] = {
1229 /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_0 */ 0,
1230 /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_0B */ 9,
1231 /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_1 */ 1,
1232 /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_2 */ 2,
1233 /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_3 */ 3,
1234 /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_3B */ 7,
1235 /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_4 */ 4,
1236 /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_5 */ 5,
1237 };
1238 return t[lvl];
1239 }
1240
1241 static inline int vui_sar_idc(enum v4l2_mpeg_video_h264_vui_sar_idc sar)
1242 {
1243 static unsigned int t[V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_EXTENDED + 1] = {
1244 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_UNSPECIFIED */ 0,
1245 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_1x1 */ 1,
1246 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_12x11 */ 2,
1247 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_10x11 */ 3,
1248 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_16x11 */ 4,
1249 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_40x33 */ 5,
1250 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_24x11 */ 6,
1251 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_20x11 */ 7,
1252 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_32x11 */ 8,
1253 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_80x33 */ 9,
1254 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_18x11 */ 10,
1255 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_15x11 */ 11,
1256 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_64x33 */ 12,
1257 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_160x99 */ 13,
1258 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_4x3 */ 14,
1259 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_3x2 */ 15,
1260 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_2x1 */ 16,
1261 /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_EXTENDED */ 255,
1262 };
1263 return t[sar];
1264 }
1265
1266 static int s5p_mfc_enc_s_ctrl(struct v4l2_ctrl *ctrl)
1267 {
1268 struct s5p_mfc_ctx *ctx = ctrl_to_ctx(ctrl);
1269 struct s5p_mfc_dev *dev = ctx->dev;
1270 struct s5p_mfc_enc_params *p = &ctx->enc_params;
1271 int ret = 0;
1272
1273 switch (ctrl->id) {
1274 case V4L2_CID_MPEG_VIDEO_GOP_SIZE:
1275 p->gop_size = ctrl->val;
1276 break;
1277 case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE:
1278 p->slice_mode = ctrl->val;
1279 break;
1280 case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB:
1281 p->slice_mb = ctrl->val;
1282 break;
1283 case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES:
1284 p->slice_bit = ctrl->val * 8;
1285 break;
1286 case V4L2_CID_MPEG_VIDEO_CYCLIC_INTRA_REFRESH_MB:
1287 p->intra_refresh_mb = ctrl->val;
1288 break;
1289 case V4L2_CID_MPEG_MFC51_VIDEO_PADDING:
1290 p->pad = ctrl->val;
1291 break;
1292 case V4L2_CID_MPEG_MFC51_VIDEO_PADDING_YUV:
1293 p->pad_luma = (ctrl->val >> 16) & 0xff;
1294 p->pad_cb = (ctrl->val >> 8) & 0xff;
1295 p->pad_cr = (ctrl->val >> 0) & 0xff;
1296 break;
1297 case V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE:
1298 p->rc_frame = ctrl->val;
1299 break;
1300 case V4L2_CID_MPEG_VIDEO_BITRATE:
1301 p->rc_bitrate = ctrl->val;
1302 break;
1303 case V4L2_CID_MPEG_MFC51_VIDEO_RC_REACTION_COEFF:
1304 p->rc_reaction_coeff = ctrl->val;
1305 break;
1306 case V4L2_CID_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE:
1307 ctx->force_frame_type = ctrl->val;
1308 break;
1309 case V4L2_CID_MPEG_VIDEO_VBV_SIZE:
1310 p->vbv_size = ctrl->val;
1311 break;
1312 case V4L2_CID_MPEG_VIDEO_H264_CPB_SIZE:
1313 p->codec.h264.cpb_size = ctrl->val;
1314 break;
1315 case V4L2_CID_MPEG_VIDEO_HEADER_MODE:
1316 p->seq_hdr_mode = ctrl->val;
1317 break;
1318 case V4L2_CID_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE:
1319 p->frame_skip_mode = ctrl->val;
1320 break;
1321 case V4L2_CID_MPEG_MFC51_VIDEO_RC_FIXED_TARGET_BIT:
1322 p->fixed_target_bit = ctrl->val;
1323 break;
1324 case V4L2_CID_MPEG_VIDEO_B_FRAMES:
1325 p->num_b_frame = ctrl->val;
1326 break;
1327 case V4L2_CID_MPEG_VIDEO_H264_PROFILE:
1328 switch (ctrl->val) {
1329 case V4L2_MPEG_VIDEO_H264_PROFILE_MAIN:
1330 p->codec.h264.profile =
1331 S5P_FIMV_ENC_PROFILE_H264_MAIN;
1332 break;
1333 case V4L2_MPEG_VIDEO_H264_PROFILE_HIGH:
1334 p->codec.h264.profile =
1335 S5P_FIMV_ENC_PROFILE_H264_HIGH;
1336 break;
1337 case V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE:
1338 p->codec.h264.profile =
1339 S5P_FIMV_ENC_PROFILE_H264_BASELINE;
1340 break;
1341 case V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE:
1342 if (IS_MFCV6(dev))
1343 p->codec.h264.profile =
1344 S5P_FIMV_ENC_PROFILE_H264_CONSTRAINED_BASELINE;
1345 else
1346 ret = -EINVAL;
1347 break;
1348 default:
1349 ret = -EINVAL;
1350 }
1351 break;
1352 case V4L2_CID_MPEG_VIDEO_H264_LEVEL:
1353 p->codec.h264.level_v4l2 = ctrl->val;
1354 p->codec.h264.level = h264_level(ctrl->val);
1355 if (p->codec.h264.level < 0) {
1356 mfc_err("Level number is wrong\n");
1357 ret = p->codec.h264.level;
1358 }
1359 break;
1360 case V4L2_CID_MPEG_VIDEO_MPEG4_LEVEL:
1361 p->codec.mpeg4.level_v4l2 = ctrl->val;
1362 p->codec.mpeg4.level = mpeg4_level(ctrl->val);
1363 if (p->codec.mpeg4.level < 0) {
1364 mfc_err("Level number is wrong\n");
1365 ret = p->codec.mpeg4.level;
1366 }
1367 break;
1368 case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE:
1369 p->codec.h264.loop_filter_mode = ctrl->val;
1370 break;
1371 case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA:
1372 p->codec.h264.loop_filter_alpha = ctrl->val;
1373 break;
1374 case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA:
1375 p->codec.h264.loop_filter_beta = ctrl->val;
1376 break;
1377 case V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE:
1378 p->codec.h264.entropy_mode = ctrl->val;
1379 break;
1380 case V4L2_CID_MPEG_MFC51_VIDEO_H264_NUM_REF_PIC_FOR_P:
1381 p->codec.h264.num_ref_pic_4p = ctrl->val;
1382 break;
1383 case V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM:
1384 p->codec.h264._8x8_transform = ctrl->val;
1385 break;
1386 case V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE:
1387 p->rc_mb = ctrl->val;
1388 break;
1389 case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP:
1390 p->codec.h264.rc_frame_qp = ctrl->val;
1391 break;
1392 case V4L2_CID_MPEG_VIDEO_H264_MIN_QP:
1393 p->codec.h264.rc_min_qp = ctrl->val;
1394 break;
1395 case V4L2_CID_MPEG_VIDEO_H264_MAX_QP:
1396 p->codec.h264.rc_max_qp = ctrl->val;
1397 break;
1398 case V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP:
1399 p->codec.h264.rc_p_frame_qp = ctrl->val;
1400 break;
1401 case V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP:
1402 p->codec.h264.rc_b_frame_qp = ctrl->val;
1403 break;
1404 case V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP:
1405 case V4L2_CID_MPEG_VIDEO_H263_I_FRAME_QP:
1406 p->codec.mpeg4.rc_frame_qp = ctrl->val;
1407 break;
1408 case V4L2_CID_MPEG_VIDEO_MPEG4_MIN_QP:
1409 case V4L2_CID_MPEG_VIDEO_H263_MIN_QP:
1410 p->codec.mpeg4.rc_min_qp = ctrl->val;
1411 break;
1412 case V4L2_CID_MPEG_VIDEO_MPEG4_MAX_QP:
1413 case V4L2_CID_MPEG_VIDEO_H263_MAX_QP:
1414 p->codec.mpeg4.rc_max_qp = ctrl->val;
1415 break;
1416 case V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP:
1417 case V4L2_CID_MPEG_VIDEO_H263_P_FRAME_QP:
1418 p->codec.mpeg4.rc_p_frame_qp = ctrl->val;
1419 break;
1420 case V4L2_CID_MPEG_VIDEO_MPEG4_B_FRAME_QP:
1421 case V4L2_CID_MPEG_VIDEO_H263_B_FRAME_QP:
1422 p->codec.mpeg4.rc_b_frame_qp = ctrl->val;
1423 break;
1424 case V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_DARK:
1425 p->codec.h264.rc_mb_dark = ctrl->val;
1426 break;
1427 case V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_SMOOTH:
1428 p->codec.h264.rc_mb_smooth = ctrl->val;
1429 break;
1430 case V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_STATIC:
1431 p->codec.h264.rc_mb_static = ctrl->val;
1432 break;
1433 case V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_ACTIVITY:
1434 p->codec.h264.rc_mb_activity = ctrl->val;
1435 break;
1436 case V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_ENABLE:
1437 p->codec.h264.vui_sar = ctrl->val;
1438 break;
1439 case V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_IDC:
1440 p->codec.h264.vui_sar_idc = vui_sar_idc(ctrl->val);
1441 break;
1442 case V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_WIDTH:
1443 p->codec.h264.vui_ext_sar_width = ctrl->val;
1444 break;
1445 case V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_HEIGHT:
1446 p->codec.h264.vui_ext_sar_height = ctrl->val;
1447 break;
1448 case V4L2_CID_MPEG_VIDEO_GOP_CLOSURE:
1449 p->codec.h264.open_gop = !ctrl->val;
1450 break;
1451 case V4L2_CID_MPEG_VIDEO_H264_I_PERIOD:
1452 p->codec.h264.open_gop_size = ctrl->val;
1453 break;
1454 case V4L2_CID_MPEG_VIDEO_MPEG4_PROFILE:
1455 switch (ctrl->val) {
1456 case V4L2_MPEG_VIDEO_MPEG4_PROFILE_SIMPLE:
1457 p->codec.mpeg4.profile =
1458 S5P_FIMV_ENC_PROFILE_MPEG4_SIMPLE;
1459 break;
1460 case V4L2_MPEG_VIDEO_MPEG4_PROFILE_ADVANCED_SIMPLE:
1461 p->codec.mpeg4.profile =
1462 S5P_FIMV_ENC_PROFILE_MPEG4_ADVANCED_SIMPLE;
1463 break;
1464 default:
1465 ret = -EINVAL;
1466 }
1467 break;
1468 case V4L2_CID_MPEG_VIDEO_MPEG4_QPEL:
1469 p->codec.mpeg4.quarter_pixel = ctrl->val;
1470 break;
1471 default:
1472 v4l2_err(&dev->v4l2_dev, "Invalid control, id=%d, val=%d\n",
1473 ctrl->id, ctrl->val);
1474 ret = -EINVAL;
1475 }
1476 return ret;
1477 }
1478
1479 static const struct v4l2_ctrl_ops s5p_mfc_enc_ctrl_ops = {
1480 .s_ctrl = s5p_mfc_enc_s_ctrl,
1481 };
1482
1483 static int vidioc_s_parm(struct file *file, void *priv,
1484 struct v4l2_streamparm *a)
1485 {
1486 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
1487
1488 if (a->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1489 ctx->enc_params.rc_framerate_num =
1490 a->parm.output.timeperframe.denominator;
1491 ctx->enc_params.rc_framerate_denom =
1492 a->parm.output.timeperframe.numerator;
1493 } else {
1494 mfc_err("Setting FPS is only possible for the output queue\n");
1495 return -EINVAL;
1496 }
1497 return 0;
1498 }
1499
1500 static int vidioc_g_parm(struct file *file, void *priv,
1501 struct v4l2_streamparm *a)
1502 {
1503 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
1504
1505 if (a->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
1506 a->parm.output.timeperframe.denominator =
1507 ctx->enc_params.rc_framerate_num;
1508 a->parm.output.timeperframe.numerator =
1509 ctx->enc_params.rc_framerate_denom;
1510 } else {
1511 mfc_err("Setting FPS is only possible for the output queue\n");
1512 return -EINVAL;
1513 }
1514 return 0;
1515 }
1516
1517 int vidioc_encoder_cmd(struct file *file, void *priv,
1518 struct v4l2_encoder_cmd *cmd)
1519 {
1520 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
1521 struct s5p_mfc_dev *dev = ctx->dev;
1522 struct s5p_mfc_buf *buf;
1523 unsigned long flags;
1524
1525 switch (cmd->cmd) {
1526 case V4L2_ENC_CMD_STOP:
1527 if (cmd->flags != 0)
1528 return -EINVAL;
1529
1530 if (!ctx->vq_src.streaming)
1531 return -EINVAL;
1532
1533 spin_lock_irqsave(&dev->irqlock, flags);
1534 if (list_empty(&ctx->src_queue)) {
1535 mfc_debug(2, "EOS: empty src queue, entering finishing state");
1536 ctx->state = MFCINST_FINISHING;
1537 if (s5p_mfc_ctx_ready(ctx))
1538 set_work_bit_irqsave(ctx);
1539 spin_unlock_irqrestore(&dev->irqlock, flags);
1540 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev);
1541 } else {
1542 mfc_debug(2, "EOS: marking last buffer of stream");
1543 buf = list_entry(ctx->src_queue.prev,
1544 struct s5p_mfc_buf, list);
1545 if (buf->flags & MFC_BUF_FLAG_USED)
1546 ctx->state = MFCINST_FINISHING;
1547 else
1548 buf->flags |= MFC_BUF_FLAG_EOS;
1549 spin_unlock_irqrestore(&dev->irqlock, flags);
1550 }
1551 break;
1552 default:
1553 return -EINVAL;
1554
1555 }
1556 return 0;
1557 }
1558
1559 static int vidioc_subscribe_event(struct v4l2_fh *fh,
1560 const struct v4l2_event_subscription *sub)
1561 {
1562 switch (sub->type) {
1563 case V4L2_EVENT_EOS:
1564 return v4l2_event_subscribe(fh, sub, 2, NULL);
1565 default:
1566 return -EINVAL;
1567 }
1568 }
1569
1570 static const struct v4l2_ioctl_ops s5p_mfc_enc_ioctl_ops = {
1571 .vidioc_querycap = vidioc_querycap,
1572 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
1573 .vidioc_enum_fmt_vid_cap_mplane = vidioc_enum_fmt_vid_cap_mplane,
1574 .vidioc_enum_fmt_vid_out = vidioc_enum_fmt_vid_out,
1575 .vidioc_enum_fmt_vid_out_mplane = vidioc_enum_fmt_vid_out_mplane,
1576 .vidioc_g_fmt_vid_cap_mplane = vidioc_g_fmt,
1577 .vidioc_g_fmt_vid_out_mplane = vidioc_g_fmt,
1578 .vidioc_try_fmt_vid_cap_mplane = vidioc_try_fmt,
1579 .vidioc_try_fmt_vid_out_mplane = vidioc_try_fmt,
1580 .vidioc_s_fmt_vid_cap_mplane = vidioc_s_fmt,
1581 .vidioc_s_fmt_vid_out_mplane = vidioc_s_fmt,
1582 .vidioc_reqbufs = vidioc_reqbufs,
1583 .vidioc_querybuf = vidioc_querybuf,
1584 .vidioc_qbuf = vidioc_qbuf,
1585 .vidioc_dqbuf = vidioc_dqbuf,
1586 .vidioc_expbuf = vidioc_expbuf,
1587 .vidioc_streamon = vidioc_streamon,
1588 .vidioc_streamoff = vidioc_streamoff,
1589 .vidioc_s_parm = vidioc_s_parm,
1590 .vidioc_g_parm = vidioc_g_parm,
1591 .vidioc_encoder_cmd = vidioc_encoder_cmd,
1592 .vidioc_subscribe_event = vidioc_subscribe_event,
1593 .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
1594 };
1595
1596 static int check_vb_with_fmt(struct s5p_mfc_fmt *fmt, struct vb2_buffer *vb)
1597 {
1598 int i;
1599
1600 if (!fmt)
1601 return -EINVAL;
1602 if (fmt->num_planes != vb->num_planes) {
1603 mfc_err("invalid plane number for the format\n");
1604 return -EINVAL;
1605 }
1606 for (i = 0; i < fmt->num_planes; i++) {
1607 if (!vb2_dma_contig_plane_dma_addr(vb, i)) {
1608 mfc_err("failed to get plane cookie\n");
1609 return -EINVAL;
1610 }
1611 mfc_debug(2, "index: %d, plane[%d] cookie: 0x%08zx",
1612 vb->v4l2_buf.index, i,
1613 vb2_dma_contig_plane_dma_addr(vb, i));
1614 }
1615 return 0;
1616 }
1617
1618 static int s5p_mfc_queue_setup(struct vb2_queue *vq,
1619 const struct v4l2_format *fmt,
1620 unsigned int *buf_count, unsigned int *plane_count,
1621 unsigned int psize[], void *allocators[])
1622 {
1623 struct s5p_mfc_ctx *ctx = fh_to_ctx(vq->drv_priv);
1624 struct s5p_mfc_dev *dev = ctx->dev;
1625
1626 if (ctx->state != MFCINST_GOT_INST) {
1627 mfc_err("inavlid state: %d\n", ctx->state);
1628 return -EINVAL;
1629 }
1630 if (vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1631 if (ctx->dst_fmt)
1632 *plane_count = ctx->dst_fmt->num_planes;
1633 else
1634 *plane_count = MFC_ENC_CAP_PLANE_COUNT;
1635 if (*buf_count < 1)
1636 *buf_count = 1;
1637 if (*buf_count > MFC_MAX_BUFFERS)
1638 *buf_count = MFC_MAX_BUFFERS;
1639 psize[0] = ctx->enc_dst_buf_size;
1640 allocators[0] = ctx->dev->alloc_ctx[MFC_BANK1_ALLOC_CTX];
1641 } else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1642 if (ctx->src_fmt)
1643 *plane_count = ctx->src_fmt->num_planes;
1644 else
1645 *plane_count = MFC_ENC_OUT_PLANE_COUNT;
1646
1647 if (*buf_count < 1)
1648 *buf_count = 1;
1649 if (*buf_count > MFC_MAX_BUFFERS)
1650 *buf_count = MFC_MAX_BUFFERS;
1651 psize[0] = ctx->luma_size;
1652 psize[1] = ctx->chroma_size;
1653 if (IS_MFCV6(dev)) {
1654 allocators[0] =
1655 ctx->dev->alloc_ctx[MFC_BANK1_ALLOC_CTX];
1656 allocators[1] =
1657 ctx->dev->alloc_ctx[MFC_BANK1_ALLOC_CTX];
1658 } else {
1659 allocators[0] =
1660 ctx->dev->alloc_ctx[MFC_BANK2_ALLOC_CTX];
1661 allocators[1] =
1662 ctx->dev->alloc_ctx[MFC_BANK2_ALLOC_CTX];
1663 }
1664 } else {
1665 mfc_err("inavlid queue type: %d\n", vq->type);
1666 return -EINVAL;
1667 }
1668 return 0;
1669 }
1670
1671 static void s5p_mfc_unlock(struct vb2_queue *q)
1672 {
1673 struct s5p_mfc_ctx *ctx = fh_to_ctx(q->drv_priv);
1674 struct s5p_mfc_dev *dev = ctx->dev;
1675
1676 mutex_unlock(&dev->mfc_mutex);
1677 }
1678
1679 static void s5p_mfc_lock(struct vb2_queue *q)
1680 {
1681 struct s5p_mfc_ctx *ctx = fh_to_ctx(q->drv_priv);
1682 struct s5p_mfc_dev *dev = ctx->dev;
1683
1684 mutex_lock(&dev->mfc_mutex);
1685 }
1686
1687 static int s5p_mfc_buf_init(struct vb2_buffer *vb)
1688 {
1689 struct vb2_queue *vq = vb->vb2_queue;
1690 struct s5p_mfc_ctx *ctx = fh_to_ctx(vq->drv_priv);
1691 unsigned int i;
1692 int ret;
1693
1694 if (vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1695 ret = check_vb_with_fmt(ctx->dst_fmt, vb);
1696 if (ret < 0)
1697 return ret;
1698 i = vb->v4l2_buf.index;
1699 ctx->dst_bufs[i].b = vb;
1700 ctx->dst_bufs[i].cookie.stream =
1701 vb2_dma_contig_plane_dma_addr(vb, 0);
1702 ctx->dst_bufs_cnt++;
1703 } else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1704 ret = check_vb_with_fmt(ctx->src_fmt, vb);
1705 if (ret < 0)
1706 return ret;
1707 i = vb->v4l2_buf.index;
1708 ctx->src_bufs[i].b = vb;
1709 ctx->src_bufs[i].cookie.raw.luma =
1710 vb2_dma_contig_plane_dma_addr(vb, 0);
1711 ctx->src_bufs[i].cookie.raw.chroma =
1712 vb2_dma_contig_plane_dma_addr(vb, 1);
1713 ctx->src_bufs_cnt++;
1714 } else {
1715 mfc_err("inavlid queue type: %d\n", vq->type);
1716 return -EINVAL;
1717 }
1718 return 0;
1719 }
1720
1721 static int s5p_mfc_buf_prepare(struct vb2_buffer *vb)
1722 {
1723 struct vb2_queue *vq = vb->vb2_queue;
1724 struct s5p_mfc_ctx *ctx = fh_to_ctx(vq->drv_priv);
1725 int ret;
1726
1727 if (vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1728 ret = check_vb_with_fmt(ctx->dst_fmt, vb);
1729 if (ret < 0)
1730 return ret;
1731 mfc_debug(2, "plane size: %ld, dst size: %d\n",
1732 vb2_plane_size(vb, 0), ctx->enc_dst_buf_size);
1733 if (vb2_plane_size(vb, 0) < ctx->enc_dst_buf_size) {
1734 mfc_err("plane size is too small for capture\n");
1735 return -EINVAL;
1736 }
1737 } else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1738 ret = check_vb_with_fmt(ctx->src_fmt, vb);
1739 if (ret < 0)
1740 return ret;
1741 mfc_debug(2, "plane size: %ld, luma size: %d\n",
1742 vb2_plane_size(vb, 0), ctx->luma_size);
1743 mfc_debug(2, "plane size: %ld, chroma size: %d\n",
1744 vb2_plane_size(vb, 1), ctx->chroma_size);
1745 if (vb2_plane_size(vb, 0) < ctx->luma_size ||
1746 vb2_plane_size(vb, 1) < ctx->chroma_size) {
1747 mfc_err("plane size is too small for output\n");
1748 return -EINVAL;
1749 }
1750 } else {
1751 mfc_err("inavlid queue type: %d\n", vq->type);
1752 return -EINVAL;
1753 }
1754 return 0;
1755 }
1756
1757 static int s5p_mfc_start_streaming(struct vb2_queue *q, unsigned int count)
1758 {
1759 struct s5p_mfc_ctx *ctx = fh_to_ctx(q->drv_priv);
1760 struct s5p_mfc_dev *dev = ctx->dev;
1761
1762 v4l2_ctrl_handler_setup(&ctx->ctrl_handler);
1763 /* If context is ready then dev = work->data;schedule it to run */
1764 if (s5p_mfc_ctx_ready(ctx))
1765 set_work_bit_irqsave(ctx);
1766 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev);
1767 return 0;
1768 }
1769
1770 static int s5p_mfc_stop_streaming(struct vb2_queue *q)
1771 {
1772 unsigned long flags;
1773 struct s5p_mfc_ctx *ctx = fh_to_ctx(q->drv_priv);
1774 struct s5p_mfc_dev *dev = ctx->dev;
1775
1776 if ((ctx->state == MFCINST_FINISHING ||
1777 ctx->state == MFCINST_RUNNING) &&
1778 dev->curr_ctx == ctx->num && dev->hw_lock) {
1779 ctx->state = MFCINST_ABORT;
1780 s5p_mfc_wait_for_done_ctx(ctx, S5P_MFC_R2H_CMD_FRAME_DONE_RET,
1781 0);
1782 }
1783 ctx->state = MFCINST_FINISHED;
1784 spin_lock_irqsave(&dev->irqlock, flags);
1785 if (q->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1786 s5p_mfc_hw_call(dev->mfc_ops, cleanup_queue, &ctx->dst_queue,
1787 &ctx->vq_dst);
1788 INIT_LIST_HEAD(&ctx->dst_queue);
1789 ctx->dst_queue_cnt = 0;
1790 }
1791 if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1792 cleanup_ref_queue(ctx);
1793 s5p_mfc_hw_call(dev->mfc_ops, cleanup_queue, &ctx->src_queue,
1794 &ctx->vq_src);
1795 INIT_LIST_HEAD(&ctx->src_queue);
1796 ctx->src_queue_cnt = 0;
1797 }
1798 spin_unlock_irqrestore(&dev->irqlock, flags);
1799 return 0;
1800 }
1801
1802 static void s5p_mfc_buf_queue(struct vb2_buffer *vb)
1803 {
1804 struct vb2_queue *vq = vb->vb2_queue;
1805 struct s5p_mfc_ctx *ctx = fh_to_ctx(vq->drv_priv);
1806 struct s5p_mfc_dev *dev = ctx->dev;
1807 unsigned long flags;
1808 struct s5p_mfc_buf *mfc_buf;
1809
1810 if (ctx->state == MFCINST_ERROR) {
1811 vb2_buffer_done(vb, VB2_BUF_STATE_ERROR);
1812 cleanup_ref_queue(ctx);
1813 return;
1814 }
1815 if (vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1816 mfc_buf = &ctx->dst_bufs[vb->v4l2_buf.index];
1817 mfc_buf->flags &= ~MFC_BUF_FLAG_USED;
1818 /* Mark destination as available for use by MFC */
1819 spin_lock_irqsave(&dev->irqlock, flags);
1820 list_add_tail(&mfc_buf->list, &ctx->dst_queue);
1821 ctx->dst_queue_cnt++;
1822 spin_unlock_irqrestore(&dev->irqlock, flags);
1823 } else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1824 mfc_buf = &ctx->src_bufs[vb->v4l2_buf.index];
1825 mfc_buf->flags &= ~MFC_BUF_FLAG_USED;
1826 spin_lock_irqsave(&dev->irqlock, flags);
1827 list_add_tail(&mfc_buf->list, &ctx->src_queue);
1828 ctx->src_queue_cnt++;
1829 spin_unlock_irqrestore(&dev->irqlock, flags);
1830 } else {
1831 mfc_err("unsupported buffer type (%d)\n", vq->type);
1832 }
1833 if (s5p_mfc_ctx_ready(ctx))
1834 set_work_bit_irqsave(ctx);
1835 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev);
1836 }
1837
1838 static struct vb2_ops s5p_mfc_enc_qops = {
1839 .queue_setup = s5p_mfc_queue_setup,
1840 .wait_prepare = s5p_mfc_unlock,
1841 .wait_finish = s5p_mfc_lock,
1842 .buf_init = s5p_mfc_buf_init,
1843 .buf_prepare = s5p_mfc_buf_prepare,
1844 .start_streaming = s5p_mfc_start_streaming,
1845 .stop_streaming = s5p_mfc_stop_streaming,
1846 .buf_queue = s5p_mfc_buf_queue,
1847 };
1848
1849 struct s5p_mfc_codec_ops *get_enc_codec_ops(void)
1850 {
1851 return &encoder_codec_ops;
1852 }
1853
1854 struct vb2_ops *get_enc_queue_ops(void)
1855 {
1856 return &s5p_mfc_enc_qops;
1857 }
1858
1859 const struct v4l2_ioctl_ops *get_enc_v4l2_ioctl_ops(void)
1860 {
1861 return &s5p_mfc_enc_ioctl_ops;
1862 }
1863
1864 #define IS_MFC51_PRIV(x) ((V4L2_CTRL_ID2CLASS(x) == V4L2_CTRL_CLASS_MPEG) \
1865 && V4L2_CTRL_DRIVER_PRIV(x))
1866
1867 int s5p_mfc_enc_ctrls_setup(struct s5p_mfc_ctx *ctx)
1868 {
1869 struct v4l2_ctrl_config cfg;
1870 int i;
1871
1872 v4l2_ctrl_handler_init(&ctx->ctrl_handler, NUM_CTRLS);
1873 if (ctx->ctrl_handler.error) {
1874 mfc_err("v4l2_ctrl_handler_init failed\n");
1875 return ctx->ctrl_handler.error;
1876 }
1877 for (i = 0; i < NUM_CTRLS; i++) {
1878 if (IS_MFC51_PRIV(controls[i].id)) {
1879 memset(&cfg, 0, sizeof(struct v4l2_ctrl_config));
1880 cfg.ops = &s5p_mfc_enc_ctrl_ops;
1881 cfg.id = controls[i].id;
1882 cfg.min = controls[i].minimum;
1883 cfg.max = controls[i].maximum;
1884 cfg.def = controls[i].default_value;
1885 cfg.name = controls[i].name;
1886 cfg.type = controls[i].type;
1887 cfg.flags = 0;
1888
1889 if (cfg.type == V4L2_CTRL_TYPE_MENU) {
1890 cfg.step = 0;
1891 cfg.menu_skip_mask = cfg.menu_skip_mask;
1892 cfg.qmenu = mfc51_get_menu(cfg.id);
1893 } else {
1894 cfg.step = controls[i].step;
1895 cfg.menu_skip_mask = 0;
1896 }
1897 ctx->ctrls[i] = v4l2_ctrl_new_custom(&ctx->ctrl_handler,
1898 &cfg, NULL);
1899 } else {
1900 if (controls[i].type == V4L2_CTRL_TYPE_MENU) {
1901 ctx->ctrls[i] = v4l2_ctrl_new_std_menu(
1902 &ctx->ctrl_handler,
1903 &s5p_mfc_enc_ctrl_ops, controls[i].id,
1904 controls[i].maximum, 0,
1905 controls[i].default_value);
1906 } else {
1907 ctx->ctrls[i] = v4l2_ctrl_new_std(
1908 &ctx->ctrl_handler,
1909 &s5p_mfc_enc_ctrl_ops, controls[i].id,
1910 controls[i].minimum,
1911 controls[i].maximum, controls[i].step,
1912 controls[i].default_value);
1913 }
1914 }
1915 if (ctx->ctrl_handler.error) {
1916 mfc_err("Adding control (%d) failed\n", i);
1917 return ctx->ctrl_handler.error;
1918 }
1919 if (controls[i].is_volatile && ctx->ctrls[i])
1920 ctx->ctrls[i]->flags |= V4L2_CTRL_FLAG_VOLATILE;
1921 }
1922 return 0;
1923 }
1924
1925 void s5p_mfc_enc_ctrls_delete(struct s5p_mfc_ctx *ctx)
1926 {
1927 int i;
1928
1929 v4l2_ctrl_handler_free(&ctx->ctrl_handler);
1930 for (i = 0; i < NUM_CTRLS; i++)
1931 ctx->ctrls[i] = NULL;
1932 }
1933
1934 void s5p_mfc_enc_init(struct s5p_mfc_ctx *ctx)
1935 {
1936 struct v4l2_format f;
1937 f.fmt.pix_mp.pixelformat = DEF_SRC_FMT_ENC;
1938 ctx->src_fmt = find_format(&f, MFC_FMT_RAW);
1939 f.fmt.pix_mp.pixelformat = DEF_DST_FMT_ENC;
1940 ctx->dst_fmt = find_format(&f, MFC_FMT_ENC);
1941 }
1942
Linux kernel - Deliverables
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