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[media] media: mx1_camera: use the default .set_crop() implementation
[deliverable/linux.git] / drivers / media / platform / soc_camera / mx1_camera.c
1 /*
2 * V4L2 Driver for i.MXL/i.MXL camera (CSI) host
3 *
4 * Copyright (C) 2008, Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
5 * Copyright (C) 2009, Darius Augulis <augulis.darius@gmail.com>
6 *
7 * Based on PXA SoC camera driver
8 * Copyright (C) 2006, Sascha Hauer, Pengutronix
9 * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16 #include <linux/clk.h>
17 #include <linux/delay.h>
18 #include <linux/device.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/errno.h>
21 #include <linux/fs.h>
22 #include <linux/init.h>
23 #include <linux/interrupt.h>
24 #include <linux/io.h>
25 #include <linux/kernel.h>
26 #include <linux/mm.h>
27 #include <linux/module.h>
28 #include <linux/moduleparam.h>
29 #include <linux/mutex.h>
30 #include <linux/platform_device.h>
31 #include <linux/sched.h>
32 #include <linux/slab.h>
33 #include <linux/time.h>
34 #include <linux/videodev2.h>
35
36 #include <media/soc_camera.h>
37 #include <media/v4l2-common.h>
38 #include <media/v4l2-dev.h>
39 #include <media/videobuf-dma-contig.h>
40 #include <media/soc_mediabus.h>
41
42 #include <asm/dma.h>
43 #include <asm/fiq.h>
44 #include <mach/dma-mx1-mx2.h>
45 #include <mach/hardware.h>
46 #include <mach/irqs.h>
47 #include <linux/platform_data/camera-mx1.h>
48
49 /*
50 * CSI registers
51 */
52 #define CSICR1 0x00 /* CSI Control Register 1 */
53 #define CSISR 0x08 /* CSI Status Register */
54 #define CSIRXR 0x10 /* CSI RxFIFO Register */
55
56 #define CSICR1_RXFF_LEVEL(x) (((x) & 0x3) << 19)
57 #define CSICR1_SOF_POL (1 << 17)
58 #define CSICR1_SOF_INTEN (1 << 16)
59 #define CSICR1_MCLKDIV(x) (((x) & 0xf) << 12)
60 #define CSICR1_MCLKEN (1 << 9)
61 #define CSICR1_FCC (1 << 8)
62 #define CSICR1_BIG_ENDIAN (1 << 7)
63 #define CSICR1_CLR_RXFIFO (1 << 5)
64 #define CSICR1_GCLK_MODE (1 << 4)
65 #define CSICR1_DATA_POL (1 << 2)
66 #define CSICR1_REDGE (1 << 1)
67 #define CSICR1_EN (1 << 0)
68
69 #define CSISR_SFF_OR_INT (1 << 25)
70 #define CSISR_RFF_OR_INT (1 << 24)
71 #define CSISR_STATFF_INT (1 << 21)
72 #define CSISR_RXFF_INT (1 << 18)
73 #define CSISR_SOF_INT (1 << 16)
74 #define CSISR_DRDY (1 << 0)
75
76 #define DRIVER_VERSION "0.0.2"
77 #define DRIVER_NAME "mx1-camera"
78
79 #define CSI_IRQ_MASK (CSISR_SFF_OR_INT | CSISR_RFF_OR_INT | \
80 CSISR_STATFF_INT | CSISR_RXFF_INT | CSISR_SOF_INT)
81
82 #define CSI_BUS_FLAGS (V4L2_MBUS_MASTER | V4L2_MBUS_HSYNC_ACTIVE_HIGH | \
83 V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_LOW | \
84 V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_PCLK_SAMPLE_FALLING | \
85 V4L2_MBUS_DATA_ACTIVE_HIGH | V4L2_MBUS_DATA_ACTIVE_LOW)
86
87 #define MAX_VIDEO_MEM 16 /* Video memory limit in megabytes */
88
89 /*
90 * Structures
91 */
92
93 /* buffer for one video frame */
94 struct mx1_buffer {
95 /* common v4l buffer stuff -- must be first */
96 struct videobuf_buffer vb;
97 enum v4l2_mbus_pixelcode code;
98 int inwork;
99 };
100
101 /*
102 * i.MX1/i.MXL is only supposed to handle one camera on its Camera Sensor
103 * Interface. If anyone ever builds hardware to enable more than
104 * one camera, they will have to modify this driver too
105 */
106 struct mx1_camera_dev {
107 struct soc_camera_host soc_host;
108 struct soc_camera_device *icd;
109 struct mx1_camera_pdata *pdata;
110 struct mx1_buffer *active;
111 struct resource *res;
112 struct clk *clk;
113 struct list_head capture;
114
115 void __iomem *base;
116 int dma_chan;
117 unsigned int irq;
118 unsigned long mclk;
119
120 spinlock_t lock;
121 };
122
123 /*
124 * Videobuf operations
125 */
126 static int mx1_videobuf_setup(struct videobuf_queue *vq, unsigned int *count,
127 unsigned int *size)
128 {
129 struct soc_camera_device *icd = vq->priv_data;
130
131 *size = icd->sizeimage;
132
133 if (!*count)
134 *count = 32;
135
136 if (*size * *count > MAX_VIDEO_MEM * 1024 * 1024)
137 *count = (MAX_VIDEO_MEM * 1024 * 1024) / *size;
138
139 dev_dbg(icd->parent, "count=%d, size=%d\n", *count, *size);
140
141 return 0;
142 }
143
144 static void free_buffer(struct videobuf_queue *vq, struct mx1_buffer *buf)
145 {
146 struct soc_camera_device *icd = vq->priv_data;
147 struct videobuf_buffer *vb = &buf->vb;
148
149 BUG_ON(in_interrupt());
150
151 dev_dbg(icd->parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
152 vb, vb->baddr, vb->bsize);
153
154 /*
155 * This waits until this buffer is out of danger, i.e., until it is no
156 * longer in STATE_QUEUED or STATE_ACTIVE
157 */
158 videobuf_waiton(vq, vb, 0, 0);
159 videobuf_dma_contig_free(vq, vb);
160
161 vb->state = VIDEOBUF_NEEDS_INIT;
162 }
163
164 static int mx1_videobuf_prepare(struct videobuf_queue *vq,
165 struct videobuf_buffer *vb, enum v4l2_field field)
166 {
167 struct soc_camera_device *icd = vq->priv_data;
168 struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
169 int ret;
170
171 dev_dbg(icd->parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
172 vb, vb->baddr, vb->bsize);
173
174 /* Added list head initialization on alloc */
175 WARN_ON(!list_empty(&vb->queue));
176
177 BUG_ON(NULL == icd->current_fmt);
178
179 /*
180 * I think, in buf_prepare you only have to protect global data,
181 * the actual buffer is yours
182 */
183 buf->inwork = 1;
184
185 if (buf->code != icd->current_fmt->code ||
186 vb->width != icd->user_width ||
187 vb->height != icd->user_height ||
188 vb->field != field) {
189 buf->code = icd->current_fmt->code;
190 vb->width = icd->user_width;
191 vb->height = icd->user_height;
192 vb->field = field;
193 vb->state = VIDEOBUF_NEEDS_INIT;
194 }
195
196 vb->size = icd->sizeimage;
197 if (0 != vb->baddr && vb->bsize < vb->size) {
198 ret = -EINVAL;
199 goto out;
200 }
201
202 if (vb->state == VIDEOBUF_NEEDS_INIT) {
203 ret = videobuf_iolock(vq, vb, NULL);
204 if (ret)
205 goto fail;
206
207 vb->state = VIDEOBUF_PREPARED;
208 }
209
210 buf->inwork = 0;
211
212 return 0;
213
214 fail:
215 free_buffer(vq, buf);
216 out:
217 buf->inwork = 0;
218 return ret;
219 }
220
221 static int mx1_camera_setup_dma(struct mx1_camera_dev *pcdev)
222 {
223 struct videobuf_buffer *vbuf = &pcdev->active->vb;
224 struct device *dev = pcdev->icd->parent;
225 int ret;
226
227 if (unlikely(!pcdev->active)) {
228 dev_err(dev, "DMA End IRQ with no active buffer\n");
229 return -EFAULT;
230 }
231
232 /* setup sg list for future DMA */
233 ret = imx_dma_setup_single(pcdev->dma_chan,
234 videobuf_to_dma_contig(vbuf),
235 vbuf->size, pcdev->res->start +
236 CSIRXR, DMA_MODE_READ);
237 if (unlikely(ret))
238 dev_err(dev, "Failed to setup DMA sg list\n");
239
240 return ret;
241 }
242
243 /* Called under spinlock_irqsave(&pcdev->lock, ...) */
244 static void mx1_videobuf_queue(struct videobuf_queue *vq,
245 struct videobuf_buffer *vb)
246 {
247 struct soc_camera_device *icd = vq->priv_data;
248 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
249 struct mx1_camera_dev *pcdev = ici->priv;
250 struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
251
252 dev_dbg(icd->parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
253 vb, vb->baddr, vb->bsize);
254
255 list_add_tail(&vb->queue, &pcdev->capture);
256
257 vb->state = VIDEOBUF_ACTIVE;
258
259 if (!pcdev->active) {
260 pcdev->active = buf;
261
262 /* setup sg list for future DMA */
263 if (!mx1_camera_setup_dma(pcdev)) {
264 unsigned int temp;
265 /* enable SOF irq */
266 temp = __raw_readl(pcdev->base + CSICR1) |
267 CSICR1_SOF_INTEN;
268 __raw_writel(temp, pcdev->base + CSICR1);
269 }
270 }
271 }
272
273 static void mx1_videobuf_release(struct videobuf_queue *vq,
274 struct videobuf_buffer *vb)
275 {
276 struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
277 #ifdef DEBUG
278 struct soc_camera_device *icd = vq->priv_data;
279 struct device *dev = icd->parent;
280
281 dev_dbg(dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
282 vb, vb->baddr, vb->bsize);
283
284 switch (vb->state) {
285 case VIDEOBUF_ACTIVE:
286 dev_dbg(dev, "%s (active)\n", __func__);
287 break;
288 case VIDEOBUF_QUEUED:
289 dev_dbg(dev, "%s (queued)\n", __func__);
290 break;
291 case VIDEOBUF_PREPARED:
292 dev_dbg(dev, "%s (prepared)\n", __func__);
293 break;
294 default:
295 dev_dbg(dev, "%s (unknown)\n", __func__);
296 break;
297 }
298 #endif
299
300 free_buffer(vq, buf);
301 }
302
303 static void mx1_camera_wakeup(struct mx1_camera_dev *pcdev,
304 struct videobuf_buffer *vb,
305 struct mx1_buffer *buf)
306 {
307 /* _init is used to debug races, see comment in mx1_camera_reqbufs() */
308 list_del_init(&vb->queue);
309 vb->state = VIDEOBUF_DONE;
310 do_gettimeofday(&vb->ts);
311 vb->field_count++;
312 wake_up(&vb->done);
313
314 if (list_empty(&pcdev->capture)) {
315 pcdev->active = NULL;
316 return;
317 }
318
319 pcdev->active = list_entry(pcdev->capture.next,
320 struct mx1_buffer, vb.queue);
321
322 /* setup sg list for future DMA */
323 if (likely(!mx1_camera_setup_dma(pcdev))) {
324 unsigned int temp;
325
326 /* enable SOF irq */
327 temp = __raw_readl(pcdev->base + CSICR1) | CSICR1_SOF_INTEN;
328 __raw_writel(temp, pcdev->base + CSICR1);
329 }
330 }
331
332 static void mx1_camera_dma_irq(int channel, void *data)
333 {
334 struct mx1_camera_dev *pcdev = data;
335 struct device *dev = pcdev->icd->parent;
336 struct mx1_buffer *buf;
337 struct videobuf_buffer *vb;
338 unsigned long flags;
339
340 spin_lock_irqsave(&pcdev->lock, flags);
341
342 imx_dma_disable(channel);
343
344 if (unlikely(!pcdev->active)) {
345 dev_err(dev, "DMA End IRQ with no active buffer\n");
346 goto out;
347 }
348
349 vb = &pcdev->active->vb;
350 buf = container_of(vb, struct mx1_buffer, vb);
351 WARN_ON(buf->inwork || list_empty(&vb->queue));
352 dev_dbg(dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
353 vb, vb->baddr, vb->bsize);
354
355 mx1_camera_wakeup(pcdev, vb, buf);
356 out:
357 spin_unlock_irqrestore(&pcdev->lock, flags);
358 }
359
360 static struct videobuf_queue_ops mx1_videobuf_ops = {
361 .buf_setup = mx1_videobuf_setup,
362 .buf_prepare = mx1_videobuf_prepare,
363 .buf_queue = mx1_videobuf_queue,
364 .buf_release = mx1_videobuf_release,
365 };
366
367 static void mx1_camera_init_videobuf(struct videobuf_queue *q,
368 struct soc_camera_device *icd)
369 {
370 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
371 struct mx1_camera_dev *pcdev = ici->priv;
372
373 videobuf_queue_dma_contig_init(q, &mx1_videobuf_ops, icd->parent,
374 &pcdev->lock, V4L2_BUF_TYPE_VIDEO_CAPTURE,
375 V4L2_FIELD_NONE,
376 sizeof(struct mx1_buffer), icd, &icd->video_lock);
377 }
378
379 static int mclk_get_divisor(struct mx1_camera_dev *pcdev)
380 {
381 unsigned int mclk = pcdev->mclk;
382 unsigned long div;
383 unsigned long lcdclk;
384
385 lcdclk = clk_get_rate(pcdev->clk);
386
387 /*
388 * We verify platform_mclk_10khz != 0, so if anyone breaks it, here
389 * they get a nice Oops
390 */
391 div = (lcdclk + 2 * mclk - 1) / (2 * mclk) - 1;
392
393 dev_dbg(pcdev->icd->parent,
394 "System clock %lukHz, target freq %dkHz, divisor %lu\n",
395 lcdclk / 1000, mclk / 1000, div);
396
397 return div;
398 }
399
400 static void mx1_camera_activate(struct mx1_camera_dev *pcdev)
401 {
402 unsigned int csicr1 = CSICR1_EN;
403
404 dev_dbg(pcdev->icd->parent, "Activate device\n");
405
406 clk_prepare_enable(pcdev->clk);
407
408 /* enable CSI before doing anything else */
409 __raw_writel(csicr1, pcdev->base + CSICR1);
410
411 csicr1 |= CSICR1_MCLKEN | CSICR1_FCC | CSICR1_GCLK_MODE;
412 csicr1 |= CSICR1_MCLKDIV(mclk_get_divisor(pcdev));
413 csicr1 |= CSICR1_RXFF_LEVEL(2); /* 16 words */
414
415 __raw_writel(csicr1, pcdev->base + CSICR1);
416 }
417
418 static void mx1_camera_deactivate(struct mx1_camera_dev *pcdev)
419 {
420 dev_dbg(pcdev->icd->parent, "Deactivate device\n");
421
422 /* Disable all CSI interface */
423 __raw_writel(0x00, pcdev->base + CSICR1);
424
425 clk_disable_unprepare(pcdev->clk);
426 }
427
428 /*
429 * The following two functions absolutely depend on the fact, that
430 * there can be only one camera on i.MX1/i.MXL camera sensor interface
431 */
432 static int mx1_camera_add_device(struct soc_camera_device *icd)
433 {
434 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
435 struct mx1_camera_dev *pcdev = ici->priv;
436
437 if (pcdev->icd)
438 return -EBUSY;
439
440 dev_info(icd->parent, "MX1 Camera driver attached to camera %d\n",
441 icd->devnum);
442
443 mx1_camera_activate(pcdev);
444
445 pcdev->icd = icd;
446
447 return 0;
448 }
449
450 static void mx1_camera_remove_device(struct soc_camera_device *icd)
451 {
452 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
453 struct mx1_camera_dev *pcdev = ici->priv;
454 unsigned int csicr1;
455
456 BUG_ON(icd != pcdev->icd);
457
458 /* disable interrupts */
459 csicr1 = __raw_readl(pcdev->base + CSICR1) & ~CSI_IRQ_MASK;
460 __raw_writel(csicr1, pcdev->base + CSICR1);
461
462 /* Stop DMA engine */
463 imx_dma_disable(pcdev->dma_chan);
464
465 dev_info(icd->parent, "MX1 Camera driver detached from camera %d\n",
466 icd->devnum);
467
468 mx1_camera_deactivate(pcdev);
469
470 pcdev->icd = NULL;
471 }
472
473 static int mx1_camera_set_bus_param(struct soc_camera_device *icd)
474 {
475 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
476 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
477 struct mx1_camera_dev *pcdev = ici->priv;
478 struct v4l2_mbus_config cfg = {.type = V4L2_MBUS_PARALLEL,};
479 unsigned long common_flags;
480 unsigned int csicr1;
481 int ret;
482
483 /* MX1 supports only 8bit buswidth */
484 ret = v4l2_subdev_call(sd, video, g_mbus_config, &cfg);
485 if (!ret) {
486 common_flags = soc_mbus_config_compatible(&cfg, CSI_BUS_FLAGS);
487 if (!common_flags) {
488 dev_warn(icd->parent,
489 "Flags incompatible: camera 0x%x, host 0x%x\n",
490 cfg.flags, CSI_BUS_FLAGS);
491 return -EINVAL;
492 }
493 } else if (ret != -ENOIOCTLCMD) {
494 return ret;
495 } else {
496 common_flags = CSI_BUS_FLAGS;
497 }
498
499 /* Make choises, based on platform choice */
500 if ((common_flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH) &&
501 (common_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)) {
502 if (!pcdev->pdata ||
503 pcdev->pdata->flags & MX1_CAMERA_VSYNC_HIGH)
504 common_flags &= ~V4L2_MBUS_VSYNC_ACTIVE_LOW;
505 else
506 common_flags &= ~V4L2_MBUS_VSYNC_ACTIVE_HIGH;
507 }
508
509 if ((common_flags & V4L2_MBUS_PCLK_SAMPLE_RISING) &&
510 (common_flags & V4L2_MBUS_PCLK_SAMPLE_FALLING)) {
511 if (!pcdev->pdata ||
512 pcdev->pdata->flags & MX1_CAMERA_PCLK_RISING)
513 common_flags &= ~V4L2_MBUS_PCLK_SAMPLE_FALLING;
514 else
515 common_flags &= ~V4L2_MBUS_PCLK_SAMPLE_RISING;
516 }
517
518 if ((common_flags & V4L2_MBUS_DATA_ACTIVE_HIGH) &&
519 (common_flags & V4L2_MBUS_DATA_ACTIVE_LOW)) {
520 if (!pcdev->pdata ||
521 pcdev->pdata->flags & MX1_CAMERA_DATA_HIGH)
522 common_flags &= ~V4L2_MBUS_DATA_ACTIVE_LOW;
523 else
524 common_flags &= ~V4L2_MBUS_DATA_ACTIVE_HIGH;
525 }
526
527 cfg.flags = common_flags;
528 ret = v4l2_subdev_call(sd, video, s_mbus_config, &cfg);
529 if (ret < 0 && ret != -ENOIOCTLCMD) {
530 dev_dbg(icd->parent, "camera s_mbus_config(0x%lx) returned %d\n",
531 common_flags, ret);
532 return ret;
533 }
534
535 csicr1 = __raw_readl(pcdev->base + CSICR1);
536
537 if (common_flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
538 csicr1 |= CSICR1_REDGE;
539 if (common_flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH)
540 csicr1 |= CSICR1_SOF_POL;
541 if (common_flags & V4L2_MBUS_DATA_ACTIVE_LOW)
542 csicr1 |= CSICR1_DATA_POL;
543
544 __raw_writel(csicr1, pcdev->base + CSICR1);
545
546 return 0;
547 }
548
549 static int mx1_camera_set_fmt(struct soc_camera_device *icd,
550 struct v4l2_format *f)
551 {
552 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
553 const struct soc_camera_format_xlate *xlate;
554 struct v4l2_pix_format *pix = &f->fmt.pix;
555 struct v4l2_mbus_framefmt mf;
556 int ret, buswidth;
557
558 xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
559 if (!xlate) {
560 dev_warn(icd->parent, "Format %x not found\n",
561 pix->pixelformat);
562 return -EINVAL;
563 }
564
565 buswidth = xlate->host_fmt->bits_per_sample;
566 if (buswidth > 8) {
567 dev_warn(icd->parent,
568 "bits-per-sample %d for format %x unsupported\n",
569 buswidth, pix->pixelformat);
570 return -EINVAL;
571 }
572
573 mf.width = pix->width;
574 mf.height = pix->height;
575 mf.field = pix->field;
576 mf.colorspace = pix->colorspace;
577 mf.code = xlate->code;
578
579 ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf);
580 if (ret < 0)
581 return ret;
582
583 if (mf.code != xlate->code)
584 return -EINVAL;
585
586 pix->width = mf.width;
587 pix->height = mf.height;
588 pix->field = mf.field;
589 pix->colorspace = mf.colorspace;
590 icd->current_fmt = xlate;
591
592 return ret;
593 }
594
595 static int mx1_camera_try_fmt(struct soc_camera_device *icd,
596 struct v4l2_format *f)
597 {
598 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
599 const struct soc_camera_format_xlate *xlate;
600 struct v4l2_pix_format *pix = &f->fmt.pix;
601 struct v4l2_mbus_framefmt mf;
602 int ret;
603 /* TODO: limit to mx1 hardware capabilities */
604
605 xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
606 if (!xlate) {
607 dev_warn(icd->parent, "Format %x not found\n",
608 pix->pixelformat);
609 return -EINVAL;
610 }
611
612 mf.width = pix->width;
613 mf.height = pix->height;
614 mf.field = pix->field;
615 mf.colorspace = pix->colorspace;
616 mf.code = xlate->code;
617
618 /* limit to sensor capabilities */
619 ret = v4l2_subdev_call(sd, video, try_mbus_fmt, &mf);
620 if (ret < 0)
621 return ret;
622
623 pix->width = mf.width;
624 pix->height = mf.height;
625 pix->field = mf.field;
626 pix->colorspace = mf.colorspace;
627
628 return 0;
629 }
630
631 static int mx1_camera_reqbufs(struct soc_camera_device *icd,
632 struct v4l2_requestbuffers *p)
633 {
634 int i;
635
636 /*
637 * This is for locking debugging only. I removed spinlocks and now I
638 * check whether .prepare is ever called on a linked buffer, or whether
639 * a dma IRQ can occur for an in-work or unlinked buffer. Until now
640 * it hadn't triggered
641 */
642 for (i = 0; i < p->count; i++) {
643 struct mx1_buffer *buf = container_of(icd->vb_vidq.bufs[i],
644 struct mx1_buffer, vb);
645 buf->inwork = 0;
646 INIT_LIST_HEAD(&buf->vb.queue);
647 }
648
649 return 0;
650 }
651
652 static unsigned int mx1_camera_poll(struct file *file, poll_table *pt)
653 {
654 struct soc_camera_device *icd = file->private_data;
655 struct mx1_buffer *buf;
656
657 buf = list_entry(icd->vb_vidq.stream.next, struct mx1_buffer,
658 vb.stream);
659
660 poll_wait(file, &buf->vb.done, pt);
661
662 if (buf->vb.state == VIDEOBUF_DONE ||
663 buf->vb.state == VIDEOBUF_ERROR)
664 return POLLIN | POLLRDNORM;
665
666 return 0;
667 }
668
669 static int mx1_camera_querycap(struct soc_camera_host *ici,
670 struct v4l2_capability *cap)
671 {
672 /* cap->name is set by the friendly caller:-> */
673 strlcpy(cap->card, "i.MX1/i.MXL Camera", sizeof(cap->card));
674 cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
675
676 return 0;
677 }
678
679 static struct soc_camera_host_ops mx1_soc_camera_host_ops = {
680 .owner = THIS_MODULE,
681 .add = mx1_camera_add_device,
682 .remove = mx1_camera_remove_device,
683 .set_bus_param = mx1_camera_set_bus_param,
684 .set_fmt = mx1_camera_set_fmt,
685 .try_fmt = mx1_camera_try_fmt,
686 .init_videobuf = mx1_camera_init_videobuf,
687 .reqbufs = mx1_camera_reqbufs,
688 .poll = mx1_camera_poll,
689 .querycap = mx1_camera_querycap,
690 };
691
692 static struct fiq_handler fh = {
693 .name = "csi_sof"
694 };
695
696 static int __init mx1_camera_probe(struct platform_device *pdev)
697 {
698 struct mx1_camera_dev *pcdev;
699 struct resource *res;
700 struct pt_regs regs;
701 struct clk *clk;
702 void __iomem *base;
703 unsigned int irq;
704 int err = 0;
705
706 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
707 irq = platform_get_irq(pdev, 0);
708 if (!res || (int)irq <= 0) {
709 err = -ENODEV;
710 goto exit;
711 }
712
713 clk = clk_get(&pdev->dev, "csi_clk");
714 if (IS_ERR(clk)) {
715 err = PTR_ERR(clk);
716 goto exit;
717 }
718
719 pcdev = kzalloc(sizeof(*pcdev), GFP_KERNEL);
720 if (!pcdev) {
721 dev_err(&pdev->dev, "Could not allocate pcdev\n");
722 err = -ENOMEM;
723 goto exit_put_clk;
724 }
725
726 pcdev->res = res;
727 pcdev->clk = clk;
728
729 pcdev->pdata = pdev->dev.platform_data;
730
731 if (pcdev->pdata)
732 pcdev->mclk = pcdev->pdata->mclk_10khz * 10000;
733
734 if (!pcdev->mclk) {
735 dev_warn(&pdev->dev,
736 "mclk_10khz == 0! Please, fix your platform data. "
737 "Using default 20MHz\n");
738 pcdev->mclk = 20000000;
739 }
740
741 INIT_LIST_HEAD(&pcdev->capture);
742 spin_lock_init(&pcdev->lock);
743
744 /*
745 * Request the regions.
746 */
747 if (!request_mem_region(res->start, resource_size(res), DRIVER_NAME)) {
748 err = -EBUSY;
749 goto exit_kfree;
750 }
751
752 base = ioremap(res->start, resource_size(res));
753 if (!base) {
754 err = -ENOMEM;
755 goto exit_release;
756 }
757 pcdev->irq = irq;
758 pcdev->base = base;
759
760 /* request dma */
761 pcdev->dma_chan = imx_dma_request_by_prio(DRIVER_NAME, DMA_PRIO_HIGH);
762 if (pcdev->dma_chan < 0) {
763 dev_err(&pdev->dev, "Can't request DMA for MX1 CSI\n");
764 err = -EBUSY;
765 goto exit_iounmap;
766 }
767 dev_dbg(&pdev->dev, "got DMA channel %d\n", pcdev->dma_chan);
768
769 imx_dma_setup_handlers(pcdev->dma_chan, mx1_camera_dma_irq, NULL,
770 pcdev);
771
772 imx_dma_config_channel(pcdev->dma_chan, IMX_DMA_TYPE_FIFO,
773 IMX_DMA_MEMSIZE_32, MX1_DMA_REQ_CSI_R, 0);
774 /* burst length : 16 words = 64 bytes */
775 imx_dma_config_burstlen(pcdev->dma_chan, 0);
776
777 /* request irq */
778 err = claim_fiq(&fh);
779 if (err) {
780 dev_err(&pdev->dev, "Camera interrupt register failed \n");
781 goto exit_free_dma;
782 }
783
784 set_fiq_handler(&mx1_camera_sof_fiq_start, &mx1_camera_sof_fiq_end -
785 &mx1_camera_sof_fiq_start);
786
787 regs.ARM_r8 = (long)MX1_DMA_DIMR;
788 regs.ARM_r9 = (long)MX1_DMA_CCR(pcdev->dma_chan);
789 regs.ARM_r10 = (long)pcdev->base + CSICR1;
790 regs.ARM_fp = (long)pcdev->base + CSISR;
791 regs.ARM_sp = 1 << pcdev->dma_chan;
792 set_fiq_regs(&regs);
793
794 mxc_set_irq_fiq(irq, 1);
795 enable_fiq(irq);
796
797 pcdev->soc_host.drv_name = DRIVER_NAME;
798 pcdev->soc_host.ops = &mx1_soc_camera_host_ops;
799 pcdev->soc_host.priv = pcdev;
800 pcdev->soc_host.v4l2_dev.dev = &pdev->dev;
801 pcdev->soc_host.nr = pdev->id;
802 err = soc_camera_host_register(&pcdev->soc_host);
803 if (err)
804 goto exit_free_irq;
805
806 dev_info(&pdev->dev, "MX1 Camera driver loaded\n");
807
808 return 0;
809
810 exit_free_irq:
811 disable_fiq(irq);
812 mxc_set_irq_fiq(irq, 0);
813 release_fiq(&fh);
814 exit_free_dma:
815 imx_dma_free(pcdev->dma_chan);
816 exit_iounmap:
817 iounmap(base);
818 exit_release:
819 release_mem_region(res->start, resource_size(res));
820 exit_kfree:
821 kfree(pcdev);
822 exit_put_clk:
823 clk_put(clk);
824 exit:
825 return err;
826 }
827
828 static int __exit mx1_camera_remove(struct platform_device *pdev)
829 {
830 struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev);
831 struct mx1_camera_dev *pcdev = container_of(soc_host,
832 struct mx1_camera_dev, soc_host);
833 struct resource *res;
834
835 imx_dma_free(pcdev->dma_chan);
836 disable_fiq(pcdev->irq);
837 mxc_set_irq_fiq(pcdev->irq, 0);
838 release_fiq(&fh);
839
840 clk_put(pcdev->clk);
841
842 soc_camera_host_unregister(soc_host);
843
844 iounmap(pcdev->base);
845
846 res = pcdev->res;
847 release_mem_region(res->start, resource_size(res));
848
849 kfree(pcdev);
850
851 dev_info(&pdev->dev, "MX1 Camera driver unloaded\n");
852
853 return 0;
854 }
855
856 static struct platform_driver mx1_camera_driver = {
857 .driver = {
858 .name = DRIVER_NAME,
859 },
860 .remove = __exit_p(mx1_camera_remove),
861 };
862
863 static int __init mx1_camera_init(void)
864 {
865 return platform_driver_probe(&mx1_camera_driver, mx1_camera_probe);
866 }
867
868 static void __exit mx1_camera_exit(void)
869 {
870 return platform_driver_unregister(&mx1_camera_driver);
871 }
872
873 module_init(mx1_camera_init);
874 module_exit(mx1_camera_exit);
875
876 MODULE_DESCRIPTION("i.MX1/i.MXL SoC Camera Host driver");
877 MODULE_AUTHOR("Paulius Zaleckas <paulius.zaleckas@teltonika.lt>");
878 MODULE_LICENSE("GPL v2");
879 MODULE_VERSION(DRIVER_VERSION);
880 MODULE_ALIAS("platform:" DRIVER_NAME);
Linux kernel - Deliverables
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