2 * V4L2 Driver for i.MX3x camera host
5 * Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/videodev2.h>
15 #include <linux/platform_device.h>
16 #include <linux/clk.h>
17 #include <linux/vmalloc.h>
18 #include <linux/interrupt.h>
19 #include <linux/sched.h>
20 #include <linux/dma/ipu-dma.h>
22 #include <media/v4l2-common.h>
23 #include <media/v4l2-dev.h>
24 #include <media/videobuf2-dma-contig.h>
25 #include <media/soc_camera.h>
26 #include <media/soc_mediabus.h>
28 #include <linux/platform_data/camera-mx3.h>
29 #include <linux/platform_data/dma-imx.h>
31 #define MX3_CAM_DRV_NAME "mx3-camera"
33 /* CMOS Sensor Interface Registers */
34 #define CSI_REG_START 0x60
36 #define CSI_SENS_CONF (0x60 - CSI_REG_START)
37 #define CSI_SENS_FRM_SIZE (0x64 - CSI_REG_START)
38 #define CSI_ACT_FRM_SIZE (0x68 - CSI_REG_START)
39 #define CSI_OUT_FRM_CTRL (0x6C - CSI_REG_START)
40 #define CSI_TST_CTRL (0x70 - CSI_REG_START)
41 #define CSI_CCIR_CODE_1 (0x74 - CSI_REG_START)
42 #define CSI_CCIR_CODE_2 (0x78 - CSI_REG_START)
43 #define CSI_CCIR_CODE_3 (0x7C - CSI_REG_START)
44 #define CSI_FLASH_STROBE_1 (0x80 - CSI_REG_START)
45 #define CSI_FLASH_STROBE_2 (0x84 - CSI_REG_START)
47 #define CSI_SENS_CONF_VSYNC_POL_SHIFT 0
48 #define CSI_SENS_CONF_HSYNC_POL_SHIFT 1
49 #define CSI_SENS_CONF_DATA_POL_SHIFT 2
50 #define CSI_SENS_CONF_PIX_CLK_POL_SHIFT 3
51 #define CSI_SENS_CONF_SENS_PRTCL_SHIFT 4
52 #define CSI_SENS_CONF_SENS_CLKSRC_SHIFT 7
53 #define CSI_SENS_CONF_DATA_FMT_SHIFT 8
54 #define CSI_SENS_CONF_DATA_WIDTH_SHIFT 10
55 #define CSI_SENS_CONF_EXT_VSYNC_SHIFT 15
56 #define CSI_SENS_CONF_DIVRATIO_SHIFT 16
58 #define CSI_SENS_CONF_DATA_FMT_RGB_YUV444 (0UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
59 #define CSI_SENS_CONF_DATA_FMT_YUV422 (2UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
60 #define CSI_SENS_CONF_DATA_FMT_BAYER (3UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
62 #define MAX_VIDEO_MEM 16
64 struct mx3_camera_buffer
{
65 /* common v4l buffer stuff -- must be first */
67 struct list_head queue
;
69 /* One descriptot per scatterlist (per frame) */
70 struct dma_async_tx_descriptor
*txd
;
72 /* We have to "build" a scatterlist ourselves - one element per frame */
73 struct scatterlist sg
;
77 * struct mx3_camera_dev - i.MX3x camera (CSI) object
78 * @dev: camera device, to which the coherent buffer is attached
79 * @icd: currently attached camera sensor
80 * @clk: pointer to clock
81 * @base: remapped register base address
82 * @pdata: platform data
83 * @platform_flags: platform flags
84 * @mclk: master clock frequency in Hz
85 * @capture: list of capture videobuffers
86 * @lock: protects video buffer lists
87 * @active: active video buffer
88 * @idmac_channel: array of pointers to IPU DMAC DMA channels
89 * @soc_host: embedded soc_host object
91 struct mx3_camera_dev
{
93 * i.MX3x is only supposed to handle one camera on its Camera Sensor
94 * Interface. If anyone ever builds hardware to enable more than one
95 * camera _simultaneously_, they will have to modify this driver too
97 struct soc_camera_device
*icd
;
102 struct mx3_camera_pdata
*pdata
;
104 unsigned long platform_flags
;
106 u16 width_flags
; /* max 15 bits */
108 struct list_head capture
;
109 spinlock_t lock
; /* Protects video buffer lists */
110 struct mx3_camera_buffer
*active
;
112 struct vb2_alloc_ctx
*alloc_ctx
;
113 enum v4l2_field field
;
116 /* IDMAC / dmaengine interface */
117 struct idmac_channel
*idmac_channel
[1]; /* We need one channel */
119 struct soc_camera_host soc_host
;
122 struct dma_chan_request
{
123 struct mx3_camera_dev
*mx3_cam
;
127 static u32
csi_reg_read(struct mx3_camera_dev
*mx3
, off_t reg
)
129 return __raw_readl(mx3
->base
+ reg
);
132 static void csi_reg_write(struct mx3_camera_dev
*mx3
, u32 value
, off_t reg
)
134 __raw_writel(value
, mx3
->base
+ reg
);
137 static struct mx3_camera_buffer
*to_mx3_vb(struct vb2_buffer
*vb
)
139 return container_of(vb
, struct mx3_camera_buffer
, vb
);
142 /* Called from the IPU IDMAC ISR */
143 static void mx3_cam_dma_done(void *arg
)
145 struct idmac_tx_desc
*desc
= to_tx_desc(arg
);
146 struct dma_chan
*chan
= desc
->txd
.chan
;
147 struct idmac_channel
*ichannel
= to_idmac_chan(chan
);
148 struct mx3_camera_dev
*mx3_cam
= ichannel
->client
;
150 dev_dbg(chan
->device
->dev
, "callback cookie %d, active DMA 0x%08x\n",
151 desc
->txd
.cookie
, mx3_cam
->active
? sg_dma_address(&mx3_cam
->active
->sg
) : 0);
153 spin_lock(&mx3_cam
->lock
);
154 if (mx3_cam
->active
) {
155 struct vb2_buffer
*vb
= &mx3_cam
->active
->vb
;
156 struct mx3_camera_buffer
*buf
= to_mx3_vb(vb
);
158 list_del_init(&buf
->queue
);
159 do_gettimeofday(&vb
->v4l2_buf
.timestamp
);
160 vb
->v4l2_buf
.field
= mx3_cam
->field
;
161 vb
->v4l2_buf
.sequence
= mx3_cam
->sequence
++;
162 vb2_buffer_done(vb
, VB2_BUF_STATE_DONE
);
165 if (list_empty(&mx3_cam
->capture
)) {
166 mx3_cam
->active
= NULL
;
167 spin_unlock(&mx3_cam
->lock
);
170 * stop capture - without further buffers IPU_CHA_BUF0_RDY will
176 mx3_cam
->active
= list_entry(mx3_cam
->capture
.next
,
177 struct mx3_camera_buffer
, queue
);
178 spin_unlock(&mx3_cam
->lock
);
182 * Videobuf operations
186 * Calculate the __buffer__ (not data) size and number of buffers.
188 static int mx3_videobuf_setup(struct vb2_queue
*vq
,
189 const struct v4l2_format
*fmt
,
190 unsigned int *count
, unsigned int *num_planes
,
191 unsigned int sizes
[], void *alloc_ctxs
[])
193 struct soc_camera_device
*icd
= soc_camera_from_vb2q(vq
);
194 struct soc_camera_host
*ici
= to_soc_camera_host(icd
->parent
);
195 struct mx3_camera_dev
*mx3_cam
= ici
->priv
;
197 if (!mx3_cam
->idmac_channel
[0])
201 const struct soc_camera_format_xlate
*xlate
= soc_camera_xlate_by_fourcc(icd
,
202 fmt
->fmt
.pix
.pixelformat
);
203 unsigned int bytes_per_line
;
209 ret
= soc_mbus_bytes_per_line(fmt
->fmt
.pix
.width
,
214 bytes_per_line
= max_t(u32
, fmt
->fmt
.pix
.bytesperline
, ret
);
216 ret
= soc_mbus_image_size(xlate
->host_fmt
, bytes_per_line
,
217 fmt
->fmt
.pix
.height
);
221 sizes
[0] = max_t(u32
, fmt
->fmt
.pix
.sizeimage
, ret
);
223 /* Called from VIDIOC_REQBUFS or in compatibility mode */
224 sizes
[0] = icd
->sizeimage
;
227 alloc_ctxs
[0] = mx3_cam
->alloc_ctx
;
229 if (!vq
->num_buffers
)
230 mx3_cam
->sequence
= 0;
235 /* If *num_planes != 0, we have already verified *count. */
237 sizes
[0] * *count
+ mx3_cam
->buf_total
> MAX_VIDEO_MEM
* 1024 * 1024)
238 *count
= (MAX_VIDEO_MEM
* 1024 * 1024 - mx3_cam
->buf_total
) /
246 static enum pixel_fmt
fourcc_to_ipu_pix(__u32 fourcc
)
248 /* Add more formats as need arises and test possibilities appear... */
250 case V4L2_PIX_FMT_RGB24
:
251 return IPU_PIX_FMT_RGB24
;
252 case V4L2_PIX_FMT_UYVY
:
253 case V4L2_PIX_FMT_RGB565
:
255 return IPU_PIX_FMT_GENERIC
;
259 static void mx3_videobuf_queue(struct vb2_buffer
*vb
)
261 struct soc_camera_device
*icd
= soc_camera_from_vb2q(vb
->vb2_queue
);
262 struct soc_camera_host
*ici
= to_soc_camera_host(icd
->parent
);
263 struct mx3_camera_dev
*mx3_cam
= ici
->priv
;
264 struct mx3_camera_buffer
*buf
= to_mx3_vb(vb
);
265 struct scatterlist
*sg
= &buf
->sg
;
266 struct dma_async_tx_descriptor
*txd
;
267 struct idmac_channel
*ichan
= mx3_cam
->idmac_channel
[0];
268 struct idmac_video_param
*video
= &ichan
->params
.video
;
269 const struct soc_mbus_pixelfmt
*host_fmt
= icd
->current_fmt
->host_fmt
;
274 new_size
= icd
->sizeimage
;
276 if (vb2_plane_size(vb
, 0) < new_size
) {
277 dev_err(icd
->parent
, "Buffer #%d too small (%lu < %zu)\n",
278 vb
->v4l2_buf
.index
, vb2_plane_size(vb
, 0), new_size
);
283 sg_dma_address(sg
) = vb2_dma_contig_plane_dma_addr(vb
, 0);
284 sg_dma_len(sg
) = new_size
;
286 txd
= dmaengine_prep_slave_sg(
287 &ichan
->dma_chan
, sg
, 1, DMA_DEV_TO_MEM
,
292 txd
->callback_param
= txd
;
293 txd
->callback
= mx3_cam_dma_done
;
300 vb2_set_plane_payload(vb
, 0, new_size
);
302 /* This is the configuration of one sg-element */
303 video
->out_pixel_fmt
= fourcc_to_ipu_pix(host_fmt
->fourcc
);
305 if (video
->out_pixel_fmt
== IPU_PIX_FMT_GENERIC
) {
307 * If the IPU DMA channel is configured to transfer generic
308 * 8-bit data, we have to set up the geometry parameters
309 * correctly, according to the current pixel format. The DMA
310 * horizontal parameters in this case are expressed in bytes,
313 video
->out_width
= icd
->bytesperline
;
314 video
->out_height
= icd
->user_height
;
315 video
->out_stride
= icd
->bytesperline
;
318 * For IPU known formats the pixel unit will be managed
319 * successfully by the IPU code
321 video
->out_width
= icd
->user_width
;
322 video
->out_height
= icd
->user_height
;
323 video
->out_stride
= icd
->user_width
;
327 /* helps to see what DMA actually has written */
328 if (vb2_plane_vaddr(vb
, 0))
329 memset(vb2_plane_vaddr(vb
, 0), 0xaa, vb2_get_plane_payload(vb
, 0));
332 spin_lock_irqsave(&mx3_cam
->lock
, flags
);
333 list_add_tail(&buf
->queue
, &mx3_cam
->capture
);
335 if (!mx3_cam
->active
)
336 mx3_cam
->active
= buf
;
338 spin_unlock_irq(&mx3_cam
->lock
);
340 cookie
= txd
->tx_submit(txd
);
341 dev_dbg(icd
->parent
, "Submitted cookie %d DMA 0x%08x\n",
342 cookie
, sg_dma_address(&buf
->sg
));
347 spin_lock_irq(&mx3_cam
->lock
);
350 list_del_init(&buf
->queue
);
352 if (mx3_cam
->active
== buf
)
353 mx3_cam
->active
= NULL
;
355 spin_unlock_irqrestore(&mx3_cam
->lock
, flags
);
357 vb2_buffer_done(vb
, VB2_BUF_STATE_ERROR
);
360 static void mx3_videobuf_release(struct vb2_buffer
*vb
)
362 struct soc_camera_device
*icd
= soc_camera_from_vb2q(vb
->vb2_queue
);
363 struct soc_camera_host
*ici
= to_soc_camera_host(icd
->parent
);
364 struct mx3_camera_dev
*mx3_cam
= ici
->priv
;
365 struct mx3_camera_buffer
*buf
= to_mx3_vb(vb
);
366 struct dma_async_tx_descriptor
*txd
= buf
->txd
;
370 "Release%s DMA 0x%08x, queue %sempty\n",
371 mx3_cam
->active
== buf
? " active" : "", sg_dma_address(&buf
->sg
),
372 list_empty(&buf
->queue
) ? "" : "not ");
374 spin_lock_irqsave(&mx3_cam
->lock
, flags
);
376 if (mx3_cam
->active
== buf
)
377 mx3_cam
->active
= NULL
;
379 /* Doesn't hurt also if the list is empty */
380 list_del_init(&buf
->queue
);
384 if (mx3_cam
->idmac_channel
[0])
388 spin_unlock_irqrestore(&mx3_cam
->lock
, flags
);
390 mx3_cam
->buf_total
-= vb2_plane_size(vb
, 0);
393 static int mx3_videobuf_init(struct vb2_buffer
*vb
)
395 struct soc_camera_device
*icd
= soc_camera_from_vb2q(vb
->vb2_queue
);
396 struct soc_camera_host
*ici
= to_soc_camera_host(icd
->parent
);
397 struct mx3_camera_dev
*mx3_cam
= ici
->priv
;
398 struct mx3_camera_buffer
*buf
= to_mx3_vb(vb
);
401 /* This is for locking debugging only */
402 INIT_LIST_HEAD(&buf
->queue
);
403 sg_init_table(&buf
->sg
, 1);
405 mx3_cam
->buf_total
+= vb2_plane_size(vb
, 0);
411 static int mx3_stop_streaming(struct vb2_queue
*q
)
413 struct soc_camera_device
*icd
= soc_camera_from_vb2q(q
);
414 struct soc_camera_host
*ici
= to_soc_camera_host(icd
->parent
);
415 struct mx3_camera_dev
*mx3_cam
= ici
->priv
;
416 struct idmac_channel
*ichan
= mx3_cam
->idmac_channel
[0];
417 struct mx3_camera_buffer
*buf
, *tmp
;
421 struct dma_chan
*chan
= &ichan
->dma_chan
;
422 chan
->device
->device_control(chan
, DMA_PAUSE
, 0);
425 spin_lock_irqsave(&mx3_cam
->lock
, flags
);
427 mx3_cam
->active
= NULL
;
429 list_for_each_entry_safe(buf
, tmp
, &mx3_cam
->capture
, queue
) {
430 list_del_init(&buf
->queue
);
431 vb2_buffer_done(&buf
->vb
, VB2_BUF_STATE_ERROR
);
434 spin_unlock_irqrestore(&mx3_cam
->lock
, flags
);
439 static struct vb2_ops mx3_videobuf_ops
= {
440 .queue_setup
= mx3_videobuf_setup
,
441 .buf_queue
= mx3_videobuf_queue
,
442 .buf_cleanup
= mx3_videobuf_release
,
443 .buf_init
= mx3_videobuf_init
,
444 .wait_prepare
= soc_camera_unlock
,
445 .wait_finish
= soc_camera_lock
,
446 .stop_streaming
= mx3_stop_streaming
,
449 static int mx3_camera_init_videobuf(struct vb2_queue
*q
,
450 struct soc_camera_device
*icd
)
452 q
->type
= V4L2_BUF_TYPE_VIDEO_CAPTURE
;
453 q
->io_modes
= VB2_MMAP
| VB2_USERPTR
;
455 q
->ops
= &mx3_videobuf_ops
;
456 q
->mem_ops
= &vb2_dma_contig_memops
;
457 q
->buf_struct_size
= sizeof(struct mx3_camera_buffer
);
459 return vb2_queue_init(q
);
462 /* First part of ipu_csi_init_interface() */
463 static void mx3_camera_activate(struct mx3_camera_dev
*mx3_cam
,
464 struct soc_camera_device
*icd
)
469 /* Set default size: ipu_csi_set_window_size() */
470 csi_reg_write(mx3_cam
, (640 - 1) | ((480 - 1) << 16), CSI_ACT_FRM_SIZE
);
471 /* ...and position to 0:0: ipu_csi_set_window_pos() */
472 conf
= csi_reg_read(mx3_cam
, CSI_OUT_FRM_CTRL
) & 0xffff0000;
473 csi_reg_write(mx3_cam
, conf
, CSI_OUT_FRM_CTRL
);
475 /* We use only gated clock synchronisation mode so far */
476 conf
= 0 << CSI_SENS_CONF_SENS_PRTCL_SHIFT
;
478 /* Set generic data, platform-biggest bus-width */
479 conf
|= CSI_SENS_CONF_DATA_FMT_BAYER
;
481 if (mx3_cam
->platform_flags
& MX3_CAMERA_DATAWIDTH_15
)
482 conf
|= 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT
;
483 else if (mx3_cam
->platform_flags
& MX3_CAMERA_DATAWIDTH_10
)
484 conf
|= 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT
;
485 else if (mx3_cam
->platform_flags
& MX3_CAMERA_DATAWIDTH_8
)
486 conf
|= 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT
;
487 else/* if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4)*/
488 conf
|= 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT
;
490 if (mx3_cam
->platform_flags
& MX3_CAMERA_CLK_SRC
)
491 conf
|= 1 << CSI_SENS_CONF_SENS_CLKSRC_SHIFT
;
492 if (mx3_cam
->platform_flags
& MX3_CAMERA_EXT_VSYNC
)
493 conf
|= 1 << CSI_SENS_CONF_EXT_VSYNC_SHIFT
;
494 if (mx3_cam
->platform_flags
& MX3_CAMERA_DP
)
495 conf
|= 1 << CSI_SENS_CONF_DATA_POL_SHIFT
;
496 if (mx3_cam
->platform_flags
& MX3_CAMERA_PCP
)
497 conf
|= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT
;
498 if (mx3_cam
->platform_flags
& MX3_CAMERA_HSP
)
499 conf
|= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT
;
500 if (mx3_cam
->platform_flags
& MX3_CAMERA_VSP
)
501 conf
|= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT
;
503 /* ipu_csi_init_interface() */
504 csi_reg_write(mx3_cam
, conf
, CSI_SENS_CONF
);
506 clk_prepare_enable(mx3_cam
->clk
);
507 rate
= clk_round_rate(mx3_cam
->clk
, mx3_cam
->mclk
);
508 dev_dbg(icd
->parent
, "Set SENS_CONF to %x, rate %ld\n", conf
, rate
);
510 clk_set_rate(mx3_cam
->clk
, rate
);
513 /* Called with .video_lock held */
514 static int mx3_camera_add_device(struct soc_camera_device
*icd
)
516 struct soc_camera_host
*ici
= to_soc_camera_host(icd
->parent
);
517 struct mx3_camera_dev
*mx3_cam
= ici
->priv
;
522 mx3_camera_activate(mx3_cam
, icd
);
524 mx3_cam
->buf_total
= 0;
527 dev_info(icd
->parent
, "MX3 Camera driver attached to camera %d\n",
533 /* Called with .video_lock held */
534 static void mx3_camera_remove_device(struct soc_camera_device
*icd
)
536 struct soc_camera_host
*ici
= to_soc_camera_host(icd
->parent
);
537 struct mx3_camera_dev
*mx3_cam
= ici
->priv
;
538 struct idmac_channel
**ichan
= &mx3_cam
->idmac_channel
[0];
540 BUG_ON(icd
!= mx3_cam
->icd
);
543 dma_release_channel(&(*ichan
)->dma_chan
);
547 clk_disable_unprepare(mx3_cam
->clk
);
551 dev_info(icd
->parent
, "MX3 Camera driver detached from camera %d\n",
555 static int test_platform_param(struct mx3_camera_dev
*mx3_cam
,
556 unsigned char buswidth
, unsigned long *flags
)
559 * If requested data width is supported by the platform, use it or any
560 * possible lower value - i.MX31 is smart enough to shift bits
562 if (buswidth
> fls(mx3_cam
->width_flags
))
566 * Platform specified synchronization and pixel clock polarities are
567 * only a recommendation and are only used during probing. MX3x
568 * camera interface only works in master mode, i.e., uses HSYNC and
569 * VSYNC signals from the sensor
571 *flags
= V4L2_MBUS_MASTER
|
572 V4L2_MBUS_HSYNC_ACTIVE_HIGH
|
573 V4L2_MBUS_HSYNC_ACTIVE_LOW
|
574 V4L2_MBUS_VSYNC_ACTIVE_HIGH
|
575 V4L2_MBUS_VSYNC_ACTIVE_LOW
|
576 V4L2_MBUS_PCLK_SAMPLE_RISING
|
577 V4L2_MBUS_PCLK_SAMPLE_FALLING
|
578 V4L2_MBUS_DATA_ACTIVE_HIGH
|
579 V4L2_MBUS_DATA_ACTIVE_LOW
;
584 static int mx3_camera_try_bus_param(struct soc_camera_device
*icd
,
585 const unsigned int depth
)
587 struct v4l2_subdev
*sd
= soc_camera_to_subdev(icd
);
588 struct soc_camera_host
*ici
= to_soc_camera_host(icd
->parent
);
589 struct mx3_camera_dev
*mx3_cam
= ici
->priv
;
590 struct v4l2_mbus_config cfg
= {.type
= V4L2_MBUS_PARALLEL
,};
591 unsigned long bus_flags
, common_flags
;
592 int ret
= test_platform_param(mx3_cam
, depth
, &bus_flags
);
594 dev_dbg(icd
->parent
, "request bus width %d bit: %d\n", depth
, ret
);
599 ret
= v4l2_subdev_call(sd
, video
, g_mbus_config
, &cfg
);
601 common_flags
= soc_mbus_config_compatible(&cfg
,
604 dev_warn(icd
->parent
,
605 "Flags incompatible: camera 0x%x, host 0x%lx\n",
606 cfg
.flags
, bus_flags
);
609 } else if (ret
!= -ENOIOCTLCMD
) {
616 static bool chan_filter(struct dma_chan
*chan
, void *arg
)
618 struct dma_chan_request
*rq
= arg
;
619 struct mx3_camera_pdata
*pdata
;
621 if (!imx_dma_is_ipu(chan
))
627 pdata
= rq
->mx3_cam
->soc_host
.v4l2_dev
.dev
->platform_data
;
629 return rq
->id
== chan
->chan_id
&&
630 pdata
->dma_dev
== chan
->device
->dev
;
633 static const struct soc_mbus_pixelfmt mx3_camera_formats
[] = {
635 .fourcc
= V4L2_PIX_FMT_SBGGR8
,
636 .name
= "Bayer BGGR (sRGB) 8 bit",
637 .bits_per_sample
= 8,
638 .packing
= SOC_MBUS_PACKING_NONE
,
639 .order
= SOC_MBUS_ORDER_LE
,
640 .layout
= SOC_MBUS_LAYOUT_PACKED
,
642 .fourcc
= V4L2_PIX_FMT_GREY
,
643 .name
= "Monochrome 8 bit",
644 .bits_per_sample
= 8,
645 .packing
= SOC_MBUS_PACKING_NONE
,
646 .order
= SOC_MBUS_ORDER_LE
,
647 .layout
= SOC_MBUS_LAYOUT_PACKED
,
651 /* This will be corrected as we get more formats */
652 static bool mx3_camera_packing_supported(const struct soc_mbus_pixelfmt
*fmt
)
654 return fmt
->packing
== SOC_MBUS_PACKING_NONE
||
655 (fmt
->bits_per_sample
== 8 &&
656 fmt
->packing
== SOC_MBUS_PACKING_2X8_PADHI
) ||
657 (fmt
->bits_per_sample
> 8 &&
658 fmt
->packing
== SOC_MBUS_PACKING_EXTEND16
);
661 static int mx3_camera_get_formats(struct soc_camera_device
*icd
, unsigned int idx
,
662 struct soc_camera_format_xlate
*xlate
)
664 struct v4l2_subdev
*sd
= soc_camera_to_subdev(icd
);
665 struct device
*dev
= icd
->parent
;
666 int formats
= 0, ret
;
667 enum v4l2_mbus_pixelcode code
;
668 const struct soc_mbus_pixelfmt
*fmt
;
670 ret
= v4l2_subdev_call(sd
, video
, enum_mbus_fmt
, idx
, &code
);
672 /* No more formats */
675 fmt
= soc_mbus_get_fmtdesc(code
);
677 dev_warn(icd
->parent
,
678 "Unsupported format code #%u: %d\n", idx
, code
);
682 /* This also checks support for the requested bits-per-sample */
683 ret
= mx3_camera_try_bus_param(icd
, fmt
->bits_per_sample
);
688 case V4L2_MBUS_FMT_SBGGR10_1X10
:
691 xlate
->host_fmt
= &mx3_camera_formats
[0];
694 dev_dbg(dev
, "Providing format %s using code %d\n",
695 mx3_camera_formats
[0].name
, code
);
698 case V4L2_MBUS_FMT_Y10_1X10
:
701 xlate
->host_fmt
= &mx3_camera_formats
[1];
704 dev_dbg(dev
, "Providing format %s using code %d\n",
705 mx3_camera_formats
[1].name
, code
);
709 if (!mx3_camera_packing_supported(fmt
))
713 /* Generic pass-through */
716 xlate
->host_fmt
= fmt
;
718 dev_dbg(dev
, "Providing format %c%c%c%c in pass-through mode\n",
719 (fmt
->fourcc
>> (0*8)) & 0xFF,
720 (fmt
->fourcc
>> (1*8)) & 0xFF,
721 (fmt
->fourcc
>> (2*8)) & 0xFF,
722 (fmt
->fourcc
>> (3*8)) & 0xFF);
729 static void configure_geometry(struct mx3_camera_dev
*mx3_cam
,
730 unsigned int width
, unsigned int height
,
731 const struct soc_mbus_pixelfmt
*fmt
)
733 u32 ctrl
, width_field
, height_field
;
735 if (fourcc_to_ipu_pix(fmt
->fourcc
) == IPU_PIX_FMT_GENERIC
) {
737 * As the CSI will be configured to output BAYER, here
738 * the width parameter count the number of samples to
739 * capture to complete the whole image width.
741 unsigned int num
, den
;
742 int ret
= soc_mbus_samples_per_pixel(fmt
, &num
, &den
);
744 width
= width
* num
/ den
;
747 /* Setup frame size - this cannot be changed on-the-fly... */
748 width_field
= width
- 1;
749 height_field
= height
- 1;
750 csi_reg_write(mx3_cam
, width_field
| (height_field
<< 16), CSI_SENS_FRM_SIZE
);
752 csi_reg_write(mx3_cam
, width_field
<< 16, CSI_FLASH_STROBE_1
);
753 csi_reg_write(mx3_cam
, (height_field
<< 16) | 0x22, CSI_FLASH_STROBE_2
);
755 csi_reg_write(mx3_cam
, width_field
| (height_field
<< 16), CSI_ACT_FRM_SIZE
);
757 /* ...and position */
758 ctrl
= csi_reg_read(mx3_cam
, CSI_OUT_FRM_CTRL
) & 0xffff0000;
759 /* Sensor does the cropping */
760 csi_reg_write(mx3_cam
, ctrl
| 0 | (0 << 8), CSI_OUT_FRM_CTRL
);
763 static int acquire_dma_channel(struct mx3_camera_dev
*mx3_cam
)
766 struct dma_chan
*chan
;
767 struct idmac_channel
**ichan
= &mx3_cam
->idmac_channel
[0];
768 /* We have to use IDMAC_IC_7 for Bayer / generic data */
769 struct dma_chan_request rq
= {.mx3_cam
= mx3_cam
,
773 dma_cap_set(DMA_SLAVE
, mask
);
774 dma_cap_set(DMA_PRIVATE
, mask
);
775 chan
= dma_request_channel(mask
, chan_filter
, &rq
);
779 *ichan
= to_idmac_chan(chan
);
780 (*ichan
)->client
= mx3_cam
;
786 * FIXME: learn to use stride != width, then we can keep stride properly aligned
787 * and support arbitrary (even) widths.
789 static inline void stride_align(__u32
*width
)
791 if (ALIGN(*width
, 8) < 4096)
792 *width
= ALIGN(*width
, 8);
794 *width
= *width
& ~7;
798 * As long as we don't implement host-side cropping and scaling, we can use
799 * default g_crop and cropcap from soc_camera.c
801 static int mx3_camera_set_crop(struct soc_camera_device
*icd
,
802 const struct v4l2_crop
*a
)
804 struct v4l2_crop a_writable
= *a
;
805 struct v4l2_rect
*rect
= &a_writable
.c
;
806 struct soc_camera_host
*ici
= to_soc_camera_host(icd
->parent
);
807 struct mx3_camera_dev
*mx3_cam
= ici
->priv
;
808 struct v4l2_subdev
*sd
= soc_camera_to_subdev(icd
);
809 struct v4l2_mbus_framefmt mf
;
812 soc_camera_limit_side(&rect
->left
, &rect
->width
, 0, 2, 4096);
813 soc_camera_limit_side(&rect
->top
, &rect
->height
, 0, 2, 4096);
815 ret
= v4l2_subdev_call(sd
, video
, s_crop
, a
);
819 /* The capture device might have changed its output sizes */
820 ret
= v4l2_subdev_call(sd
, video
, g_mbus_fmt
, &mf
);
824 if (mf
.code
!= icd
->current_fmt
->code
)
828 /* Ouch! We can only handle 8-byte aligned width... */
829 stride_align(&mf
.width
);
830 ret
= v4l2_subdev_call(sd
, video
, s_mbus_fmt
, &mf
);
835 if (mf
.width
!= icd
->user_width
|| mf
.height
!= icd
->user_height
)
836 configure_geometry(mx3_cam
, mf
.width
, mf
.height
,
837 icd
->current_fmt
->host_fmt
);
839 dev_dbg(icd
->parent
, "Sensor cropped %dx%d\n",
840 mf
.width
, mf
.height
);
842 icd
->user_width
= mf
.width
;
843 icd
->user_height
= mf
.height
;
848 static int mx3_camera_set_fmt(struct soc_camera_device
*icd
,
849 struct v4l2_format
*f
)
851 struct soc_camera_host
*ici
= to_soc_camera_host(icd
->parent
);
852 struct mx3_camera_dev
*mx3_cam
= ici
->priv
;
853 struct v4l2_subdev
*sd
= soc_camera_to_subdev(icd
);
854 const struct soc_camera_format_xlate
*xlate
;
855 struct v4l2_pix_format
*pix
= &f
->fmt
.pix
;
856 struct v4l2_mbus_framefmt mf
;
859 xlate
= soc_camera_xlate_by_fourcc(icd
, pix
->pixelformat
);
861 dev_warn(icd
->parent
, "Format %x not found\n",
866 stride_align(&pix
->width
);
867 dev_dbg(icd
->parent
, "Set format %dx%d\n", pix
->width
, pix
->height
);
870 * Might have to perform a complete interface initialisation like in
871 * ipu_csi_init_interface() in mxc_v4l2_s_param(). Also consider
875 configure_geometry(mx3_cam
, pix
->width
, pix
->height
, xlate
->host_fmt
);
877 mf
.width
= pix
->width
;
878 mf
.height
= pix
->height
;
879 mf
.field
= pix
->field
;
880 mf
.colorspace
= pix
->colorspace
;
881 mf
.code
= xlate
->code
;
883 ret
= v4l2_subdev_call(sd
, video
, s_mbus_fmt
, &mf
);
887 if (mf
.code
!= xlate
->code
)
890 if (!mx3_cam
->idmac_channel
[0]) {
891 ret
= acquire_dma_channel(mx3_cam
);
896 pix
->width
= mf
.width
;
897 pix
->height
= mf
.height
;
898 pix
->field
= mf
.field
;
899 mx3_cam
->field
= mf
.field
;
900 pix
->colorspace
= mf
.colorspace
;
901 icd
->current_fmt
= xlate
;
903 dev_dbg(icd
->parent
, "Sensor set %dx%d\n", pix
->width
, pix
->height
);
908 static int mx3_camera_try_fmt(struct soc_camera_device
*icd
,
909 struct v4l2_format
*f
)
911 struct v4l2_subdev
*sd
= soc_camera_to_subdev(icd
);
912 const struct soc_camera_format_xlate
*xlate
;
913 struct v4l2_pix_format
*pix
= &f
->fmt
.pix
;
914 struct v4l2_mbus_framefmt mf
;
915 __u32 pixfmt
= pix
->pixelformat
;
918 xlate
= soc_camera_xlate_by_fourcc(icd
, pixfmt
);
919 if (pixfmt
&& !xlate
) {
920 dev_warn(icd
->parent
, "Format %x not found\n", pixfmt
);
924 /* limit to MX3 hardware capabilities */
925 if (pix
->height
> 4096)
927 if (pix
->width
> 4096)
930 /* limit to sensor capabilities */
931 mf
.width
= pix
->width
;
932 mf
.height
= pix
->height
;
933 mf
.field
= pix
->field
;
934 mf
.colorspace
= pix
->colorspace
;
935 mf
.code
= xlate
->code
;
937 ret
= v4l2_subdev_call(sd
, video
, try_mbus_fmt
, &mf
);
941 pix
->width
= mf
.width
;
942 pix
->height
= mf
.height
;
943 pix
->colorspace
= mf
.colorspace
;
947 pix
->field
= V4L2_FIELD_NONE
;
949 case V4L2_FIELD_NONE
:
952 dev_err(icd
->parent
, "Field type %d unsupported.\n",
960 static int mx3_camera_reqbufs(struct soc_camera_device
*icd
,
961 struct v4l2_requestbuffers
*p
)
966 static unsigned int mx3_camera_poll(struct file
*file
, poll_table
*pt
)
968 struct soc_camera_device
*icd
= file
->private_data
;
970 return vb2_poll(&icd
->vb2_vidq
, file
, pt
);
973 static int mx3_camera_querycap(struct soc_camera_host
*ici
,
974 struct v4l2_capability
*cap
)
976 /* cap->name is set by the firendly caller:-> */
977 strlcpy(cap
->card
, "i.MX3x Camera", sizeof(cap
->card
));
978 cap
->capabilities
= V4L2_CAP_VIDEO_CAPTURE
| V4L2_CAP_STREAMING
;
983 static int mx3_camera_set_bus_param(struct soc_camera_device
*icd
)
985 struct v4l2_subdev
*sd
= soc_camera_to_subdev(icd
);
986 struct soc_camera_host
*ici
= to_soc_camera_host(icd
->parent
);
987 struct mx3_camera_dev
*mx3_cam
= ici
->priv
;
988 struct v4l2_mbus_config cfg
= {.type
= V4L2_MBUS_PARALLEL
,};
989 u32 pixfmt
= icd
->current_fmt
->host_fmt
->fourcc
;
990 unsigned long bus_flags
, common_flags
;
992 const struct soc_mbus_pixelfmt
*fmt
;
995 const struct soc_camera_format_xlate
*xlate
;
996 struct device
*dev
= icd
->parent
;
998 fmt
= soc_mbus_get_fmtdesc(icd
->current_fmt
->code
);
1002 xlate
= soc_camera_xlate_by_fourcc(icd
, pixfmt
);
1004 dev_warn(dev
, "Format %x not found\n", pixfmt
);
1008 buswidth
= fmt
->bits_per_sample
;
1009 ret
= test_platform_param(mx3_cam
, buswidth
, &bus_flags
);
1011 dev_dbg(dev
, "requested bus width %d bit: %d\n", buswidth
, ret
);
1016 ret
= v4l2_subdev_call(sd
, video
, g_mbus_config
, &cfg
);
1018 common_flags
= soc_mbus_config_compatible(&cfg
,
1020 if (!common_flags
) {
1021 dev_warn(icd
->parent
,
1022 "Flags incompatible: camera 0x%x, host 0x%lx\n",
1023 cfg
.flags
, bus_flags
);
1026 } else if (ret
!= -ENOIOCTLCMD
) {
1029 common_flags
= bus_flags
;
1032 dev_dbg(dev
, "Flags cam: 0x%x host: 0x%lx common: 0x%lx\n",
1033 cfg
.flags
, bus_flags
, common_flags
);
1035 /* Make choices, based on platform preferences */
1036 if ((common_flags
& V4L2_MBUS_HSYNC_ACTIVE_HIGH
) &&
1037 (common_flags
& V4L2_MBUS_HSYNC_ACTIVE_LOW
)) {
1038 if (mx3_cam
->platform_flags
& MX3_CAMERA_HSP
)
1039 common_flags
&= ~V4L2_MBUS_HSYNC_ACTIVE_HIGH
;
1041 common_flags
&= ~V4L2_MBUS_HSYNC_ACTIVE_LOW
;
1044 if ((common_flags
& V4L2_MBUS_VSYNC_ACTIVE_HIGH
) &&
1045 (common_flags
& V4L2_MBUS_VSYNC_ACTIVE_LOW
)) {
1046 if (mx3_cam
->platform_flags
& MX3_CAMERA_VSP
)
1047 common_flags
&= ~V4L2_MBUS_VSYNC_ACTIVE_HIGH
;
1049 common_flags
&= ~V4L2_MBUS_VSYNC_ACTIVE_LOW
;
1052 if ((common_flags
& V4L2_MBUS_DATA_ACTIVE_HIGH
) &&
1053 (common_flags
& V4L2_MBUS_DATA_ACTIVE_LOW
)) {
1054 if (mx3_cam
->platform_flags
& MX3_CAMERA_DP
)
1055 common_flags
&= ~V4L2_MBUS_DATA_ACTIVE_HIGH
;
1057 common_flags
&= ~V4L2_MBUS_DATA_ACTIVE_LOW
;
1060 if ((common_flags
& V4L2_MBUS_PCLK_SAMPLE_RISING
) &&
1061 (common_flags
& V4L2_MBUS_PCLK_SAMPLE_FALLING
)) {
1062 if (mx3_cam
->platform_flags
& MX3_CAMERA_PCP
)
1063 common_flags
&= ~V4L2_MBUS_PCLK_SAMPLE_RISING
;
1065 common_flags
&= ~V4L2_MBUS_PCLK_SAMPLE_FALLING
;
1068 cfg
.flags
= common_flags
;
1069 ret
= v4l2_subdev_call(sd
, video
, s_mbus_config
, &cfg
);
1070 if (ret
< 0 && ret
!= -ENOIOCTLCMD
) {
1071 dev_dbg(dev
, "camera s_mbus_config(0x%lx) returned %d\n",
1077 * So far only gated clock mode is supported. Add a line
1078 * (3 << CSI_SENS_CONF_SENS_PRTCL_SHIFT) |
1079 * below and select the required mode when supporting other
1080 * synchronisation protocols.
1082 sens_conf
= csi_reg_read(mx3_cam
, CSI_SENS_CONF
) &
1083 ~((1 << CSI_SENS_CONF_VSYNC_POL_SHIFT
) |
1084 (1 << CSI_SENS_CONF_HSYNC_POL_SHIFT
) |
1085 (1 << CSI_SENS_CONF_DATA_POL_SHIFT
) |
1086 (1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT
) |
1087 (3 << CSI_SENS_CONF_DATA_FMT_SHIFT
) |
1088 (3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT
));
1090 /* TODO: Support RGB and YUV formats */
1092 /* This has been set in mx3_camera_activate(), but we clear it above */
1093 sens_conf
|= CSI_SENS_CONF_DATA_FMT_BAYER
;
1095 if (common_flags
& V4L2_MBUS_PCLK_SAMPLE_FALLING
)
1096 sens_conf
|= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT
;
1097 if (common_flags
& V4L2_MBUS_HSYNC_ACTIVE_LOW
)
1098 sens_conf
|= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT
;
1099 if (common_flags
& V4L2_MBUS_VSYNC_ACTIVE_LOW
)
1100 sens_conf
|= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT
;
1101 if (common_flags
& V4L2_MBUS_DATA_ACTIVE_LOW
)
1102 sens_conf
|= 1 << CSI_SENS_CONF_DATA_POL_SHIFT
;
1104 /* Just do what we're asked to do */
1105 switch (xlate
->host_fmt
->bits_per_sample
) {
1107 dw
= 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT
;
1110 dw
= 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT
;
1113 dw
= 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT
;
1117 * Actually it can only be 15 now, default is just to silence
1121 dw
= 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT
;
1124 csi_reg_write(mx3_cam
, sens_conf
| dw
, CSI_SENS_CONF
);
1126 dev_dbg(dev
, "Set SENS_CONF to %x\n", sens_conf
| dw
);
1131 static struct soc_camera_host_ops mx3_soc_camera_host_ops
= {
1132 .owner
= THIS_MODULE
,
1133 .add
= mx3_camera_add_device
,
1134 .remove
= mx3_camera_remove_device
,
1135 .set_crop
= mx3_camera_set_crop
,
1136 .set_fmt
= mx3_camera_set_fmt
,
1137 .try_fmt
= mx3_camera_try_fmt
,
1138 .get_formats
= mx3_camera_get_formats
,
1139 .init_videobuf2
= mx3_camera_init_videobuf
,
1140 .reqbufs
= mx3_camera_reqbufs
,
1141 .poll
= mx3_camera_poll
,
1142 .querycap
= mx3_camera_querycap
,
1143 .set_bus_param
= mx3_camera_set_bus_param
,
1146 static int __devinit
mx3_camera_probe(struct platform_device
*pdev
)
1148 struct mx3_camera_dev
*mx3_cam
;
1149 struct resource
*res
;
1152 struct soc_camera_host
*soc_host
;
1154 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1160 mx3_cam
= vzalloc(sizeof(*mx3_cam
));
1162 dev_err(&pdev
->dev
, "Could not allocate mx3 camera object\n");
1167 mx3_cam
->clk
= clk_get(&pdev
->dev
, NULL
);
1168 if (IS_ERR(mx3_cam
->clk
)) {
1169 err
= PTR_ERR(mx3_cam
->clk
);
1173 mx3_cam
->pdata
= pdev
->dev
.platform_data
;
1174 mx3_cam
->platform_flags
= mx3_cam
->pdata
->flags
;
1175 if (!(mx3_cam
->platform_flags
& MX3_CAMERA_DATAWIDTH_MASK
)) {
1177 * Platform hasn't set available data widths. This is bad.
1178 * Warn and use a default.
1180 dev_warn(&pdev
->dev
, "WARNING! Platform hasn't set available "
1181 "data widths, using default 8 bit\n");
1182 mx3_cam
->platform_flags
|= MX3_CAMERA_DATAWIDTH_8
;
1184 if (mx3_cam
->platform_flags
& MX3_CAMERA_DATAWIDTH_4
)
1185 mx3_cam
->width_flags
= 1 << 3;
1186 if (mx3_cam
->platform_flags
& MX3_CAMERA_DATAWIDTH_8
)
1187 mx3_cam
->width_flags
|= 1 << 7;
1188 if (mx3_cam
->platform_flags
& MX3_CAMERA_DATAWIDTH_10
)
1189 mx3_cam
->width_flags
|= 1 << 9;
1190 if (mx3_cam
->platform_flags
& MX3_CAMERA_DATAWIDTH_15
)
1191 mx3_cam
->width_flags
|= 1 << 14;
1193 mx3_cam
->mclk
= mx3_cam
->pdata
->mclk_10khz
* 10000;
1194 if (!mx3_cam
->mclk
) {
1195 dev_warn(&pdev
->dev
,
1196 "mclk_10khz == 0! Please, fix your platform data. "
1197 "Using default 20MHz\n");
1198 mx3_cam
->mclk
= 20000000;
1201 /* list of video-buffers */
1202 INIT_LIST_HEAD(&mx3_cam
->capture
);
1203 spin_lock_init(&mx3_cam
->lock
);
1205 base
= ioremap(res
->start
, resource_size(res
));
1207 pr_err("Couldn't map %x@%x\n", resource_size(res
), res
->start
);
1212 mx3_cam
->base
= base
;
1214 soc_host
= &mx3_cam
->soc_host
;
1215 soc_host
->drv_name
= MX3_CAM_DRV_NAME
;
1216 soc_host
->ops
= &mx3_soc_camera_host_ops
;
1217 soc_host
->priv
= mx3_cam
;
1218 soc_host
->v4l2_dev
.dev
= &pdev
->dev
;
1219 soc_host
->nr
= pdev
->id
;
1221 mx3_cam
->alloc_ctx
= vb2_dma_contig_init_ctx(&pdev
->dev
);
1222 if (IS_ERR(mx3_cam
->alloc_ctx
)) {
1223 err
= PTR_ERR(mx3_cam
->alloc_ctx
);
1227 err
= soc_camera_host_register(soc_host
);
1231 /* IDMAC interface */
1237 vb2_dma_contig_cleanup_ctx(mx3_cam
->alloc_ctx
);
1241 clk_put(mx3_cam
->clk
);
1249 static int __devexit
mx3_camera_remove(struct platform_device
*pdev
)
1251 struct soc_camera_host
*soc_host
= to_soc_camera_host(&pdev
->dev
);
1252 struct mx3_camera_dev
*mx3_cam
= container_of(soc_host
,
1253 struct mx3_camera_dev
, soc_host
);
1255 clk_put(mx3_cam
->clk
);
1257 soc_camera_host_unregister(soc_host
);
1259 iounmap(mx3_cam
->base
);
1262 * The channel has either not been allocated,
1263 * or should have been released
1265 if (WARN_ON(mx3_cam
->idmac_channel
[0]))
1266 dma_release_channel(&mx3_cam
->idmac_channel
[0]->dma_chan
);
1268 vb2_dma_contig_cleanup_ctx(mx3_cam
->alloc_ctx
);
1277 static struct platform_driver mx3_camera_driver
= {
1279 .name
= MX3_CAM_DRV_NAME
,
1281 .probe
= mx3_camera_probe
,
1282 .remove
= __devexit_p(mx3_camera_remove
),
1285 module_platform_driver(mx3_camera_driver
);
1287 MODULE_DESCRIPTION("i.MX3x SoC Camera Host driver");
1288 MODULE_AUTHOR("Guennadi Liakhovetski <lg@denx.de>");
1289 MODULE_LICENSE("GPL v2");
1290 MODULE_VERSION("0.2.3");
1291 MODULE_ALIAS("platform:" MX3_CAM_DRV_NAME
);