drivers/media/platform/vsp1/vsp1_bru.c

   1 /*
   2  * vsp1_bru.c  --  R-Car VSP1 Blend ROP Unit
   3  *
   4  * Copyright (C) 2013 Renesas Corporation
   5  *
   6  * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  */
  13
  14 #include <linux/device.h>
  15 #include <linux/gfp.h>
  16
  17 #include <media/v4l2-subdev.h>
  18
  19 #include "vsp1.h"
  20 #include "vsp1_bru.h"
  21 #include "vsp1_rwpf.h"
  22 #include "vsp1_video.h"
  23
  24 #define BRU_MIN_SIZE                            1U
  25 #define BRU_MAX_SIZE                            8190U
  26
  27 /* -----------------------------------------------------------------------------
  28  * Device Access
  29  */
  30
  31 static inline void vsp1_bru_write(struct vsp1_bru *bru, u32 reg, u32 data)
  32 {
  33         vsp1_mod_write(&bru->entity, reg, data);
  34 }
  35
  36 /* -----------------------------------------------------------------------------
  37  * Controls
  38  */
  39
  40 static int bru_s_ctrl(struct v4l2_ctrl *ctrl)
  41 {
  42         struct vsp1_bru *bru =
  43                 container_of(ctrl->handler, struct vsp1_bru, ctrls);
  44
  45         if (!vsp1_entity_is_streaming(&bru->entity))
  46                 return 0;
  47
  48         switch (ctrl->id) {
  49         case V4L2_CID_BG_COLOR:
  50                 vsp1_bru_write(bru, VI6_BRU_VIRRPF_COL, ctrl->val |
  51                                (0xff << VI6_BRU_VIRRPF_COL_A_SHIFT));
  52                 break;
  53         }
  54
  55         return 0;
  56 }
  57
  58 static const struct v4l2_ctrl_ops bru_ctrl_ops = {
  59         .s_ctrl = bru_s_ctrl,
  60 };
  61
  62 /* -----------------------------------------------------------------------------
  63  * V4L2 Subdevice Core Operations
  64  */
  65
  66 static int bru_s_stream(struct v4l2_subdev *subdev, int enable)
  67 {
  68         struct vsp1_pipeline *pipe = to_vsp1_pipeline(&subdev->entity);
  69         struct vsp1_bru *bru = to_bru(subdev);
  70         struct v4l2_mbus_framefmt *format;
  71         unsigned int flags;
  72         unsigned int i;
  73         int ret;
  74
  75         ret = vsp1_entity_set_streaming(&bru->entity, enable);
  76         if (ret < 0)
  77                 return ret;
  78
  79         if (!enable)
  80                 return 0;
  81
  82         format = &bru->entity.formats[bru->entity.source_pad];
  83
  84         /* The hardware is extremely flexible but we have no userspace API to
  85          * expose all the parameters, nor is it clear whether we would have use
  86          * cases for all the supported modes. Let's just harcode the parameters
  87          * to sane default values for now.
  88          */
  89
  90         /* Disable dithering and enable color data normalization unless the
  91          * format at the pipeline output is premultiplied.
  92          */
  93         flags = pipe->output ? pipe->output->format.flags : 0;
  94         vsp1_bru_write(bru, VI6_BRU_INCTRL,
  95                        flags & V4L2_PIX_FMT_FLAG_PREMUL_ALPHA ?
  96                        0 : VI6_BRU_INCTRL_NRM);
  97
  98         /* Set the background position to cover the whole output image. */
  99         vsp1_bru_write(bru, VI6_BRU_VIRRPF_SIZE,
 100                        (format->width << VI6_BRU_VIRRPF_SIZE_HSIZE_SHIFT) |
 101                        (format->height << VI6_BRU_VIRRPF_SIZE_VSIZE_SHIFT));
 102         vsp1_bru_write(bru, VI6_BRU_VIRRPF_LOC, 0);
 103
 104         /* Route BRU input 1 as SRC input to the ROP unit and configure the ROP
 105          * unit with a NOP operation to make BRU input 1 available as the
 106          * Blend/ROP unit B SRC input.
 107          */
 108         vsp1_bru_write(bru, VI6_BRU_ROP, VI6_BRU_ROP_DSTSEL_BRUIN(1) |
 109                        VI6_BRU_ROP_CROP(VI6_ROP_NOP) |
 110                        VI6_BRU_ROP_AROP(VI6_ROP_NOP));
 111
 112         for (i = 0; i < bru->entity.source_pad; ++i) {
 113                 bool premultiplied = false;
 114                 u32 ctrl = 0;
 115
 116                 /* Configure all Blend/ROP units corresponding to an enabled BRU
 117                  * input for alpha blending. Blend/ROP units corresponding to
 118                  * disabled BRU inputs are used in ROP NOP mode to ignore the
 119                  * SRC input.
 120                  */
 121                 if (bru->inputs[i].rpf) {
 122                         ctrl |= VI6_BRU_CTRL_RBC;
 123
 124                         premultiplied = bru->inputs[i].rpf->format.flags
 125                                       & V4L2_PIX_FMT_FLAG_PREMUL_ALPHA;
 126                 } else {
 127                         ctrl |= VI6_BRU_CTRL_CROP(VI6_ROP_NOP)
 128                              |  VI6_BRU_CTRL_AROP(VI6_ROP_NOP);
 129                 }
 130
 131                 /* Select the virtual RPF as the Blend/ROP unit A DST input to
 132                  * serve as a background color.
 133                  */
 134                 if (i == 0)
 135                         ctrl |= VI6_BRU_CTRL_DSTSEL_VRPF;
 136
 137                 /* Route BRU inputs 0 to 3 as SRC inputs to Blend/ROP units A to
 138                  * D in that order. The Blend/ROP unit B SRC is hardwired to the
 139                  * ROP unit output, the corresponding register bits must be set
 140                  * to 0.
 141                  */
 142                 if (i != 1)
 143                         ctrl |= VI6_BRU_CTRL_SRCSEL_BRUIN(i);
 144
 145                 vsp1_bru_write(bru, VI6_BRU_CTRL(i), ctrl);
 146
 147                 /* Harcode the blending formula to
 148                  *
 149                  *      DSTc = DSTc * (1 - SRCa) + SRCc * SRCa
 150                  *      DSTa = DSTa * (1 - SRCa) + SRCa
 151                  *
 152                  * when the SRC input isn't premultiplied, and to
 153                  *
 154                  *      DSTc = DSTc * (1 - SRCa) + SRCc
 155                  *      DSTa = DSTa * (1 - SRCa) + SRCa
 156                  *
 157                  * otherwise.
 158                  */
 159                 vsp1_bru_write(bru, VI6_BRU_BLD(i),
 160                                VI6_BRU_BLD_CCMDX_255_SRC_A |
 161                                (premultiplied ? VI6_BRU_BLD_CCMDY_COEFY :
 162                                                 VI6_BRU_BLD_CCMDY_SRC_A) |
 163                                VI6_BRU_BLD_ACMDX_255_SRC_A |
 164                                VI6_BRU_BLD_ACMDY_COEFY |
 165                                (0xff << VI6_BRU_BLD_COEFY_SHIFT));
 166         }
 167
 168         return 0;
 169 }
 170
 171 /* -----------------------------------------------------------------------------
 172  * V4L2 Subdevice Pad Operations
 173  */
 174
 175 /*
 176  * The BRU can't perform format conversion, all sink and source formats must be
 177  * identical. We pick the format on the first sink pad (pad 0) and propagate it
 178  * to all other pads.
 179  */
 180
 181 static int bru_enum_mbus_code(struct v4l2_subdev *subdev,
 182                               struct v4l2_subdev_pad_config *cfg,
 183                               struct v4l2_subdev_mbus_code_enum *code)
 184 {
 185         static const unsigned int codes[] = {
 186                 MEDIA_BUS_FMT_ARGB8888_1X32,
 187                 MEDIA_BUS_FMT_AYUV8_1X32,
 188         };
 189         struct vsp1_bru *bru = to_bru(subdev);
 190         struct v4l2_mbus_framefmt *format;
 191
 192         if (code->pad == BRU_PAD_SINK(0)) {
 193                 if (code->index >= ARRAY_SIZE(codes))
 194                         return -EINVAL;
 195
 196                 code->code = codes[code->index];
 197         } else {
 198                 if (code->index)
 199                         return -EINVAL;
 200
 201                 format = vsp1_entity_get_pad_format(&bru->entity, cfg,
 202                                                     BRU_PAD_SINK(0), code->which);
 203                 code->code = format->code;
 204         }
 205
 206         return 0;
 207 }
 208
 209 static int bru_enum_frame_size(struct v4l2_subdev *subdev,
 210                                struct v4l2_subdev_pad_config *cfg,
 211                                struct v4l2_subdev_frame_size_enum *fse)
 212 {
 213         if (fse->index)
 214                 return -EINVAL;
 215
 216         if (fse->code != MEDIA_BUS_FMT_ARGB8888_1X32 &&
 217             fse->code != MEDIA_BUS_FMT_AYUV8_1X32)
 218                 return -EINVAL;
 219
 220         fse->min_width = BRU_MIN_SIZE;
 221         fse->max_width = BRU_MAX_SIZE;
 222         fse->min_height = BRU_MIN_SIZE;
 223         fse->max_height = BRU_MAX_SIZE;
 224
 225         return 0;
 226 }
 227
 228 static struct v4l2_rect *bru_get_compose(struct vsp1_bru *bru,
 229                                          struct v4l2_subdev_pad_config *cfg,
 230                                          unsigned int pad, u32 which)
 231 {
 232         switch (which) {
 233         case V4L2_SUBDEV_FORMAT_TRY:
 234                 return v4l2_subdev_get_try_crop(&bru->entity.subdev, cfg, pad);
 235         case V4L2_SUBDEV_FORMAT_ACTIVE:
 236                 return &bru->inputs[pad].compose;
 237         default:
 238                 return NULL;
 239         }
 240 }
 241
 242 static int bru_get_format(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg,
 243                           struct v4l2_subdev_format *fmt)
 244 {
 245         struct vsp1_bru *bru = to_bru(subdev);
 246
 247         fmt->format = *vsp1_entity_get_pad_format(&bru->entity, cfg, fmt->pad,
 248                                                   fmt->which);
 249
 250         return 0;
 251 }
 252
 253 static void bru_try_format(struct vsp1_bru *bru, struct v4l2_subdev_pad_config *cfg,
 254                            unsigned int pad, struct v4l2_mbus_framefmt *fmt,
 255                            enum v4l2_subdev_format_whence which)
 256 {
 257         struct v4l2_mbus_framefmt *format;
 258
 259         switch (pad) {
 260         case BRU_PAD_SINK(0):
 261                 /* Default to YUV if the requested format is not supported. */
 262                 if (fmt->code != MEDIA_BUS_FMT_ARGB8888_1X32 &&
 263                     fmt->code != MEDIA_BUS_FMT_AYUV8_1X32)
 264                         fmt->code = MEDIA_BUS_FMT_AYUV8_1X32;
 265                 break;
 266
 267         default:
 268                 /* The BRU can't perform format conversion. */
 269                 format = vsp1_entity_get_pad_format(&bru->entity, cfg,
 270                                                     BRU_PAD_SINK(0), which);
 271                 fmt->code = format->code;
 272                 break;
 273         }
 274
 275         fmt->width = clamp(fmt->width, BRU_MIN_SIZE, BRU_MAX_SIZE);
 276         fmt->height = clamp(fmt->height, BRU_MIN_SIZE, BRU_MAX_SIZE);
 277         fmt->field = V4L2_FIELD_NONE;
 278         fmt->colorspace = V4L2_COLORSPACE_SRGB;
 279 }
 280
 281 static int bru_set_format(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg,
 282                           struct v4l2_subdev_format *fmt)
 283 {
 284         struct vsp1_bru *bru = to_bru(subdev);
 285         struct v4l2_mbus_framefmt *format;
 286
 287         bru_try_format(bru, cfg, fmt->pad, &fmt->format, fmt->which);
 288
 289         format = vsp1_entity_get_pad_format(&bru->entity, cfg, fmt->pad,
 290                                             fmt->which);
 291         *format = fmt->format;
 292
 293         /* Reset the compose rectangle */
 294         if (fmt->pad != bru->entity.source_pad) {
 295                 struct v4l2_rect *compose;
 296
 297                 compose = bru_get_compose(bru, cfg, fmt->pad, fmt->which);
 298                 compose->left = 0;
 299                 compose->top = 0;
 300                 compose->width = format->width;
 301                 compose->height = format->height;
 302         }
 303
 304         /* Propagate the format code to all pads */
 305         if (fmt->pad == BRU_PAD_SINK(0)) {
 306                 unsigned int i;
 307
 308                 for (i = 0; i <= bru->entity.source_pad; ++i) {
 309                         format = vsp1_entity_get_pad_format(&bru->entity, cfg,
 310                                                             i, fmt->which);
 311                         format->code = fmt->format.code;
 312                 }
 313         }
 314
 315         return 0;
 316 }
 317
 318 static int bru_get_selection(struct v4l2_subdev *subdev,
 319                              struct v4l2_subdev_pad_config *cfg,
 320                              struct v4l2_subdev_selection *sel)
 321 {
 322         struct vsp1_bru *bru = to_bru(subdev);
 323
 324         if (sel->pad == bru->entity.source_pad)
 325                 return -EINVAL;
 326
 327         switch (sel->target) {
 328         case V4L2_SEL_TGT_COMPOSE_BOUNDS:
 329                 sel->r.left = 0;
 330                 sel->r.top = 0;
 331                 sel->r.width = BRU_MAX_SIZE;
 332                 sel->r.height = BRU_MAX_SIZE;
 333                 return 0;
 334
 335         case V4L2_SEL_TGT_COMPOSE:
 336                 sel->r = *bru_get_compose(bru, cfg, sel->pad, sel->which);
 337                 return 0;
 338
 339         default:
 340                 return -EINVAL;
 341         }
 342 }
 343
 344 static int bru_set_selection(struct v4l2_subdev *subdev,
 345                              struct v4l2_subdev_pad_config *cfg,
 346                              struct v4l2_subdev_selection *sel)
 347 {
 348         struct vsp1_bru *bru = to_bru(subdev);
 349         struct v4l2_mbus_framefmt *format;
 350         struct v4l2_rect *compose;
 351
 352         if (sel->pad == bru->entity.source_pad)
 353                 return -EINVAL;
 354
 355         if (sel->target != V4L2_SEL_TGT_COMPOSE)
 356                 return -EINVAL;
 357
 358         /* The compose rectangle top left corner must be inside the output
 359          * frame.
 360          */
 361         format = vsp1_entity_get_pad_format(&bru->entity, cfg,
 362                                             bru->entity.source_pad, sel->which);
 363         sel->r.left = clamp_t(unsigned int, sel->r.left, 0, format->width - 1);
 364         sel->r.top = clamp_t(unsigned int, sel->r.top, 0, format->height - 1);
 365
 366         /* Scaling isn't supported, the compose rectangle size must be identical
 367          * to the sink format size.
 368          */
 369         format = vsp1_entity_get_pad_format(&bru->entity, cfg, sel->pad,
 370                                             sel->which);
 371         sel->r.width = format->width;
 372         sel->r.height = format->height;
 373
 374         compose = bru_get_compose(bru, cfg, sel->pad, sel->which);
 375         *compose = sel->r;
 376
 377         return 0;
 378 }
 379
 380 /* -----------------------------------------------------------------------------
 381  * V4L2 Subdevice Operations
 382  */
 383
 384 static struct v4l2_subdev_video_ops bru_video_ops = {
 385         .s_stream = bru_s_stream,
 386 };
 387
 388 static struct v4l2_subdev_pad_ops bru_pad_ops = {
 389         .enum_mbus_code = bru_enum_mbus_code,
 390         .enum_frame_size = bru_enum_frame_size,
 391         .get_fmt = bru_get_format,
 392         .set_fmt = bru_set_format,
 393         .get_selection = bru_get_selection,
 394         .set_selection = bru_set_selection,
 395 };
 396
 397 static struct v4l2_subdev_ops bru_ops = {
 398         .video  = &bru_video_ops,
 399         .pad    = &bru_pad_ops,
 400 };
 401
 402 /* -----------------------------------------------------------------------------
 403  * Initialization and Cleanup
 404  */
 405
 406 struct vsp1_bru *vsp1_bru_create(struct vsp1_device *vsp1)
 407 {
 408         struct v4l2_subdev *subdev;
 409         struct vsp1_bru *bru;
 410         int ret;
 411
 412         bru = devm_kzalloc(vsp1->dev, sizeof(*bru), GFP_KERNEL);
 413         if (bru == NULL)
 414                 return ERR_PTR(-ENOMEM);
 415
 416         bru->entity.type = VSP1_ENTITY_BRU;
 417
 418         ret = vsp1_entity_init(vsp1, &bru->entity,
 419                                vsp1->info->num_bru_inputs + 1);
 420         if (ret < 0)
 421                 return ERR_PTR(ret);
 422
 423         /* Initialize the V4L2 subdev. */
 424         subdev = &bru->entity.subdev;
 425         v4l2_subdev_init(subdev, &bru_ops);
 426
 427         subdev->entity.ops = &vsp1->media_ops;
 428         subdev->internal_ops = &vsp1_subdev_internal_ops;
 429         snprintf(subdev->name, sizeof(subdev->name), "%s bru",
 430                  dev_name(vsp1->dev));
 431         v4l2_set_subdevdata(subdev, bru);
 432         subdev->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
 433
 434         vsp1_entity_init_formats(subdev, NULL);
 435
 436         /* Initialize the control handler. */
 437         v4l2_ctrl_handler_init(&bru->ctrls, 1);
 438         v4l2_ctrl_new_std(&bru->ctrls, &bru_ctrl_ops, V4L2_CID_BG_COLOR,
 439                           0, 0xffffff, 1, 0);
 440
 441         bru->entity.subdev.ctrl_handler = &bru->ctrls;
 442
 443         if (bru->ctrls.error) {
 444                 dev_err(vsp1->dev, "bru: failed to initialize controls\n");
 445                 ret = bru->ctrls.error;
 446                 vsp1_entity_destroy(&bru->entity);
 447                 return ERR_PTR(ret);
 448         }
 449
 450         return bru;
 451 }