2 * vsp1_bru.c -- R-Car VSP1 Blend ROP Unit
4 * Copyright (C) 2013 Renesas Corporation
6 * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
14 #include <linux/device.h>
15 #include <linux/gfp.h>
17 #include <media/v4l2-subdev.h>
21 #include "vsp1_rwpf.h"
22 #include "vsp1_video.h"
24 #define BRU_MIN_SIZE 1U
25 #define BRU_MAX_SIZE 8190U
27 /* -----------------------------------------------------------------------------
31 static inline void vsp1_bru_write(struct vsp1_bru
*bru
, u32 reg
, u32 data
)
33 vsp1_mod_write(&bru
->entity
, reg
, data
);
36 /* -----------------------------------------------------------------------------
40 static int bru_s_ctrl(struct v4l2_ctrl
*ctrl
)
42 struct vsp1_bru
*bru
=
43 container_of(ctrl
->handler
, struct vsp1_bru
, ctrls
);
45 if (!vsp1_entity_is_streaming(&bru
->entity
))
49 case V4L2_CID_BG_COLOR
:
50 vsp1_bru_write(bru
, VI6_BRU_VIRRPF_COL
, ctrl
->val
|
51 (0xff << VI6_BRU_VIRRPF_COL_A_SHIFT
));
58 static const struct v4l2_ctrl_ops bru_ctrl_ops
= {
62 /* -----------------------------------------------------------------------------
63 * V4L2 Subdevice Core Operations
66 static int bru_s_stream(struct v4l2_subdev
*subdev
, int enable
)
68 struct vsp1_pipeline
*pipe
= to_vsp1_pipeline(&subdev
->entity
);
69 struct vsp1_bru
*bru
= to_bru(subdev
);
70 struct v4l2_mbus_framefmt
*format
;
75 ret
= vsp1_entity_set_streaming(&bru
->entity
, enable
);
82 format
= &bru
->entity
.formats
[bru
->entity
.source_pad
];
84 /* The hardware is extremely flexible but we have no userspace API to
85 * expose all the parameters, nor is it clear whether we would have use
86 * cases for all the supported modes. Let's just harcode the parameters
87 * to sane default values for now.
90 /* Disable dithering and enable color data normalization unless the
91 * format at the pipeline output is premultiplied.
93 flags
= pipe
->output
? pipe
->output
->format
.flags
: 0;
94 vsp1_bru_write(bru
, VI6_BRU_INCTRL
,
95 flags
& V4L2_PIX_FMT_FLAG_PREMUL_ALPHA
?
96 0 : VI6_BRU_INCTRL_NRM
);
98 /* Set the background position to cover the whole output image. */
99 vsp1_bru_write(bru
, VI6_BRU_VIRRPF_SIZE
,
100 (format
->width
<< VI6_BRU_VIRRPF_SIZE_HSIZE_SHIFT
) |
101 (format
->height
<< VI6_BRU_VIRRPF_SIZE_VSIZE_SHIFT
));
102 vsp1_bru_write(bru
, VI6_BRU_VIRRPF_LOC
, 0);
104 /* Route BRU input 1 as SRC input to the ROP unit and configure the ROP
105 * unit with a NOP operation to make BRU input 1 available as the
106 * Blend/ROP unit B SRC input.
108 vsp1_bru_write(bru
, VI6_BRU_ROP
, VI6_BRU_ROP_DSTSEL_BRUIN(1) |
109 VI6_BRU_ROP_CROP(VI6_ROP_NOP
) |
110 VI6_BRU_ROP_AROP(VI6_ROP_NOP
));
112 for (i
= 0; i
< bru
->entity
.source_pad
; ++i
) {
113 bool premultiplied
= false;
116 /* Configure all Blend/ROP units corresponding to an enabled BRU
117 * input for alpha blending. Blend/ROP units corresponding to
118 * disabled BRU inputs are used in ROP NOP mode to ignore the
121 if (bru
->inputs
[i
].rpf
) {
122 ctrl
|= VI6_BRU_CTRL_RBC
;
124 premultiplied
= bru
->inputs
[i
].rpf
->format
.flags
125 & V4L2_PIX_FMT_FLAG_PREMUL_ALPHA
;
127 ctrl
|= VI6_BRU_CTRL_CROP(VI6_ROP_NOP
)
128 | VI6_BRU_CTRL_AROP(VI6_ROP_NOP
);
131 /* Select the virtual RPF as the Blend/ROP unit A DST input to
132 * serve as a background color.
135 ctrl
|= VI6_BRU_CTRL_DSTSEL_VRPF
;
137 /* Route BRU inputs 0 to 3 as SRC inputs to Blend/ROP units A to
138 * D in that order. The Blend/ROP unit B SRC is hardwired to the
139 * ROP unit output, the corresponding register bits must be set
143 ctrl
|= VI6_BRU_CTRL_SRCSEL_BRUIN(i
);
145 vsp1_bru_write(bru
, VI6_BRU_CTRL(i
), ctrl
);
147 /* Harcode the blending formula to
149 * DSTc = DSTc * (1 - SRCa) + SRCc * SRCa
150 * DSTa = DSTa * (1 - SRCa) + SRCa
152 * when the SRC input isn't premultiplied, and to
154 * DSTc = DSTc * (1 - SRCa) + SRCc
155 * DSTa = DSTa * (1 - SRCa) + SRCa
159 vsp1_bru_write(bru
, VI6_BRU_BLD(i
),
160 VI6_BRU_BLD_CCMDX_255_SRC_A
|
161 (premultiplied
? VI6_BRU_BLD_CCMDY_COEFY
:
162 VI6_BRU_BLD_CCMDY_SRC_A
) |
163 VI6_BRU_BLD_ACMDX_255_SRC_A
|
164 VI6_BRU_BLD_ACMDY_COEFY
|
165 (0xff << VI6_BRU_BLD_COEFY_SHIFT
));
171 /* -----------------------------------------------------------------------------
172 * V4L2 Subdevice Pad Operations
176 * The BRU can't perform format conversion, all sink and source formats must be
177 * identical. We pick the format on the first sink pad (pad 0) and propagate it
181 static int bru_enum_mbus_code(struct v4l2_subdev
*subdev
,
182 struct v4l2_subdev_pad_config
*cfg
,
183 struct v4l2_subdev_mbus_code_enum
*code
)
185 static const unsigned int codes
[] = {
186 MEDIA_BUS_FMT_ARGB8888_1X32
,
187 MEDIA_BUS_FMT_AYUV8_1X32
,
189 struct vsp1_bru
*bru
= to_bru(subdev
);
190 struct v4l2_mbus_framefmt
*format
;
192 if (code
->pad
== BRU_PAD_SINK(0)) {
193 if (code
->index
>= ARRAY_SIZE(codes
))
196 code
->code
= codes
[code
->index
];
201 format
= vsp1_entity_get_pad_format(&bru
->entity
, cfg
,
202 BRU_PAD_SINK(0), code
->which
);
203 code
->code
= format
->code
;
209 static int bru_enum_frame_size(struct v4l2_subdev
*subdev
,
210 struct v4l2_subdev_pad_config
*cfg
,
211 struct v4l2_subdev_frame_size_enum
*fse
)
216 if (fse
->code
!= MEDIA_BUS_FMT_ARGB8888_1X32
&&
217 fse
->code
!= MEDIA_BUS_FMT_AYUV8_1X32
)
220 fse
->min_width
= BRU_MIN_SIZE
;
221 fse
->max_width
= BRU_MAX_SIZE
;
222 fse
->min_height
= BRU_MIN_SIZE
;
223 fse
->max_height
= BRU_MAX_SIZE
;
228 static struct v4l2_rect
*bru_get_compose(struct vsp1_bru
*bru
,
229 struct v4l2_subdev_pad_config
*cfg
,
230 unsigned int pad
, u32 which
)
233 case V4L2_SUBDEV_FORMAT_TRY
:
234 return v4l2_subdev_get_try_crop(&bru
->entity
.subdev
, cfg
, pad
);
235 case V4L2_SUBDEV_FORMAT_ACTIVE
:
236 return &bru
->inputs
[pad
].compose
;
242 static int bru_get_format(struct v4l2_subdev
*subdev
, struct v4l2_subdev_pad_config
*cfg
,
243 struct v4l2_subdev_format
*fmt
)
245 struct vsp1_bru
*bru
= to_bru(subdev
);
247 fmt
->format
= *vsp1_entity_get_pad_format(&bru
->entity
, cfg
, fmt
->pad
,
253 static void bru_try_format(struct vsp1_bru
*bru
, struct v4l2_subdev_pad_config
*cfg
,
254 unsigned int pad
, struct v4l2_mbus_framefmt
*fmt
,
255 enum v4l2_subdev_format_whence which
)
257 struct v4l2_mbus_framefmt
*format
;
260 case BRU_PAD_SINK(0):
261 /* Default to YUV if the requested format is not supported. */
262 if (fmt
->code
!= MEDIA_BUS_FMT_ARGB8888_1X32
&&
263 fmt
->code
!= MEDIA_BUS_FMT_AYUV8_1X32
)
264 fmt
->code
= MEDIA_BUS_FMT_AYUV8_1X32
;
268 /* The BRU can't perform format conversion. */
269 format
= vsp1_entity_get_pad_format(&bru
->entity
, cfg
,
270 BRU_PAD_SINK(0), which
);
271 fmt
->code
= format
->code
;
275 fmt
->width
= clamp(fmt
->width
, BRU_MIN_SIZE
, BRU_MAX_SIZE
);
276 fmt
->height
= clamp(fmt
->height
, BRU_MIN_SIZE
, BRU_MAX_SIZE
);
277 fmt
->field
= V4L2_FIELD_NONE
;
278 fmt
->colorspace
= V4L2_COLORSPACE_SRGB
;
281 static int bru_set_format(struct v4l2_subdev
*subdev
, struct v4l2_subdev_pad_config
*cfg
,
282 struct v4l2_subdev_format
*fmt
)
284 struct vsp1_bru
*bru
= to_bru(subdev
);
285 struct v4l2_mbus_framefmt
*format
;
287 bru_try_format(bru
, cfg
, fmt
->pad
, &fmt
->format
, fmt
->which
);
289 format
= vsp1_entity_get_pad_format(&bru
->entity
, cfg
, fmt
->pad
,
291 *format
= fmt
->format
;
293 /* Reset the compose rectangle */
294 if (fmt
->pad
!= bru
->entity
.source_pad
) {
295 struct v4l2_rect
*compose
;
297 compose
= bru_get_compose(bru
, cfg
, fmt
->pad
, fmt
->which
);
300 compose
->width
= format
->width
;
301 compose
->height
= format
->height
;
304 /* Propagate the format code to all pads */
305 if (fmt
->pad
== BRU_PAD_SINK(0)) {
308 for (i
= 0; i
<= bru
->entity
.source_pad
; ++i
) {
309 format
= vsp1_entity_get_pad_format(&bru
->entity
, cfg
,
311 format
->code
= fmt
->format
.code
;
318 static int bru_get_selection(struct v4l2_subdev
*subdev
,
319 struct v4l2_subdev_pad_config
*cfg
,
320 struct v4l2_subdev_selection
*sel
)
322 struct vsp1_bru
*bru
= to_bru(subdev
);
324 if (sel
->pad
== bru
->entity
.source_pad
)
327 switch (sel
->target
) {
328 case V4L2_SEL_TGT_COMPOSE_BOUNDS
:
331 sel
->r
.width
= BRU_MAX_SIZE
;
332 sel
->r
.height
= BRU_MAX_SIZE
;
335 case V4L2_SEL_TGT_COMPOSE
:
336 sel
->r
= *bru_get_compose(bru
, cfg
, sel
->pad
, sel
->which
);
344 static int bru_set_selection(struct v4l2_subdev
*subdev
,
345 struct v4l2_subdev_pad_config
*cfg
,
346 struct v4l2_subdev_selection
*sel
)
348 struct vsp1_bru
*bru
= to_bru(subdev
);
349 struct v4l2_mbus_framefmt
*format
;
350 struct v4l2_rect
*compose
;
352 if (sel
->pad
== bru
->entity
.source_pad
)
355 if (sel
->target
!= V4L2_SEL_TGT_COMPOSE
)
358 /* The compose rectangle top left corner must be inside the output
361 format
= vsp1_entity_get_pad_format(&bru
->entity
, cfg
,
362 bru
->entity
.source_pad
, sel
->which
);
363 sel
->r
.left
= clamp_t(unsigned int, sel
->r
.left
, 0, format
->width
- 1);
364 sel
->r
.top
= clamp_t(unsigned int, sel
->r
.top
, 0, format
->height
- 1);
366 /* Scaling isn't supported, the compose rectangle size must be identical
367 * to the sink format size.
369 format
= vsp1_entity_get_pad_format(&bru
->entity
, cfg
, sel
->pad
,
371 sel
->r
.width
= format
->width
;
372 sel
->r
.height
= format
->height
;
374 compose
= bru_get_compose(bru
, cfg
, sel
->pad
, sel
->which
);
380 /* -----------------------------------------------------------------------------
381 * V4L2 Subdevice Operations
384 static struct v4l2_subdev_video_ops bru_video_ops
= {
385 .s_stream
= bru_s_stream
,
388 static struct v4l2_subdev_pad_ops bru_pad_ops
= {
389 .enum_mbus_code
= bru_enum_mbus_code
,
390 .enum_frame_size
= bru_enum_frame_size
,
391 .get_fmt
= bru_get_format
,
392 .set_fmt
= bru_set_format
,
393 .get_selection
= bru_get_selection
,
394 .set_selection
= bru_set_selection
,
397 static struct v4l2_subdev_ops bru_ops
= {
398 .video
= &bru_video_ops
,
402 /* -----------------------------------------------------------------------------
403 * Initialization and Cleanup
406 struct vsp1_bru
*vsp1_bru_create(struct vsp1_device
*vsp1
)
408 struct v4l2_subdev
*subdev
;
409 struct vsp1_bru
*bru
;
412 bru
= devm_kzalloc(vsp1
->dev
, sizeof(*bru
), GFP_KERNEL
);
414 return ERR_PTR(-ENOMEM
);
416 bru
->entity
.type
= VSP1_ENTITY_BRU
;
418 ret
= vsp1_entity_init(vsp1
, &bru
->entity
,
419 vsp1
->info
->num_bru_inputs
+ 1);
423 /* Initialize the V4L2 subdev. */
424 subdev
= &bru
->entity
.subdev
;
425 v4l2_subdev_init(subdev
, &bru_ops
);
427 subdev
->entity
.ops
= &vsp1
->media_ops
;
428 subdev
->internal_ops
= &vsp1_subdev_internal_ops
;
429 snprintf(subdev
->name
, sizeof(subdev
->name
), "%s bru",
430 dev_name(vsp1
->dev
));
431 v4l2_set_subdevdata(subdev
, bru
);
432 subdev
->flags
|= V4L2_SUBDEV_FL_HAS_DEVNODE
;
434 vsp1_entity_init_formats(subdev
, NULL
);
436 /* Initialize the control handler. */
437 v4l2_ctrl_handler_init(&bru
->ctrls
, 1);
438 v4l2_ctrl_new_std(&bru
->ctrls
, &bru_ctrl_ops
, V4L2_CID_BG_COLOR
,
441 bru
->entity
.subdev
.ctrl_handler
= &bru
->ctrls
;
443 if (bru
->ctrls
.error
) {
444 dev_err(vsp1
->dev
, "bru: failed to initialize controls\n");
445 ret
= bru
->ctrls
.error
;
446 vsp1_entity_destroy(&bru
->entity
);