[media] v4l: vsp1: bru: Don't program background color in control set handler
[deliverable/linux.git] / drivers / media / platform / vsp1 / vsp1_bru.c
1 /*
2 * vsp1_bru.c -- R-Car VSP1 Blend ROP Unit
3 *
4 * Copyright (C) 2013 Renesas Corporation
5 *
6 * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14 #include <linux/device.h>
15 #include <linux/gfp.h>
16
17 #include <media/v4l2-subdev.h>
18
19 #include "vsp1.h"
20 #include "vsp1_bru.h"
21 #include "vsp1_rwpf.h"
22 #include "vsp1_video.h"
23
24 #define BRU_MIN_SIZE 1U
25 #define BRU_MAX_SIZE 8190U
26
27 /* -----------------------------------------------------------------------------
28 * Device Access
29 */
30
31 static inline void vsp1_bru_write(struct vsp1_bru *bru, u32 reg, u32 data)
32 {
33 vsp1_mod_write(&bru->entity, reg, data);
34 }
35
36 /* -----------------------------------------------------------------------------
37 * Controls
38 */
39
40 static int bru_s_ctrl(struct v4l2_ctrl *ctrl)
41 {
42 struct vsp1_bru *bru =
43 container_of(ctrl->handler, struct vsp1_bru, ctrls);
44
45 switch (ctrl->id) {
46 case V4L2_CID_BG_COLOR:
47 bru->bgcolor = ctrl->val;
48 break;
49 }
50
51 return 0;
52 }
53
54 static const struct v4l2_ctrl_ops bru_ctrl_ops = {
55 .s_ctrl = bru_s_ctrl,
56 };
57
58 /* -----------------------------------------------------------------------------
59 * V4L2 Subdevice Core Operations
60 */
61
62 static int bru_s_stream(struct v4l2_subdev *subdev, int enable)
63 {
64 struct vsp1_pipeline *pipe = to_vsp1_pipeline(&subdev->entity);
65 struct vsp1_bru *bru = to_bru(subdev);
66 struct v4l2_mbus_framefmt *format;
67 unsigned int flags;
68 unsigned int i;
69 int ret;
70
71 ret = vsp1_entity_set_streaming(&bru->entity, enable);
72 if (ret < 0)
73 return ret;
74
75 if (!enable)
76 return 0;
77
78 format = &bru->entity.formats[bru->entity.source_pad];
79
80 /* The hardware is extremely flexible but we have no userspace API to
81 * expose all the parameters, nor is it clear whether we would have use
82 * cases for all the supported modes. Let's just harcode the parameters
83 * to sane default values for now.
84 */
85
86 /* Disable dithering and enable color data normalization unless the
87 * format at the pipeline output is premultiplied.
88 */
89 flags = pipe->output ? pipe->output->format.flags : 0;
90 vsp1_bru_write(bru, VI6_BRU_INCTRL,
91 flags & V4L2_PIX_FMT_FLAG_PREMUL_ALPHA ?
92 0 : VI6_BRU_INCTRL_NRM);
93
94 /* Set the background position to cover the whole output image and
95 * configure its color.
96 */
97 vsp1_bru_write(bru, VI6_BRU_VIRRPF_SIZE,
98 (format->width << VI6_BRU_VIRRPF_SIZE_HSIZE_SHIFT) |
99 (format->height << VI6_BRU_VIRRPF_SIZE_VSIZE_SHIFT));
100 vsp1_bru_write(bru, VI6_BRU_VIRRPF_LOC, 0);
101
102 vsp1_bru_write(bru, VI6_BRU_VIRRPF_COL, bru->bgcolor |
103 (0xff << VI6_BRU_VIRRPF_COL_A_SHIFT));
104
105 /* Route BRU input 1 as SRC input to the ROP unit and configure the ROP
106 * unit with a NOP operation to make BRU input 1 available as the
107 * Blend/ROP unit B SRC input.
108 */
109 vsp1_bru_write(bru, VI6_BRU_ROP, VI6_BRU_ROP_DSTSEL_BRUIN(1) |
110 VI6_BRU_ROP_CROP(VI6_ROP_NOP) |
111 VI6_BRU_ROP_AROP(VI6_ROP_NOP));
112
113 for (i = 0; i < bru->entity.source_pad; ++i) {
114 bool premultiplied = false;
115 u32 ctrl = 0;
116
117 /* Configure all Blend/ROP units corresponding to an enabled BRU
118 * input for alpha blending. Blend/ROP units corresponding to
119 * disabled BRU inputs are used in ROP NOP mode to ignore the
120 * SRC input.
121 */
122 if (bru->inputs[i].rpf) {
123 ctrl |= VI6_BRU_CTRL_RBC;
124
125 premultiplied = bru->inputs[i].rpf->format.flags
126 & V4L2_PIX_FMT_FLAG_PREMUL_ALPHA;
127 } else {
128 ctrl |= VI6_BRU_CTRL_CROP(VI6_ROP_NOP)
129 | VI6_BRU_CTRL_AROP(VI6_ROP_NOP);
130 }
131
132 /* Select the virtual RPF as the Blend/ROP unit A DST input to
133 * serve as a background color.
134 */
135 if (i == 0)
136 ctrl |= VI6_BRU_CTRL_DSTSEL_VRPF;
137
138 /* Route BRU inputs 0 to 3 as SRC inputs to Blend/ROP units A to
139 * D in that order. The Blend/ROP unit B SRC is hardwired to the
140 * ROP unit output, the corresponding register bits must be set
141 * to 0.
142 */
143 if (i != 1)
144 ctrl |= VI6_BRU_CTRL_SRCSEL_BRUIN(i);
145
146 vsp1_bru_write(bru, VI6_BRU_CTRL(i), ctrl);
147
148 /* Harcode the blending formula to
149 *
150 * DSTc = DSTc * (1 - SRCa) + SRCc * SRCa
151 * DSTa = DSTa * (1 - SRCa) + SRCa
152 *
153 * when the SRC input isn't premultiplied, and to
154 *
155 * DSTc = DSTc * (1 - SRCa) + SRCc
156 * DSTa = DSTa * (1 - SRCa) + SRCa
157 *
158 * otherwise.
159 */
160 vsp1_bru_write(bru, VI6_BRU_BLD(i),
161 VI6_BRU_BLD_CCMDX_255_SRC_A |
162 (premultiplied ? VI6_BRU_BLD_CCMDY_COEFY :
163 VI6_BRU_BLD_CCMDY_SRC_A) |
164 VI6_BRU_BLD_ACMDX_255_SRC_A |
165 VI6_BRU_BLD_ACMDY_COEFY |
166 (0xff << VI6_BRU_BLD_COEFY_SHIFT));
167 }
168
169 return 0;
170 }
171
172 /* -----------------------------------------------------------------------------
173 * V4L2 Subdevice Pad Operations
174 */
175
176 /*
177 * The BRU can't perform format conversion, all sink and source formats must be
178 * identical. We pick the format on the first sink pad (pad 0) and propagate it
179 * to all other pads.
180 */
181
182 static int bru_enum_mbus_code(struct v4l2_subdev *subdev,
183 struct v4l2_subdev_pad_config *cfg,
184 struct v4l2_subdev_mbus_code_enum *code)
185 {
186 static const unsigned int codes[] = {
187 MEDIA_BUS_FMT_ARGB8888_1X32,
188 MEDIA_BUS_FMT_AYUV8_1X32,
189 };
190 struct vsp1_bru *bru = to_bru(subdev);
191 struct v4l2_mbus_framefmt *format;
192
193 if (code->pad == BRU_PAD_SINK(0)) {
194 if (code->index >= ARRAY_SIZE(codes))
195 return -EINVAL;
196
197 code->code = codes[code->index];
198 } else {
199 if (code->index)
200 return -EINVAL;
201
202 format = vsp1_entity_get_pad_format(&bru->entity, cfg,
203 BRU_PAD_SINK(0), code->which);
204 code->code = format->code;
205 }
206
207 return 0;
208 }
209
210 static int bru_enum_frame_size(struct v4l2_subdev *subdev,
211 struct v4l2_subdev_pad_config *cfg,
212 struct v4l2_subdev_frame_size_enum *fse)
213 {
214 if (fse->index)
215 return -EINVAL;
216
217 if (fse->code != MEDIA_BUS_FMT_ARGB8888_1X32 &&
218 fse->code != MEDIA_BUS_FMT_AYUV8_1X32)
219 return -EINVAL;
220
221 fse->min_width = BRU_MIN_SIZE;
222 fse->max_width = BRU_MAX_SIZE;
223 fse->min_height = BRU_MIN_SIZE;
224 fse->max_height = BRU_MAX_SIZE;
225
226 return 0;
227 }
228
229 static struct v4l2_rect *bru_get_compose(struct vsp1_bru *bru,
230 struct v4l2_subdev_pad_config *cfg,
231 unsigned int pad, u32 which)
232 {
233 switch (which) {
234 case V4L2_SUBDEV_FORMAT_TRY:
235 return v4l2_subdev_get_try_crop(&bru->entity.subdev, cfg, pad);
236 case V4L2_SUBDEV_FORMAT_ACTIVE:
237 return &bru->inputs[pad].compose;
238 default:
239 return NULL;
240 }
241 }
242
243 static int bru_get_format(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg,
244 struct v4l2_subdev_format *fmt)
245 {
246 struct vsp1_bru *bru = to_bru(subdev);
247
248 fmt->format = *vsp1_entity_get_pad_format(&bru->entity, cfg, fmt->pad,
249 fmt->which);
250
251 return 0;
252 }
253
254 static void bru_try_format(struct vsp1_bru *bru, struct v4l2_subdev_pad_config *cfg,
255 unsigned int pad, struct v4l2_mbus_framefmt *fmt,
256 enum v4l2_subdev_format_whence which)
257 {
258 struct v4l2_mbus_framefmt *format;
259
260 switch (pad) {
261 case BRU_PAD_SINK(0):
262 /* Default to YUV if the requested format is not supported. */
263 if (fmt->code != MEDIA_BUS_FMT_ARGB8888_1X32 &&
264 fmt->code != MEDIA_BUS_FMT_AYUV8_1X32)
265 fmt->code = MEDIA_BUS_FMT_AYUV8_1X32;
266 break;
267
268 default:
269 /* The BRU can't perform format conversion. */
270 format = vsp1_entity_get_pad_format(&bru->entity, cfg,
271 BRU_PAD_SINK(0), which);
272 fmt->code = format->code;
273 break;
274 }
275
276 fmt->width = clamp(fmt->width, BRU_MIN_SIZE, BRU_MAX_SIZE);
277 fmt->height = clamp(fmt->height, BRU_MIN_SIZE, BRU_MAX_SIZE);
278 fmt->field = V4L2_FIELD_NONE;
279 fmt->colorspace = V4L2_COLORSPACE_SRGB;
280 }
281
282 static int bru_set_format(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg,
283 struct v4l2_subdev_format *fmt)
284 {
285 struct vsp1_bru *bru = to_bru(subdev);
286 struct v4l2_mbus_framefmt *format;
287
288 bru_try_format(bru, cfg, fmt->pad, &fmt->format, fmt->which);
289
290 format = vsp1_entity_get_pad_format(&bru->entity, cfg, fmt->pad,
291 fmt->which);
292 *format = fmt->format;
293
294 /* Reset the compose rectangle */
295 if (fmt->pad != bru->entity.source_pad) {
296 struct v4l2_rect *compose;
297
298 compose = bru_get_compose(bru, cfg, fmt->pad, fmt->which);
299 compose->left = 0;
300 compose->top = 0;
301 compose->width = format->width;
302 compose->height = format->height;
303 }
304
305 /* Propagate the format code to all pads */
306 if (fmt->pad == BRU_PAD_SINK(0)) {
307 unsigned int i;
308
309 for (i = 0; i <= bru->entity.source_pad; ++i) {
310 format = vsp1_entity_get_pad_format(&bru->entity, cfg,
311 i, fmt->which);
312 format->code = fmt->format.code;
313 }
314 }
315
316 return 0;
317 }
318
319 static int bru_get_selection(struct v4l2_subdev *subdev,
320 struct v4l2_subdev_pad_config *cfg,
321 struct v4l2_subdev_selection *sel)
322 {
323 struct vsp1_bru *bru = to_bru(subdev);
324
325 if (sel->pad == bru->entity.source_pad)
326 return -EINVAL;
327
328 switch (sel->target) {
329 case V4L2_SEL_TGT_COMPOSE_BOUNDS:
330 sel->r.left = 0;
331 sel->r.top = 0;
332 sel->r.width = BRU_MAX_SIZE;
333 sel->r.height = BRU_MAX_SIZE;
334 return 0;
335
336 case V4L2_SEL_TGT_COMPOSE:
337 sel->r = *bru_get_compose(bru, cfg, sel->pad, sel->which);
338 return 0;
339
340 default:
341 return -EINVAL;
342 }
343 }
344
345 static int bru_set_selection(struct v4l2_subdev *subdev,
346 struct v4l2_subdev_pad_config *cfg,
347 struct v4l2_subdev_selection *sel)
348 {
349 struct vsp1_bru *bru = to_bru(subdev);
350 struct v4l2_mbus_framefmt *format;
351 struct v4l2_rect *compose;
352
353 if (sel->pad == bru->entity.source_pad)
354 return -EINVAL;
355
356 if (sel->target != V4L2_SEL_TGT_COMPOSE)
357 return -EINVAL;
358
359 /* The compose rectangle top left corner must be inside the output
360 * frame.
361 */
362 format = vsp1_entity_get_pad_format(&bru->entity, cfg,
363 bru->entity.source_pad, sel->which);
364 sel->r.left = clamp_t(unsigned int, sel->r.left, 0, format->width - 1);
365 sel->r.top = clamp_t(unsigned int, sel->r.top, 0, format->height - 1);
366
367 /* Scaling isn't supported, the compose rectangle size must be identical
368 * to the sink format size.
369 */
370 format = vsp1_entity_get_pad_format(&bru->entity, cfg, sel->pad,
371 sel->which);
372 sel->r.width = format->width;
373 sel->r.height = format->height;
374
375 compose = bru_get_compose(bru, cfg, sel->pad, sel->which);
376 *compose = sel->r;
377
378 return 0;
379 }
380
381 /* -----------------------------------------------------------------------------
382 * V4L2 Subdevice Operations
383 */
384
385 static struct v4l2_subdev_video_ops bru_video_ops = {
386 .s_stream = bru_s_stream,
387 };
388
389 static struct v4l2_subdev_pad_ops bru_pad_ops = {
390 .enum_mbus_code = bru_enum_mbus_code,
391 .enum_frame_size = bru_enum_frame_size,
392 .get_fmt = bru_get_format,
393 .set_fmt = bru_set_format,
394 .get_selection = bru_get_selection,
395 .set_selection = bru_set_selection,
396 };
397
398 static struct v4l2_subdev_ops bru_ops = {
399 .video = &bru_video_ops,
400 .pad = &bru_pad_ops,
401 };
402
403 /* -----------------------------------------------------------------------------
404 * Initialization and Cleanup
405 */
406
407 struct vsp1_bru *vsp1_bru_create(struct vsp1_device *vsp1)
408 {
409 struct v4l2_subdev *subdev;
410 struct vsp1_bru *bru;
411 int ret;
412
413 bru = devm_kzalloc(vsp1->dev, sizeof(*bru), GFP_KERNEL);
414 if (bru == NULL)
415 return ERR_PTR(-ENOMEM);
416
417 bru->entity.type = VSP1_ENTITY_BRU;
418
419 ret = vsp1_entity_init(vsp1, &bru->entity,
420 vsp1->info->num_bru_inputs + 1);
421 if (ret < 0)
422 return ERR_PTR(ret);
423
424 /* Initialize the V4L2 subdev. */
425 subdev = &bru->entity.subdev;
426 v4l2_subdev_init(subdev, &bru_ops);
427
428 subdev->entity.ops = &vsp1->media_ops;
429 subdev->internal_ops = &vsp1_subdev_internal_ops;
430 snprintf(subdev->name, sizeof(subdev->name), "%s bru",
431 dev_name(vsp1->dev));
432 v4l2_set_subdevdata(subdev, bru);
433 subdev->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
434
435 vsp1_entity_init_formats(subdev, NULL);
436
437 /* Initialize the control handler. */
438 v4l2_ctrl_handler_init(&bru->ctrls, 1);
439 v4l2_ctrl_new_std(&bru->ctrls, &bru_ctrl_ops, V4L2_CID_BG_COLOR,
440 0, 0xffffff, 1, 0);
441
442 bru->bgcolor = 0;
443
444 bru->entity.subdev.ctrl_handler = &bru->ctrls;
445
446 if (bru->ctrls.error) {
447 dev_err(vsp1->dev, "bru: failed to initialize controls\n");
448 ret = bru->ctrls.error;
449 vsp1_entity_destroy(&bru->entity);
450 return ERR_PTR(ret);
451 }
452
453 return bru;
454 }
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