projects / deliverable / linux.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
[media] v4l: Remove module_name argument to the v4l2_i2c_new_subdev* functions
[deliverable/linux.git] / drivers / media / video / cx23885 / cx23885-cards.c
1 /*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22 #include <linux/init.h>
23 #include <linux/module.h>
24 #include <linux/pci.h>
25 #include <linux/delay.h>
26 #include <media/cx25840.h>
27
28 #include "cx23885.h"
29 #include "tuner-xc2028.h"
30 #include "netup-init.h"
31 #include "cx23888-ir.h"
32
33 static unsigned int enable_885_ir;
34 module_param(enable_885_ir, int, 0644);
35 MODULE_PARM_DESC(enable_885_ir,
36 "Enable integrated IR controller for supported\n"
37 "\t\t CX2388[57] boards that are wired for it:\n"
38 "\t\t\tHVR-1250 (reported safe)\n"
39 "\t\t\tTeVii S470 (reported unsafe)\n"
40 "\t\t This can cause an interrupt storm with some cards.\n"
41 "\t\t Default: 0 [Disabled]");
42
43 /* ------------------------------------------------------------------ */
44 /* board config info */
45
46 struct cx23885_board cx23885_boards[] = {
47 [CX23885_BOARD_UNKNOWN] = {
48 .name = "UNKNOWN/GENERIC",
49 /* Ensure safe default for unknown boards */
50 .clk_freq = 0,
51 .input = {{
52 .type = CX23885_VMUX_COMPOSITE1,
53 .vmux = 0,
54 }, {
55 .type = CX23885_VMUX_COMPOSITE2,
56 .vmux = 1,
57 }, {
58 .type = CX23885_VMUX_COMPOSITE3,
59 .vmux = 2,
60 }, {
61 .type = CX23885_VMUX_COMPOSITE4,
62 .vmux = 3,
63 } },
64 },
65 [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
66 .name = "Hauppauge WinTV-HVR1800lp",
67 .portc = CX23885_MPEG_DVB,
68 .input = {{
69 .type = CX23885_VMUX_TELEVISION,
70 .vmux = 0,
71 .gpio0 = 0xff00,
72 }, {
73 .type = CX23885_VMUX_DEBUG,
74 .vmux = 0,
75 .gpio0 = 0xff01,
76 }, {
77 .type = CX23885_VMUX_COMPOSITE1,
78 .vmux = 1,
79 .gpio0 = 0xff02,
80 }, {
81 .type = CX23885_VMUX_SVIDEO,
82 .vmux = 2,
83 .gpio0 = 0xff02,
84 } },
85 },
86 [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
87 .name = "Hauppauge WinTV-HVR1800",
88 .porta = CX23885_ANALOG_VIDEO,
89 .portb = CX23885_MPEG_ENCODER,
90 .portc = CX23885_MPEG_DVB,
91 .tuner_type = TUNER_PHILIPS_TDA8290,
92 .tuner_addr = 0x42, /* 0x84 >> 1 */
93 .input = {{
94 .type = CX23885_VMUX_TELEVISION,
95 .vmux = CX25840_VIN7_CH3 |
96 CX25840_VIN5_CH2 |
97 CX25840_VIN2_CH1,
98 .gpio0 = 0,
99 }, {
100 .type = CX23885_VMUX_COMPOSITE1,
101 .vmux = CX25840_VIN7_CH3 |
102 CX25840_VIN4_CH2 |
103 CX25840_VIN6_CH1,
104 .gpio0 = 0,
105 }, {
106 .type = CX23885_VMUX_SVIDEO,
107 .vmux = CX25840_VIN7_CH3 |
108 CX25840_VIN4_CH2 |
109 CX25840_VIN8_CH1 |
110 CX25840_SVIDEO_ON,
111 .gpio0 = 0,
112 } },
113 },
114 [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
115 .name = "Hauppauge WinTV-HVR1250",
116 .portc = CX23885_MPEG_DVB,
117 .input = {{
118 .type = CX23885_VMUX_TELEVISION,
119 .vmux = 0,
120 .gpio0 = 0xff00,
121 }, {
122 .type = CX23885_VMUX_DEBUG,
123 .vmux = 0,
124 .gpio0 = 0xff01,
125 }, {
126 .type = CX23885_VMUX_COMPOSITE1,
127 .vmux = 1,
128 .gpio0 = 0xff02,
129 }, {
130 .type = CX23885_VMUX_SVIDEO,
131 .vmux = 2,
132 .gpio0 = 0xff02,
133 } },
134 },
135 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
136 .name = "DViCO FusionHDTV5 Express",
137 .portb = CX23885_MPEG_DVB,
138 },
139 [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
140 .name = "Hauppauge WinTV-HVR1500Q",
141 .portc = CX23885_MPEG_DVB,
142 },
143 [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
144 .name = "Hauppauge WinTV-HVR1500",
145 .portc = CX23885_MPEG_DVB,
146 },
147 [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
148 .name = "Hauppauge WinTV-HVR1200",
149 .portc = CX23885_MPEG_DVB,
150 },
151 [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
152 .name = "Hauppauge WinTV-HVR1700",
153 .portc = CX23885_MPEG_DVB,
154 },
155 [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
156 .name = "Hauppauge WinTV-HVR1400",
157 .portc = CX23885_MPEG_DVB,
158 },
159 [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
160 .name = "DViCO FusionHDTV7 Dual Express",
161 .portb = CX23885_MPEG_DVB,
162 .portc = CX23885_MPEG_DVB,
163 },
164 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
165 .name = "DViCO FusionHDTV DVB-T Dual Express",
166 .portb = CX23885_MPEG_DVB,
167 .portc = CX23885_MPEG_DVB,
168 },
169 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
170 .name = "Leadtek Winfast PxDVR3200 H",
171 .portc = CX23885_MPEG_DVB,
172 },
173 [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
174 .name = "Compro VideoMate E650F",
175 .portc = CX23885_MPEG_DVB,
176 },
177 [CX23885_BOARD_TBS_6920] = {
178 .name = "TurboSight TBS 6920",
179 .portb = CX23885_MPEG_DVB,
180 },
181 [CX23885_BOARD_TEVII_S470] = {
182 .name = "TeVii S470",
183 .portb = CX23885_MPEG_DVB,
184 },
185 [CX23885_BOARD_DVBWORLD_2005] = {
186 .name = "DVBWorld DVB-S2 2005",
187 .portb = CX23885_MPEG_DVB,
188 },
189 [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
190 .cimax = 1,
191 .name = "NetUP Dual DVB-S2 CI",
192 .portb = CX23885_MPEG_DVB,
193 .portc = CX23885_MPEG_DVB,
194 },
195 [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
196 .name = "Hauppauge WinTV-HVR1270",
197 .portc = CX23885_MPEG_DVB,
198 },
199 [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
200 .name = "Hauppauge WinTV-HVR1275",
201 .portc = CX23885_MPEG_DVB,
202 },
203 [CX23885_BOARD_HAUPPAUGE_HVR1255] = {
204 .name = "Hauppauge WinTV-HVR1255",
205 .portc = CX23885_MPEG_DVB,
206 },
207 [CX23885_BOARD_HAUPPAUGE_HVR1210] = {
208 .name = "Hauppauge WinTV-HVR1210",
209 .portc = CX23885_MPEG_DVB,
210 },
211 [CX23885_BOARD_MYGICA_X8506] = {
212 .name = "Mygica X8506 DMB-TH",
213 .tuner_type = TUNER_XC5000,
214 .tuner_addr = 0x61,
215 .porta = CX23885_ANALOG_VIDEO,
216 .portb = CX23885_MPEG_DVB,
217 .input = {
218 {
219 .type = CX23885_VMUX_TELEVISION,
220 .vmux = CX25840_COMPOSITE2,
221 },
222 {
223 .type = CX23885_VMUX_COMPOSITE1,
224 .vmux = CX25840_COMPOSITE8,
225 },
226 {
227 .type = CX23885_VMUX_SVIDEO,
228 .vmux = CX25840_SVIDEO_LUMA3 |
229 CX25840_SVIDEO_CHROMA4,
230 },
231 {
232 .type = CX23885_VMUX_COMPONENT,
233 .vmux = CX25840_COMPONENT_ON |
234 CX25840_VIN1_CH1 |
235 CX25840_VIN6_CH2 |
236 CX25840_VIN7_CH3,
237 },
238 },
239 },
240 [CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
241 .name = "Magic-Pro ProHDTV Extreme 2",
242 .tuner_type = TUNER_XC5000,
243 .tuner_addr = 0x61,
244 .porta = CX23885_ANALOG_VIDEO,
245 .portb = CX23885_MPEG_DVB,
246 .input = {
247 {
248 .type = CX23885_VMUX_TELEVISION,
249 .vmux = CX25840_COMPOSITE2,
250 },
251 {
252 .type = CX23885_VMUX_COMPOSITE1,
253 .vmux = CX25840_COMPOSITE8,
254 },
255 {
256 .type = CX23885_VMUX_SVIDEO,
257 .vmux = CX25840_SVIDEO_LUMA3 |
258 CX25840_SVIDEO_CHROMA4,
259 },
260 {
261 .type = CX23885_VMUX_COMPONENT,
262 .vmux = CX25840_COMPONENT_ON |
263 CX25840_VIN1_CH1 |
264 CX25840_VIN6_CH2 |
265 CX25840_VIN7_CH3,
266 },
267 },
268 },
269 [CX23885_BOARD_HAUPPAUGE_HVR1850] = {
270 .name = "Hauppauge WinTV-HVR1850",
271 .portb = CX23885_MPEG_ENCODER,
272 .portc = CX23885_MPEG_DVB,
273 },
274 [CX23885_BOARD_COMPRO_VIDEOMATE_E800] = {
275 .name = "Compro VideoMate E800",
276 .portc = CX23885_MPEG_DVB,
277 },
278 [CX23885_BOARD_HAUPPAUGE_HVR1290] = {
279 .name = "Hauppauge WinTV-HVR1290",
280 .portc = CX23885_MPEG_DVB,
281 },
282 [CX23885_BOARD_MYGICA_X8558PRO] = {
283 .name = "Mygica X8558 PRO DMB-TH",
284 .portb = CX23885_MPEG_DVB,
285 .portc = CX23885_MPEG_DVB,
286 },
287 [CX23885_BOARD_LEADTEK_WINFAST_PXTV1200] = {
288 .name = "LEADTEK WinFast PxTV1200",
289 .porta = CX23885_ANALOG_VIDEO,
290 .tuner_type = TUNER_XC2028,
291 .tuner_addr = 0x61,
292 .input = {{
293 .type = CX23885_VMUX_TELEVISION,
294 .vmux = CX25840_VIN2_CH1 |
295 CX25840_VIN5_CH2 |
296 CX25840_NONE0_CH3,
297 }, {
298 .type = CX23885_VMUX_COMPOSITE1,
299 .vmux = CX25840_COMPOSITE1,
300 }, {
301 .type = CX23885_VMUX_SVIDEO,
302 .vmux = CX25840_SVIDEO_LUMA3 |
303 CX25840_SVIDEO_CHROMA4,
304 }, {
305 .type = CX23885_VMUX_COMPONENT,
306 .vmux = CX25840_VIN7_CH1 |
307 CX25840_VIN6_CH2 |
308 CX25840_VIN8_CH3 |
309 CX25840_COMPONENT_ON,
310 } },
311 },
312 };
313 const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
314
315 /* ------------------------------------------------------------------ */
316 /* PCI subsystem IDs */
317
318 struct cx23885_subid cx23885_subids[] = {
319 {
320 .subvendor = 0x0070,
321 .subdevice = 0x3400,
322 .card = CX23885_BOARD_UNKNOWN,
323 }, {
324 .subvendor = 0x0070,
325 .subdevice = 0x7600,
326 .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
327 }, {
328 .subvendor = 0x0070,
329 .subdevice = 0x7800,
330 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
331 }, {
332 .subvendor = 0x0070,
333 .subdevice = 0x7801,
334 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
335 }, {
336 .subvendor = 0x0070,
337 .subdevice = 0x7809,
338 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
339 }, {
340 .subvendor = 0x0070,
341 .subdevice = 0x7911,
342 .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
343 }, {
344 .subvendor = 0x18ac,
345 .subdevice = 0xd500,
346 .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
347 }, {
348 .subvendor = 0x0070,
349 .subdevice = 0x7790,
350 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
351 }, {
352 .subvendor = 0x0070,
353 .subdevice = 0x7797,
354 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
355 }, {
356 .subvendor = 0x0070,
357 .subdevice = 0x7710,
358 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
359 }, {
360 .subvendor = 0x0070,
361 .subdevice = 0x7717,
362 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
363 }, {
364 .subvendor = 0x0070,
365 .subdevice = 0x71d1,
366 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
367 }, {
368 .subvendor = 0x0070,
369 .subdevice = 0x71d3,
370 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
371 }, {
372 .subvendor = 0x0070,
373 .subdevice = 0x8101,
374 .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
375 }, {
376 .subvendor = 0x0070,
377 .subdevice = 0x8010,
378 .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
379 }, {
380 .subvendor = 0x18ac,
381 .subdevice = 0xd618,
382 .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
383 }, {
384 .subvendor = 0x18ac,
385 .subdevice = 0xdb78,
386 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
387 }, {
388 .subvendor = 0x107d,
389 .subdevice = 0x6681,
390 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
391 }, {
392 .subvendor = 0x185b,
393 .subdevice = 0xe800,
394 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
395 }, {
396 .subvendor = 0x6920,
397 .subdevice = 0x8888,
398 .card = CX23885_BOARD_TBS_6920,
399 }, {
400 .subvendor = 0xd470,
401 .subdevice = 0x9022,
402 .card = CX23885_BOARD_TEVII_S470,
403 }, {
404 .subvendor = 0x0001,
405 .subdevice = 0x2005,
406 .card = CX23885_BOARD_DVBWORLD_2005,
407 }, {
408 .subvendor = 0x1b55,
409 .subdevice = 0x2a2c,
410 .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
411 }, {
412 .subvendor = 0x0070,
413 .subdevice = 0x2211,
414 .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
415 }, {
416 .subvendor = 0x0070,
417 .subdevice = 0x2215,
418 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
419 }, {
420 .subvendor = 0x0070,
421 .subdevice = 0x221d,
422 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
423 }, {
424 .subvendor = 0x0070,
425 .subdevice = 0x2251,
426 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
427 }, {
428 .subvendor = 0x0070,
429 .subdevice = 0x2259,
430 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
431 }, {
432 .subvendor = 0x0070,
433 .subdevice = 0x2291,
434 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
435 }, {
436 .subvendor = 0x0070,
437 .subdevice = 0x2295,
438 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
439 }, {
440 .subvendor = 0x0070,
441 .subdevice = 0x2299,
442 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
443 }, {
444 .subvendor = 0x0070,
445 .subdevice = 0x229d,
446 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
447 }, {
448 .subvendor = 0x0070,
449 .subdevice = 0x22f0,
450 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
451 }, {
452 .subvendor = 0x0070,
453 .subdevice = 0x22f1,
454 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
455 }, {
456 .subvendor = 0x0070,
457 .subdevice = 0x22f2,
458 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
459 }, {
460 .subvendor = 0x0070,
461 .subdevice = 0x22f3,
462 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
463 }, {
464 .subvendor = 0x0070,
465 .subdevice = 0x22f4,
466 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
467 }, {
468 .subvendor = 0x0070,
469 .subdevice = 0x22f5,
470 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
471 }, {
472 .subvendor = 0x14f1,
473 .subdevice = 0x8651,
474 .card = CX23885_BOARD_MYGICA_X8506,
475 }, {
476 .subvendor = 0x14f1,
477 .subdevice = 0x8657,
478 .card = CX23885_BOARD_MAGICPRO_PROHDTVE2,
479 }, {
480 .subvendor = 0x0070,
481 .subdevice = 0x8541,
482 .card = CX23885_BOARD_HAUPPAUGE_HVR1850,
483 }, {
484 .subvendor = 0x1858,
485 .subdevice = 0xe800,
486 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E800,
487 }, {
488 .subvendor = 0x0070,
489 .subdevice = 0x8551,
490 .card = CX23885_BOARD_HAUPPAUGE_HVR1290,
491 }, {
492 .subvendor = 0x14f1,
493 .subdevice = 0x8578,
494 .card = CX23885_BOARD_MYGICA_X8558PRO,
495 }, {
496 .subvendor = 0x107d,
497 .subdevice = 0x6f22,
498 .card = CX23885_BOARD_LEADTEK_WINFAST_PXTV1200,
499 },
500 };
501 const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
502
503 void cx23885_card_list(struct cx23885_dev *dev)
504 {
505 int i;
506
507 if (0 == dev->pci->subsystem_vendor &&
508 0 == dev->pci->subsystem_device) {
509 printk(KERN_INFO
510 "%s: Board has no valid PCIe Subsystem ID and can't\n"
511 "%s: be autodetected. Pass card=<n> insmod option\n"
512 "%s: to workaround that. Redirect complaints to the\n"
513 "%s: vendor of the TV card. Best regards,\n"
514 "%s: -- tux\n",
515 dev->name, dev->name, dev->name, dev->name, dev->name);
516 } else {
517 printk(KERN_INFO
518 "%s: Your board isn't known (yet) to the driver.\n"
519 "%s: Try to pick one of the existing card configs via\n"
520 "%s: card=<n> insmod option. Updating to the latest\n"
521 "%s: version might help as well.\n",
522 dev->name, dev->name, dev->name, dev->name);
523 }
524 printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
525 dev->name);
526 for (i = 0; i < cx23885_bcount; i++)
527 printk(KERN_INFO "%s: card=%d -> %s\n",
528 dev->name, i, cx23885_boards[i].name);
529 }
530
531 static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
532 {
533 struct tveeprom tv;
534
535 tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
536 eeprom_data);
537
538 /* Make sure we support the board model */
539 switch (tv.model) {
540 case 22001:
541 /* WinTV-HVR1270 (PCIe, Retail, half height)
542 * ATSC/QAM and basic analog, IR Blast */
543 case 22009:
544 /* WinTV-HVR1210 (PCIe, Retail, half height)
545 * DVB-T and basic analog, IR Blast */
546 case 22011:
547 /* WinTV-HVR1270 (PCIe, Retail, half height)
548 * ATSC/QAM and basic analog, IR Recv */
549 case 22019:
550 /* WinTV-HVR1210 (PCIe, Retail, half height)
551 * DVB-T and basic analog, IR Recv */
552 case 22021:
553 /* WinTV-HVR1275 (PCIe, Retail, half height)
554 * ATSC/QAM and basic analog, IR Recv */
555 case 22029:
556 /* WinTV-HVR1210 (PCIe, Retail, half height)
557 * DVB-T and basic analog, IR Recv */
558 case 22101:
559 /* WinTV-HVR1270 (PCIe, Retail, full height)
560 * ATSC/QAM and basic analog, IR Blast */
561 case 22109:
562 /* WinTV-HVR1210 (PCIe, Retail, full height)
563 * DVB-T and basic analog, IR Blast */
564 case 22111:
565 /* WinTV-HVR1270 (PCIe, Retail, full height)
566 * ATSC/QAM and basic analog, IR Recv */
567 case 22119:
568 /* WinTV-HVR1210 (PCIe, Retail, full height)
569 * DVB-T and basic analog, IR Recv */
570 case 22121:
571 /* WinTV-HVR1275 (PCIe, Retail, full height)
572 * ATSC/QAM and basic analog, IR Recv */
573 case 22129:
574 /* WinTV-HVR1210 (PCIe, Retail, full height)
575 * DVB-T and basic analog, IR Recv */
576 case 71009:
577 /* WinTV-HVR1200 (PCIe, Retail, full height)
578 * DVB-T and basic analog */
579 case 71359:
580 /* WinTV-HVR1200 (PCIe, OEM, half height)
581 * DVB-T and basic analog */
582 case 71439:
583 /* WinTV-HVR1200 (PCIe, OEM, half height)
584 * DVB-T and basic analog */
585 case 71449:
586 /* WinTV-HVR1200 (PCIe, OEM, full height)
587 * DVB-T and basic analog */
588 case 71939:
589 /* WinTV-HVR1200 (PCIe, OEM, half height)
590 * DVB-T and basic analog */
591 case 71949:
592 /* WinTV-HVR1200 (PCIe, OEM, full height)
593 * DVB-T and basic analog */
594 case 71959:
595 /* WinTV-HVR1200 (PCIe, OEM, full height)
596 * DVB-T and basic analog */
597 case 71979:
598 /* WinTV-HVR1200 (PCIe, OEM, half height)
599 * DVB-T and basic analog */
600 case 71999:
601 /* WinTV-HVR1200 (PCIe, OEM, full height)
602 * DVB-T and basic analog */
603 case 76601:
604 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
605 channel ATSC and MPEG2 HW Encoder */
606 case 77001:
607 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
608 and Basic analog */
609 case 77011:
610 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
611 and Basic analog */
612 case 77041:
613 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
614 and Basic analog */
615 case 77051:
616 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
617 and Basic analog */
618 case 78011:
619 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
620 Dual channel ATSC and MPEG2 HW Encoder */
621 case 78501:
622 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
623 Dual channel ATSC and MPEG2 HW Encoder */
624 case 78521:
625 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
626 Dual channel ATSC and MPEG2 HW Encoder */
627 case 78531:
628 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
629 Dual channel ATSC and MPEG2 HW Encoder */
630 case 78631:
631 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
632 Dual channel ATSC and MPEG2 HW Encoder */
633 case 79001:
634 /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
635 ATSC and Basic analog */
636 case 79101:
637 /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
638 ATSC and Basic analog */
639 case 79501:
640 /* WinTV-HVR1250 (PCIe, No IR, half height,
641 ATSC [at least] and Basic analog) */
642 case 79561:
643 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
644 ATSC and Basic analog */
645 case 79571:
646 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
647 ATSC and Basic analog */
648 case 79671:
649 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
650 ATSC and Basic analog */
651 case 80019:
652 /* WinTV-HVR1400 (Express Card, Retail, IR,
653 * DVB-T and Basic analog */
654 case 81509:
655 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
656 * DVB-T and MPEG2 HW Encoder */
657 case 81519:
658 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
659 * DVB-T and MPEG2 HW Encoder */
660 break;
661 case 85021:
662 /* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM,
663 Dual channel ATSC and MPEG2 HW Encoder */
664 break;
665 case 85721:
666 /* WinTV-HVR1290 (PCIe, OEM, RCA in, IR,
667 Dual channel ATSC and Basic analog */
668 break;
669 default:
670 printk(KERN_WARNING "%s: warning: "
671 "unknown hauppauge model #%d\n",
672 dev->name, tv.model);
673 break;
674 }
675
676 printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
677 dev->name, tv.model);
678 }
679
680 int cx23885_tuner_callback(void *priv, int component, int command, int arg)
681 {
682 struct cx23885_tsport *port = priv;
683 struct cx23885_dev *dev = port->dev;
684 u32 bitmask = 0;
685
686 if (command == XC2028_RESET_CLK)
687 return 0;
688
689 if (command != 0) {
690 printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
691 __func__, command);
692 return -EINVAL;
693 }
694
695 switch (dev->board) {
696 case CX23885_BOARD_HAUPPAUGE_HVR1400:
697 case CX23885_BOARD_HAUPPAUGE_HVR1500:
698 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
699 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
700 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
701 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
702 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
703 /* Tuner Reset Command */
704 bitmask = 0x04;
705 break;
706 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
707 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
708 /* Two identical tuners on two different i2c buses,
709 * we need to reset the correct gpio. */
710 if (port->nr == 1)
711 bitmask = 0x01;
712 else if (port->nr == 2)
713 bitmask = 0x04;
714 break;
715 }
716
717 if (bitmask) {
718 /* Drive the tuner into reset and back out */
719 cx_clear(GP0_IO, bitmask);
720 mdelay(200);
721 cx_set(GP0_IO, bitmask);
722 }
723
724 return 0;
725 }
726
727 void cx23885_gpio_setup(struct cx23885_dev *dev)
728 {
729 switch (dev->board) {
730 case CX23885_BOARD_HAUPPAUGE_HVR1250:
731 /* GPIO-0 cx24227 demodulator reset */
732 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
733 break;
734 case CX23885_BOARD_HAUPPAUGE_HVR1500:
735 /* GPIO-0 cx24227 demodulator */
736 /* GPIO-2 xc3028 tuner */
737
738 /* Put the parts into reset */
739 cx_set(GP0_IO, 0x00050000);
740 cx_clear(GP0_IO, 0x00000005);
741 msleep(5);
742
743 /* Bring the parts out of reset */
744 cx_set(GP0_IO, 0x00050005);
745 break;
746 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
747 /* GPIO-0 cx24227 demodulator reset */
748 /* GPIO-2 xc5000 tuner reset */
749 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
750 break;
751 case CX23885_BOARD_HAUPPAUGE_HVR1800:
752 /* GPIO-0 656_CLK */
753 /* GPIO-1 656_D0 */
754 /* GPIO-2 8295A Reset */
755 /* GPIO-3-10 cx23417 data0-7 */
756 /* GPIO-11-14 cx23417 addr0-3 */
757 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
758 /* GPIO-19 IR_RX */
759
760 /* CX23417 GPIO's */
761 /* EIO15 Zilog Reset */
762 /* EIO14 S5H1409/CX24227 Reset */
763 mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
764
765 /* Put the demod into reset and protect the eeprom */
766 mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
767 mdelay(100);
768
769 /* Bring the demod and blaster out of reset */
770 mc417_gpio_set(dev, GPIO_15 | GPIO_14);
771 mdelay(100);
772
773 /* Force the TDA8295A into reset and back */
774 cx23885_gpio_enable(dev, GPIO_2, 1);
775 cx23885_gpio_set(dev, GPIO_2);
776 mdelay(20);
777 cx23885_gpio_clear(dev, GPIO_2);
778 mdelay(20);
779 cx23885_gpio_set(dev, GPIO_2);
780 mdelay(20);
781 break;
782 case CX23885_BOARD_HAUPPAUGE_HVR1200:
783 /* GPIO-0 tda10048 demodulator reset */
784 /* GPIO-2 tda18271 tuner reset */
785
786 /* Put the parts into reset and back */
787 cx_set(GP0_IO, 0x00050000);
788 mdelay(20);
789 cx_clear(GP0_IO, 0x00000005);
790 mdelay(20);
791 cx_set(GP0_IO, 0x00050005);
792 break;
793 case CX23885_BOARD_HAUPPAUGE_HVR1700:
794 /* GPIO-0 TDA10048 demodulator reset */
795 /* GPIO-2 TDA8295A Reset */
796 /* GPIO-3-10 cx23417 data0-7 */
797 /* GPIO-11-14 cx23417 addr0-3 */
798 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
799
800 /* The following GPIO's are on the interna AVCore (cx25840) */
801 /* GPIO-19 IR_RX */
802 /* GPIO-20 IR_TX 416/DVBT Select */
803 /* GPIO-21 IIS DAT */
804 /* GPIO-22 IIS WCLK */
805 /* GPIO-23 IIS BCLK */
806
807 /* Put the parts into reset and back */
808 cx_set(GP0_IO, 0x00050000);
809 mdelay(20);
810 cx_clear(GP0_IO, 0x00000005);
811 mdelay(20);
812 cx_set(GP0_IO, 0x00050005);
813 break;
814 case CX23885_BOARD_HAUPPAUGE_HVR1400:
815 /* GPIO-0 Dibcom7000p demodulator reset */
816 /* GPIO-2 xc3028L tuner reset */
817 /* GPIO-13 LED */
818
819 /* Put the parts into reset and back */
820 cx_set(GP0_IO, 0x00050000);
821 mdelay(20);
822 cx_clear(GP0_IO, 0x00000005);
823 mdelay(20);
824 cx_set(GP0_IO, 0x00050005);
825 break;
826 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
827 /* GPIO-0 xc5000 tuner reset i2c bus 0 */
828 /* GPIO-1 s5h1409 demod reset i2c bus 0 */
829 /* GPIO-2 xc5000 tuner reset i2c bus 1 */
830 /* GPIO-3 s5h1409 demod reset i2c bus 0 */
831
832 /* Put the parts into reset and back */
833 cx_set(GP0_IO, 0x000f0000);
834 mdelay(20);
835 cx_clear(GP0_IO, 0x0000000f);
836 mdelay(20);
837 cx_set(GP0_IO, 0x000f000f);
838 break;
839 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
840 /* GPIO-0 portb xc3028 reset */
841 /* GPIO-1 portb zl10353 reset */
842 /* GPIO-2 portc xc3028 reset */
843 /* GPIO-3 portc zl10353 reset */
844
845 /* Put the parts into reset and back */
846 cx_set(GP0_IO, 0x000f0000);
847 mdelay(20);
848 cx_clear(GP0_IO, 0x0000000f);
849 mdelay(20);
850 cx_set(GP0_IO, 0x000f000f);
851 break;
852 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
853 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
854 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
855 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
856 /* GPIO-2 xc3028 tuner reset */
857
858 /* The following GPIO's are on the internal AVCore (cx25840) */
859 /* GPIO-? zl10353 demod reset */
860
861 /* Put the parts into reset and back */
862 cx_set(GP0_IO, 0x00040000);
863 mdelay(20);
864 cx_clear(GP0_IO, 0x00000004);
865 mdelay(20);
866 cx_set(GP0_IO, 0x00040004);
867 break;
868 case CX23885_BOARD_TBS_6920:
869 cx_write(MC417_CTL, 0x00000036);
870 cx_write(MC417_OEN, 0x00001000);
871 cx_set(MC417_RWD, 0x00000002);
872 mdelay(200);
873 cx_clear(MC417_RWD, 0x00000800);
874 mdelay(200);
875 cx_set(MC417_RWD, 0x00000800);
876 mdelay(200);
877 break;
878 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
879 /* GPIO-0 INTA from CiMax1
880 GPIO-1 INTB from CiMax2
881 GPIO-2 reset chips
882 GPIO-3 to GPIO-10 data/addr for CA
883 GPIO-11 ~CS0 to CiMax1
884 GPIO-12 ~CS1 to CiMax2
885 GPIO-13 ADL0 load LSB addr
886 GPIO-14 ADL1 load MSB addr
887 GPIO-15 ~RDY from CiMax
888 GPIO-17 ~RD to CiMax
889 GPIO-18 ~WR to CiMax
890 */
891 cx_set(GP0_IO, 0x00040000); /* GPIO as out */
892 /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
893 cx_clear(GP0_IO, 0x00030004);
894 mdelay(100);/* reset delay */
895 cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
896 cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
897 /* GPIO-15 IN as ~ACK, rest as OUT */
898 cx_write(MC417_OEN, 0x00001000);
899 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
900 cx_write(MC417_RWD, 0x0000c300);
901 /* enable irq */
902 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
903 break;
904 case CX23885_BOARD_HAUPPAUGE_HVR1270:
905 case CX23885_BOARD_HAUPPAUGE_HVR1275:
906 case CX23885_BOARD_HAUPPAUGE_HVR1255:
907 case CX23885_BOARD_HAUPPAUGE_HVR1210:
908 /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
909 /* GPIO-6 I2C Gate which can isolate the demod from the bus */
910 /* GPIO-9 Demod reset */
911
912 /* Put the parts into reset and back */
913 cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
914 cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
915 cx23885_gpio_clear(dev, GPIO_9);
916 mdelay(20);
917 cx23885_gpio_set(dev, GPIO_9);
918 break;
919 case CX23885_BOARD_MYGICA_X8506:
920 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
921 /* GPIO-0 (0)Analog / (1)Digital TV */
922 /* GPIO-1 reset XC5000 */
923 /* GPIO-2 reset LGS8GL5 / LGS8G75 */
924 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1);
925 cx23885_gpio_clear(dev, GPIO_1 | GPIO_2);
926 mdelay(100);
927 cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2);
928 mdelay(100);
929 break;
930 case CX23885_BOARD_MYGICA_X8558PRO:
931 /* GPIO-0 reset first ATBM8830 */
932 /* GPIO-1 reset second ATBM8830 */
933 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
934 cx23885_gpio_clear(dev, GPIO_0 | GPIO_1);
935 mdelay(100);
936 cx23885_gpio_set(dev, GPIO_0 | GPIO_1);
937 mdelay(100);
938 break;
939 case CX23885_BOARD_HAUPPAUGE_HVR1850:
940 case CX23885_BOARD_HAUPPAUGE_HVR1290:
941 /* GPIO-0 656_CLK */
942 /* GPIO-1 656_D0 */
943 /* GPIO-2 Wake# */
944 /* GPIO-3-10 cx23417 data0-7 */
945 /* GPIO-11-14 cx23417 addr0-3 */
946 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
947 /* GPIO-19 IR_RX */
948 /* GPIO-20 C_IR_TX */
949 /* GPIO-21 I2S DAT */
950 /* GPIO-22 I2S WCLK */
951 /* GPIO-23 I2S BCLK */
952 /* ALT GPIO: EXP GPIO LATCH */
953
954 /* CX23417 GPIO's */
955 /* GPIO-14 S5H1411/CX24228 Reset */
956 /* GPIO-13 EEPROM write protect */
957 mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1);
958
959 /* Put the demod into reset and protect the eeprom */
960 mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
961 mdelay(100);
962
963 /* Bring the demod out of reset */
964 mc417_gpio_set(dev, GPIO_14);
965 mdelay(100);
966
967 /* CX24228 GPIO */
968 /* Connected to IF / Mux */
969 break;
970 }
971 }
972
973 int cx23885_ir_init(struct cx23885_dev *dev)
974 {
975 static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg[] = {
976 {
977 .flags = V4L2_SUBDEV_IO_PIN_INPUT,
978 .pin = CX23885_PIN_IR_RX_GPIO19,
979 .function = CX23885_PAD_IR_RX,
980 .value = 0,
981 .strength = CX25840_PIN_DRIVE_MEDIUM,
982 }, {
983 .flags = V4L2_SUBDEV_IO_PIN_OUTPUT,
984 .pin = CX23885_PIN_IR_TX_GPIO20,
985 .function = CX23885_PAD_IR_TX,
986 .value = 0,
987 .strength = CX25840_PIN_DRIVE_MEDIUM,
988 }
989 };
990 const size_t ir_rxtx_pin_cfg_count = ARRAY_SIZE(ir_rxtx_pin_cfg);
991
992 static struct v4l2_subdev_io_pin_config ir_rx_pin_cfg[] = {
993 {
994 .flags = V4L2_SUBDEV_IO_PIN_INPUT,
995 .pin = CX23885_PIN_IR_RX_GPIO19,
996 .function = CX23885_PAD_IR_RX,
997 .value = 0,
998 .strength = CX25840_PIN_DRIVE_MEDIUM,
999 }
1000 };
1001 const size_t ir_rx_pin_cfg_count = ARRAY_SIZE(ir_rx_pin_cfg);
1002
1003 struct v4l2_subdev_ir_parameters params;
1004 int ret = 0;
1005 switch (dev->board) {
1006 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1007 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1008 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1009 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1010 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1011 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1012 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1013 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1014 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1015 /* FIXME: Implement me */
1016 break;
1017 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1018 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1019 ret = cx23888_ir_probe(dev);
1020 if (ret)
1021 break;
1022 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1023 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1024 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
1025 /*
1026 * For these boards we need to invert the Tx output via the
1027 * IR controller to have the LED off while idle
1028 */
1029 v4l2_subdev_call(dev->sd_ir, ir, tx_g_parameters, &params);
1030 params.enable = false;
1031 params.shutdown = false;
1032 params.invert_level = true;
1033 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
1034 params.shutdown = true;
1035 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
1036 break;
1037 case CX23885_BOARD_TEVII_S470:
1038 if (!enable_885_ir)
1039 break;
1040 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1041 if (dev->sd_ir == NULL) {
1042 ret = -ENODEV;
1043 break;
1044 }
1045 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1046 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
1047 break;
1048 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1049 if (!enable_885_ir)
1050 break;
1051 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1052 if (dev->sd_ir == NULL) {
1053 ret = -ENODEV;
1054 break;
1055 }
1056 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1057 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
1058 break;
1059 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1060 request_module("ir-kbd-i2c");
1061 break;
1062 }
1063
1064 return ret;
1065 }
1066
1067 void cx23885_ir_fini(struct cx23885_dev *dev)
1068 {
1069 switch (dev->board) {
1070 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1071 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1072 cx23885_irq_remove(dev, PCI_MSK_IR);
1073 cx23888_ir_remove(dev);
1074 dev->sd_ir = NULL;
1075 break;
1076 case CX23885_BOARD_TEVII_S470:
1077 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1078 cx23885_irq_remove(dev, PCI_MSK_AV_CORE);
1079 /* sd_ir is a duplicate pointer to the AV Core, just clear it */
1080 dev->sd_ir = NULL;
1081 break;
1082 }
1083 }
1084
1085 void cx23885_ir_pci_int_enable(struct cx23885_dev *dev)
1086 {
1087 switch (dev->board) {
1088 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1089 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1090 if (dev->sd_ir)
1091 cx23885_irq_add_enable(dev, PCI_MSK_IR);
1092 break;
1093 case CX23885_BOARD_TEVII_S470:
1094 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1095 if (dev->sd_ir)
1096 cx23885_irq_add_enable(dev, PCI_MSK_AV_CORE);
1097 break;
1098 }
1099 }
1100
1101 void cx23885_card_setup(struct cx23885_dev *dev)
1102 {
1103 struct cx23885_tsport *ts1 = &dev->ts1;
1104 struct cx23885_tsport *ts2 = &dev->ts2;
1105
1106 static u8 eeprom[256];
1107
1108 if (dev->i2c_bus[0].i2c_rc == 0) {
1109 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
1110 tveeprom_read(&dev->i2c_bus[0].i2c_client,
1111 eeprom, sizeof(eeprom));
1112 }
1113
1114 switch (dev->board) {
1115 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1116 if (dev->i2c_bus[0].i2c_rc == 0) {
1117 if (eeprom[0x80] != 0x84)
1118 hauppauge_eeprom(dev, eeprom+0xc0);
1119 else
1120 hauppauge_eeprom(dev, eeprom+0x80);
1121 }
1122 break;
1123 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1124 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1125 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1126 if (dev->i2c_bus[0].i2c_rc == 0)
1127 hauppauge_eeprom(dev, eeprom+0x80);
1128 break;
1129 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1130 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1131 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1132 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1133 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1134 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1135 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1136 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1137 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1138 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1139 if (dev->i2c_bus[0].i2c_rc == 0)
1140 hauppauge_eeprom(dev, eeprom+0xc0);
1141 break;
1142 }
1143
1144 switch (dev->board) {
1145 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1146 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1147 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1148 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1149 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1150 /* break omitted intentionally */
1151 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
1152 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1153 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1154 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1155 break;
1156 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1157 /* Defaults for VID B - Analog encoder */
1158 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
1159 ts1->gen_ctrl_val = 0x10e;
1160 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1161 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1162
1163 /* APB_TSVALERR_POL (active low)*/
1164 ts1->vld_misc_val = 0x2000;
1165 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
1166
1167 /* Defaults for VID C */
1168 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1169 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1170 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1171 break;
1172 case CX23885_BOARD_TBS_6920:
1173 ts1->gen_ctrl_val = 0x4; /* Parallel */
1174 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1175 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1176 break;
1177 case CX23885_BOARD_TEVII_S470:
1178 case CX23885_BOARD_DVBWORLD_2005:
1179 ts1->gen_ctrl_val = 0x5; /* Parallel */
1180 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1181 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1182 break;
1183 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1184 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1185 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1186 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1187 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1188 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1189 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1190 break;
1191 case CX23885_BOARD_MYGICA_X8506:
1192 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1193 ts1->gen_ctrl_val = 0x5; /* Parallel */
1194 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1195 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1196 break;
1197 case CX23885_BOARD_MYGICA_X8558PRO:
1198 ts1->gen_ctrl_val = 0x5; /* Parallel */
1199 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1200 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1201 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1202 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1203 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1204 break;
1205 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1206 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1207 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1208 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1209 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1210 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1211 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1212 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1213 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1214 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1215 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1216 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1217 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1218 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1219 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1220 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1221 default:
1222 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1223 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1224 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1225 }
1226
1227 /* Certain boards support analog, or require the avcore to be
1228 * loaded, ensure this happens.
1229 */
1230 switch (dev->board) {
1231 case CX23885_BOARD_TEVII_S470:
1232 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1233 /* Currently only enabled for the integrated IR controller */
1234 if (!enable_885_ir)
1235 break;
1236 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1237 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1238 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1239 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1240 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1241 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1242 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1243 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1244 case CX23885_BOARD_MYGICA_X8506:
1245 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1246 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1247 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1248 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
1249 &dev->i2c_bus[2].i2c_adap,
1250 "cx25840", 0x88 >> 1, NULL);
1251 if (dev->sd_cx25840) {
1252 dev->sd_cx25840->grp_id = CX23885_HW_AV_CORE;
1253 v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
1254 }
1255 break;
1256 }
1257
1258 /* AUX-PLL 27MHz CLK */
1259 switch (dev->board) {
1260 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1261 netup_initialize(dev);
1262 break;
1263 }
1264 }
1265
1266 /* ------------------------------------------------------------------ */
Linux kernel - Deliverables
This page took 0.106555 seconds and 5 git commands to generate.