2 * Driver for the Conexant CX23885 PCIe bridge
4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 #include <linux/module.h>
23 #include <linux/init.h>
24 #include <linux/device.h>
26 #include <linux/kthread.h>
27 #include <linux/file.h>
28 #include <linux/suspend.h>
31 #include <media/v4l2-common.h>
33 #include "dvb_ca_en50221.h"
42 #include "tuner-xc2028.h"
43 #include "tuner-simple.h"
45 #include "dibx000_common.h"
48 #include "stv0900_reg.h"
54 #include "netup-eeprom.h"
55 #include "netup-init.h"
58 static unsigned int debug
;
60 #define dprintk(level, fmt, arg...)\
61 do { if (debug >= level)\
62 printk(KERN_DEBUG "%s/0: " fmt, dev->name, ## arg);\
65 /* ------------------------------------------------------------------ */
67 static unsigned int alt_tuner
;
68 module_param(alt_tuner
, int, 0644);
69 MODULE_PARM_DESC(alt_tuner
, "Enable alternate tuner configuration");
71 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr
);
73 /* ------------------------------------------------------------------ */
75 static int dvb_buf_setup(struct videobuf_queue
*q
,
76 unsigned int *count
, unsigned int *size
)
78 struct cx23885_tsport
*port
= q
->priv_data
;
80 port
->ts_packet_size
= 188 * 4;
81 port
->ts_packet_count
= 32;
83 *size
= port
->ts_packet_size
* port
->ts_packet_count
;
88 static int dvb_buf_prepare(struct videobuf_queue
*q
,
89 struct videobuf_buffer
*vb
, enum v4l2_field field
)
91 struct cx23885_tsport
*port
= q
->priv_data
;
92 return cx23885_buf_prepare(q
, port
, (struct cx23885_buffer
*)vb
, field
);
95 static void dvb_buf_queue(struct videobuf_queue
*q
, struct videobuf_buffer
*vb
)
97 struct cx23885_tsport
*port
= q
->priv_data
;
98 cx23885_buf_queue(port
, (struct cx23885_buffer
*)vb
);
101 static void dvb_buf_release(struct videobuf_queue
*q
,
102 struct videobuf_buffer
*vb
)
104 cx23885_free_buffer(q
, (struct cx23885_buffer
*)vb
);
107 static struct videobuf_queue_ops dvb_qops
= {
108 .buf_setup
= dvb_buf_setup
,
109 .buf_prepare
= dvb_buf_prepare
,
110 .buf_queue
= dvb_buf_queue
,
111 .buf_release
= dvb_buf_release
,
114 static struct s5h1409_config hauppauge_generic_config
= {
115 .demod_address
= 0x32 >> 1,
116 .output_mode
= S5H1409_SERIAL_OUTPUT
,
117 .gpio
= S5H1409_GPIO_ON
,
119 .inversion
= S5H1409_INVERSION_OFF
,
120 .status_mode
= S5H1409_DEMODLOCKING
,
121 .mpeg_timing
= S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK
,
124 static struct tda10048_config hauppauge_hvr1200_config
= {
125 .demod_address
= 0x10 >> 1,
126 .output_mode
= TDA10048_SERIAL_OUTPUT
,
127 .fwbulkwritelen
= TDA10048_BULKWRITE_200
,
128 .inversion
= TDA10048_INVERSION_ON
,
129 .dtv6_if_freq_khz
= TDA10048_IF_3300
,
130 .dtv7_if_freq_khz
= TDA10048_IF_3800
,
131 .dtv8_if_freq_khz
= TDA10048_IF_4300
,
132 .clk_freq_khz
= TDA10048_CLK_16000
,
135 static struct tda10048_config hauppauge_hvr1210_config
= {
136 .demod_address
= 0x10 >> 1,
137 .output_mode
= TDA10048_SERIAL_OUTPUT
,
138 .fwbulkwritelen
= TDA10048_BULKWRITE_200
,
139 .inversion
= TDA10048_INVERSION_ON
,
140 .dtv6_if_freq_khz
= TDA10048_IF_3300
,
141 .dtv7_if_freq_khz
= TDA10048_IF_3500
,
142 .dtv8_if_freq_khz
= TDA10048_IF_4000
,
143 .clk_freq_khz
= TDA10048_CLK_16000
,
146 static struct s5h1409_config hauppauge_ezqam_config
= {
147 .demod_address
= 0x32 >> 1,
148 .output_mode
= S5H1409_SERIAL_OUTPUT
,
149 .gpio
= S5H1409_GPIO_OFF
,
151 .inversion
= S5H1409_INVERSION_ON
,
152 .status_mode
= S5H1409_DEMODLOCKING
,
153 .mpeg_timing
= S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK
,
156 static struct s5h1409_config hauppauge_hvr1800lp_config
= {
157 .demod_address
= 0x32 >> 1,
158 .output_mode
= S5H1409_SERIAL_OUTPUT
,
159 .gpio
= S5H1409_GPIO_OFF
,
161 .inversion
= S5H1409_INVERSION_OFF
,
162 .status_mode
= S5H1409_DEMODLOCKING
,
163 .mpeg_timing
= S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK
,
166 static struct s5h1409_config hauppauge_hvr1500_config
= {
167 .demod_address
= 0x32 >> 1,
168 .output_mode
= S5H1409_SERIAL_OUTPUT
,
169 .gpio
= S5H1409_GPIO_OFF
,
170 .inversion
= S5H1409_INVERSION_OFF
,
171 .status_mode
= S5H1409_DEMODLOCKING
,
172 .mpeg_timing
= S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK
,
175 static struct mt2131_config hauppauge_generic_tunerconfig
= {
179 static struct lgdt330x_config fusionhdtv_5_express
= {
180 .demod_address
= 0x0e,
181 .demod_chip
= LGDT3303
,
185 static struct s5h1409_config hauppauge_hvr1500q_config
= {
186 .demod_address
= 0x32 >> 1,
187 .output_mode
= S5H1409_SERIAL_OUTPUT
,
188 .gpio
= S5H1409_GPIO_ON
,
190 .inversion
= S5H1409_INVERSION_OFF
,
191 .status_mode
= S5H1409_DEMODLOCKING
,
192 .mpeg_timing
= S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK
,
195 static struct s5h1409_config dvico_s5h1409_config
= {
196 .demod_address
= 0x32 >> 1,
197 .output_mode
= S5H1409_SERIAL_OUTPUT
,
198 .gpio
= S5H1409_GPIO_ON
,
200 .inversion
= S5H1409_INVERSION_OFF
,
201 .status_mode
= S5H1409_DEMODLOCKING
,
202 .mpeg_timing
= S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK
,
205 static struct s5h1411_config dvico_s5h1411_config
= {
206 .output_mode
= S5H1411_SERIAL_OUTPUT
,
207 .gpio
= S5H1411_GPIO_ON
,
208 .qam_if
= S5H1411_IF_44000
,
209 .vsb_if
= S5H1411_IF_44000
,
210 .inversion
= S5H1411_INVERSION_OFF
,
211 .status_mode
= S5H1411_DEMODLOCKING
,
212 .mpeg_timing
= S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK
,
215 static struct s5h1411_config hcw_s5h1411_config
= {
216 .output_mode
= S5H1411_SERIAL_OUTPUT
,
217 .gpio
= S5H1411_GPIO_OFF
,
218 .vsb_if
= S5H1411_IF_44000
,
219 .qam_if
= S5H1411_IF_4000
,
220 .inversion
= S5H1411_INVERSION_ON
,
221 .status_mode
= S5H1411_DEMODLOCKING
,
222 .mpeg_timing
= S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK
,
225 static struct xc5000_config hauppauge_hvr1500q_tunerconfig
= {
230 static struct xc5000_config dvico_xc5000_tunerconfig
= {
235 static struct tda829x_config tda829x_no_probe
= {
236 .probe_tuner
= TDA829X_DONT_PROBE
,
239 static struct tda18271_std_map hauppauge_tda18271_std_map
= {
240 .atsc_6
= { .if_freq
= 5380, .agc_mode
= 3, .std
= 3,
241 .if_lvl
= 6, .rfagc_top
= 0x37 },
242 .qam_6
= { .if_freq
= 4000, .agc_mode
= 3, .std
= 0,
243 .if_lvl
= 6, .rfagc_top
= 0x37 },
246 static struct tda18271_std_map hauppauge_hvr1200_tda18271_std_map
= {
247 .dvbt_6
= { .if_freq
= 3300, .agc_mode
= 3, .std
= 4,
248 .if_lvl
= 1, .rfagc_top
= 0x37, },
249 .dvbt_7
= { .if_freq
= 3800, .agc_mode
= 3, .std
= 5,
250 .if_lvl
= 1, .rfagc_top
= 0x37, },
251 .dvbt_8
= { .if_freq
= 4300, .agc_mode
= 3, .std
= 6,
252 .if_lvl
= 1, .rfagc_top
= 0x37, },
255 static struct tda18271_config hauppauge_tda18271_config
= {
256 .std_map
= &hauppauge_tda18271_std_map
,
257 .gate
= TDA18271_GATE_ANALOG
,
258 .output_opt
= TDA18271_OUTPUT_LT_OFF
,
261 static struct tda18271_config hauppauge_hvr1200_tuner_config
= {
262 .std_map
= &hauppauge_hvr1200_tda18271_std_map
,
263 .gate
= TDA18271_GATE_ANALOG
,
264 .output_opt
= TDA18271_OUTPUT_LT_OFF
,
267 static struct tda18271_config hauppauge_hvr1210_tuner_config
= {
268 .gate
= TDA18271_GATE_DIGITAL
,
269 .output_opt
= TDA18271_OUTPUT_LT_OFF
,
272 static struct tda18271_std_map hauppauge_hvr127x_std_map
= {
273 .atsc_6
= { .if_freq
= 3250, .agc_mode
= 3, .std
= 4,
274 .if_lvl
= 1, .rfagc_top
= 0x58 },
275 .qam_6
= { .if_freq
= 4000, .agc_mode
= 3, .std
= 5,
276 .if_lvl
= 1, .rfagc_top
= 0x58 },
279 static struct tda18271_config hauppauge_hvr127x_config
= {
280 .std_map
= &hauppauge_hvr127x_std_map
,
281 .output_opt
= TDA18271_OUTPUT_LT_OFF
,
284 static struct lgdt3305_config hauppauge_lgdt3305_config
= {
286 .mpeg_mode
= LGDT3305_MPEG_SERIAL
,
287 .tpclk_edge
= LGDT3305_TPCLK_FALLING_EDGE
,
288 .tpvalid_polarity
= LGDT3305_TP_VALID_HIGH
,
290 .spectral_inversion
= 1,
295 static struct dibx000_agc_config xc3028_agc_config
= {
296 BAND_VHF
| BAND_UHF
, /* band_caps */
298 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
299 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
300 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0,
301 * P_agc_nb_est=2, P_agc_write=0
303 (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) |
304 (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */
307 21, /* time_stabiliz */
319 39718, /* agc2_max */
328 29, /* agc2_slope1 */
329 29, /* agc2_slope2 */
336 1, /* perform_agc_softsplit */
339 /* PLL Configuration for COFDM BW_MHz = 8.000000
340 * With external clock = 30.000000 */
341 static struct dibx000_bandwidth_config xc3028_bw_config
= {
342 60000, /* internal */
343 30000, /* sampling */
344 1, /* pll_cfg: prediv */
345 8, /* pll_cfg: ratio */
346 3, /* pll_cfg: range */
347 1, /* pll_cfg: reset */
348 0, /* pll_cfg: bypass */
349 0, /* misc: refdiv */
350 0, /* misc: bypclk_div */
351 1, /* misc: IO_CLK_en_core */
352 1, /* misc: ADClkSrc */
353 0, /* misc: modulo */
354 (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
355 (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
357 30000000 /* xtal_hz */
360 static struct dib7000p_config hauppauge_hvr1400_dib7000_config
= {
361 .output_mpeg2_in_188_bytes
= 1,
362 .hostbus_diversity
= 1,
363 .tuner_is_baseband
= 0,
366 .agc_config_count
= 1,
367 .agc
= &xc3028_agc_config
,
368 .bw
= &xc3028_bw_config
,
370 .gpio_dir
= DIB7000P_GPIO_DEFAULT_DIRECTIONS
,
371 .gpio_val
= DIB7000P_GPIO_DEFAULT_VALUES
,
372 .gpio_pwm_pos
= DIB7000P_GPIO_DEFAULT_PWM_POS
,
378 .output_mode
= OUTMODE_MPEG2_SERIAL
,
381 static struct zl10353_config dvico_fusionhdtv_xc3028
= {
382 .demod_address
= 0x0f,
385 .disable_i2c_gate_ctrl
= 1,
388 static struct stv0900_reg stv0900_ts_regs
[] = {
389 { R0900_TSGENERAL
, 0x00 },
390 { R0900_P1_TSSPEED
, 0x40 },
391 { R0900_P2_TSSPEED
, 0x40 },
392 { R0900_P1_TSCFGM
, 0xc0 },
393 { R0900_P2_TSCFGM
, 0xc0 },
394 { R0900_P1_TSCFGH
, 0xe0 },
395 { R0900_P2_TSCFGH
, 0xe0 },
396 { R0900_P1_TSCFGL
, 0x20 },
397 { R0900_P2_TSCFGL
, 0x20 },
398 { 0xffff, 0xff }, /* terminate */
401 static struct stv0900_config netup_stv0900_config
= {
402 .demod_address
= 0x68,
404 .clkmode
= 3,/* 0-CLKI, 2-XTALI, else AUTO */
405 .diseqc_mode
= 2,/* 2/3 PWM */
406 .ts_config_regs
= stv0900_ts_regs
,
407 .tun1_maddress
= 0,/* 0x60 */
408 .tun2_maddress
= 3,/* 0x63 */
409 .tun1_adc
= 1,/* 1 Vpp */
410 .tun2_adc
= 1,/* 1 Vpp */
413 static struct stv6110_config netup_stv6110_tunerconfig_a
= {
419 static struct stv6110_config netup_stv6110_tunerconfig_b
= {
425 static int tbs_set_voltage(struct dvb_frontend
*fe
, fe_sec_voltage_t voltage
)
427 struct cx23885_tsport
*port
= fe
->dvb
->priv
;
428 struct cx23885_dev
*dev
= port
->dev
;
430 if (voltage
== SEC_VOLTAGE_18
)
431 cx_write(MC417_RWD
, 0x00001e00);/* GPIO-13 high */
432 else if (voltage
== SEC_VOLTAGE_13
)
433 cx_write(MC417_RWD
, 0x00001a00);/* GPIO-13 low */
435 cx_write(MC417_RWD
, 0x00001800);/* GPIO-12 low */
439 static struct cx24116_config tbs_cx24116_config
= {
440 .demod_address
= 0x05,
443 static struct cx24116_config tevii_cx24116_config
= {
444 .demod_address
= 0x55,
447 static struct cx24116_config dvbworld_cx24116_config
= {
448 .demod_address
= 0x05,
451 static struct lgs8gxx_config mygica_x8506_lgs8gl5_config
= {
452 .prod
= LGS8GXX_PROD_LGS8GL5
,
453 .demod_address
= 0x19,
457 .if_clk_freq
= 30400, /* 30.4 MHz */
458 .if_freq
= 5380, /* 5.38 MHz */
465 static struct xc5000_config mygica_x8506_xc5000_config
= {
470 static int cx23885_dvb_set_frontend(struct dvb_frontend
*fe
,
471 struct dvb_frontend_parameters
*param
)
473 struct cx23885_tsport
*port
= fe
->dvb
->priv
;
474 struct cx23885_dev
*dev
= port
->dev
;
476 switch (dev
->board
) {
477 case CX23885_BOARD_HAUPPAUGE_HVR1275
:
478 switch (param
->u
.vsb
.modulation
) {
480 cx23885_gpio_clear(dev
, GPIO_5
);
485 cx23885_gpio_set(dev
, GPIO_5
);
493 static int cx23885_dvb_fe_ioctl_override(struct dvb_frontend
*fe
,
494 unsigned int cmd
, void *parg
,
500 case DVB_FE_IOCTL_PRE
:
503 case FE_SET_FRONTEND
:
504 err
= cx23885_dvb_set_frontend(fe
,
505 (struct dvb_frontend_parameters
*) parg
);
510 case DVB_FE_IOCTL_POST
:
511 /* no post-ioctl handling required */
518 static struct lgs8gxx_config magicpro_prohdtve2_lgs8g75_config
= {
519 .prod
= LGS8GXX_PROD_LGS8G75
,
520 .demod_address
= 0x19,
524 .if_clk_freq
= 30400, /* 30.4 MHz */
525 .if_freq
= 6500, /* 6.50 MHz */
529 .adc_vpp
= 2, /* 1.6 Vpp */
533 static struct xc5000_config magicpro_prohdtve2_xc5000_config
= {
538 static int dvb_register(struct cx23885_tsport
*port
)
540 struct cx23885_dev
*dev
= port
->dev
;
541 struct cx23885_i2c
*i2c_bus
= NULL
, *i2c_bus2
= NULL
;
542 struct videobuf_dvb_frontend
*fe0
;
545 /* Get the first frontend */
546 fe0
= videobuf_dvb_get_frontend(&port
->frontends
, 1);
550 /* init struct videobuf_dvb */
551 fe0
->dvb
.name
= dev
->name
;
554 switch (dev
->board
) {
555 case CX23885_BOARD_HAUPPAUGE_HVR1250
:
556 i2c_bus
= &dev
->i2c_bus
[0];
557 fe0
->dvb
.frontend
= dvb_attach(s5h1409_attach
,
558 &hauppauge_generic_config
,
560 if (fe0
->dvb
.frontend
!= NULL
) {
561 dvb_attach(mt2131_attach
, fe0
->dvb
.frontend
,
563 &hauppauge_generic_tunerconfig
, 0);
566 case CX23885_BOARD_HAUPPAUGE_HVR1270
:
567 case CX23885_BOARD_HAUPPAUGE_HVR1275
:
568 i2c_bus
= &dev
->i2c_bus
[0];
569 fe0
->dvb
.frontend
= dvb_attach(lgdt3305_attach
,
570 &hauppauge_lgdt3305_config
,
572 if (fe0
->dvb
.frontend
!= NULL
) {
573 dvb_attach(tda18271_attach
, fe0
->dvb
.frontend
,
574 0x60, &dev
->i2c_bus
[1].i2c_adap
,
575 &hauppauge_hvr127x_config
);
578 case CX23885_BOARD_HAUPPAUGE_HVR1255
:
579 i2c_bus
= &dev
->i2c_bus
[0];
580 fe0
->dvb
.frontend
= dvb_attach(s5h1411_attach
,
583 if (fe0
->dvb
.frontend
!= NULL
) {
584 dvb_attach(tda18271_attach
, fe0
->dvb
.frontend
,
585 0x60, &dev
->i2c_bus
[1].i2c_adap
,
586 &hauppauge_tda18271_config
);
589 case CX23885_BOARD_HAUPPAUGE_HVR1800
:
590 i2c_bus
= &dev
->i2c_bus
[0];
594 dvb_attach(s5h1409_attach
,
595 &hauppauge_ezqam_config
,
597 if (fe0
->dvb
.frontend
!= NULL
) {
598 dvb_attach(tda829x_attach
, fe0
->dvb
.frontend
,
599 &dev
->i2c_bus
[1].i2c_adap
, 0x42,
601 dvb_attach(tda18271_attach
, fe0
->dvb
.frontend
,
602 0x60, &dev
->i2c_bus
[1].i2c_adap
,
603 &hauppauge_tda18271_config
);
609 dvb_attach(s5h1409_attach
,
610 &hauppauge_generic_config
,
612 if (fe0
->dvb
.frontend
!= NULL
)
613 dvb_attach(mt2131_attach
, fe0
->dvb
.frontend
,
615 &hauppauge_generic_tunerconfig
, 0);
619 case CX23885_BOARD_HAUPPAUGE_HVR1800lp
:
620 i2c_bus
= &dev
->i2c_bus
[0];
621 fe0
->dvb
.frontend
= dvb_attach(s5h1409_attach
,
622 &hauppauge_hvr1800lp_config
,
624 if (fe0
->dvb
.frontend
!= NULL
) {
625 dvb_attach(mt2131_attach
, fe0
->dvb
.frontend
,
627 &hauppauge_generic_tunerconfig
, 0);
630 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP
:
631 i2c_bus
= &dev
->i2c_bus
[0];
632 fe0
->dvb
.frontend
= dvb_attach(lgdt330x_attach
,
633 &fusionhdtv_5_express
,
635 if (fe0
->dvb
.frontend
!= NULL
) {
636 dvb_attach(simple_tuner_attach
, fe0
->dvb
.frontend
,
637 &i2c_bus
->i2c_adap
, 0x61,
638 TUNER_LG_TDVS_H06XF
);
641 case CX23885_BOARD_HAUPPAUGE_HVR1500Q
:
642 i2c_bus
= &dev
->i2c_bus
[1];
643 fe0
->dvb
.frontend
= dvb_attach(s5h1409_attach
,
644 &hauppauge_hvr1500q_config
,
645 &dev
->i2c_bus
[0].i2c_adap
);
646 if (fe0
->dvb
.frontend
!= NULL
)
647 dvb_attach(xc5000_attach
, fe0
->dvb
.frontend
,
649 &hauppauge_hvr1500q_tunerconfig
);
651 case CX23885_BOARD_HAUPPAUGE_HVR1500
:
652 i2c_bus
= &dev
->i2c_bus
[1];
653 fe0
->dvb
.frontend
= dvb_attach(s5h1409_attach
,
654 &hauppauge_hvr1500_config
,
655 &dev
->i2c_bus
[0].i2c_adap
);
656 if (fe0
->dvb
.frontend
!= NULL
) {
657 struct dvb_frontend
*fe
;
658 struct xc2028_config cfg
= {
659 .i2c_adap
= &i2c_bus
->i2c_adap
,
662 static struct xc2028_ctrl ctl
= {
663 .fname
= XC2028_DEFAULT_FIRMWARE
,
665 .demod
= XC3028_FE_OREN538
,
668 fe
= dvb_attach(xc2028_attach
,
669 fe0
->dvb
.frontend
, &cfg
);
670 if (fe
!= NULL
&& fe
->ops
.tuner_ops
.set_config
!= NULL
)
671 fe
->ops
.tuner_ops
.set_config(fe
, &ctl
);
674 case CX23885_BOARD_HAUPPAUGE_HVR1200
:
675 case CX23885_BOARD_HAUPPAUGE_HVR1700
:
676 i2c_bus
= &dev
->i2c_bus
[0];
677 fe0
->dvb
.frontend
= dvb_attach(tda10048_attach
,
678 &hauppauge_hvr1200_config
,
680 if (fe0
->dvb
.frontend
!= NULL
) {
681 dvb_attach(tda829x_attach
, fe0
->dvb
.frontend
,
682 &dev
->i2c_bus
[1].i2c_adap
, 0x42,
684 dvb_attach(tda18271_attach
, fe0
->dvb
.frontend
,
685 0x60, &dev
->i2c_bus
[1].i2c_adap
,
686 &hauppauge_hvr1200_tuner_config
);
689 case CX23885_BOARD_HAUPPAUGE_HVR1210
:
690 i2c_bus
= &dev
->i2c_bus
[0];
691 fe0
->dvb
.frontend
= dvb_attach(tda10048_attach
,
692 &hauppauge_hvr1210_config
,
694 if (fe0
->dvb
.frontend
!= NULL
) {
695 dvb_attach(tda18271_attach
, fe0
->dvb
.frontend
,
696 0x60, &dev
->i2c_bus
[1].i2c_adap
,
697 &hauppauge_hvr1210_tuner_config
);
700 case CX23885_BOARD_HAUPPAUGE_HVR1400
:
701 i2c_bus
= &dev
->i2c_bus
[0];
702 fe0
->dvb
.frontend
= dvb_attach(dib7000p_attach
,
704 0x12, &hauppauge_hvr1400_dib7000_config
);
705 if (fe0
->dvb
.frontend
!= NULL
) {
706 struct dvb_frontend
*fe
;
707 struct xc2028_config cfg
= {
708 .i2c_adap
= &dev
->i2c_bus
[1].i2c_adap
,
711 static struct xc2028_ctrl ctl
= {
712 .fname
= XC3028L_DEFAULT_FIRMWARE
,
715 /* This is true for all demods with
717 .type
= XC2028_D2633
,
720 fe
= dvb_attach(xc2028_attach
,
721 fe0
->dvb
.frontend
, &cfg
);
722 if (fe
!= NULL
&& fe
->ops
.tuner_ops
.set_config
!= NULL
)
723 fe
->ops
.tuner_ops
.set_config(fe
, &ctl
);
726 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP
:
727 i2c_bus
= &dev
->i2c_bus
[port
->nr
- 1];
729 fe0
->dvb
.frontend
= dvb_attach(s5h1409_attach
,
730 &dvico_s5h1409_config
,
732 if (fe0
->dvb
.frontend
== NULL
)
733 fe0
->dvb
.frontend
= dvb_attach(s5h1411_attach
,
734 &dvico_s5h1411_config
,
736 if (fe0
->dvb
.frontend
!= NULL
)
737 dvb_attach(xc5000_attach
, fe0
->dvb
.frontend
,
739 &dvico_xc5000_tunerconfig
);
741 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP
: {
742 i2c_bus
= &dev
->i2c_bus
[port
->nr
- 1];
744 fe0
->dvb
.frontend
= dvb_attach(zl10353_attach
,
745 &dvico_fusionhdtv_xc3028
,
747 if (fe0
->dvb
.frontend
!= NULL
) {
748 struct dvb_frontend
*fe
;
749 struct xc2028_config cfg
= {
750 .i2c_adap
= &i2c_bus
->i2c_adap
,
753 static struct xc2028_ctrl ctl
= {
754 .fname
= XC2028_DEFAULT_FIRMWARE
,
756 .demod
= XC3028_FE_ZARLINK456
,
759 fe
= dvb_attach(xc2028_attach
, fe0
->dvb
.frontend
,
761 if (fe
!= NULL
&& fe
->ops
.tuner_ops
.set_config
!= NULL
)
762 fe
->ops
.tuner_ops
.set_config(fe
, &ctl
);
766 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H
:
767 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F
:
768 case CX23885_BOARD_COMPRO_VIDEOMATE_E800
:
769 i2c_bus
= &dev
->i2c_bus
[0];
771 fe0
->dvb
.frontend
= dvb_attach(zl10353_attach
,
772 &dvico_fusionhdtv_xc3028
,
774 if (fe0
->dvb
.frontend
!= NULL
) {
775 struct dvb_frontend
*fe
;
776 struct xc2028_config cfg
= {
777 .i2c_adap
= &dev
->i2c_bus
[1].i2c_adap
,
780 static struct xc2028_ctrl ctl
= {
781 .fname
= XC2028_DEFAULT_FIRMWARE
,
783 .demod
= XC3028_FE_ZARLINK456
,
786 fe
= dvb_attach(xc2028_attach
, fe0
->dvb
.frontend
,
788 if (fe
!= NULL
&& fe
->ops
.tuner_ops
.set_config
!= NULL
)
789 fe
->ops
.tuner_ops
.set_config(fe
, &ctl
);
792 case CX23885_BOARD_TBS_6920
:
793 i2c_bus
= &dev
->i2c_bus
[0];
795 fe0
->dvb
.frontend
= dvb_attach(cx24116_attach
,
798 if (fe0
->dvb
.frontend
!= NULL
)
799 fe0
->dvb
.frontend
->ops
.set_voltage
= tbs_set_voltage
;
802 case CX23885_BOARD_TEVII_S470
:
803 i2c_bus
= &dev
->i2c_bus
[1];
805 fe0
->dvb
.frontend
= dvb_attach(cx24116_attach
,
806 &tevii_cx24116_config
,
808 if (fe0
->dvb
.frontend
!= NULL
)
809 fe0
->dvb
.frontend
->ops
.set_voltage
= tbs_set_voltage
;
812 case CX23885_BOARD_DVBWORLD_2005
:
813 i2c_bus
= &dev
->i2c_bus
[1];
815 fe0
->dvb
.frontend
= dvb_attach(cx24116_attach
,
816 &dvbworld_cx24116_config
,
819 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI
:
820 i2c_bus
= &dev
->i2c_bus
[0];
824 fe0
->dvb
.frontend
= dvb_attach(stv0900_attach
,
825 &netup_stv0900_config
,
826 &i2c_bus
->i2c_adap
, 0);
827 if (fe0
->dvb
.frontend
!= NULL
) {
828 if (dvb_attach(stv6110_attach
,
830 &netup_stv6110_tunerconfig_a
,
831 &i2c_bus
->i2c_adap
)) {
832 if (!dvb_attach(lnbh24_attach
,
838 "No LNBH24 found!\n");
845 fe0
->dvb
.frontend
= dvb_attach(stv0900_attach
,
846 &netup_stv0900_config
,
847 &i2c_bus
->i2c_adap
, 1);
848 if (fe0
->dvb
.frontend
!= NULL
) {
849 if (dvb_attach(stv6110_attach
,
851 &netup_stv6110_tunerconfig_b
,
852 &i2c_bus
->i2c_adap
)) {
853 if (!dvb_attach(lnbh24_attach
,
859 "No LNBH24 found!\n");
866 case CX23885_BOARD_MYGICA_X8506
:
867 i2c_bus
= &dev
->i2c_bus
[0];
868 i2c_bus2
= &dev
->i2c_bus
[1];
869 fe0
->dvb
.frontend
= dvb_attach(lgs8gxx_attach
,
870 &mygica_x8506_lgs8gl5_config
,
872 if (fe0
->dvb
.frontend
!= NULL
) {
873 dvb_attach(xc5000_attach
,
876 &mygica_x8506_xc5000_config
);
879 case CX23885_BOARD_MAGICPRO_PROHDTVE2
:
880 i2c_bus
= &dev
->i2c_bus
[0];
881 i2c_bus2
= &dev
->i2c_bus
[1];
882 fe0
->dvb
.frontend
= dvb_attach(lgs8gxx_attach
,
883 &magicpro_prohdtve2_lgs8g75_config
,
885 if (fe0
->dvb
.frontend
!= NULL
) {
886 dvb_attach(xc5000_attach
,
889 &magicpro_prohdtve2_xc5000_config
);
892 case CX23885_BOARD_HAUPPAUGE_HVR1850
:
893 i2c_bus
= &dev
->i2c_bus
[0];
894 fe0
->dvb
.frontend
= dvb_attach(s5h1411_attach
,
897 if (fe0
->dvb
.frontend
!= NULL
)
898 dvb_attach(tda18271_attach
, fe0
->dvb
.frontend
,
899 0x60, &dev
->i2c_bus
[0].i2c_adap
,
900 &hauppauge_tda18271_config
);
904 printk(KERN_INFO
"%s: The frontend of your DVB/ATSC card "
905 " isn't supported yet\n",
909 if (NULL
== fe0
->dvb
.frontend
) {
910 printk(KERN_ERR
"%s: frontend initialization failed\n",
914 /* define general-purpose callback pointer */
915 fe0
->dvb
.frontend
->callback
= cx23885_tuner_callback
;
917 /* Put the analog decoder in standby to keep it quiet */
918 call_all(dev
, tuner
, s_standby
);
920 if (fe0
->dvb
.frontend
->ops
.analog_ops
.standby
)
921 fe0
->dvb
.frontend
->ops
.analog_ops
.standby(fe0
->dvb
.frontend
);
923 /* register everything */
924 ret
= videobuf_dvb_register_bus(&port
->frontends
, THIS_MODULE
, port
,
925 &dev
->pci
->dev
, adapter_nr
, 0,
926 cx23885_dvb_fe_ioctl_override
);
929 switch (dev
->board
) {
930 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI
: {
931 static struct netup_card_info cinfo
;
933 netup_get_card_info(&dev
->i2c_bus
[0].i2c_adap
, &cinfo
);
934 memcpy(port
->frontends
.adapter
.proposed_mac
,
935 cinfo
.port
[port
->nr
- 1].mac
, 6);
936 printk(KERN_INFO
"NetUP Dual DVB-S2 CI card port%d MAC="
937 "%02X:%02X:%02X:%02X:%02X:%02X\n",
939 port
->frontends
.adapter
.proposed_mac
[0],
940 port
->frontends
.adapter
.proposed_mac
[1],
941 port
->frontends
.adapter
.proposed_mac
[2],
942 port
->frontends
.adapter
.proposed_mac
[3],
943 port
->frontends
.adapter
.proposed_mac
[4],
944 port
->frontends
.adapter
.proposed_mac
[5]);
954 int cx23885_dvb_register(struct cx23885_tsport
*port
)
957 struct videobuf_dvb_frontend
*fe0
;
958 struct cx23885_dev
*dev
= port
->dev
;
961 /* Here we need to allocate the correct number of frontends,
962 * as reflected in the cards struct. The reality is that currrently
963 * no cx23885 boards support this - yet. But, if we don't modify this
964 * code then the second frontend would never be allocated (later)
965 * and fail with error before the attach in dvb_register().
966 * Without these changes we risk an OOPS later. The changes here
967 * are for safety, and should provide a good foundation for the
968 * future addition of any multi-frontend cx23885 based boards.
970 printk(KERN_INFO
"%s() allocating %d frontend(s)\n", __func__
,
971 port
->num_frontends
);
973 for (i
= 1; i
<= port
->num_frontends
; i
++) {
974 if (videobuf_dvb_alloc_frontend(
975 &port
->frontends
, i
) == NULL
) {
976 printk(KERN_ERR
"%s() failed to alloc\n", __func__
);
980 fe0
= videobuf_dvb_get_frontend(&port
->frontends
, i
);
984 dprintk(1, "%s\n", __func__
);
985 dprintk(1, " ->probed by Card=%d Name=%s, PCI %02x:%02x\n",
994 /* We have to init the queue for each frontend on a port. */
995 printk(KERN_INFO
"%s: cx23885 based dvb card\n", dev
->name
);
996 videobuf_queue_sg_init(&fe0
->dvb
.dvbq
, &dvb_qops
,
997 &dev
->pci
->dev
, &port
->slock
,
998 V4L2_BUF_TYPE_VIDEO_CAPTURE
, V4L2_FIELD_TOP
,
999 sizeof(struct cx23885_buffer
), port
);
1001 err
= dvb_register(port
);
1003 printk(KERN_ERR
"%s() dvb_register failed err = %d\n",
1009 int cx23885_dvb_unregister(struct cx23885_tsport
*port
)
1011 struct videobuf_dvb_frontend
*fe0
;
1013 /* FIXME: in an error condition where the we have
1014 * an expected number of frontends (attach problem)
1015 * then this might not clean up correctly, if 1
1017 * This comment only applies to future boards IF they
1018 * implement MFE support.
1020 fe0
= videobuf_dvb_get_frontend(&port
->frontends
, 1);
1021 if (fe0
->dvb
.frontend
)
1022 videobuf_dvb_unregister_bus(&port
->frontends
);
1024 switch (port
->dev
->board
) {
1025 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI
:
1026 netup_ci_exit(port
);