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V4L/DVB (12439): cx88: add support for WinFast DTV2000H rev. J
[deliverable/linux.git] / drivers / media / video / cx88 / cx88-dvb.c
1 /*
2 *
3 * device driver for Conexant 2388x based TV cards
4 * MPEG Transport Stream (DVB) routines
5 *
6 * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
7 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24 #include <linux/module.h>
25 #include <linux/init.h>
26 #include <linux/device.h>
27 #include <linux/fs.h>
28 #include <linux/kthread.h>
29 #include <linux/file.h>
30 #include <linux/suspend.h>
31
32 #include "cx88.h"
33 #include "dvb-pll.h"
34 #include <media/v4l2-common.h>
35
36 #include "mt352.h"
37 #include "mt352_priv.h"
38 #include "cx88-vp3054-i2c.h"
39 #include "zl10353.h"
40 #include "cx22702.h"
41 #include "or51132.h"
42 #include "lgdt330x.h"
43 #include "s5h1409.h"
44 #include "xc5000.h"
45 #include "nxt200x.h"
46 #include "cx24123.h"
47 #include "isl6421.h"
48 #include "tuner-simple.h"
49 #include "tda9887.h"
50 #include "s5h1411.h"
51 #include "stv0299.h"
52 #include "z0194a.h"
53 #include "stv0288.h"
54 #include "stb6000.h"
55 #include "cx24116.h"
56
57 MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
58 MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
59 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
60 MODULE_LICENSE("GPL");
61
62 static unsigned int debug;
63 module_param(debug, int, 0644);
64 MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
65
66 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
67
68 #define dprintk(level,fmt, arg...) if (debug >= level) \
69 printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
70
71 /* ------------------------------------------------------------------ */
72
73 static int dvb_buf_setup(struct videobuf_queue *q,
74 unsigned int *count, unsigned int *size)
75 {
76 struct cx8802_dev *dev = q->priv_data;
77
78 dev->ts_packet_size = 188 * 4;
79 dev->ts_packet_count = 32;
80
81 *size = dev->ts_packet_size * dev->ts_packet_count;
82 *count = 32;
83 return 0;
84 }
85
86 static int dvb_buf_prepare(struct videobuf_queue *q,
87 struct videobuf_buffer *vb, enum v4l2_field field)
88 {
89 struct cx8802_dev *dev = q->priv_data;
90 return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
91 }
92
93 static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
94 {
95 struct cx8802_dev *dev = q->priv_data;
96 cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
97 }
98
99 static void dvb_buf_release(struct videobuf_queue *q,
100 struct videobuf_buffer *vb)
101 {
102 cx88_free_buffer(q, (struct cx88_buffer*)vb);
103 }
104
105 static struct videobuf_queue_ops dvb_qops = {
106 .buf_setup = dvb_buf_setup,
107 .buf_prepare = dvb_buf_prepare,
108 .buf_queue = dvb_buf_queue,
109 .buf_release = dvb_buf_release,
110 };
111
112 /* ------------------------------------------------------------------ */
113
114 static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
115 {
116 struct cx8802_dev *dev= fe->dvb->priv;
117 struct cx8802_driver *drv = NULL;
118 int ret = 0;
119 int fe_id;
120
121 fe_id = videobuf_dvb_find_frontend(&dev->frontends, fe);
122 if (!fe_id) {
123 printk(KERN_ERR "%s() No frontend found\n", __func__);
124 return -EINVAL;
125 }
126
127 drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
128 if (drv) {
129 if (acquire){
130 dev->frontends.active_fe_id = fe_id;
131 ret = drv->request_acquire(drv);
132 } else {
133 ret = drv->request_release(drv);
134 dev->frontends.active_fe_id = 0;
135 }
136 }
137
138 return ret;
139 }
140
141 static void cx88_dvb_gate_ctrl(struct cx88_core *core, int open)
142 {
143 struct videobuf_dvb_frontends *f;
144 struct videobuf_dvb_frontend *fe;
145
146 if (!core->dvbdev)
147 return;
148
149 f = &core->dvbdev->frontends;
150
151 if (!f)
152 return;
153
154 if (f->gate <= 1) /* undefined or fe0 */
155 fe = videobuf_dvb_get_frontend(f, 1);
156 else
157 fe = videobuf_dvb_get_frontend(f, f->gate);
158
159 if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
160 fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
161 }
162
163 /* ------------------------------------------------------------------ */
164
165 static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
166 {
167 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
168 static u8 reset [] = { RESET, 0x80 };
169 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
170 static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
171 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
172 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
173
174 mt352_write(fe, clock_config, sizeof(clock_config));
175 udelay(200);
176 mt352_write(fe, reset, sizeof(reset));
177 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
178
179 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
180 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
181 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
182 return 0;
183 }
184
185 static int dvico_dual_demod_init(struct dvb_frontend *fe)
186 {
187 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
188 static u8 reset [] = { RESET, 0x80 };
189 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
190 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
191 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
192 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
193
194 mt352_write(fe, clock_config, sizeof(clock_config));
195 udelay(200);
196 mt352_write(fe, reset, sizeof(reset));
197 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
198
199 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
200 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
201 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
202
203 return 0;
204 }
205
206 static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
207 {
208 static u8 clock_config [] = { 0x89, 0x38, 0x39 };
209 static u8 reset [] = { 0x50, 0x80 };
210 static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
211 static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
212 0x00, 0xFF, 0x00, 0x40, 0x40 };
213 static u8 dntv_extra[] = { 0xB5, 0x7A };
214 static u8 capt_range_cfg[] = { 0x75, 0x32 };
215
216 mt352_write(fe, clock_config, sizeof(clock_config));
217 udelay(2000);
218 mt352_write(fe, reset, sizeof(reset));
219 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
220
221 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
222 udelay(2000);
223 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
224 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
225
226 return 0;
227 }
228
229 static struct mt352_config dvico_fusionhdtv = {
230 .demod_address = 0x0f,
231 .demod_init = dvico_fusionhdtv_demod_init,
232 };
233
234 static struct mt352_config dntv_live_dvbt_config = {
235 .demod_address = 0x0f,
236 .demod_init = dntv_live_dvbt_demod_init,
237 };
238
239 static struct mt352_config dvico_fusionhdtv_dual = {
240 .demod_address = 0x0f,
241 .demod_init = dvico_dual_demod_init,
242 };
243
244 static struct zl10353_config cx88_terratec_cinergy_ht_pci_mkii_config = {
245 .demod_address = (0x1e >> 1),
246 .no_tuner = 1,
247 .if2 = 45600,
248 };
249
250 #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
251 static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
252 {
253 static u8 clock_config [] = { 0x89, 0x38, 0x38 };
254 static u8 reset [] = { 0x50, 0x80 };
255 static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
256 static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
257 0x00, 0xFF, 0x00, 0x40, 0x40 };
258 static u8 dntv_extra[] = { 0xB5, 0x7A };
259 static u8 capt_range_cfg[] = { 0x75, 0x32 };
260
261 mt352_write(fe, clock_config, sizeof(clock_config));
262 udelay(2000);
263 mt352_write(fe, reset, sizeof(reset));
264 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
265
266 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
267 udelay(2000);
268 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
269 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
270
271 return 0;
272 }
273
274 static struct mt352_config dntv_live_dvbt_pro_config = {
275 .demod_address = 0x0f,
276 .no_tuner = 1,
277 .demod_init = dntv_live_dvbt_pro_demod_init,
278 };
279 #endif
280
281 static struct zl10353_config dvico_fusionhdtv_hybrid = {
282 .demod_address = 0x0f,
283 .no_tuner = 1,
284 };
285
286 static struct zl10353_config dvico_fusionhdtv_xc3028 = {
287 .demod_address = 0x0f,
288 .if2 = 45600,
289 .no_tuner = 1,
290 };
291
292 static struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
293 .demod_address = 0x0f,
294 .if2 = 4560,
295 .no_tuner = 1,
296 .demod_init = dvico_fusionhdtv_demod_init,
297 };
298
299 static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
300 .demod_address = 0x0f,
301 };
302
303 static struct cx22702_config connexant_refboard_config = {
304 .demod_address = 0x43,
305 .output_mode = CX22702_SERIAL_OUTPUT,
306 };
307
308 static struct cx22702_config hauppauge_hvr_config = {
309 .demod_address = 0x63,
310 .output_mode = CX22702_SERIAL_OUTPUT,
311 };
312
313 static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
314 {
315 struct cx8802_dev *dev= fe->dvb->priv;
316 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
317 return 0;
318 }
319
320 static struct or51132_config pchdtv_hd3000 = {
321 .demod_address = 0x15,
322 .set_ts_params = or51132_set_ts_param,
323 };
324
325 static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
326 {
327 struct cx8802_dev *dev= fe->dvb->priv;
328 struct cx88_core *core = dev->core;
329
330 dprintk(1, "%s: index = %d\n", __func__, index);
331 if (index == 0)
332 cx_clear(MO_GP0_IO, 8);
333 else
334 cx_set(MO_GP0_IO, 8);
335 return 0;
336 }
337
338 static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
339 {
340 struct cx8802_dev *dev= fe->dvb->priv;
341 if (is_punctured)
342 dev->ts_gen_cntrl |= 0x04;
343 else
344 dev->ts_gen_cntrl &= ~0x04;
345 return 0;
346 }
347
348 static struct lgdt330x_config fusionhdtv_3_gold = {
349 .demod_address = 0x0e,
350 .demod_chip = LGDT3302,
351 .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
352 .set_ts_params = lgdt330x_set_ts_param,
353 };
354
355 static struct lgdt330x_config fusionhdtv_5_gold = {
356 .demod_address = 0x0e,
357 .demod_chip = LGDT3303,
358 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
359 .set_ts_params = lgdt330x_set_ts_param,
360 };
361
362 static struct lgdt330x_config pchdtv_hd5500 = {
363 .demod_address = 0x59,
364 .demod_chip = LGDT3303,
365 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
366 .set_ts_params = lgdt330x_set_ts_param,
367 };
368
369 static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
370 {
371 struct cx8802_dev *dev= fe->dvb->priv;
372 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
373 return 0;
374 }
375
376 static struct nxt200x_config ati_hdtvwonder = {
377 .demod_address = 0x0a,
378 .set_ts_params = nxt200x_set_ts_param,
379 };
380
381 static int cx24123_set_ts_param(struct dvb_frontend* fe,
382 int is_punctured)
383 {
384 struct cx8802_dev *dev= fe->dvb->priv;
385 dev->ts_gen_cntrl = 0x02;
386 return 0;
387 }
388
389 static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
390 fe_sec_voltage_t voltage)
391 {
392 struct cx8802_dev *dev= fe->dvb->priv;
393 struct cx88_core *core = dev->core;
394
395 if (voltage == SEC_VOLTAGE_OFF)
396 cx_write(MO_GP0_IO, 0x000006fb);
397 else
398 cx_write(MO_GP0_IO, 0x000006f9);
399
400 if (core->prev_set_voltage)
401 return core->prev_set_voltage(fe, voltage);
402 return 0;
403 }
404
405 static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
406 fe_sec_voltage_t voltage)
407 {
408 struct cx8802_dev *dev= fe->dvb->priv;
409 struct cx88_core *core = dev->core;
410
411 if (voltage == SEC_VOLTAGE_OFF) {
412 dprintk(1,"LNB Voltage OFF\n");
413 cx_write(MO_GP0_IO, 0x0000efff);
414 }
415
416 if (core->prev_set_voltage)
417 return core->prev_set_voltage(fe, voltage);
418 return 0;
419 }
420
421 static int tevii_dvbs_set_voltage(struct dvb_frontend *fe,
422 fe_sec_voltage_t voltage)
423 {
424 struct cx8802_dev *dev= fe->dvb->priv;
425 struct cx88_core *core = dev->core;
426
427 switch (voltage) {
428 case SEC_VOLTAGE_13:
429 printk("LNB Voltage SEC_VOLTAGE_13\n");
430 cx_write(MO_GP0_IO, 0x00006040);
431 break;
432 case SEC_VOLTAGE_18:
433 printk("LNB Voltage SEC_VOLTAGE_18\n");
434 cx_write(MO_GP0_IO, 0x00006060);
435 break;
436 case SEC_VOLTAGE_OFF:
437 printk("LNB Voltage SEC_VOLTAGE_off\n");
438 break;
439 }
440
441 if (core->prev_set_voltage)
442 return core->prev_set_voltage(fe, voltage);
443 return 0;
444 }
445
446 static struct cx24123_config geniatech_dvbs_config = {
447 .demod_address = 0x55,
448 .set_ts_params = cx24123_set_ts_param,
449 };
450
451 static struct cx24123_config hauppauge_novas_config = {
452 .demod_address = 0x55,
453 .set_ts_params = cx24123_set_ts_param,
454 };
455
456 static struct cx24123_config kworld_dvbs_100_config = {
457 .demod_address = 0x15,
458 .set_ts_params = cx24123_set_ts_param,
459 .lnb_polarity = 1,
460 };
461
462 static struct s5h1409_config pinnacle_pctv_hd_800i_config = {
463 .demod_address = 0x32 >> 1,
464 .output_mode = S5H1409_PARALLEL_OUTPUT,
465 .gpio = S5H1409_GPIO_ON,
466 .qam_if = 44000,
467 .inversion = S5H1409_INVERSION_OFF,
468 .status_mode = S5H1409_DEMODLOCKING,
469 .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
470 };
471
472 static struct s5h1409_config dvico_hdtv5_pci_nano_config = {
473 .demod_address = 0x32 >> 1,
474 .output_mode = S5H1409_SERIAL_OUTPUT,
475 .gpio = S5H1409_GPIO_OFF,
476 .inversion = S5H1409_INVERSION_OFF,
477 .status_mode = S5H1409_DEMODLOCKING,
478 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
479 };
480
481 static struct s5h1409_config kworld_atsc_120_config = {
482 .demod_address = 0x32 >> 1,
483 .output_mode = S5H1409_SERIAL_OUTPUT,
484 .gpio = S5H1409_GPIO_OFF,
485 .inversion = S5H1409_INVERSION_OFF,
486 .status_mode = S5H1409_DEMODLOCKING,
487 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
488 };
489
490 static struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
491 .i2c_address = 0x64,
492 .if_khz = 5380,
493 };
494
495 static struct zl10353_config cx88_pinnacle_hybrid_pctv = {
496 .demod_address = (0x1e >> 1),
497 .no_tuner = 1,
498 .if2 = 45600,
499 };
500
501 static struct zl10353_config cx88_geniatech_x8000_mt = {
502 .demod_address = (0x1e >> 1),
503 .no_tuner = 1,
504 .disable_i2c_gate_ctrl = 1,
505 };
506
507 static struct s5h1411_config dvico_fusionhdtv7_config = {
508 .output_mode = S5H1411_SERIAL_OUTPUT,
509 .gpio = S5H1411_GPIO_ON,
510 .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
511 .qam_if = S5H1411_IF_44000,
512 .vsb_if = S5H1411_IF_44000,
513 .inversion = S5H1411_INVERSION_OFF,
514 .status_mode = S5H1411_DEMODLOCKING
515 };
516
517 static struct xc5000_config dvico_fusionhdtv7_tuner_config = {
518 .i2c_address = 0xc2 >> 1,
519 .if_khz = 5380,
520 };
521
522 static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
523 {
524 struct dvb_frontend *fe;
525 struct videobuf_dvb_frontend *fe0 = NULL;
526 struct xc2028_ctrl ctl;
527 struct xc2028_config cfg = {
528 .i2c_adap = &dev->core->i2c_adap,
529 .i2c_addr = addr,
530 .ctrl = &ctl,
531 };
532
533 /* Get the first frontend */
534 fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
535 if (!fe0)
536 return -EINVAL;
537
538 if (!fe0->dvb.frontend) {
539 printk(KERN_ERR "%s/2: dvb frontend not attached. "
540 "Can't attach xc3028\n",
541 dev->core->name);
542 return -EINVAL;
543 }
544
545 /*
546 * Some xc3028 devices may be hidden by an I2C gate. This is known
547 * to happen with some s5h1409-based devices.
548 * Now that I2C gate is open, sets up xc3028 configuration
549 */
550 cx88_setup_xc3028(dev->core, &ctl);
551
552 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg);
553 if (!fe) {
554 printk(KERN_ERR "%s/2: xc3028 attach failed\n",
555 dev->core->name);
556 dvb_frontend_detach(fe0->dvb.frontend);
557 dvb_unregister_frontend(fe0->dvb.frontend);
558 fe0->dvb.frontend = NULL;
559 return -EINVAL;
560 }
561
562 printk(KERN_INFO "%s/2: xc3028 attached\n",
563 dev->core->name);
564
565 return 0;
566 }
567
568 static int cx24116_set_ts_param(struct dvb_frontend *fe,
569 int is_punctured)
570 {
571 struct cx8802_dev *dev = fe->dvb->priv;
572 dev->ts_gen_cntrl = 0x2;
573
574 return 0;
575 }
576
577 static int cx24116_reset_device(struct dvb_frontend *fe)
578 {
579 struct cx8802_dev *dev = fe->dvb->priv;
580 struct cx88_core *core = dev->core;
581
582 /* Reset the part */
583 /* Put the cx24116 into reset */
584 cx_write(MO_SRST_IO, 0);
585 msleep(10);
586 /* Take the cx24116 out of reset */
587 cx_write(MO_SRST_IO, 1);
588 msleep(10);
589
590 return 0;
591 }
592
593 static struct cx24116_config hauppauge_hvr4000_config = {
594 .demod_address = 0x05,
595 .set_ts_params = cx24116_set_ts_param,
596 .reset_device = cx24116_reset_device,
597 };
598
599 static struct cx24116_config tevii_s460_config = {
600 .demod_address = 0x55,
601 .set_ts_params = cx24116_set_ts_param,
602 .reset_device = cx24116_reset_device,
603 };
604
605 static struct stv0299_config tevii_tuner_sharp_config = {
606 .demod_address = 0x68,
607 .inittab = sharp_z0194a_inittab,
608 .mclk = 88000000UL,
609 .invert = 1,
610 .skip_reinit = 0,
611 .lock_output = 1,
612 .volt13_op0_op1 = STV0299_VOLT13_OP1,
613 .min_delay_ms = 100,
614 .set_symbol_rate = sharp_z0194a_set_symbol_rate,
615 .set_ts_params = cx24116_set_ts_param,
616 };
617
618 static struct stv0288_config tevii_tuner_earda_config = {
619 .demod_address = 0x68,
620 .min_delay_ms = 100,
621 .set_ts_params = cx24116_set_ts_param,
622 };
623
624 static int cx8802_alloc_frontends(struct cx8802_dev *dev)
625 {
626 struct cx88_core *core = dev->core;
627 struct videobuf_dvb_frontend *fe = NULL;
628 int i;
629
630 mutex_init(&dev->frontends.lock);
631 INIT_LIST_HEAD(&dev->frontends.felist);
632
633 if (!core->board.num_frontends)
634 return -ENODEV;
635
636 printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
637 core->board.num_frontends);
638 for (i = 1; i <= core->board.num_frontends; i++) {
639 fe = videobuf_dvb_alloc_frontend(&dev->frontends, i);
640 if (!fe) {
641 printk(KERN_ERR "%s() failed to alloc\n", __func__);
642 videobuf_dvb_dealloc_frontends(&dev->frontends);
643 return -ENOMEM;
644 }
645 }
646 return 0;
647 }
648
649 static int dvb_register(struct cx8802_dev *dev)
650 {
651 struct cx88_core *core = dev->core;
652 struct videobuf_dvb_frontend *fe0, *fe1 = NULL;
653 int mfe_shared = 0; /* bus not shared by default */
654
655 if (0 != core->i2c_rc) {
656 printk(KERN_ERR "%s/2: no i2c-bus available, cannot attach dvb drivers\n", core->name);
657 goto frontend_detach;
658 }
659
660 /* Get the first frontend */
661 fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
662 if (!fe0)
663 goto frontend_detach;
664
665 /* multi-frontend gate control is undefined or defaults to fe0 */
666 dev->frontends.gate = 0;
667
668 /* Sets the gate control callback to be used by i2c command calls */
669 core->gate_ctrl = cx88_dvb_gate_ctrl;
670
671 /* init frontend(s) */
672 switch (core->boardnr) {
673 case CX88_BOARD_HAUPPAUGE_DVB_T1:
674 fe0->dvb.frontend = dvb_attach(cx22702_attach,
675 &connexant_refboard_config,
676 &core->i2c_adap);
677 if (fe0->dvb.frontend != NULL) {
678 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
679 0x61, &core->i2c_adap,
680 DVB_PLL_THOMSON_DTT759X))
681 goto frontend_detach;
682 }
683 break;
684 case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
685 case CX88_BOARD_CONEXANT_DVB_T1:
686 case CX88_BOARD_KWORLD_DVB_T_CX22702:
687 case CX88_BOARD_WINFAST_DTV1000:
688 fe0->dvb.frontend = dvb_attach(cx22702_attach,
689 &connexant_refboard_config,
690 &core->i2c_adap);
691 if (fe0->dvb.frontend != NULL) {
692 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
693 0x60, &core->i2c_adap,
694 DVB_PLL_THOMSON_DTT7579))
695 goto frontend_detach;
696 }
697 break;
698 case CX88_BOARD_WINFAST_DTV2000H:
699 case CX88_BOARD_WINFAST_DTV2000H_J:
700 case CX88_BOARD_HAUPPAUGE_HVR1100:
701 case CX88_BOARD_HAUPPAUGE_HVR1100LP:
702 case CX88_BOARD_HAUPPAUGE_HVR1300:
703 fe0->dvb.frontend = dvb_attach(cx22702_attach,
704 &hauppauge_hvr_config,
705 &core->i2c_adap);
706 if (fe0->dvb.frontend != NULL) {
707 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
708 &core->i2c_adap, 0x61,
709 TUNER_PHILIPS_FMD1216ME_MK3))
710 goto frontend_detach;
711 }
712 break;
713 case CX88_BOARD_HAUPPAUGE_HVR3000:
714 /* MFE frontend 1 */
715 mfe_shared = 1;
716 dev->frontends.gate = 2;
717 /* DVB-S init */
718 fe0->dvb.frontend = dvb_attach(cx24123_attach,
719 &hauppauge_novas_config,
720 &dev->core->i2c_adap);
721 if (fe0->dvb.frontend) {
722 if (!dvb_attach(isl6421_attach,
723 fe0->dvb.frontend,
724 &dev->core->i2c_adap,
725 0x08, ISL6421_DCL, 0x00))
726 goto frontend_detach;
727 }
728 /* MFE frontend 2 */
729 fe1 = videobuf_dvb_get_frontend(&dev->frontends, 2);
730 if (!fe1)
731 goto frontend_detach;
732 /* DVB-T init */
733 fe1->dvb.frontend = dvb_attach(cx22702_attach,
734 &hauppauge_hvr_config,
735 &dev->core->i2c_adap);
736 if (fe1->dvb.frontend) {
737 fe1->dvb.frontend->id = 1;
738 if (!dvb_attach(simple_tuner_attach,
739 fe1->dvb.frontend,
740 &dev->core->i2c_adap,
741 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
742 goto frontend_detach;
743 }
744 break;
745 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
746 fe0->dvb.frontend = dvb_attach(mt352_attach,
747 &dvico_fusionhdtv,
748 &core->i2c_adap);
749 if (fe0->dvb.frontend != NULL) {
750 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
751 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
752 goto frontend_detach;
753 break;
754 }
755 /* ZL10353 replaces MT352 on later cards */
756 fe0->dvb.frontend = dvb_attach(zl10353_attach,
757 &dvico_fusionhdtv_plus_v1_1,
758 &core->i2c_adap);
759 if (fe0->dvb.frontend != NULL) {
760 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
761 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
762 goto frontend_detach;
763 }
764 break;
765 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
766 /* The tin box says DEE1601, but it seems to be DTT7579
767 * compatible, with a slightly different MT352 AGC gain. */
768 fe0->dvb.frontend = dvb_attach(mt352_attach,
769 &dvico_fusionhdtv_dual,
770 &core->i2c_adap);
771 if (fe0->dvb.frontend != NULL) {
772 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
773 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
774 goto frontend_detach;
775 break;
776 }
777 /* ZL10353 replaces MT352 on later cards */
778 fe0->dvb.frontend = dvb_attach(zl10353_attach,
779 &dvico_fusionhdtv_plus_v1_1,
780 &core->i2c_adap);
781 if (fe0->dvb.frontend != NULL) {
782 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
783 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
784 goto frontend_detach;
785 }
786 break;
787 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
788 fe0->dvb.frontend = dvb_attach(mt352_attach,
789 &dvico_fusionhdtv,
790 &core->i2c_adap);
791 if (fe0->dvb.frontend != NULL) {
792 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
793 0x61, NULL, DVB_PLL_LG_Z201))
794 goto frontend_detach;
795 }
796 break;
797 case CX88_BOARD_KWORLD_DVB_T:
798 case CX88_BOARD_DNTV_LIVE_DVB_T:
799 case CX88_BOARD_ADSTECH_DVB_T_PCI:
800 fe0->dvb.frontend = dvb_attach(mt352_attach,
801 &dntv_live_dvbt_config,
802 &core->i2c_adap);
803 if (fe0->dvb.frontend != NULL) {
804 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
805 0x61, NULL, DVB_PLL_UNKNOWN_1))
806 goto frontend_detach;
807 }
808 break;
809 case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
810 #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
811 /* MT352 is on a secondary I2C bus made from some GPIO lines */
812 fe0->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
813 &dev->vp3054->adap);
814 if (fe0->dvb.frontend != NULL) {
815 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
816 &core->i2c_adap, 0x61,
817 TUNER_PHILIPS_FMD1216ME_MK3))
818 goto frontend_detach;
819 }
820 #else
821 printk(KERN_ERR "%s/2: built without vp3054 support\n",
822 core->name);
823 #endif
824 break;
825 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
826 fe0->dvb.frontend = dvb_attach(zl10353_attach,
827 &dvico_fusionhdtv_hybrid,
828 &core->i2c_adap);
829 if (fe0->dvb.frontend != NULL) {
830 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
831 &core->i2c_adap, 0x61,
832 TUNER_THOMSON_FE6600))
833 goto frontend_detach;
834 }
835 break;
836 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
837 fe0->dvb.frontend = dvb_attach(zl10353_attach,
838 &dvico_fusionhdtv_xc3028,
839 &core->i2c_adap);
840 if (fe0->dvb.frontend == NULL)
841 fe0->dvb.frontend = dvb_attach(mt352_attach,
842 &dvico_fusionhdtv_mt352_xc3028,
843 &core->i2c_adap);
844 /*
845 * On this board, the demod provides the I2C bus pullup.
846 * We must not permit gate_ctrl to be performed, or
847 * the xc3028 cannot communicate on the bus.
848 */
849 if (fe0->dvb.frontend)
850 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
851 if (attach_xc3028(0x61, dev) < 0)
852 goto frontend_detach;
853 break;
854 case CX88_BOARD_PCHDTV_HD3000:
855 fe0->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
856 &core->i2c_adap);
857 if (fe0->dvb.frontend != NULL) {
858 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
859 &core->i2c_adap, 0x61,
860 TUNER_THOMSON_DTT761X))
861 goto frontend_detach;
862 }
863 break;
864 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
865 dev->ts_gen_cntrl = 0x08;
866
867 /* Do a hardware reset of chip before using it. */
868 cx_clear(MO_GP0_IO, 1);
869 mdelay(100);
870 cx_set(MO_GP0_IO, 1);
871 mdelay(200);
872
873 /* Select RF connector callback */
874 fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
875 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
876 &fusionhdtv_3_gold,
877 &core->i2c_adap);
878 if (fe0->dvb.frontend != NULL) {
879 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
880 &core->i2c_adap, 0x61,
881 TUNER_MICROTUNE_4042FI5))
882 goto frontend_detach;
883 }
884 break;
885 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
886 dev->ts_gen_cntrl = 0x08;
887
888 /* Do a hardware reset of chip before using it. */
889 cx_clear(MO_GP0_IO, 1);
890 mdelay(100);
891 cx_set(MO_GP0_IO, 9);
892 mdelay(200);
893 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
894 &fusionhdtv_3_gold,
895 &core->i2c_adap);
896 if (fe0->dvb.frontend != NULL) {
897 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
898 &core->i2c_adap, 0x61,
899 TUNER_THOMSON_DTT761X))
900 goto frontend_detach;
901 }
902 break;
903 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
904 dev->ts_gen_cntrl = 0x08;
905
906 /* Do a hardware reset of chip before using it. */
907 cx_clear(MO_GP0_IO, 1);
908 mdelay(100);
909 cx_set(MO_GP0_IO, 1);
910 mdelay(200);
911 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
912 &fusionhdtv_5_gold,
913 &core->i2c_adap);
914 if (fe0->dvb.frontend != NULL) {
915 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
916 &core->i2c_adap, 0x61,
917 TUNER_LG_TDVS_H06XF))
918 goto frontend_detach;
919 if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
920 &core->i2c_adap, 0x43))
921 goto frontend_detach;
922 }
923 break;
924 case CX88_BOARD_PCHDTV_HD5500:
925 dev->ts_gen_cntrl = 0x08;
926
927 /* Do a hardware reset of chip before using it. */
928 cx_clear(MO_GP0_IO, 1);
929 mdelay(100);
930 cx_set(MO_GP0_IO, 1);
931 mdelay(200);
932 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
933 &pchdtv_hd5500,
934 &core->i2c_adap);
935 if (fe0->dvb.frontend != NULL) {
936 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
937 &core->i2c_adap, 0x61,
938 TUNER_LG_TDVS_H06XF))
939 goto frontend_detach;
940 if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
941 &core->i2c_adap, 0x43))
942 goto frontend_detach;
943 }
944 break;
945 case CX88_BOARD_ATI_HDTVWONDER:
946 fe0->dvb.frontend = dvb_attach(nxt200x_attach,
947 &ati_hdtvwonder,
948 &core->i2c_adap);
949 if (fe0->dvb.frontend != NULL) {
950 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
951 &core->i2c_adap, 0x61,
952 TUNER_PHILIPS_TUV1236D))
953 goto frontend_detach;
954 }
955 break;
956 case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
957 case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
958 fe0->dvb.frontend = dvb_attach(cx24123_attach,
959 &hauppauge_novas_config,
960 &core->i2c_adap);
961 if (fe0->dvb.frontend) {
962 if (!dvb_attach(isl6421_attach, fe0->dvb.frontend,
963 &core->i2c_adap, 0x08, ISL6421_DCL, 0x00))
964 goto frontend_detach;
965 }
966 break;
967 case CX88_BOARD_KWORLD_DVBS_100:
968 fe0->dvb.frontend = dvb_attach(cx24123_attach,
969 &kworld_dvbs_100_config,
970 &core->i2c_adap);
971 if (fe0->dvb.frontend) {
972 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
973 fe0->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
974 }
975 break;
976 case CX88_BOARD_GENIATECH_DVBS:
977 fe0->dvb.frontend = dvb_attach(cx24123_attach,
978 &geniatech_dvbs_config,
979 &core->i2c_adap);
980 if (fe0->dvb.frontend) {
981 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
982 fe0->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
983 }
984 break;
985 case CX88_BOARD_PINNACLE_PCTV_HD_800i:
986 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
987 &pinnacle_pctv_hd_800i_config,
988 &core->i2c_adap);
989 if (fe0->dvb.frontend != NULL) {
990 if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
991 &core->i2c_adap,
992 &pinnacle_pctv_hd_800i_tuner_config))
993 goto frontend_detach;
994 }
995 break;
996 case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
997 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
998 &dvico_hdtv5_pci_nano_config,
999 &core->i2c_adap);
1000 if (fe0->dvb.frontend != NULL) {
1001 struct dvb_frontend *fe;
1002 struct xc2028_config cfg = {
1003 .i2c_adap = &core->i2c_adap,
1004 .i2c_addr = 0x61,
1005 };
1006 static struct xc2028_ctrl ctl = {
1007 .fname = XC2028_DEFAULT_FIRMWARE,
1008 .max_len = 64,
1009 .scode_table = XC3028_FE_OREN538,
1010 };
1011
1012 fe = dvb_attach(xc2028_attach,
1013 fe0->dvb.frontend, &cfg);
1014 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1015 fe->ops.tuner_ops.set_config(fe, &ctl);
1016 }
1017 break;
1018 case CX88_BOARD_PINNACLE_HYBRID_PCTV:
1019 case CX88_BOARD_WINFAST_DTV1800H:
1020 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1021 &cx88_pinnacle_hybrid_pctv,
1022 &core->i2c_adap);
1023 if (fe0->dvb.frontend) {
1024 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1025 if (attach_xc3028(0x61, dev) < 0)
1026 goto frontend_detach;
1027 }
1028 break;
1029 case CX88_BOARD_GENIATECH_X8000_MT:
1030 dev->ts_gen_cntrl = 0x00;
1031
1032 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1033 &cx88_geniatech_x8000_mt,
1034 &core->i2c_adap);
1035 if (attach_xc3028(0x61, dev) < 0)
1036 goto frontend_detach;
1037 break;
1038 case CX88_BOARD_KWORLD_ATSC_120:
1039 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1040 &kworld_atsc_120_config,
1041 &core->i2c_adap);
1042 if (attach_xc3028(0x61, dev) < 0)
1043 goto frontend_detach;
1044 break;
1045 case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD:
1046 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1047 &dvico_fusionhdtv7_config,
1048 &core->i2c_adap);
1049 if (fe0->dvb.frontend != NULL) {
1050 if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
1051 &core->i2c_adap,
1052 &dvico_fusionhdtv7_tuner_config))
1053 goto frontend_detach;
1054 }
1055 break;
1056 case CX88_BOARD_HAUPPAUGE_HVR4000:
1057 /* MFE frontend 1 */
1058 mfe_shared = 1;
1059 dev->frontends.gate = 2;
1060 /* DVB-S/S2 Init */
1061 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1062 &hauppauge_hvr4000_config,
1063 &dev->core->i2c_adap);
1064 if (fe0->dvb.frontend) {
1065 if (!dvb_attach(isl6421_attach,
1066 fe0->dvb.frontend,
1067 &dev->core->i2c_adap,
1068 0x08, ISL6421_DCL, 0x00))
1069 goto frontend_detach;
1070 }
1071 /* MFE frontend 2 */
1072 fe1 = videobuf_dvb_get_frontend(&dev->frontends, 2);
1073 if (!fe1)
1074 goto frontend_detach;
1075 /* DVB-T Init */
1076 fe1->dvb.frontend = dvb_attach(cx22702_attach,
1077 &hauppauge_hvr_config,
1078 &dev->core->i2c_adap);
1079 if (fe1->dvb.frontend) {
1080 fe1->dvb.frontend->id = 1;
1081 if (!dvb_attach(simple_tuner_attach,
1082 fe1->dvb.frontend,
1083 &dev->core->i2c_adap,
1084 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
1085 goto frontend_detach;
1086 }
1087 break;
1088 case CX88_BOARD_HAUPPAUGE_HVR4000LITE:
1089 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1090 &hauppauge_hvr4000_config,
1091 &dev->core->i2c_adap);
1092 if (fe0->dvb.frontend) {
1093 if (!dvb_attach(isl6421_attach,
1094 fe0->dvb.frontend,
1095 &dev->core->i2c_adap,
1096 0x08, ISL6421_DCL, 0x00))
1097 goto frontend_detach;
1098 }
1099 break;
1100 case CX88_BOARD_PROF_6200:
1101 case CX88_BOARD_TBS_8910:
1102 case CX88_BOARD_TEVII_S420:
1103 fe0->dvb.frontend = dvb_attach(stv0299_attach,
1104 &tevii_tuner_sharp_config,
1105 &core->i2c_adap);
1106 if (fe0->dvb.frontend != NULL) {
1107 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60,
1108 &core->i2c_adap, DVB_PLL_OPERA1))
1109 goto frontend_detach;
1110 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
1111 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1112
1113 } else {
1114 fe0->dvb.frontend = dvb_attach(stv0288_attach,
1115 &tevii_tuner_earda_config,
1116 &core->i2c_adap);
1117 if (fe0->dvb.frontend != NULL) {
1118 if (!dvb_attach(stb6000_attach, fe0->dvb.frontend, 0x61,
1119 &core->i2c_adap))
1120 goto frontend_detach;
1121 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
1122 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1123 }
1124 }
1125 break;
1126 case CX88_BOARD_TEVII_S460:
1127 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1128 &tevii_s460_config,
1129 &core->i2c_adap);
1130 if (fe0->dvb.frontend != NULL)
1131 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1132 break;
1133 case CX88_BOARD_OMICOM_SS4_PCI:
1134 case CX88_BOARD_TBS_8920:
1135 case CX88_BOARD_PROF_7300:
1136 case CX88_BOARD_SATTRADE_ST4200:
1137 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1138 &hauppauge_hvr4000_config,
1139 &core->i2c_adap);
1140 if (fe0->dvb.frontend != NULL)
1141 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1142 break;
1143 case CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII:
1144 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1145 &cx88_terratec_cinergy_ht_pci_mkii_config,
1146 &core->i2c_adap);
1147 if (fe0->dvb.frontend) {
1148 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1149 if (attach_xc3028(0x61, dev) < 0)
1150 goto frontend_detach;
1151 }
1152 break;
1153 default:
1154 printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
1155 core->name);
1156 break;
1157 }
1158
1159 if ( (NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend) ) {
1160 printk(KERN_ERR
1161 "%s/2: frontend initialization failed\n",
1162 core->name);
1163 goto frontend_detach;
1164 }
1165 /* define general-purpose callback pointer */
1166 fe0->dvb.frontend->callback = cx88_tuner_callback;
1167
1168 /* Ensure all frontends negotiate bus access */
1169 fe0->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
1170 if (fe1)
1171 fe1->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
1172
1173 /* Put the analog decoder in standby to keep it quiet */
1174 call_all(core, tuner, s_standby);
1175
1176 /* register everything */
1177 return videobuf_dvb_register_bus(&dev->frontends, THIS_MODULE, dev,
1178 &dev->pci->dev, adapter_nr, mfe_shared);
1179
1180 frontend_detach:
1181 core->gate_ctrl = NULL;
1182 videobuf_dvb_dealloc_frontends(&dev->frontends);
1183 return -EINVAL;
1184 }
1185
1186 /* ----------------------------------------------------------- */
1187
1188 /* CX8802 MPEG -> mini driver - We have been given the hardware */
1189 static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
1190 {
1191 struct cx88_core *core = drv->core;
1192 int err = 0;
1193 dprintk( 1, "%s\n", __func__);
1194
1195 switch (core->boardnr) {
1196 case CX88_BOARD_HAUPPAUGE_HVR1300:
1197 /* We arrive here with either the cx23416 or the cx22702
1198 * on the bus. Take the bus from the cx23416 and enable the
1199 * cx22702 demod
1200 */
1201 /* Toggle reset on cx22702 leaving i2c active */
1202 cx_set(MO_GP0_IO, 0x00000080);
1203 udelay(1000);
1204 cx_clear(MO_GP0_IO, 0x00000080);
1205 udelay(50);
1206 cx_set(MO_GP0_IO, 0x00000080);
1207 udelay(1000);
1208 /* enable the cx22702 pins */
1209 cx_clear(MO_GP0_IO, 0x00000004);
1210 udelay(1000);
1211 break;
1212
1213 case CX88_BOARD_HAUPPAUGE_HVR3000:
1214 case CX88_BOARD_HAUPPAUGE_HVR4000:
1215 /* Toggle reset on cx22702 leaving i2c active */
1216 cx_set(MO_GP0_IO, 0x00000080);
1217 udelay(1000);
1218 cx_clear(MO_GP0_IO, 0x00000080);
1219 udelay(50);
1220 cx_set(MO_GP0_IO, 0x00000080);
1221 udelay(1000);
1222 switch (core->dvbdev->frontends.active_fe_id) {
1223 case 1: /* DVB-S/S2 Enabled */
1224 /* tri-state the cx22702 pins */
1225 cx_set(MO_GP0_IO, 0x00000004);
1226 /* Take the cx24116/cx24123 out of reset */
1227 cx_write(MO_SRST_IO, 1);
1228 core->dvbdev->ts_gen_cntrl = 0x02; /* Parallel IO */
1229 break;
1230 case 2: /* DVB-T Enabled */
1231 /* Put the cx24116/cx24123 into reset */
1232 cx_write(MO_SRST_IO, 0);
1233 /* enable the cx22702 pins */
1234 cx_clear(MO_GP0_IO, 0x00000004);
1235 core->dvbdev->ts_gen_cntrl = 0x0c; /* Serial IO */
1236 break;
1237 }
1238 udelay(1000);
1239 break;
1240
1241 default:
1242 err = -ENODEV;
1243 }
1244 return err;
1245 }
1246
1247 /* CX8802 MPEG -> mini driver - We no longer have the hardware */
1248 static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
1249 {
1250 struct cx88_core *core = drv->core;
1251 int err = 0;
1252 dprintk( 1, "%s\n", __func__);
1253
1254 switch (core->boardnr) {
1255 case CX88_BOARD_HAUPPAUGE_HVR1300:
1256 /* Do Nothing, leave the cx22702 on the bus. */
1257 break;
1258 case CX88_BOARD_HAUPPAUGE_HVR3000:
1259 case CX88_BOARD_HAUPPAUGE_HVR4000:
1260 break;
1261 default:
1262 err = -ENODEV;
1263 }
1264 return err;
1265 }
1266
1267 static int cx8802_dvb_probe(struct cx8802_driver *drv)
1268 {
1269 struct cx88_core *core = drv->core;
1270 struct cx8802_dev *dev = drv->core->dvbdev;
1271 int err;
1272 struct videobuf_dvb_frontend *fe;
1273 int i;
1274
1275 dprintk( 1, "%s\n", __func__);
1276 dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
1277 core->boardnr,
1278 core->name,
1279 core->pci_bus,
1280 core->pci_slot);
1281
1282 err = -ENODEV;
1283 if (!(core->board.mpeg & CX88_MPEG_DVB))
1284 goto fail_core;
1285
1286 /* If vp3054 isn't enabled, a stub will just return 0 */
1287 err = vp3054_i2c_probe(dev);
1288 if (0 != err)
1289 goto fail_core;
1290
1291 /* dvb stuff */
1292 printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
1293 dev->ts_gen_cntrl = 0x0c;
1294
1295 err = cx8802_alloc_frontends(dev);
1296 if (err)
1297 goto fail_core;
1298
1299 err = -ENODEV;
1300 for (i = 1; i <= core->board.num_frontends; i++) {
1301 fe = videobuf_dvb_get_frontend(&core->dvbdev->frontends, i);
1302 if (fe == NULL) {
1303 printk(KERN_ERR "%s() failed to get frontend(%d)\n",
1304 __func__, i);
1305 goto fail_probe;
1306 }
1307 videobuf_queue_sg_init(&fe->dvb.dvbq, &dvb_qops,
1308 &dev->pci->dev, &dev->slock,
1309 V4L2_BUF_TYPE_VIDEO_CAPTURE,
1310 V4L2_FIELD_TOP,
1311 sizeof(struct cx88_buffer),
1312 dev);
1313 /* init struct videobuf_dvb */
1314 fe->dvb.name = dev->core->name;
1315 }
1316
1317 err = dvb_register(dev);
1318 if (err)
1319 /* frontends/adapter de-allocated in dvb_register */
1320 printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
1321 core->name, err);
1322 return err;
1323 fail_probe:
1324 videobuf_dvb_dealloc_frontends(&core->dvbdev->frontends);
1325 fail_core:
1326 return err;
1327 }
1328
1329 static int cx8802_dvb_remove(struct cx8802_driver *drv)
1330 {
1331 struct cx88_core *core = drv->core;
1332 struct cx8802_dev *dev = drv->core->dvbdev;
1333
1334 dprintk( 1, "%s\n", __func__);
1335
1336 videobuf_dvb_unregister_bus(&dev->frontends);
1337
1338 vp3054_i2c_remove(dev);
1339
1340 core->gate_ctrl = NULL;
1341
1342 return 0;
1343 }
1344
1345 static struct cx8802_driver cx8802_dvb_driver = {
1346 .type_id = CX88_MPEG_DVB,
1347 .hw_access = CX8802_DRVCTL_SHARED,
1348 .probe = cx8802_dvb_probe,
1349 .remove = cx8802_dvb_remove,
1350 .advise_acquire = cx8802_dvb_advise_acquire,
1351 .advise_release = cx8802_dvb_advise_release,
1352 };
1353
1354 static int dvb_init(void)
1355 {
1356 printk(KERN_INFO "cx88/2: cx2388x dvb driver version %d.%d.%d loaded\n",
1357 (CX88_VERSION_CODE >> 16) & 0xff,
1358 (CX88_VERSION_CODE >> 8) & 0xff,
1359 CX88_VERSION_CODE & 0xff);
1360 #ifdef SNAPSHOT
1361 printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
1362 SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
1363 #endif
1364 return cx8802_register_driver(&cx8802_dvb_driver);
1365 }
1366
1367 static void dvb_fini(void)
1368 {
1369 cx8802_unregister_driver(&cx8802_dvb_driver);
1370 }
1371
1372 module_init(dvb_init);
1373 module_exit(dvb_fini);
1374
1375 /*
1376 * Local variables:
1377 * c-basic-offset: 8
1378 * compile-command: "make DVB=1"
1379 * End:
1380 */
Linux kernel - Deliverables
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