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V4L/DVB (8987): cx88: Add support for the Hauppauge HVR4000 and HVR4000-LITE (S2...
[deliverable/linux.git] / drivers / media / video / cx88 / cx88-dvb.c
1 /*
2 *
3 * device driver for Conexant 2388x based TV cards
4 * MPEG Transport Stream (DVB) routines
5 *
6 * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
7 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24 #include <linux/module.h>
25 #include <linux/init.h>
26 #include <linux/device.h>
27 #include <linux/fs.h>
28 #include <linux/kthread.h>
29 #include <linux/file.h>
30 #include <linux/suspend.h>
31
32 #include "cx88.h"
33 #include "dvb-pll.h"
34 #include <media/v4l2-common.h>
35
36 #include "mt352.h"
37 #include "mt352_priv.h"
38 #include "cx88-vp3054-i2c.h"
39 #include "zl10353.h"
40 #include "cx22702.h"
41 #include "or51132.h"
42 #include "lgdt330x.h"
43 #include "s5h1409.h"
44 #include "xc5000.h"
45 #include "nxt200x.h"
46 #include "cx24123.h"
47 #include "isl6421.h"
48 #include "tuner-simple.h"
49 #include "tda9887.h"
50 #include "s5h1411.h"
51 #include "cx24116.h"
52
53 MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
54 MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
55 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
56 MODULE_LICENSE("GPL");
57
58 static unsigned int debug;
59 module_param(debug, int, 0644);
60 MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
61
62 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
63
64 #define dprintk(level,fmt, arg...) if (debug >= level) \
65 printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
66
67 /* ------------------------------------------------------------------ */
68
69 static int dvb_buf_setup(struct videobuf_queue *q,
70 unsigned int *count, unsigned int *size)
71 {
72 struct cx8802_dev *dev = q->priv_data;
73
74 dev->ts_packet_size = 188 * 4;
75 dev->ts_packet_count = 32;
76
77 *size = dev->ts_packet_size * dev->ts_packet_count;
78 *count = 32;
79 return 0;
80 }
81
82 static int dvb_buf_prepare(struct videobuf_queue *q,
83 struct videobuf_buffer *vb, enum v4l2_field field)
84 {
85 struct cx8802_dev *dev = q->priv_data;
86 return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
87 }
88
89 static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
90 {
91 struct cx8802_dev *dev = q->priv_data;
92 cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
93 }
94
95 static void dvb_buf_release(struct videobuf_queue *q,
96 struct videobuf_buffer *vb)
97 {
98 cx88_free_buffer(q, (struct cx88_buffer*)vb);
99 }
100
101 static struct videobuf_queue_ops dvb_qops = {
102 .buf_setup = dvb_buf_setup,
103 .buf_prepare = dvb_buf_prepare,
104 .buf_queue = dvb_buf_queue,
105 .buf_release = dvb_buf_release,
106 };
107
108 /* ------------------------------------------------------------------ */
109
110 static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
111 {
112 struct cx8802_dev *dev= fe->dvb->priv;
113 struct cx8802_driver *drv = NULL;
114 int ret = 0;
115
116 drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
117 if (drv) {
118 if (acquire)
119 ret = drv->request_acquire(drv);
120 else
121 ret = drv->request_release(drv);
122 }
123
124 return ret;
125 }
126
127 /* ------------------------------------------------------------------ */
128
129 static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
130 {
131 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
132 static u8 reset [] = { RESET, 0x80 };
133 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
134 static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
135 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
136 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
137
138 mt352_write(fe, clock_config, sizeof(clock_config));
139 udelay(200);
140 mt352_write(fe, reset, sizeof(reset));
141 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
142
143 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
144 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
145 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
146 return 0;
147 }
148
149 static int dvico_dual_demod_init(struct dvb_frontend *fe)
150 {
151 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
152 static u8 reset [] = { RESET, 0x80 };
153 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
154 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
155 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
156 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
157
158 mt352_write(fe, clock_config, sizeof(clock_config));
159 udelay(200);
160 mt352_write(fe, reset, sizeof(reset));
161 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
162
163 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
164 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
165 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
166
167 return 0;
168 }
169
170 static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
171 {
172 static u8 clock_config [] = { 0x89, 0x38, 0x39 };
173 static u8 reset [] = { 0x50, 0x80 };
174 static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
175 static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
176 0x00, 0xFF, 0x00, 0x40, 0x40 };
177 static u8 dntv_extra[] = { 0xB5, 0x7A };
178 static u8 capt_range_cfg[] = { 0x75, 0x32 };
179
180 mt352_write(fe, clock_config, sizeof(clock_config));
181 udelay(2000);
182 mt352_write(fe, reset, sizeof(reset));
183 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
184
185 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
186 udelay(2000);
187 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
188 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
189
190 return 0;
191 }
192
193 static struct mt352_config dvico_fusionhdtv = {
194 .demod_address = 0x0f,
195 .demod_init = dvico_fusionhdtv_demod_init,
196 };
197
198 static struct mt352_config dntv_live_dvbt_config = {
199 .demod_address = 0x0f,
200 .demod_init = dntv_live_dvbt_demod_init,
201 };
202
203 static struct mt352_config dvico_fusionhdtv_dual = {
204 .demod_address = 0x0f,
205 .demod_init = dvico_dual_demod_init,
206 };
207
208 #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
209 static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
210 {
211 static u8 clock_config [] = { 0x89, 0x38, 0x38 };
212 static u8 reset [] = { 0x50, 0x80 };
213 static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
214 static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
215 0x00, 0xFF, 0x00, 0x40, 0x40 };
216 static u8 dntv_extra[] = { 0xB5, 0x7A };
217 static u8 capt_range_cfg[] = { 0x75, 0x32 };
218
219 mt352_write(fe, clock_config, sizeof(clock_config));
220 udelay(2000);
221 mt352_write(fe, reset, sizeof(reset));
222 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
223
224 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
225 udelay(2000);
226 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
227 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
228
229 return 0;
230 }
231
232 static struct mt352_config dntv_live_dvbt_pro_config = {
233 .demod_address = 0x0f,
234 .no_tuner = 1,
235 .demod_init = dntv_live_dvbt_pro_demod_init,
236 };
237 #endif
238
239 static struct zl10353_config dvico_fusionhdtv_hybrid = {
240 .demod_address = 0x0f,
241 .no_tuner = 1,
242 };
243
244 static struct zl10353_config dvico_fusionhdtv_xc3028 = {
245 .demod_address = 0x0f,
246 .if2 = 45600,
247 .no_tuner = 1,
248 };
249
250 static struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
251 .demod_address = 0x0f,
252 .if2 = 4560,
253 .no_tuner = 1,
254 .demod_init = dvico_fusionhdtv_demod_init,
255 };
256
257 static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
258 .demod_address = 0x0f,
259 };
260
261 static struct cx22702_config connexant_refboard_config = {
262 .demod_address = 0x43,
263 .output_mode = CX22702_SERIAL_OUTPUT,
264 };
265
266 static struct cx22702_config hauppauge_hvr_config = {
267 .demod_address = 0x63,
268 .output_mode = CX22702_SERIAL_OUTPUT,
269 };
270
271 static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
272 {
273 struct cx8802_dev *dev= fe->dvb->priv;
274 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
275 return 0;
276 }
277
278 static struct or51132_config pchdtv_hd3000 = {
279 .demod_address = 0x15,
280 .set_ts_params = or51132_set_ts_param,
281 };
282
283 static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
284 {
285 struct cx8802_dev *dev= fe->dvb->priv;
286 struct cx88_core *core = dev->core;
287
288 dprintk(1, "%s: index = %d\n", __func__, index);
289 if (index == 0)
290 cx_clear(MO_GP0_IO, 8);
291 else
292 cx_set(MO_GP0_IO, 8);
293 return 0;
294 }
295
296 static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
297 {
298 struct cx8802_dev *dev= fe->dvb->priv;
299 if (is_punctured)
300 dev->ts_gen_cntrl |= 0x04;
301 else
302 dev->ts_gen_cntrl &= ~0x04;
303 return 0;
304 }
305
306 static struct lgdt330x_config fusionhdtv_3_gold = {
307 .demod_address = 0x0e,
308 .demod_chip = LGDT3302,
309 .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
310 .set_ts_params = lgdt330x_set_ts_param,
311 };
312
313 static struct lgdt330x_config fusionhdtv_5_gold = {
314 .demod_address = 0x0e,
315 .demod_chip = LGDT3303,
316 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
317 .set_ts_params = lgdt330x_set_ts_param,
318 };
319
320 static struct lgdt330x_config pchdtv_hd5500 = {
321 .demod_address = 0x59,
322 .demod_chip = LGDT3303,
323 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
324 .set_ts_params = lgdt330x_set_ts_param,
325 };
326
327 static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
328 {
329 struct cx8802_dev *dev= fe->dvb->priv;
330 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
331 return 0;
332 }
333
334 static struct nxt200x_config ati_hdtvwonder = {
335 .demod_address = 0x0a,
336 .set_ts_params = nxt200x_set_ts_param,
337 };
338
339 static int cx24123_set_ts_param(struct dvb_frontend* fe,
340 int is_punctured)
341 {
342 struct cx8802_dev *dev= fe->dvb->priv;
343 dev->ts_gen_cntrl = 0x02;
344 return 0;
345 }
346
347 static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
348 fe_sec_voltage_t voltage)
349 {
350 struct cx8802_dev *dev= fe->dvb->priv;
351 struct cx88_core *core = dev->core;
352
353 if (voltage == SEC_VOLTAGE_OFF)
354 cx_write(MO_GP0_IO, 0x000006fb);
355 else
356 cx_write(MO_GP0_IO, 0x000006f9);
357
358 if (core->prev_set_voltage)
359 return core->prev_set_voltage(fe, voltage);
360 return 0;
361 }
362
363 static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
364 fe_sec_voltage_t voltage)
365 {
366 struct cx8802_dev *dev= fe->dvb->priv;
367 struct cx88_core *core = dev->core;
368
369 if (voltage == SEC_VOLTAGE_OFF) {
370 dprintk(1,"LNB Voltage OFF\n");
371 cx_write(MO_GP0_IO, 0x0000efff);
372 }
373
374 if (core->prev_set_voltage)
375 return core->prev_set_voltage(fe, voltage);
376 return 0;
377 }
378
379 static int cx88_pci_nano_callback(void *ptr, int command, int arg)
380 {
381 struct cx88_core *core = ptr;
382
383 switch (command) {
384 case XC2028_TUNER_RESET:
385 /* Send the tuner in then out of reset */
386 dprintk(1, "%s: XC2028_TUNER_RESET %d\n", __func__, arg);
387
388 switch (core->boardnr) {
389 case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
390 /* GPIO-4 xc3028 tuner */
391
392 cx_set(MO_GP0_IO, 0x00001000);
393 cx_clear(MO_GP0_IO, 0x00000010);
394 msleep(100);
395 cx_set(MO_GP0_IO, 0x00000010);
396 msleep(100);
397 break;
398 }
399
400 break;
401 case XC2028_RESET_CLK:
402 dprintk(1, "%s: XC2028_RESET_CLK %d\n", __func__, arg);
403 break;
404 default:
405 dprintk(1, "%s: unknown command %d, arg %d\n", __func__,
406 command, arg);
407 return -EINVAL;
408 }
409
410 return 0;
411 }
412
413 static struct cx24123_config geniatech_dvbs_config = {
414 .demod_address = 0x55,
415 .set_ts_params = cx24123_set_ts_param,
416 };
417
418 static struct cx24123_config hauppauge_novas_config = {
419 .demod_address = 0x55,
420 .set_ts_params = cx24123_set_ts_param,
421 };
422
423 static struct cx24123_config kworld_dvbs_100_config = {
424 .demod_address = 0x15,
425 .set_ts_params = cx24123_set_ts_param,
426 .lnb_polarity = 1,
427 };
428
429 static struct s5h1409_config pinnacle_pctv_hd_800i_config = {
430 .demod_address = 0x32 >> 1,
431 .output_mode = S5H1409_PARALLEL_OUTPUT,
432 .gpio = S5H1409_GPIO_ON,
433 .qam_if = 44000,
434 .inversion = S5H1409_INVERSION_OFF,
435 .status_mode = S5H1409_DEMODLOCKING,
436 .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
437 };
438
439 static struct s5h1409_config dvico_hdtv5_pci_nano_config = {
440 .demod_address = 0x32 >> 1,
441 .output_mode = S5H1409_SERIAL_OUTPUT,
442 .gpio = S5H1409_GPIO_OFF,
443 .inversion = S5H1409_INVERSION_OFF,
444 .status_mode = S5H1409_DEMODLOCKING,
445 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
446 };
447
448 static struct s5h1409_config kworld_atsc_120_config = {
449 .demod_address = 0x32 >> 1,
450 .output_mode = S5H1409_SERIAL_OUTPUT,
451 .gpio = S5H1409_GPIO_OFF,
452 .inversion = S5H1409_INVERSION_OFF,
453 .status_mode = S5H1409_DEMODLOCKING,
454 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
455 };
456
457 static struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
458 .i2c_address = 0x64,
459 .if_khz = 5380,
460 .tuner_callback = cx88_tuner_callback,
461 };
462
463 static struct zl10353_config cx88_geniatech_x8000_mt = {
464 .demod_address = (0x1e >> 1),
465 .no_tuner = 1,
466 };
467
468 static struct s5h1411_config dvico_fusionhdtv7_config = {
469 .output_mode = S5H1411_SERIAL_OUTPUT,
470 .gpio = S5H1411_GPIO_ON,
471 .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
472 .qam_if = S5H1411_IF_44000,
473 .vsb_if = S5H1411_IF_44000,
474 .inversion = S5H1411_INVERSION_OFF,
475 .status_mode = S5H1411_DEMODLOCKING
476 };
477
478 static struct xc5000_config dvico_fusionhdtv7_tuner_config = {
479 .i2c_address = 0xc2 >> 1,
480 .if_khz = 5380,
481 .tuner_callback = cx88_tuner_callback,
482 };
483
484 static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
485 {
486 struct dvb_frontend *fe;
487 struct xc2028_ctrl ctl;
488 struct xc2028_config cfg = {
489 .i2c_adap = &dev->core->i2c_adap,
490 .i2c_addr = addr,
491 .ctrl = &ctl,
492 .callback = cx88_tuner_callback,
493 };
494
495 if (!dev->dvb.frontend) {
496 printk(KERN_ERR "%s/2: dvb frontend not attached. "
497 "Can't attach xc3028\n",
498 dev->core->name);
499 return -EINVAL;
500 }
501
502 /*
503 * Some xc3028 devices may be hidden by an I2C gate. This is known
504 * to happen with some s5h1409-based devices.
505 * Now that I2C gate is open, sets up xc3028 configuration
506 */
507 cx88_setup_xc3028(dev->core, &ctl);
508
509 fe = dvb_attach(xc2028_attach, dev->dvb.frontend, &cfg);
510 if (!fe) {
511 printk(KERN_ERR "%s/2: xc3028 attach failed\n",
512 dev->core->name);
513 return -EINVAL;
514 }
515
516 printk(KERN_INFO "%s/2: xc3028 attached\n",
517 dev->core->name);
518
519 return 0;
520 }
521
522 static int cx24116_set_ts_param(struct dvb_frontend *fe,
523 int is_punctured)
524 {
525 struct cx8802_dev *dev = fe->dvb->priv;
526 dev->ts_gen_cntrl = 0x2;
527
528 return 0;
529 }
530
531 static int cx24116_reset_device(struct dvb_frontend *fe)
532 {
533 struct cx8802_dev *dev = fe->dvb->priv;
534 struct cx88_core *core = dev->core;
535
536 /* Reset the part */
537 cx_write(MO_SRST_IO, 0);
538 msleep(10);
539 cx_write(MO_SRST_IO, 1);
540 msleep(10);
541
542 return 0;
543 }
544
545 static struct cx24116_config hauppauge_hvr4000_config = {
546 .demod_address = 0x05,
547 .set_ts_params = cx24116_set_ts_param,
548 .reset_device = cx24116_reset_device,
549 };
550
551 static int dvb_register(struct cx8802_dev *dev)
552 {
553 struct cx88_core *core = dev->core;
554
555 /* init struct videobuf_dvb */
556 dev->dvb.name = core->name;
557 dev->ts_gen_cntrl = 0x0c;
558
559 /* init frontend */
560 switch (core->boardnr) {
561 case CX88_BOARD_HAUPPAUGE_DVB_T1:
562 dev->dvb.frontend = dvb_attach(cx22702_attach,
563 &connexant_refboard_config,
564 &core->i2c_adap);
565 if (dev->dvb.frontend != NULL) {
566 if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
567 0x61, &core->i2c_adap,
568 DVB_PLL_THOMSON_DTT759X))
569 goto frontend_detach;
570 }
571 break;
572 case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
573 case CX88_BOARD_CONEXANT_DVB_T1:
574 case CX88_BOARD_KWORLD_DVB_T_CX22702:
575 case CX88_BOARD_WINFAST_DTV1000:
576 dev->dvb.frontend = dvb_attach(cx22702_attach,
577 &connexant_refboard_config,
578 &core->i2c_adap);
579 if (dev->dvb.frontend != NULL) {
580 if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
581 0x60, &core->i2c_adap,
582 DVB_PLL_THOMSON_DTT7579))
583 goto frontend_detach;
584 }
585 break;
586 case CX88_BOARD_WINFAST_DTV2000H:
587 case CX88_BOARD_HAUPPAUGE_HVR1100:
588 case CX88_BOARD_HAUPPAUGE_HVR1100LP:
589 case CX88_BOARD_HAUPPAUGE_HVR1300:
590 case CX88_BOARD_HAUPPAUGE_HVR3000:
591 dev->dvb.frontend = dvb_attach(cx22702_attach,
592 &hauppauge_hvr_config,
593 &core->i2c_adap);
594 if (dev->dvb.frontend != NULL) {
595 if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
596 &core->i2c_adap, 0x61,
597 TUNER_PHILIPS_FMD1216ME_MK3))
598 goto frontend_detach;
599 }
600 break;
601 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
602 dev->dvb.frontend = dvb_attach(mt352_attach,
603 &dvico_fusionhdtv,
604 &core->i2c_adap);
605 if (dev->dvb.frontend != NULL) {
606 if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
607 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
608 goto frontend_detach;
609 break;
610 }
611 /* ZL10353 replaces MT352 on later cards */
612 dev->dvb.frontend = dvb_attach(zl10353_attach,
613 &dvico_fusionhdtv_plus_v1_1,
614 &core->i2c_adap);
615 if (dev->dvb.frontend != NULL) {
616 if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
617 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
618 goto frontend_detach;
619 }
620 break;
621 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
622 /* The tin box says DEE1601, but it seems to be DTT7579
623 * compatible, with a slightly different MT352 AGC gain. */
624 dev->dvb.frontend = dvb_attach(mt352_attach,
625 &dvico_fusionhdtv_dual,
626 &core->i2c_adap);
627 if (dev->dvb.frontend != NULL) {
628 if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
629 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
630 goto frontend_detach;
631 break;
632 }
633 /* ZL10353 replaces MT352 on later cards */
634 dev->dvb.frontend = dvb_attach(zl10353_attach,
635 &dvico_fusionhdtv_plus_v1_1,
636 &core->i2c_adap);
637 if (dev->dvb.frontend != NULL) {
638 if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
639 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
640 goto frontend_detach;
641 }
642 break;
643 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
644 dev->dvb.frontend = dvb_attach(mt352_attach,
645 &dvico_fusionhdtv,
646 &core->i2c_adap);
647 if (dev->dvb.frontend != NULL) {
648 if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
649 0x61, NULL, DVB_PLL_LG_Z201))
650 goto frontend_detach;
651 }
652 break;
653 case CX88_BOARD_KWORLD_DVB_T:
654 case CX88_BOARD_DNTV_LIVE_DVB_T:
655 case CX88_BOARD_ADSTECH_DVB_T_PCI:
656 dev->dvb.frontend = dvb_attach(mt352_attach,
657 &dntv_live_dvbt_config,
658 &core->i2c_adap);
659 if (dev->dvb.frontend != NULL) {
660 if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
661 0x61, NULL, DVB_PLL_UNKNOWN_1))
662 goto frontend_detach;
663 }
664 break;
665 case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
666 #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
667 /* MT352 is on a secondary I2C bus made from some GPIO lines */
668 dev->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
669 &dev->vp3054->adap);
670 if (dev->dvb.frontend != NULL) {
671 if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
672 &core->i2c_adap, 0x61,
673 TUNER_PHILIPS_FMD1216ME_MK3))
674 goto frontend_detach;
675 }
676 #else
677 printk(KERN_ERR "%s/2: built without vp3054 support\n",
678 core->name);
679 #endif
680 break;
681 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
682 dev->dvb.frontend = dvb_attach(zl10353_attach,
683 &dvico_fusionhdtv_hybrid,
684 &core->i2c_adap);
685 if (dev->dvb.frontend != NULL) {
686 if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
687 &core->i2c_adap, 0x61,
688 TUNER_THOMSON_FE6600))
689 goto frontend_detach;
690 }
691 break;
692 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
693 dev->dvb.frontend = dvb_attach(zl10353_attach,
694 &dvico_fusionhdtv_xc3028,
695 &core->i2c_adap);
696 if (dev->dvb.frontend == NULL)
697 dev->dvb.frontend = dvb_attach(mt352_attach,
698 &dvico_fusionhdtv_mt352_xc3028,
699 &core->i2c_adap);
700 /*
701 * On this board, the demod provides the I2C bus pullup.
702 * We must not permit gate_ctrl to be performed, or
703 * the xc3028 cannot communicate on the bus.
704 */
705 if (dev->dvb.frontend)
706 dev->dvb.frontend->ops.i2c_gate_ctrl = NULL;
707 if (attach_xc3028(0x61, dev) < 0)
708 return -EINVAL;
709 break;
710 case CX88_BOARD_PCHDTV_HD3000:
711 dev->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
712 &core->i2c_adap);
713 if (dev->dvb.frontend != NULL) {
714 if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
715 &core->i2c_adap, 0x61,
716 TUNER_THOMSON_DTT761X))
717 goto frontend_detach;
718 }
719 break;
720 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
721 dev->ts_gen_cntrl = 0x08;
722
723 /* Do a hardware reset of chip before using it. */
724 cx_clear(MO_GP0_IO, 1);
725 mdelay(100);
726 cx_set(MO_GP0_IO, 1);
727 mdelay(200);
728
729 /* Select RF connector callback */
730 fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
731 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
732 &fusionhdtv_3_gold,
733 &core->i2c_adap);
734 if (dev->dvb.frontend != NULL) {
735 if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
736 &core->i2c_adap, 0x61,
737 TUNER_MICROTUNE_4042FI5))
738 goto frontend_detach;
739 }
740 break;
741 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
742 dev->ts_gen_cntrl = 0x08;
743
744 /* Do a hardware reset of chip before using it. */
745 cx_clear(MO_GP0_IO, 1);
746 mdelay(100);
747 cx_set(MO_GP0_IO, 9);
748 mdelay(200);
749 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
750 &fusionhdtv_3_gold,
751 &core->i2c_adap);
752 if (dev->dvb.frontend != NULL) {
753 if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
754 &core->i2c_adap, 0x61,
755 TUNER_THOMSON_DTT761X))
756 goto frontend_detach;
757 }
758 break;
759 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
760 dev->ts_gen_cntrl = 0x08;
761
762 /* Do a hardware reset of chip before using it. */
763 cx_clear(MO_GP0_IO, 1);
764 mdelay(100);
765 cx_set(MO_GP0_IO, 1);
766 mdelay(200);
767 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
768 &fusionhdtv_5_gold,
769 &core->i2c_adap);
770 if (dev->dvb.frontend != NULL) {
771 if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
772 &core->i2c_adap, 0x61,
773 TUNER_LG_TDVS_H06XF))
774 goto frontend_detach;
775 if (!dvb_attach(tda9887_attach, dev->dvb.frontend,
776 &core->i2c_adap, 0x43))
777 goto frontend_detach;
778 }
779 break;
780 case CX88_BOARD_PCHDTV_HD5500:
781 dev->ts_gen_cntrl = 0x08;
782
783 /* Do a hardware reset of chip before using it. */
784 cx_clear(MO_GP0_IO, 1);
785 mdelay(100);
786 cx_set(MO_GP0_IO, 1);
787 mdelay(200);
788 dev->dvb.frontend = dvb_attach(lgdt330x_attach,
789 &pchdtv_hd5500,
790 &core->i2c_adap);
791 if (dev->dvb.frontend != NULL) {
792 if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
793 &core->i2c_adap, 0x61,
794 TUNER_LG_TDVS_H06XF))
795 goto frontend_detach;
796 if (!dvb_attach(tda9887_attach, dev->dvb.frontend,
797 &core->i2c_adap, 0x43))
798 goto frontend_detach;
799 }
800 break;
801 case CX88_BOARD_ATI_HDTVWONDER:
802 dev->dvb.frontend = dvb_attach(nxt200x_attach,
803 &ati_hdtvwonder,
804 &core->i2c_adap);
805 if (dev->dvb.frontend != NULL) {
806 if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
807 &core->i2c_adap, 0x61,
808 TUNER_PHILIPS_TUV1236D))
809 goto frontend_detach;
810 }
811 break;
812 case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
813 case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
814 dev->dvb.frontend = dvb_attach(cx24123_attach,
815 &hauppauge_novas_config,
816 &core->i2c_adap);
817 if (dev->dvb.frontend) {
818 if (!dvb_attach(isl6421_attach, dev->dvb.frontend,
819 &core->i2c_adap, 0x08, 0x00, 0x00))
820 goto frontend_detach;
821 }
822 break;
823 case CX88_BOARD_KWORLD_DVBS_100:
824 dev->dvb.frontend = dvb_attach(cx24123_attach,
825 &kworld_dvbs_100_config,
826 &core->i2c_adap);
827 if (dev->dvb.frontend) {
828 core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
829 dev->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
830 }
831 break;
832 case CX88_BOARD_GENIATECH_DVBS:
833 dev->dvb.frontend = dvb_attach(cx24123_attach,
834 &geniatech_dvbs_config,
835 &core->i2c_adap);
836 if (dev->dvb.frontend) {
837 core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
838 dev->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
839 }
840 break;
841 case CX88_BOARD_PINNACLE_PCTV_HD_800i:
842 dev->dvb.frontend = dvb_attach(s5h1409_attach,
843 &pinnacle_pctv_hd_800i_config,
844 &core->i2c_adap);
845 if (dev->dvb.frontend != NULL) {
846 if (!dvb_attach(xc5000_attach, dev->dvb.frontend,
847 &core->i2c_adap,
848 &pinnacle_pctv_hd_800i_tuner_config))
849 goto frontend_detach;
850 }
851 break;
852 case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
853 dev->dvb.frontend = dvb_attach(s5h1409_attach,
854 &dvico_hdtv5_pci_nano_config,
855 &core->i2c_adap);
856 if (dev->dvb.frontend != NULL) {
857 struct dvb_frontend *fe;
858 struct xc2028_config cfg = {
859 .i2c_adap = &core->i2c_adap,
860 .i2c_addr = 0x61,
861 .callback = cx88_pci_nano_callback,
862 };
863 static struct xc2028_ctrl ctl = {
864 .fname = XC2028_DEFAULT_FIRMWARE,
865 .max_len = 64,
866 .scode_table = XC3028_FE_OREN538,
867 };
868
869 fe = dvb_attach(xc2028_attach,
870 dev->dvb.frontend, &cfg);
871 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
872 fe->ops.tuner_ops.set_config(fe, &ctl);
873 }
874 break;
875 case CX88_BOARD_PINNACLE_HYBRID_PCTV:
876 dev->dvb.frontend = dvb_attach(zl10353_attach,
877 &cx88_geniatech_x8000_mt,
878 &core->i2c_adap);
879 if (attach_xc3028(0x61, dev) < 0)
880 goto frontend_detach;
881 break;
882 case CX88_BOARD_GENIATECH_X8000_MT:
883 dev->ts_gen_cntrl = 0x00;
884
885 dev->dvb.frontend = dvb_attach(zl10353_attach,
886 &cx88_geniatech_x8000_mt,
887 &core->i2c_adap);
888 if (attach_xc3028(0x61, dev) < 0)
889 goto frontend_detach;
890 break;
891 case CX88_BOARD_KWORLD_ATSC_120:
892 dev->dvb.frontend = dvb_attach(s5h1409_attach,
893 &kworld_atsc_120_config,
894 &core->i2c_adap);
895 if (attach_xc3028(0x61, dev) < 0)
896 goto frontend_detach;
897 break;
898 case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD:
899 dev->dvb.frontend = dvb_attach(s5h1411_attach,
900 &dvico_fusionhdtv7_config,
901 &core->i2c_adap);
902 if (dev->dvb.frontend != NULL) {
903 if (!dvb_attach(xc5000_attach, dev->dvb.frontend,
904 &core->i2c_adap,
905 &dvico_fusionhdtv7_tuner_config))
906 goto frontend_detach;
907 }
908 break;
909 case CX88_BOARD_HAUPPAUGE_HVR4000:
910 case CX88_BOARD_HAUPPAUGE_HVR4000LITE:
911 /* Support for DVB-S only, not DVB-T support */
912 dev->dvb.frontend = dvb_attach(cx24116_attach,
913 &hauppauge_hvr4000_config,
914 &dev->core->i2c_adap);
915 if (dev->dvb.frontend) {
916 dvb_attach(isl6421_attach, dev->dvb.frontend,
917 &dev->core->i2c_adap,
918 0x08, 0x00, 0x00);
919 }
920 break;
921 default:
922 printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
923 core->name);
924 break;
925 }
926 if (NULL == dev->dvb.frontend) {
927 printk(KERN_ERR
928 "%s/2: frontend initialization failed\n",
929 core->name);
930 return -EINVAL;
931 }
932
933 /* Ensure all frontends negotiate bus access */
934 dev->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
935
936 /* Put the analog decoder in standby to keep it quiet */
937 cx88_call_i2c_clients(core, TUNER_SET_STANDBY, NULL);
938
939 /* register everything */
940 return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev,
941 &dev->pci->dev, adapter_nr);
942
943 frontend_detach:
944 if (dev->dvb.frontend) {
945 dvb_frontend_detach(dev->dvb.frontend);
946 dev->dvb.frontend = NULL;
947 }
948 return -EINVAL;
949 }
950
951 /* ----------------------------------------------------------- */
952
953 /* CX8802 MPEG -> mini driver - We have been given the hardware */
954 static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
955 {
956 struct cx88_core *core = drv->core;
957 int err = 0;
958 dprintk( 1, "%s\n", __func__);
959
960 switch (core->boardnr) {
961 case CX88_BOARD_HAUPPAUGE_HVR1300:
962 /* We arrive here with either the cx23416 or the cx22702
963 * on the bus. Take the bus from the cx23416 and enable the
964 * cx22702 demod
965 */
966 cx_set(MO_GP0_IO, 0x00000080); /* cx22702 out of reset and enable */
967 cx_clear(MO_GP0_IO, 0x00000004);
968 udelay(1000);
969 break;
970 default:
971 err = -ENODEV;
972 }
973 return err;
974 }
975
976 /* CX8802 MPEG -> mini driver - We no longer have the hardware */
977 static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
978 {
979 struct cx88_core *core = drv->core;
980 int err = 0;
981 dprintk( 1, "%s\n", __func__);
982
983 switch (core->boardnr) {
984 case CX88_BOARD_HAUPPAUGE_HVR1300:
985 /* Do Nothing, leave the cx22702 on the bus. */
986 break;
987 default:
988 err = -ENODEV;
989 }
990 return err;
991 }
992
993 static int cx8802_dvb_probe(struct cx8802_driver *drv)
994 {
995 struct cx88_core *core = drv->core;
996 struct cx8802_dev *dev = drv->core->dvbdev;
997 int err;
998
999 dprintk( 1, "%s\n", __func__);
1000 dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
1001 core->boardnr,
1002 core->name,
1003 core->pci_bus,
1004 core->pci_slot);
1005
1006 err = -ENODEV;
1007 if (!(core->board.mpeg & CX88_MPEG_DVB))
1008 goto fail_core;
1009
1010 /* If vp3054 isn't enabled, a stub will just return 0 */
1011 err = vp3054_i2c_probe(dev);
1012 if (0 != err)
1013 goto fail_core;
1014
1015 /* dvb stuff */
1016 printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
1017 videobuf_queue_sg_init(&dev->dvb.dvbq, &dvb_qops,
1018 &dev->pci->dev, &dev->slock,
1019 V4L2_BUF_TYPE_VIDEO_CAPTURE,
1020 V4L2_FIELD_TOP,
1021 sizeof(struct cx88_buffer),
1022 dev);
1023 err = dvb_register(dev);
1024 if (err != 0)
1025 printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
1026 core->name, err);
1027
1028 fail_core:
1029 return err;
1030 }
1031
1032 static int cx8802_dvb_remove(struct cx8802_driver *drv)
1033 {
1034 struct cx8802_dev *dev = drv->core->dvbdev;
1035
1036 /* dvb */
1037 if (dev->dvb.frontend)
1038 videobuf_dvb_unregister(&dev->dvb);
1039
1040 vp3054_i2c_remove(dev);
1041
1042 return 0;
1043 }
1044
1045 static struct cx8802_driver cx8802_dvb_driver = {
1046 .type_id = CX88_MPEG_DVB,
1047 .hw_access = CX8802_DRVCTL_SHARED,
1048 .probe = cx8802_dvb_probe,
1049 .remove = cx8802_dvb_remove,
1050 .advise_acquire = cx8802_dvb_advise_acquire,
1051 .advise_release = cx8802_dvb_advise_release,
1052 };
1053
1054 static int dvb_init(void)
1055 {
1056 printk(KERN_INFO "cx88/2: cx2388x dvb driver version %d.%d.%d loaded\n",
1057 (CX88_VERSION_CODE >> 16) & 0xff,
1058 (CX88_VERSION_CODE >> 8) & 0xff,
1059 CX88_VERSION_CODE & 0xff);
1060 #ifdef SNAPSHOT
1061 printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
1062 SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
1063 #endif
1064 return cx8802_register_driver(&cx8802_dvb_driver);
1065 }
1066
1067 static void dvb_fini(void)
1068 {
1069 cx8802_unregister_driver(&cx8802_dvb_driver);
1070 }
1071
1072 module_init(dvb_init);
1073 module_exit(dvb_fini);
1074
1075 /*
1076 * Local variables:
1077 * c-basic-offset: 8
1078 * compile-command: "make DVB=1"
1079 * End:
1080 */
Linux kernel - Deliverables
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