drivers/media/video/cx88/cx88-tvaudio.c

   1 /*
   2
   3     cx88x-audio.c - Conexant CX23880/23881 audio downstream driver driver
   4
   5      (c) 2001 Michael Eskin, Tom Zakrajsek [Windows version]
   6      (c) 2002 Yurij Sysoev <yurij@naturesoft.net>
   7      (c) 2003 Gerd Knorr <kraxel@bytesex.org>
   8
   9     -----------------------------------------------------------------------
  10
  11     Lot of voodoo here.  Even the data sheet doesn't help to
  12     understand what is going on here, the documentation for the audio
  13     part of the cx2388x chip is *very* bad.
  14
  15     Some of this comes from party done linux driver sources I got from
  16     [undocumented].
  17
  18     Some comes from the dscaler sources, one of the dscaler driver guy works
  19     for Conexant ...
  20
  21     -----------------------------------------------------------------------
  22
  23     This program is free software; you can redistribute it and/or modify
  24     it under the terms of the GNU General Public License as published by
  25     the Free Software Foundation; either version 2 of the License, or
  26     (at your option) any later version.
  27
  28     This program is distributed in the hope that it will be useful,
  29     but WITHOUT ANY WARRANTY; without even the implied warranty of
  30     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  31     GNU General Public License for more details.
  32
  33     You should have received a copy of the GNU General Public License
  34     along with this program; if not, write to the Free Software
  35     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  36 */
  37
  38 #include <linux/module.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/errno.h>
  41 #include <linux/freezer.h>
  42 #include <linux/kernel.h>
  43 #include <linux/slab.h>
  44 #include <linux/mm.h>
  45 #include <linux/poll.h>
  46 #include <linux/pci.h>
  47 #include <linux/signal.h>
  48 #include <linux/ioport.h>
  49 #include <linux/types.h>
  50 #include <linux/interrupt.h>
  51 #include <linux/vmalloc.h>
  52 #include <linux/init.h>
  53 #include <linux/smp_lock.h>
  54 #include <linux/delay.h>
  55 #include <linux/kthread.h>
  56
  57 #include "cx88.h"
  58
  59 static unsigned int audio_debug = 0;
  60 module_param(audio_debug, int, 0644);
  61 MODULE_PARM_DESC(audio_debug, "enable debug messages [audio]");
  62
  63 static unsigned int always_analog = 0;
  64 module_param(always_analog,int,0644);
  65 MODULE_PARM_DESC(always_analog,"force analog audio out");
  66
  67
  68 #define dprintk(fmt, arg...)    if (audio_debug) \
  69         printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
  70
  71 /* ----------------------------------------------------------- */
  72
  73 static char *aud_ctl_names[64] = {
  74         [EN_BTSC_FORCE_MONO] = "BTSC_FORCE_MONO",
  75         [EN_BTSC_FORCE_STEREO] = "BTSC_FORCE_STEREO",
  76         [EN_BTSC_FORCE_SAP] = "BTSC_FORCE_SAP",
  77         [EN_BTSC_AUTO_STEREO] = "BTSC_AUTO_STEREO",
  78         [EN_BTSC_AUTO_SAP] = "BTSC_AUTO_SAP",
  79         [EN_A2_FORCE_MONO1] = "A2_FORCE_MONO1",
  80         [EN_A2_FORCE_MONO2] = "A2_FORCE_MONO2",
  81         [EN_A2_FORCE_STEREO] = "A2_FORCE_STEREO",
  82         [EN_A2_AUTO_MONO2] = "A2_AUTO_MONO2",
  83         [EN_A2_AUTO_STEREO] = "A2_AUTO_STEREO",
  84         [EN_EIAJ_FORCE_MONO1] = "EIAJ_FORCE_MONO1",
  85         [EN_EIAJ_FORCE_MONO2] = "EIAJ_FORCE_MONO2",
  86         [EN_EIAJ_FORCE_STEREO] = "EIAJ_FORCE_STEREO",
  87         [EN_EIAJ_AUTO_MONO2] = "EIAJ_AUTO_MONO2",
  88         [EN_EIAJ_AUTO_STEREO] = "EIAJ_AUTO_STEREO",
  89         [EN_NICAM_FORCE_MONO1] = "NICAM_FORCE_MONO1",
  90         [EN_NICAM_FORCE_MONO2] = "NICAM_FORCE_MONO2",
  91         [EN_NICAM_FORCE_STEREO] = "NICAM_FORCE_STEREO",
  92         [EN_NICAM_AUTO_MONO2] = "NICAM_AUTO_MONO2",
  93         [EN_NICAM_AUTO_STEREO] = "NICAM_AUTO_STEREO",
  94         [EN_FMRADIO_FORCE_MONO] = "FMRADIO_FORCE_MONO",
  95         [EN_FMRADIO_FORCE_STEREO] = "FMRADIO_FORCE_STEREO",
  96         [EN_FMRADIO_AUTO_STEREO] = "FMRADIO_AUTO_STEREO",
  97 };
  98
  99 struct rlist {
 100         u32 reg;
 101         u32 val;
 102 };
 103
 104 static void set_audio_registers(struct cx88_core *core, const struct rlist *l)
 105 {
 106         int i;
 107
 108         for (i = 0; l[i].reg; i++) {
 109                 switch (l[i].reg) {
 110                 case AUD_PDF_DDS_CNST_BYTE2:
 111                 case AUD_PDF_DDS_CNST_BYTE1:
 112                 case AUD_PDF_DDS_CNST_BYTE0:
 113                 case AUD_QAM_MODE:
 114                 case AUD_PHACC_FREQ_8MSB:
 115                 case AUD_PHACC_FREQ_8LSB:
 116                         cx_writeb(l[i].reg, l[i].val);
 117                         break;
 118                 default:
 119                         cx_write(l[i].reg, l[i].val);
 120                         break;
 121                 }
 122         }
 123 }
 124
 125 static void set_audio_start(struct cx88_core *core, u32 mode)
 126 {
 127         /* mute */
 128         cx_write(AUD_VOL_CTL, (1 << 6));
 129
 130         /* start programming */
 131         cx_write(AUD_INIT, mode);
 132         cx_write(AUD_INIT_LD, 0x0001);
 133         cx_write(AUD_SOFT_RESET, 0x0001);
 134 }
 135
 136 static void set_audio_finish(struct cx88_core *core, u32 ctl)
 137 {
 138         u32 volume;
 139
 140         /* restart dma; This avoids buzz in NICAM and is good in others  */
 141         cx88_stop_audio_dma(core);
 142         cx_write(AUD_RATE_THRES_DMD, 0x000000C0);
 143         cx88_start_audio_dma(core);
 144
 145         if (cx88_boards[core->board].mpeg & CX88_MPEG_BLACKBIRD) {
 146                 cx_write(AUD_I2SINPUTCNTL, 4);
 147                 cx_write(AUD_BAUDRATE, 1);
 148                 /* 'pass-thru mode': this enables the i2s output to the mpeg encoder */
 149                 cx_set(AUD_CTL, EN_I2SOUT_ENABLE);
 150                 cx_write(AUD_I2SOUTPUTCNTL, 1);
 151                 cx_write(AUD_I2SCNTL, 0);
 152                 /* cx_write(AUD_APB_IN_RATE_ADJ, 0); */
 153         }
 154         if ((always_analog) || (!(cx88_boards[core->board].mpeg & CX88_MPEG_BLACKBIRD))) {
 155                 ctl |= EN_DAC_ENABLE;
 156                 cx_write(AUD_CTL, ctl);
 157         }
 158
 159         /* finish programming */
 160         cx_write(AUD_SOFT_RESET, 0x0000);
 161
 162         /* unmute */
 163         volume = cx_sread(SHADOW_AUD_VOL_CTL);
 164         cx_swrite(SHADOW_AUD_VOL_CTL, AUD_VOL_CTL, volume);
 165 }
 166
 167 /* ----------------------------------------------------------- */
 168
 169 static void set_audio_standard_BTSC(struct cx88_core *core, unsigned int sap,
 170                                     u32 mode)
 171 {
 172         static const struct rlist btsc[] = {
 173                 {AUD_AFE_12DB_EN, 0x00000001},
 174                 {AUD_OUT1_SEL, 0x00000013},
 175                 {AUD_OUT1_SHIFT, 0x00000000},
 176                 {AUD_POLY0_DDS_CONSTANT, 0x0012010c},
 177                 {AUD_DMD_RA_DDS, 0x00c3e7aa},
 178                 {AUD_DBX_IN_GAIN, 0x00004734},
 179                 {AUD_DBX_WBE_GAIN, 0x00004640},
 180                 {AUD_DBX_SE_GAIN, 0x00008d31},
 181                 {AUD_DCOC_0_SRC, 0x0000001a},
 182                 {AUD_IIR1_4_SEL, 0x00000021},
 183                 {AUD_DCOC_PASS_IN, 0x00000003},
 184                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
 185                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
 186                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
 187                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
 188                 {AUD_DN0_FREQ, 0x0000283b},
 189                 {AUD_DN2_SRC_SEL, 0x00000008},
 190                 {AUD_DN2_FREQ, 0x00003000},
 191                 {AUD_DN2_AFC, 0x00000002},
 192                 {AUD_DN2_SHFT, 0x00000000},
 193                 {AUD_IIR2_2_SEL, 0x00000020},
 194                 {AUD_IIR2_2_SHIFT, 0x00000000},
 195                 {AUD_IIR2_3_SEL, 0x0000001f},
 196                 {AUD_IIR2_3_SHIFT, 0x00000000},
 197                 {AUD_CRDC1_SRC_SEL, 0x000003ce},
 198                 {AUD_CRDC1_SHIFT, 0x00000000},
 199                 {AUD_CORDIC_SHIFT_1, 0x00000007},
 200                 {AUD_DCOC_1_SRC, 0x0000001b},
 201                 {AUD_DCOC1_SHIFT, 0x00000000},
 202                 {AUD_RDSI_SEL, 0x00000008},
 203                 {AUD_RDSQ_SEL, 0x00000008},
 204                 {AUD_RDSI_SHIFT, 0x00000000},
 205                 {AUD_RDSQ_SHIFT, 0x00000000},
 206                 {AUD_POLYPH80SCALEFAC, 0x00000003},
 207                 { /* end of list */ },
 208         };
 209         static const struct rlist btsc_sap[] = {
 210                 {AUD_AFE_12DB_EN, 0x00000001},
 211                 {AUD_DBX_IN_GAIN, 0x00007200},
 212                 {AUD_DBX_WBE_GAIN, 0x00006200},
 213                 {AUD_DBX_SE_GAIN, 0x00006200},
 214                 {AUD_IIR1_1_SEL, 0x00000000},
 215                 {AUD_IIR1_3_SEL, 0x00000001},
 216                 {AUD_DN1_SRC_SEL, 0x00000007},
 217                 {AUD_IIR1_4_SHIFT, 0x00000006},
 218                 {AUD_IIR2_1_SHIFT, 0x00000000},
 219                 {AUD_IIR2_2_SHIFT, 0x00000000},
 220                 {AUD_IIR3_0_SHIFT, 0x00000000},
 221                 {AUD_IIR3_1_SHIFT, 0x00000000},
 222                 {AUD_IIR3_0_SEL, 0x0000000d},
 223                 {AUD_IIR3_1_SEL, 0x0000000e},
 224                 {AUD_DEEMPH1_SRC_SEL, 0x00000014},
 225                 {AUD_DEEMPH1_SHIFT, 0x00000000},
 226                 {AUD_DEEMPH1_G0, 0x00004000},
 227                 {AUD_DEEMPH1_A0, 0x00000000},
 228                 {AUD_DEEMPH1_B0, 0x00000000},
 229                 {AUD_DEEMPH1_A1, 0x00000000},
 230                 {AUD_DEEMPH1_B1, 0x00000000},
 231                 {AUD_OUT0_SEL, 0x0000003f},
 232                 {AUD_OUT1_SEL, 0x0000003f},
 233                 {AUD_DN1_AFC, 0x00000002},
 234                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
 235                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
 236                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
 237                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
 238                 {AUD_IIR1_0_SEL, 0x0000001d},
 239                 {AUD_IIR1_2_SEL, 0x0000001e},
 240                 {AUD_IIR2_1_SEL, 0x00000002},
 241                 {AUD_IIR2_2_SEL, 0x00000004},
 242                 {AUD_IIR3_2_SEL, 0x0000000f},
 243                 {AUD_DCOC2_SHIFT, 0x00000001},
 244                 {AUD_IIR3_2_SHIFT, 0x00000001},
 245                 {AUD_DEEMPH0_SRC_SEL, 0x00000014},
 246                 {AUD_CORDIC_SHIFT_1, 0x00000006},
 247                 {AUD_POLY0_DDS_CONSTANT, 0x000e4db2},
 248                 {AUD_DMD_RA_DDS, 0x00f696e6},
 249                 {AUD_IIR2_3_SEL, 0x00000025},
 250                 {AUD_IIR1_4_SEL, 0x00000021},
 251                 {AUD_DN1_FREQ, 0x0000c965},
 252                 {AUD_DCOC_PASS_IN, 0x00000003},
 253                 {AUD_DCOC_0_SRC, 0x0000001a},
 254                 {AUD_DCOC_1_SRC, 0x0000001b},
 255                 {AUD_DCOC1_SHIFT, 0x00000000},
 256                 {AUD_RDSI_SEL, 0x00000009},
 257                 {AUD_RDSQ_SEL, 0x00000009},
 258                 {AUD_RDSI_SHIFT, 0x00000000},
 259                 {AUD_RDSQ_SHIFT, 0x00000000},
 260                 {AUD_POLYPH80SCALEFAC, 0x00000003},
 261                 { /* end of list */ },
 262         };
 263
 264         mode |= EN_FMRADIO_EN_RDS;
 265
 266         if (sap) {
 267                 dprintk("%s SAP (status: unknown)\n", __FUNCTION__);
 268                 set_audio_start(core, SEL_SAP);
 269                 set_audio_registers(core, btsc_sap);
 270                 set_audio_finish(core, mode);
 271         } else {
 272                 dprintk("%s (status: known-good)\n", __FUNCTION__);
 273                 set_audio_start(core, SEL_BTSC);
 274                 set_audio_registers(core, btsc);
 275                 set_audio_finish(core, mode);
 276         }
 277 }
 278
 279 static void set_audio_standard_NICAM(struct cx88_core *core, u32 mode)
 280 {
 281         static const struct rlist nicam_l[] = {
 282                 {AUD_AFE_12DB_EN, 0x00000001},
 283                 {AUD_RATE_ADJ1, 0x00000060},
 284                 {AUD_RATE_ADJ2, 0x000000F9},
 285                 {AUD_RATE_ADJ3, 0x000001CC},
 286                 {AUD_RATE_ADJ4, 0x000002B3},
 287                 {AUD_RATE_ADJ5, 0x00000726},
 288                 {AUD_DEEMPHDENOM1_R, 0x0000F3D0},
 289                 {AUD_DEEMPHDENOM2_R, 0x00000000},
 290                 {AUD_ERRLOGPERIOD_R, 0x00000064},
 291                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF},
 292                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001F},
 293                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000F},
 294                 {AUD_POLYPH80SCALEFAC, 0x00000003},
 295                 {AUD_DMD_RA_DDS, 0x00C00000},
 296                 {AUD_PLL_INT, 0x0000001E},
 297                 {AUD_PLL_DDS, 0x00000000},
 298                 {AUD_PLL_FRAC, 0x0000E542},
 299                 {AUD_START_TIMER, 0x00000000},
 300                 {AUD_DEEMPHNUMER1_R, 0x000353DE},
 301                 {AUD_DEEMPHNUMER2_R, 0x000001B1},
 302                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
 303                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
 304                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
 305                 {AUD_QAM_MODE, 0x05},
 306                 {AUD_PHACC_FREQ_8MSB, 0x34},
 307                 {AUD_PHACC_FREQ_8LSB, 0x4C},
 308                 {AUD_DEEMPHGAIN_R, 0x00006680},
 309                 {AUD_RATE_THRES_DMD, 0x000000C0},
 310                 { /* end of list */ },
 311         };
 312
 313         static const struct rlist nicam_bgdki_common[] = {
 314                 {AUD_AFE_12DB_EN, 0x00000001},
 315                 {AUD_RATE_ADJ1, 0x00000010},
 316                 {AUD_RATE_ADJ2, 0x00000040},
 317                 {AUD_RATE_ADJ3, 0x00000100},
 318                 {AUD_RATE_ADJ4, 0x00000400},
 319                 {AUD_RATE_ADJ5, 0x00001000},
 320                 {AUD_ERRLOGPERIOD_R, 0x00000fff},
 321                 {AUD_ERRINTRPTTHSHLD1_R, 0x000003ff},
 322                 {AUD_ERRINTRPTTHSHLD2_R, 0x000000ff},
 323                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000003f},
 324                 {AUD_POLYPH80SCALEFAC, 0x00000003},
 325                 {AUD_DEEMPHGAIN_R, 0x000023c2},
 326                 {AUD_DEEMPHNUMER1_R, 0x0002a7bc},
 327                 {AUD_DEEMPHNUMER2_R, 0x0003023e},
 328                 {AUD_DEEMPHDENOM1_R, 0x0000f3d0},
 329                 {AUD_DEEMPHDENOM2_R, 0x00000000},
 330                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
 331                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
 332                 {AUD_QAM_MODE, 0x05},
 333                 { /* end of list */ },
 334         };
 335
 336         static const struct rlist nicam_i[] = {
 337                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
 338                 {AUD_PHACC_FREQ_8MSB, 0x3a},
 339                 {AUD_PHACC_FREQ_8LSB, 0x93},
 340                 { /* end of list */ },
 341         };
 342
 343         static const struct rlist nicam_default[] = {
 344                 {AUD_PDF_DDS_CNST_BYTE0, 0x16},
 345                 {AUD_PHACC_FREQ_8MSB, 0x34},
 346                 {AUD_PHACC_FREQ_8LSB, 0x4c},
 347                 { /* end of list */ },
 348         };
 349
 350         set_audio_start(core,SEL_NICAM);
 351         switch (core->tvaudio) {
 352         case WW_L:
 353                 dprintk("%s SECAM-L NICAM (status: devel)\n", __FUNCTION__);
 354                 set_audio_registers(core, nicam_l);
 355                 break;
 356         case WW_I:
 357                 dprintk("%s PAL-I NICAM (status: known-good)\n", __FUNCTION__);
 358                 set_audio_registers(core, nicam_bgdki_common);
 359                 set_audio_registers(core, nicam_i);
 360                 break;
 361         default:
 362                 dprintk("%s PAL-BGDK NICAM (status: known-good)\n", __FUNCTION__);
 363                 set_audio_registers(core, nicam_bgdki_common);
 364                 set_audio_registers(core, nicam_default);
 365                 break;
 366         };
 367
 368         mode |= EN_DMTRX_LR | EN_DMTRX_BYPASS;
 369         set_audio_finish(core, mode);
 370 }
 371
 372 static void set_audio_standard_A2(struct cx88_core *core, u32 mode)
 373 {
 374         static const struct rlist a2_bgdk_common[] = {
 375                 {AUD_ERRLOGPERIOD_R, 0x00000064},
 376                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff},
 377                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f},
 378                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000f},
 379                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
 380                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
 381                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
 382                 {AUD_QAM_MODE, 0x05},
 383                 {AUD_PHACC_FREQ_8MSB, 0x34},
 384                 {AUD_PHACC_FREQ_8LSB, 0x4c},
 385                 {AUD_RATE_ADJ1, 0x00000100},
 386                 {AUD_RATE_ADJ2, 0x00000200},
 387                 {AUD_RATE_ADJ3, 0x00000300},
 388                 {AUD_RATE_ADJ4, 0x00000400},
 389                 {AUD_RATE_ADJ5, 0x00000500},
 390                 {AUD_THR_FR, 0x00000000},
 391                 {AAGC_HYST, 0x0000001a},
 392                 {AUD_PILOT_BQD_1_K0, 0x0000755b},
 393                 {AUD_PILOT_BQD_1_K1, 0x00551340},
 394                 {AUD_PILOT_BQD_1_K2, 0x006d30be},
 395                 {AUD_PILOT_BQD_1_K3, 0xffd394af},
 396                 {AUD_PILOT_BQD_1_K4, 0x00400000},
 397                 {AUD_PILOT_BQD_2_K0, 0x00040000},
 398                 {AUD_PILOT_BQD_2_K1, 0x002a4841},
 399                 {AUD_PILOT_BQD_2_K2, 0x00400000},
 400                 {AUD_PILOT_BQD_2_K3, 0x00000000},
 401                 {AUD_PILOT_BQD_2_K4, 0x00000000},
 402                 {AUD_MODE_CHG_TIMER, 0x00000040},
 403                 {AUD_AFE_12DB_EN, 0x00000001},
 404                 {AUD_CORDIC_SHIFT_0, 0x00000007},
 405                 {AUD_CORDIC_SHIFT_1, 0x00000007},
 406                 {AUD_DEEMPH0_G0, 0x00000380},
 407                 {AUD_DEEMPH1_G0, 0x00000380},
 408                 {AUD_DCOC_0_SRC, 0x0000001a},
 409                 {AUD_DCOC0_SHIFT, 0x00000000},
 410                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
 411                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
 412                 {AUD_DCOC_PASS_IN, 0x00000003},
 413                 {AUD_IIR3_0_SEL, 0x00000021},
 414                 {AUD_DN2_AFC, 0x00000002},
 415                 {AUD_DCOC_1_SRC, 0x0000001b},
 416                 {AUD_DCOC1_SHIFT, 0x00000000},
 417                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
 418                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
 419                 {AUD_IIR3_1_SEL, 0x00000023},
 420                 {AUD_RDSI_SEL, 0x00000017},
 421                 {AUD_RDSI_SHIFT, 0x00000000},
 422                 {AUD_RDSQ_SEL, 0x00000017},
 423                 {AUD_RDSQ_SHIFT, 0x00000000},
 424                 {AUD_PLL_INT, 0x0000001e},
 425                 {AUD_PLL_DDS, 0x00000000},
 426                 {AUD_PLL_FRAC, 0x0000e542},
 427                 {AUD_POLYPH80SCALEFAC, 0x00000001},
 428                 {AUD_START_TIMER, 0x00000000},
 429                 { /* end of list */ },
 430         };
 431
 432         static const struct rlist a2_bg[] = {
 433                 {AUD_DMD_RA_DDS, 0x002a4f2f},
 434                 {AUD_C1_UP_THR, 0x00007000},
 435                 {AUD_C1_LO_THR, 0x00005400},
 436                 {AUD_C2_UP_THR, 0x00005400},
 437                 {AUD_C2_LO_THR, 0x00003000},
 438                 { /* end of list */ },
 439         };
 440
 441         static const struct rlist a2_dk[] = {
 442                 {AUD_DMD_RA_DDS, 0x002a4f2f},
 443                 {AUD_C1_UP_THR, 0x00007000},
 444                 {AUD_C1_LO_THR, 0x00005400},
 445                 {AUD_C2_UP_THR, 0x00005400},
 446                 {AUD_C2_LO_THR, 0x00003000},
 447                 {AUD_DN0_FREQ, 0x00003a1c},
 448                 {AUD_DN2_FREQ, 0x0000d2e0},
 449                 { /* end of list */ },
 450         };
 451
 452         static const struct rlist a1_i[] = {
 453                 {AUD_ERRLOGPERIOD_R, 0x00000064},
 454                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff},
 455                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f},
 456                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000f},
 457                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
 458                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
 459                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
 460                 {AUD_QAM_MODE, 0x05},
 461                 {AUD_PHACC_FREQ_8MSB, 0x3a},
 462                 {AUD_PHACC_FREQ_8LSB, 0x93},
 463                 {AUD_DMD_RA_DDS, 0x002a4f2f},
 464                 {AUD_PLL_INT, 0x0000001e},
 465                 {AUD_PLL_DDS, 0x00000004},
 466                 {AUD_PLL_FRAC, 0x0000e542},
 467                 {AUD_RATE_ADJ1, 0x00000100},
 468                 {AUD_RATE_ADJ2, 0x00000200},
 469                 {AUD_RATE_ADJ3, 0x00000300},
 470                 {AUD_RATE_ADJ4, 0x00000400},
 471                 {AUD_RATE_ADJ5, 0x00000500},
 472                 {AUD_THR_FR, 0x00000000},
 473                 {AUD_PILOT_BQD_1_K0, 0x0000755b},
 474                 {AUD_PILOT_BQD_1_K1, 0x00551340},
 475                 {AUD_PILOT_BQD_1_K2, 0x006d30be},
 476                 {AUD_PILOT_BQD_1_K3, 0xffd394af},
 477                 {AUD_PILOT_BQD_1_K4, 0x00400000},
 478                 {AUD_PILOT_BQD_2_K0, 0x00040000},
 479                 {AUD_PILOT_BQD_2_K1, 0x002a4841},
 480                 {AUD_PILOT_BQD_2_K2, 0x00400000},
 481                 {AUD_PILOT_BQD_2_K3, 0x00000000},
 482                 {AUD_PILOT_BQD_2_K4, 0x00000000},
 483                 {AUD_MODE_CHG_TIMER, 0x00000060},
 484                 {AUD_AFE_12DB_EN, 0x00000001},
 485                 {AAGC_HYST, 0x0000000a},
 486                 {AUD_CORDIC_SHIFT_0, 0x00000007},
 487                 {AUD_CORDIC_SHIFT_1, 0x00000007},
 488                 {AUD_C1_UP_THR, 0x00007000},
 489                 {AUD_C1_LO_THR, 0x00005400},
 490                 {AUD_C2_UP_THR, 0x00005400},
 491                 {AUD_C2_LO_THR, 0x00003000},
 492                 {AUD_DCOC_0_SRC, 0x0000001a},
 493                 {AUD_DCOC0_SHIFT, 0x00000000},
 494                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
 495                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
 496                 {AUD_DCOC_PASS_IN, 0x00000003},
 497                 {AUD_IIR3_0_SEL, 0x00000021},
 498                 {AUD_DN2_AFC, 0x00000002},
 499                 {AUD_DCOC_1_SRC, 0x0000001b},
 500                 {AUD_DCOC1_SHIFT, 0x00000000},
 501                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
 502                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
 503                 {AUD_IIR3_1_SEL, 0x00000023},
 504                 {AUD_DN0_FREQ, 0x000035a3},
 505                 {AUD_DN2_FREQ, 0x000029c7},
 506                 {AUD_CRDC0_SRC_SEL, 0x00000511},
 507                 {AUD_IIR1_0_SEL, 0x00000001},
 508                 {AUD_IIR1_1_SEL, 0x00000000},
 509                 {AUD_IIR3_2_SEL, 0x00000003},
 510                 {AUD_IIR3_2_SHIFT, 0x00000000},
 511                 {AUD_IIR3_0_SEL, 0x00000002},
 512                 {AUD_IIR2_0_SEL, 0x00000021},
 513                 {AUD_IIR2_0_SHIFT, 0x00000002},
 514                 {AUD_DEEMPH0_SRC_SEL, 0x0000000b},
 515                 {AUD_DEEMPH1_SRC_SEL, 0x0000000b},
 516                 {AUD_POLYPH80SCALEFAC, 0x00000001},
 517                 {AUD_START_TIMER, 0x00000000},
 518                 { /* end of list */ },
 519         };
 520
 521         static const struct rlist am_l[] = {
 522                 {AUD_ERRLOGPERIOD_R, 0x00000064},
 523                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF},
 524                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001F},
 525                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000F},
 526                 {AUD_PDF_DDS_CNST_BYTE2, 0x48},
 527                 {AUD_PDF_DDS_CNST_BYTE1, 0x3D},
 528                 {AUD_QAM_MODE, 0x00},
 529                 {AUD_PDF_DDS_CNST_BYTE0, 0xf5},
 530                 {AUD_PHACC_FREQ_8MSB, 0x3a},
 531                 {AUD_PHACC_FREQ_8LSB, 0x4a},
 532                 {AUD_DEEMPHGAIN_R, 0x00006680},
 533                 {AUD_DEEMPHNUMER1_R, 0x000353DE},
 534                 {AUD_DEEMPHNUMER2_R, 0x000001B1},
 535                 {AUD_DEEMPHDENOM1_R, 0x0000F3D0},
 536                 {AUD_DEEMPHDENOM2_R, 0x00000000},
 537                 {AUD_FM_MODE_ENABLE, 0x00000007},
 538                 {AUD_POLYPH80SCALEFAC, 0x00000003},
 539                 {AUD_AFE_12DB_EN, 0x00000001},
 540                 {AAGC_GAIN, 0x00000000},
 541                 {AAGC_HYST, 0x00000018},
 542                 {AAGC_DEF, 0x00000020},
 543                 {AUD_DN0_FREQ, 0x00000000},
 544                 {AUD_POLY0_DDS_CONSTANT, 0x000E4DB2},
 545                 {AUD_DCOC_0_SRC, 0x00000021},
 546                 {AUD_IIR1_0_SEL, 0x00000000},
 547                 {AUD_IIR1_0_SHIFT, 0x00000007},
 548                 {AUD_IIR1_1_SEL, 0x00000002},
 549                 {AUD_IIR1_1_SHIFT, 0x00000000},
 550                 {AUD_DCOC_1_SRC, 0x00000003},
 551                 {AUD_DCOC1_SHIFT, 0x00000000},
 552                 {AUD_DCOC_PASS_IN, 0x00000000},
 553                 {AUD_IIR1_2_SEL, 0x00000023},
 554                 {AUD_IIR1_2_SHIFT, 0x00000000},
 555                 {AUD_IIR1_3_SEL, 0x00000004},
 556                 {AUD_IIR1_3_SHIFT, 0x00000007},
 557                 {AUD_IIR1_4_SEL, 0x00000005},
 558                 {AUD_IIR1_4_SHIFT, 0x00000007},
 559                 {AUD_IIR3_0_SEL, 0x00000007},
 560                 {AUD_IIR3_0_SHIFT, 0x00000000},
 561                 {AUD_DEEMPH0_SRC_SEL, 0x00000011},
 562                 {AUD_DEEMPH0_SHIFT, 0x00000000},
 563                 {AUD_DEEMPH0_G0, 0x00007000},
 564                 {AUD_DEEMPH0_A0, 0x00000000},
 565                 {AUD_DEEMPH0_B0, 0x00000000},
 566                 {AUD_DEEMPH0_A1, 0x00000000},
 567                 {AUD_DEEMPH0_B1, 0x00000000},
 568                 {AUD_DEEMPH1_SRC_SEL, 0x00000011},
 569                 {AUD_DEEMPH1_SHIFT, 0x00000000},
 570                 {AUD_DEEMPH1_G0, 0x00007000},
 571                 {AUD_DEEMPH1_A0, 0x00000000},
 572                 {AUD_DEEMPH1_B0, 0x00000000},
 573                 {AUD_DEEMPH1_A1, 0x00000000},
 574                 {AUD_DEEMPH1_B1, 0x00000000},
 575                 {AUD_OUT0_SEL, 0x0000003F},
 576                 {AUD_OUT1_SEL, 0x0000003F},
 577                 {AUD_DMD_RA_DDS, 0x00F5C285},
 578                 {AUD_PLL_INT, 0x0000001E},
 579                 {AUD_PLL_DDS, 0x00000000},
 580                 {AUD_PLL_FRAC, 0x0000E542},
 581                 {AUD_RATE_ADJ1, 0x00000100},
 582                 {AUD_RATE_ADJ2, 0x00000200},
 583                 {AUD_RATE_ADJ3, 0x00000300},
 584                 {AUD_RATE_ADJ4, 0x00000400},
 585                 {AUD_RATE_ADJ5, 0x00000500},
 586                 {AUD_RATE_THRES_DMD, 0x000000C0},
 587                 { /* end of list */ },
 588         };
 589
 590         static const struct rlist a2_deemph50[] = {
 591                 {AUD_DEEMPH0_G0, 0x00000380},
 592                 {AUD_DEEMPH1_G0, 0x00000380},
 593                 {AUD_DEEMPHGAIN_R, 0x000011e1},
 594                 {AUD_DEEMPHNUMER1_R, 0x0002a7bc},
 595                 {AUD_DEEMPHNUMER2_R, 0x0003023c},
 596                 { /* end of list */ },
 597         };
 598
 599         set_audio_start(core, SEL_A2);
 600         switch (core->tvaudio) {
 601         case WW_BG:
 602                 dprintk("%s PAL-BG A1/2 (status: known-good)\n", __FUNCTION__);
 603                 set_audio_registers(core, a2_bgdk_common);
 604                 set_audio_registers(core, a2_bg);
 605                 set_audio_registers(core, a2_deemph50);
 606                 break;
 607         case WW_DK:
 608                 dprintk("%s PAL-DK A1/2 (status: known-good)\n", __FUNCTION__);
 609                 set_audio_registers(core, a2_bgdk_common);
 610                 set_audio_registers(core, a2_dk);
 611                 set_audio_registers(core, a2_deemph50);
 612                 break;
 613         case WW_I:
 614                 dprintk("%s PAL-I A1 (status: known-good)\n", __FUNCTION__);
 615                 set_audio_registers(core, a1_i);
 616                 set_audio_registers(core, a2_deemph50);
 617                 break;
 618         case WW_L:
 619                 dprintk("%s AM-L (status: devel)\n", __FUNCTION__);
 620                 set_audio_registers(core, am_l);
 621                 break;
 622         default:
 623                 dprintk("%s Warning: wrong value\n", __FUNCTION__);
 624                 return;
 625                 break;
 626         };
 627
 628         mode |= EN_FMRADIO_EN_RDS | EN_DMTRX_SUMDIFF;
 629         set_audio_finish(core, mode);
 630 }
 631
 632 static void set_audio_standard_EIAJ(struct cx88_core *core)
 633 {
 634         static const struct rlist eiaj[] = {
 635                 /* TODO: eiaj register settings are not there yet ... */
 636
 637                 { /* end of list */ },
 638         };
 639         dprintk("%s (status: unknown)\n", __FUNCTION__);
 640
 641         set_audio_start(core, SEL_EIAJ);
 642         set_audio_registers(core, eiaj);
 643         set_audio_finish(core, EN_EIAJ_AUTO_STEREO);
 644 }
 645
 646 static void set_audio_standard_FM(struct cx88_core *core,
 647                                   enum cx88_deemph_type deemph)
 648 {
 649         static const struct rlist fm_deemph_50[] = {
 650                 {AUD_DEEMPH0_G0, 0x0C45},
 651                 {AUD_DEEMPH0_A0, 0x6262},
 652                 {AUD_DEEMPH0_B0, 0x1C29},
 653                 {AUD_DEEMPH0_A1, 0x3FC66},
 654                 {AUD_DEEMPH0_B1, 0x399A},
 655
 656                 {AUD_DEEMPH1_G0, 0x0D80},
 657                 {AUD_DEEMPH1_A0, 0x6262},
 658                 {AUD_DEEMPH1_B0, 0x1C29},
 659                 {AUD_DEEMPH1_A1, 0x3FC66},
 660                 {AUD_DEEMPH1_B1, 0x399A},
 661
 662                 {AUD_POLYPH80SCALEFAC, 0x0003},
 663                 { /* end of list */ },
 664         };
 665         static const struct rlist fm_deemph_75[] = {
 666                 {AUD_DEEMPH0_G0, 0x091B},
 667                 {AUD_DEEMPH0_A0, 0x6B68},
 668                 {AUD_DEEMPH0_B0, 0x11EC},
 669                 {AUD_DEEMPH0_A1, 0x3FC66},
 670                 {AUD_DEEMPH0_B1, 0x399A},
 671
 672                 {AUD_DEEMPH1_G0, 0x0AA0},
 673                 {AUD_DEEMPH1_A0, 0x6B68},
 674                 {AUD_DEEMPH1_B0, 0x11EC},
 675                 {AUD_DEEMPH1_A1, 0x3FC66},
 676                 {AUD_DEEMPH1_B1, 0x399A},
 677
 678                 {AUD_POLYPH80SCALEFAC, 0x0003},
 679                 { /* end of list */ },
 680         };
 681
 682         /* It is enough to leave default values? */
 683         static const struct rlist fm_no_deemph[] = {
 684
 685                 {AUD_POLYPH80SCALEFAC, 0x0003},
 686                 { /* end of list */ },
 687         };
 688
 689         dprintk("%s (status: unknown)\n", __FUNCTION__);
 690         set_audio_start(core, SEL_FMRADIO);
 691
 692         switch (deemph) {
 693         case FM_NO_DEEMPH:
 694                 set_audio_registers(core, fm_no_deemph);
 695                 break;
 696
 697         case FM_DEEMPH_50:
 698                 set_audio_registers(core, fm_deemph_50);
 699                 break;
 700
 701         case FM_DEEMPH_75:
 702                 set_audio_registers(core, fm_deemph_75);
 703                 break;
 704         }
 705
 706         set_audio_finish(core, EN_FMRADIO_AUTO_STEREO);
 707 }
 708
 709 /* ----------------------------------------------------------- */
 710
 711 static int cx88_detect_nicam(struct cx88_core *core)
 712 {
 713         int i, j = 0;
 714
 715         dprintk("start nicam autodetect.\n");
 716
 717         for (i = 0; i < 6; i++) {
 718                 /* if bit1=1 then nicam is detected */
 719                 j += ((cx_read(AUD_NICAM_STATUS2) & 0x02) >> 1);
 720
 721                 if (j == 1) {
 722                         dprintk("nicam is detected.\n");
 723                         return 1;
 724                 }
 725
 726                 /* wait a little bit for next reading status */
 727                 msleep(10);
 728         }
 729
 730         dprintk("nicam is not detected.\n");
 731         return 0;
 732 }
 733
 734 void cx88_set_tvaudio(struct cx88_core *core)
 735 {
 736         switch (core->tvaudio) {
 737         case WW_BTSC:
 738                 set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO);
 739                 break;
 740         case WW_BG:
 741         case WW_DK:
 742         case WW_I:
 743         case WW_L:
 744                 /* prepare all dsp registers */
 745                 set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
 746
 747                 /* set nicam mode - otherwise
 748                    AUD_NICAM_STATUS2 contains wrong values */
 749                 set_audio_standard_NICAM(core, EN_NICAM_AUTO_STEREO);
 750                 if (0 == cx88_detect_nicam(core)) {
 751                         /* fall back to fm / am mono */
 752                         set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
 753                         core->use_nicam = 0;
 754                 } else {
 755                         core->use_nicam = 1;
 756                 }
 757                 break;
 758         case WW_EIAJ:
 759                 set_audio_standard_EIAJ(core);
 760                 break;
 761         case WW_FM:
 762                 set_audio_standard_FM(core, FM_NO_DEEMPH);
 763                 break;
 764         case WW_NONE:
 765         default:
 766                 printk("%s/0: unknown tv audio mode [%d]\n",
 767                        core->name, core->tvaudio);
 768                 break;
 769         }
 770         return;
 771 }
 772
 773 void cx88_newstation(struct cx88_core *core)
 774 {
 775         core->audiomode_manual = UNSET;
 776 }
 777
 778 void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t)
 779 {
 780         static char *m[] = { "stereo", "dual mono", "mono", "sap" };
 781         static char *p[] = { "no pilot", "pilot c1", "pilot c2", "?" };
 782         u32 reg, mode, pilot;
 783
 784         reg = cx_read(AUD_STATUS);
 785         mode = reg & 0x03;
 786         pilot = (reg >> 2) & 0x03;
 787
 788         if (core->astat != reg)
 789                 dprintk("AUD_STATUS: 0x%x [%s/%s] ctl=%s\n",
 790                         reg, m[mode], p[pilot],
 791                         aud_ctl_names[cx_read(AUD_CTL) & 63]);
 792         core->astat = reg;
 793
 794 /* TODO
 795        Reading from AUD_STATUS is not enough
 796        for auto-detecting sap/dual-fm/nicam.
 797        Add some code here later.
 798 */
 799
 800         return;
 801 }
 802
 803 void cx88_set_stereo(struct cx88_core *core, u32 mode, int manual)
 804 {
 805         u32 ctl = UNSET;
 806         u32 mask = UNSET;
 807
 808         if (manual) {
 809                 core->audiomode_manual = mode;
 810         } else {
 811                 if (UNSET != core->audiomode_manual)
 812                         return;
 813         }
 814         core->audiomode_current = mode;
 815
 816         switch (core->tvaudio) {
 817         case WW_BTSC:
 818                 switch (mode) {
 819                 case V4L2_TUNER_MODE_MONO:
 820                         set_audio_standard_BTSC(core, 0, EN_BTSC_FORCE_MONO);
 821                         break;
 822                 case V4L2_TUNER_MODE_LANG1:
 823                         set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO);
 824                         break;
 825                 case V4L2_TUNER_MODE_LANG2:
 826                         set_audio_standard_BTSC(core, 1, EN_BTSC_FORCE_SAP);
 827                         break;
 828                 case V4L2_TUNER_MODE_STEREO:
 829                 case V4L2_TUNER_MODE_LANG1_LANG2:
 830                         set_audio_standard_BTSC(core, 0, EN_BTSC_FORCE_STEREO);
 831                         break;
 832                 }
 833                 break;
 834         case WW_BG:
 835         case WW_DK:
 836         case WW_I:
 837         case WW_L:
 838                 if (1 == core->use_nicam) {
 839                         switch (mode) {
 840                         case V4L2_TUNER_MODE_MONO:
 841                         case V4L2_TUNER_MODE_LANG1:
 842                                 set_audio_standard_NICAM(core,
 843                                                          EN_NICAM_FORCE_MONO1);
 844                                 break;
 845                         case V4L2_TUNER_MODE_LANG2:
 846                                 set_audio_standard_NICAM(core,
 847                                                          EN_NICAM_FORCE_MONO2);
 848                                 break;
 849                         case V4L2_TUNER_MODE_STEREO:
 850                         case V4L2_TUNER_MODE_LANG1_LANG2:
 851                                 set_audio_standard_NICAM(core,
 852                                                          EN_NICAM_FORCE_STEREO);
 853                                 break;
 854                         }
 855                 } else {
 856                         if ((core->tvaudio == WW_I) || (core->tvaudio == WW_L)) {
 857                                 /* fall back to fm / am mono */
 858                                 set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
 859                         } else {
 860                                 /* TODO: Add A2 autodection */
 861                                 switch (mode) {
 862                                 case V4L2_TUNER_MODE_MONO:
 863                                 case V4L2_TUNER_MODE_LANG1:
 864                                         set_audio_standard_A2(core,
 865                                                               EN_A2_FORCE_MONO1);
 866                                         break;
 867                                 case V4L2_TUNER_MODE_LANG2:
 868                                         set_audio_standard_A2(core,
 869                                                               EN_A2_FORCE_MONO2);
 870                                         break;
 871                                 case V4L2_TUNER_MODE_STEREO:
 872                                 case V4L2_TUNER_MODE_LANG1_LANG2:
 873                                         set_audio_standard_A2(core,
 874                                                               EN_A2_FORCE_STEREO);
 875                                         break;
 876                                 }
 877                         }
 878                 }
 879                 break;
 880         case WW_FM:
 881                 switch (mode) {
 882                 case V4L2_TUNER_MODE_MONO:
 883                         ctl = EN_FMRADIO_FORCE_MONO;
 884                         mask = 0x3f;
 885                         break;
 886                 case V4L2_TUNER_MODE_STEREO:
 887                         ctl = EN_FMRADIO_AUTO_STEREO;
 888                         mask = 0x3f;
 889                         break;
 890                 }
 891                 break;
 892         }
 893
 894         if (UNSET != ctl) {
 895                 dprintk("cx88_set_stereo: mask 0x%x, ctl 0x%x "
 896                         "[status=0x%x,ctl=0x%x,vol=0x%x]\n",
 897                         mask, ctl, cx_read(AUD_STATUS),
 898                         cx_read(AUD_CTL), cx_sread(SHADOW_AUD_VOL_CTL));
 899                 cx_andor(AUD_CTL, mask, ctl);
 900         }
 901         return;
 902 }
 903
 904 int cx88_audio_thread(void *data)
 905 {
 906         struct cx88_core *core = data;
 907         struct v4l2_tuner t;
 908         u32 mode = 0;
 909
 910         dprintk("cx88: tvaudio thread started\n");
 911         for (;;) {
 912                 msleep_interruptible(1000);
 913                 if (kthread_should_stop())
 914                         break;
 915                 try_to_freeze();
 916
 917                 /* just monitor the audio status for now ... */
 918                 memset(&t, 0, sizeof(t));
 919                 cx88_get_stereo(core, &t);
 920
 921                 if (UNSET != core->audiomode_manual)
 922                         /* manually set, don't do anything. */
 923                         continue;
 924
 925                 /* monitor signal */
 926                 if (t.rxsubchans & V4L2_TUNER_SUB_STEREO)
 927                         mode = V4L2_TUNER_MODE_STEREO;
 928                 else
 929                         mode = V4L2_TUNER_MODE_MONO;
 930                 if (mode == core->audiomode_current)
 931                         continue;
 932
 933                 /* automatically switch to best available mode */
 934                 cx88_set_stereo(core, mode, 0);
 935         }
 936
 937         dprintk("cx88: tvaudio thread exiting\n");
 938         return 0;
 939 }
 940
 941 /* ----------------------------------------------------------- */
 942
 943 EXPORT_SYMBOL(cx88_set_tvaudio);
 944 EXPORT_SYMBOL(cx88_newstation);
 945 EXPORT_SYMBOL(cx88_set_stereo);
 946 EXPORT_SYMBOL(cx88_get_stereo);
 947 EXPORT_SYMBOL(cx88_audio_thread);
 948
 949 /*
 950  * Local variables:
 951  * c-basic-offset: 8
 952  * End:
 953  * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
 954  */