drivers/media/video/em28xx/em28xx-core.c

   1 /*
   2    em28xx-core.c - driver for Empia EM2800/EM2820/2840 USB video capture devices
   3
   4    Copyright (C) 2005 Ludovico Cavedon <cavedon@sssup.it>
   5                       Markus Rechberger <mrechberger@gmail.com>
   6                       Mauro Carvalho Chehab <mchehab@infradead.org>
   7                       Sascha Sommer <saschasommer@freenet.de>
   8
   9    This program is free software; you can redistribute it and/or modify
  10    it under the terms of the GNU General Public License as published by
  11    the Free Software Foundation; either version 2 of the License, or
  12    (at your option) any later version.
  13
  14    This program is distributed in the hope that it will be useful,
  15    but WITHOUT ANY WARRANTY; without even the implied warranty of
  16    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17    GNU General Public License for more details.
  18
  19    You should have received a copy of the GNU General Public License
  20    along with this program; if not, write to the Free Software
  21    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22  */
  23
  24 #include <linux/init.h>
  25 #include <linux/list.h>
  26 #include <linux/module.h>
  27 #include <linux/usb.h>
  28 #include <linux/vmalloc.h>
  29
  30 #include "em28xx.h"
  31
  32 /* #define ENABLE_DEBUG_ISOC_FRAMES */
  33
  34 static unsigned int core_debug;
  35 module_param(core_debug,int,0644);
  36 MODULE_PARM_DESC(core_debug,"enable debug messages [core]");
  37
  38 #define em28xx_coredbg(fmt, arg...) do {\
  39         if (core_debug) \
  40                 printk(KERN_INFO "%s %s :"fmt, \
  41                          dev->name, __func__ , ##arg); } while (0)
  42
  43 static unsigned int reg_debug;
  44 module_param(reg_debug,int,0644);
  45 MODULE_PARM_DESC(reg_debug,"enable debug messages [URB reg]");
  46
  47 #define em28xx_regdbg(fmt, arg...) do {\
  48         if (reg_debug) \
  49                 printk(KERN_INFO "%s %s :"fmt, \
  50                          dev->name, __func__ , ##arg); } while (0)
  51
  52 static int alt = EM28XX_PINOUT;
  53 module_param(alt, int, 0644);
  54 MODULE_PARM_DESC(alt, "alternate setting to use for video endpoint");
  55
  56 /* FIXME */
  57 #define em28xx_isocdbg(fmt, arg...) do {\
  58         if (core_debug) \
  59                 printk(KERN_INFO "%s %s :"fmt, \
  60                          dev->name, __func__ , ##arg); } while (0)
  61
  62 /*
  63  * em28xx_read_reg_req()
  64  * reads data from the usb device specifying bRequest
  65  */
  66 int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg,
  67                                    char *buf, int len)
  68 {
  69         int ret, byte;
  70
  71         if (dev->state & DEV_DISCONNECTED)
  72                 return -ENODEV;
  73
  74         if (len > URB_MAX_CTRL_SIZE)
  75                 return -EINVAL;
  76
  77         em28xx_regdbg("req=%02x, reg=%02x ", req, reg);
  78
  79         mutex_lock(&dev->ctrl_urb_lock);
  80         ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), req,
  81                               USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  82                               0x0000, reg, dev->urb_buf, len, HZ);
  83         if (ret < 0) {
  84                 if (reg_debug)
  85                         printk(" failed!\n");
  86                 mutex_unlock(&dev->ctrl_urb_lock);
  87                 return ret;
  88         }
  89
  90         if (len)
  91                 memcpy(buf, dev->urb_buf, len);
  92
  93         mutex_unlock(&dev->ctrl_urb_lock);
  94
  95         if (reg_debug) {
  96                 printk("%02x values: ", ret);
  97                 for (byte = 0; byte < len; byte++)
  98                         printk(" %02x", (unsigned char)buf[byte]);
  99                 printk("\n");
 100         }
 101
 102         return ret;
 103 }
 104
 105 /*
 106  * em28xx_read_reg_req()
 107  * reads data from the usb device specifying bRequest
 108  */
 109 int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg)
 110 {
 111         u8 val;
 112         int ret;
 113
 114         if (dev->state & DEV_DISCONNECTED)
 115                 return(-ENODEV);
 116
 117         em28xx_regdbg("req=%02x, reg=%02x:", req, reg);
 118
 119         mutex_lock(&dev->ctrl_urb_lock);
 120         ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), req,
 121                               USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
 122                               0x0000, reg, dev->urb_buf, 1, HZ);
 123         val = dev->urb_buf[0];
 124         mutex_unlock(&dev->ctrl_urb_lock);
 125
 126         if (ret < 0) {
 127                 printk(" failed!\n");
 128                 return ret;
 129         }
 130
 131         if (reg_debug)
 132                 printk("%02x\n", (unsigned char) val);
 133
 134         return val;
 135 }
 136
 137 int em28xx_read_reg(struct em28xx *dev, u16 reg)
 138 {
 139         return em28xx_read_reg_req(dev, USB_REQ_GET_STATUS, reg);
 140 }
 141
 142 /*
 143  * em28xx_write_regs_req()
 144  * sends data to the usb device, specifying bRequest
 145  */
 146 int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf,
 147                                  int len)
 148 {
 149         int ret;
 150
 151         if (dev->state & DEV_DISCONNECTED)
 152                 return -ENODEV;
 153
 154         if ((len < 1) || (len > URB_MAX_CTRL_SIZE))
 155                 return -EINVAL;
 156
 157         em28xx_regdbg("req=%02x reg=%02x:", req, reg);
 158         if (reg_debug) {
 159                 int i;
 160                 for (i = 0; i < len; ++i)
 161                         printk(" %02x", (unsigned char)buf[i]);
 162                 printk("\n");
 163         }
 164
 165         mutex_lock(&dev->ctrl_urb_lock);
 166         memcpy(dev->urb_buf, buf, len);
 167         ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), req,
 168                               USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
 169                               0x0000, reg, dev->urb_buf, len, HZ);
 170         mutex_unlock(&dev->ctrl_urb_lock);
 171
 172         if (dev->wait_after_write)
 173                 msleep(dev->wait_after_write);
 174
 175         return ret;
 176 }
 177
 178 int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len)
 179 {
 180         int rc;
 181
 182         rc = em28xx_write_regs_req(dev, USB_REQ_GET_STATUS, reg, buf, len);
 183
 184         /* Stores GPO/GPIO values at the cache, if changed
 185            Only write values should be stored, since input on a GPIO
 186            register will return the input bits.
 187            Not sure what happens on reading GPO register.
 188          */
 189         if (rc >= 0) {
 190                 if (reg == dev->reg_gpo_num)
 191                         dev->reg_gpo = buf[0];
 192                 else if (reg == dev->reg_gpio_num)
 193                         dev->reg_gpio = buf[0];
 194         }
 195
 196         return rc;
 197 }
 198
 199 /* Write a single register */
 200 int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val)
 201 {
 202         return em28xx_write_regs(dev, reg, &val, 1);
 203 }
 204
 205 /*
 206  * em28xx_write_reg_bits()
 207  * sets only some bits (specified by bitmask) of a register, by first reading
 208  * the actual value
 209  */
 210 static int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val,
 211                                  u8 bitmask)
 212 {
 213         int oldval;
 214         u8 newval;
 215
 216         /* Uses cache for gpo/gpio registers */
 217         if (reg == dev->reg_gpo_num)
 218                 oldval = dev->reg_gpo;
 219         else if (reg == dev->reg_gpio_num)
 220                 oldval = dev->reg_gpio;
 221         else
 222                 oldval = em28xx_read_reg(dev, reg);
 223
 224         if (oldval < 0)
 225                 return oldval;
 226
 227         newval = (((u8) oldval) & ~bitmask) | (val & bitmask);
 228
 229         return em28xx_write_regs(dev, reg, &newval, 1);
 230 }
 231
 232 /*
 233  * em28xx_is_ac97_ready()
 234  * Checks if ac97 is ready
 235  */
 236 static int em28xx_is_ac97_ready(struct em28xx *dev)
 237 {
 238         int ret, i;
 239
 240         /* Wait up to 50 ms for AC97 command to complete */
 241         for (i = 0; i < 10; i++, msleep(5)) {
 242                 ret = em28xx_read_reg(dev, EM28XX_R43_AC97BUSY);
 243                 if (ret < 0)
 244                         return ret;
 245
 246                 if (!(ret & 0x01))
 247                         return 0;
 248         }
 249
 250         em28xx_warn("AC97 command still being executed: not handled properly!\n");
 251         return -EBUSY;
 252 }
 253
 254 /*
 255  * em28xx_read_ac97()
 256  * write a 16 bit value to the specified AC97 address (LSB first!)
 257  */
 258 static int em28xx_read_ac97(struct em28xx *dev, u8 reg)
 259 {
 260         int ret;
 261         u8 addr = (reg & 0x7f) | 0x80;
 262         u16 val;
 263
 264         ret = em28xx_is_ac97_ready(dev);
 265         if (ret < 0)
 266                 return ret;
 267
 268         ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
 269         if (ret < 0)
 270                 return ret;
 271
 272         ret = dev->em28xx_read_reg_req_len(dev, 0, EM28XX_R40_AC97LSB,
 273                                            (u8 *)&val, sizeof(val));
 274
 275         if (ret < 0)
 276                 return ret;
 277         return le16_to_cpu(val);
 278 }
 279
 280 /*
 281  * em28xx_write_ac97()
 282  * write a 16 bit value to the specified AC97 address (LSB first!)
 283  */
 284 static int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val)
 285 {
 286         int ret;
 287         u8 addr = reg & 0x7f;
 288         __le16 value;
 289
 290         value = cpu_to_le16(val);
 291
 292         ret = em28xx_is_ac97_ready(dev);
 293         if (ret < 0)
 294                 return ret;
 295
 296         ret = em28xx_write_regs(dev, EM28XX_R40_AC97LSB, (u8 *) &value, 2);
 297         if (ret < 0)
 298                 return ret;
 299
 300         ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
 301         if (ret < 0)
 302                 return ret;
 303
 304         return 0;
 305 }
 306
 307 struct em28xx_vol_table {
 308         enum em28xx_amux mux;
 309         u8               reg;
 310 };
 311
 312 static struct em28xx_vol_table inputs[] = {
 313         { EM28XX_AMUX_VIDEO,    AC97_VIDEO_VOL   },
 314         { EM28XX_AMUX_LINE_IN,  AC97_LINEIN_VOL  },
 315         { EM28XX_AMUX_PHONE,    AC97_PHONE_VOL   },
 316         { EM28XX_AMUX_MIC,      AC97_MIC_VOL     },
 317         { EM28XX_AMUX_CD,       AC97_CD_VOL      },
 318         { EM28XX_AMUX_AUX,      AC97_AUX_VOL     },
 319         { EM28XX_AMUX_PCM_OUT,  AC97_PCM_OUT_VOL },
 320 };
 321
 322 static int set_ac97_input(struct em28xx *dev)
 323 {
 324         int ret, i;
 325         enum em28xx_amux amux = dev->ctl_ainput;
 326
 327         /* EM28XX_AMUX_VIDEO2 is a special case used to indicate that
 328            em28xx should point to LINE IN, while AC97 should use VIDEO
 329          */
 330         if (amux == EM28XX_AMUX_VIDEO2)
 331                 amux = EM28XX_AMUX_VIDEO;
 332
 333         /* Mute all entres but the one that were selected */
 334         for (i = 0; i < ARRAY_SIZE(inputs); i++) {
 335                 if (amux == inputs[i].mux)
 336                         ret = em28xx_write_ac97(dev, inputs[i].reg, 0x0808);
 337                 else
 338                         ret = em28xx_write_ac97(dev, inputs[i].reg, 0x8000);
 339
 340                 if (ret < 0)
 341                         em28xx_warn("couldn't setup AC97 register %d\n",
 342                                      inputs[i].reg);
 343         }
 344         return 0;
 345 }
 346
 347 static int em28xx_set_audio_source(struct em28xx *dev)
 348 {
 349         int ret;
 350         u8 input;
 351
 352         if (dev->is_em2800) {
 353                 if (dev->ctl_ainput == EM28XX_AMUX_VIDEO)
 354                         input = EM2800_AUDIO_SRC_TUNER;
 355                 else
 356                         input = EM2800_AUDIO_SRC_LINE;
 357
 358                 ret = em28xx_write_regs(dev, EM2800_R08_AUDIOSRC, &input, 1);
 359                 if (ret < 0)
 360                         return ret;
 361         }
 362
 363         if (dev->has_msp34xx)
 364                 input = EM28XX_AUDIO_SRC_TUNER;
 365         else {
 366                 switch (dev->ctl_ainput) {
 367                 case EM28XX_AMUX_VIDEO:
 368                         input = EM28XX_AUDIO_SRC_TUNER;
 369                         break;
 370                 default:
 371                         input = EM28XX_AUDIO_SRC_LINE;
 372                         break;
 373                 }
 374         }
 375
 376         ret = em28xx_write_reg_bits(dev, EM28XX_R0E_AUDIOSRC, input, 0xc0);
 377         if (ret < 0)
 378                 return ret;
 379         msleep(5);
 380
 381         switch (dev->audio_mode.ac97) {
 382         case EM28XX_NO_AC97:
 383                 break;
 384         default:
 385                 ret = set_ac97_input(dev);
 386         }
 387
 388         return ret;
 389 }
 390
 391 struct em28xx_vol_table outputs[] = {
 392         { EM28XX_AOUT_MASTER, AC97_MASTER_VOL      },
 393         { EM28XX_AOUT_LINE,   AC97_LINE_LEVEL_VOL  },
 394         { EM28XX_AOUT_MONO,   AC97_MASTER_MONO_VOL },
 395         { EM28XX_AOUT_LFE,    AC97_LFE_MASTER_VOL  },
 396         { EM28XX_AOUT_SURR,   AC97_SURR_MASTER_VOL },
 397 };
 398
 399 int em28xx_audio_analog_set(struct em28xx *dev)
 400 {
 401         int ret, i;
 402         u8 xclk;
 403
 404         if (!dev->audio_mode.has_audio)
 405                 return 0;
 406
 407         /* It is assumed that all devices use master volume for output.
 408            It would be possible to use also line output.
 409          */
 410         if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
 411                 /* Mute all outputs */
 412                 for (i = 0; i < ARRAY_SIZE(outputs); i++) {
 413                         ret = em28xx_write_ac97(dev, outputs[i].reg, 0x8000);
 414                         if (ret < 0)
 415                                 em28xx_warn("couldn't setup AC97 register %d\n",
 416                                      outputs[i].reg);
 417                 }
 418         }
 419
 420         xclk = dev->xclk & 0x7f;
 421         if (!dev->mute)
 422                 xclk |= 0x80;
 423
 424         ret = em28xx_write_reg(dev, EM28XX_R0F_XCLK, xclk);
 425         if (ret < 0)
 426                 return ret;
 427         msleep(10);
 428
 429         /* Selects the proper audio input */
 430         ret = em28xx_set_audio_source(dev);
 431
 432         /* Sets volume */
 433         if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
 434                 int vol;
 435
 436                 /* LSB: left channel - both channels with the same level */
 437                 vol = (0x1f - dev->volume) | ((0x1f - dev->volume) << 8);
 438
 439                 /* Mute device, if needed */
 440                 if (dev->mute)
 441                         vol |= 0x8000;
 442
 443                 /* Sets volume */
 444                 for (i = 0; i < ARRAY_SIZE(outputs); i++) {
 445                         if (dev->ctl_aoutput & outputs[i].mux)
 446                                 ret = em28xx_write_ac97(dev, outputs[i].reg,
 447                                                         vol);
 448                         if (ret < 0)
 449                                 em28xx_warn("couldn't setup AC97 register %d\n",
 450                                      outputs[i].reg);
 451                 }
 452         }
 453
 454         return ret;
 455 }
 456 EXPORT_SYMBOL_GPL(em28xx_audio_analog_set);
 457
 458 int em28xx_audio_setup(struct em28xx *dev)
 459 {
 460         int vid1, vid2, feat, cfg;
 461         u32 vid;
 462
 463         if (dev->chip_id == CHIP_ID_EM2874) {
 464                 /* Digital only device - don't load any alsa module */
 465                 dev->audio_mode.has_audio = 0;
 466                 dev->has_audio_class = 0;
 467                 dev->has_alsa_audio = 0;
 468                 return 0;
 469         }
 470
 471         /* If device doesn't support Usb Audio Class, use vendor class */
 472         if (!dev->has_audio_class)
 473                 dev->has_alsa_audio = 1;
 474
 475         dev->audio_mode.has_audio = 1;
 476
 477         /* See how this device is configured */
 478         cfg = em28xx_read_reg(dev, EM28XX_R00_CHIPCFG);
 479         if (cfg < 0)
 480                 cfg = EM28XX_CHIPCFG_AC97; /* Be conservative */
 481         else
 482                 em28xx_info("Config register raw data: 0x%02x\n", cfg);
 483
 484         if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
 485                     EM28XX_CHIPCFG_I2S_3_SAMPRATES) {
 486                 em28xx_info("I2S Audio (3 sample rates)\n");
 487                 dev->audio_mode.i2s_3rates = 1;
 488         }
 489         if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
 490                     EM28XX_CHIPCFG_I2S_5_SAMPRATES) {
 491                 em28xx_info("I2S Audio (5 sample rates)\n");
 492                 dev->audio_mode.i2s_5rates = 1;
 493         }
 494
 495         if (!(cfg & EM28XX_CHIPCFG_AC97)) {
 496                 dev->audio_mode.ac97 = EM28XX_NO_AC97;
 497                 goto init_audio;
 498         }
 499
 500         dev->audio_mode.ac97 = EM28XX_AC97_OTHER;
 501
 502         vid1 = em28xx_read_ac97(dev, AC97_VENDOR_ID1);
 503         if (vid1 < 0) {
 504                 /* Device likely doesn't support AC97 */
 505                 em28xx_warn("AC97 chip type couldn't be determined\n");
 506                 goto init_audio;
 507         }
 508
 509         vid2 = em28xx_read_ac97(dev, AC97_VENDOR_ID2);
 510         if (vid2 < 0)
 511                 goto init_audio;
 512
 513         vid = vid1 << 16 | vid2;
 514
 515         dev->audio_mode.ac97_vendor_id = vid;
 516         em28xx_warn("AC97 vendor ID = 0x%08x\n", vid);
 517
 518         feat = em28xx_read_ac97(dev, AC97_RESET);
 519         if (feat < 0)
 520                 goto init_audio;
 521
 522         dev->audio_mode.ac97_feat = feat;
 523         em28xx_warn("AC97 features = 0x%04x\n", feat);
 524
 525         /* Try to identify what audio processor we have */
 526         if ((vid == 0xffffffff) && (feat == 0x6a90))
 527                 dev->audio_mode.ac97 = EM28XX_AC97_EM202;
 528         else if ((vid >> 8) == 0x838476)
 529                 dev->audio_mode.ac97 = EM28XX_AC97_SIGMATEL;
 530
 531 init_audio:
 532         /* Reports detected AC97 processor */
 533         switch (dev->audio_mode.ac97) {
 534         case EM28XX_NO_AC97:
 535                 em28xx_info("No AC97 audio processor\n");
 536                 break;
 537         case EM28XX_AC97_EM202:
 538                 em28xx_info("Empia 202 AC97 audio processor detected\n");
 539                 break;
 540         case EM28XX_AC97_SIGMATEL:
 541                 em28xx_info("Sigmatel audio processor detected(stac 97%02x)\n",
 542                             dev->audio_mode.ac97_vendor_id & 0xff);
 543                 break;
 544         case EM28XX_AC97_OTHER:
 545                 em28xx_warn("Unknown AC97 audio processor detected!\n");
 546                 break;
 547         default:
 548                 break;
 549         }
 550
 551         return em28xx_audio_analog_set(dev);
 552 }
 553 EXPORT_SYMBOL_GPL(em28xx_audio_setup);
 554
 555 int em28xx_colorlevels_set_default(struct em28xx *dev)
 556 {
 557         em28xx_write_regs(dev, EM28XX_R20_YGAIN, "\x10", 1);    /* contrast */
 558         em28xx_write_regs(dev, EM28XX_R21_YOFFSET, "\x00", 1);  /* brightness */
 559         em28xx_write_regs(dev, EM28XX_R22_UVGAIN, "\x10", 1);   /* saturation */
 560         em28xx_write_regs(dev, EM28XX_R23_UOFFSET, "\x00", 1);
 561         em28xx_write_regs(dev, EM28XX_R24_VOFFSET, "\x00", 1);
 562         em28xx_write_regs(dev, EM28XX_R25_SHARPNESS, "\x00", 1);
 563
 564         em28xx_write_regs(dev, EM28XX_R14_GAMMA, "\x20", 1);
 565         em28xx_write_regs(dev, EM28XX_R15_RGAIN, "\x20", 1);
 566         em28xx_write_regs(dev, EM28XX_R16_GGAIN, "\x20", 1);
 567         em28xx_write_regs(dev, EM28XX_R17_BGAIN, "\x20", 1);
 568         em28xx_write_regs(dev, EM28XX_R18_ROFFSET, "\x00", 1);
 569         em28xx_write_regs(dev, EM28XX_R19_GOFFSET, "\x00", 1);
 570         return em28xx_write_regs(dev, EM28XX_R1A_BOFFSET, "\x00", 1);
 571 }
 572
 573 int em28xx_capture_start(struct em28xx *dev, int start)
 574 {
 575         int rc;
 576
 577         if (dev->chip_id == CHIP_ID_EM2874) {
 578                 /* The Transport Stream Enable Register moved in em2874 */
 579                 if (!start) {
 580                         rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE,
 581                                                    0x00,
 582                                                    EM2874_TS1_CAPTURE_ENABLE);
 583                         return rc;
 584                 }
 585
 586                 /* Enable Transport Stream */
 587                 rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE,
 588                                            EM2874_TS1_CAPTURE_ENABLE,
 589                                            EM2874_TS1_CAPTURE_ENABLE);
 590                 return rc;
 591         }
 592
 593
 594         /* FIXME: which is the best order? */
 595         /* video registers are sampled by VREF */
 596         rc = em28xx_write_reg_bits(dev, EM28XX_R0C_USBSUSP,
 597                                    start ? 0x10 : 0x00, 0x10);
 598         if (rc < 0)
 599                 return rc;
 600
 601         if (!start) {
 602                 /* disable video capture */
 603                 rc = em28xx_write_regs(dev, EM28XX_R12_VINENABLE, "\x27", 1);
 604                 return rc;
 605         }
 606
 607         /* enable video capture */
 608         rc = em28xx_write_regs_req(dev, 0x00, 0x48, "\x00", 1);
 609
 610         if (dev->mode == EM28XX_ANALOG_MODE)
 611                 rc = em28xx_write_regs(dev, EM28XX_R12_VINENABLE, "\x67", 1);
 612         else
 613                 rc = em28xx_write_regs(dev, EM28XX_R12_VINENABLE, "\x37", 1);
 614
 615         msleep(6);
 616
 617         return rc;
 618 }
 619
 620 int em28xx_outfmt_set_yuv422(struct em28xx *dev)
 621 {
 622         em28xx_write_regs(dev, EM28XX_R27_OUTFMT, "\x34", 1);
 623         em28xx_write_regs(dev, EM28XX_R10_VINMODE, "\x10", 1);
 624         return em28xx_write_regs(dev, EM28XX_R11_VINCTRL, "\x11", 1);
 625 }
 626
 627 static int em28xx_accumulator_set(struct em28xx *dev, u8 xmin, u8 xmax,
 628                                   u8 ymin, u8 ymax)
 629 {
 630         em28xx_coredbg("em28xx Scale: (%d,%d)-(%d,%d)\n",
 631                         xmin, ymin, xmax, ymax);
 632
 633         em28xx_write_regs(dev, EM28XX_R28_XMIN, &xmin, 1);
 634         em28xx_write_regs(dev, EM28XX_R29_XMAX, &xmax, 1);
 635         em28xx_write_regs(dev, EM28XX_R2A_YMIN, &ymin, 1);
 636         return em28xx_write_regs(dev, EM28XX_R2B_YMAX, &ymax, 1);
 637 }
 638
 639 static int em28xx_capture_area_set(struct em28xx *dev, u8 hstart, u8 vstart,
 640                                    u16 width, u16 height)
 641 {
 642         u8 cwidth = width;
 643         u8 cheight = height;
 644         u8 overflow = (height >> 7 & 0x02) | (width >> 8 & 0x01);
 645
 646         em28xx_coredbg("em28xx Area Set: (%d,%d)\n",
 647                         (width | (overflow & 2) << 7),
 648                         (height | (overflow & 1) << 8));
 649
 650         em28xx_write_regs(dev, EM28XX_R1C_HSTART, &hstart, 1);
 651         em28xx_write_regs(dev, EM28XX_R1D_VSTART, &vstart, 1);
 652         em28xx_write_regs(dev, EM28XX_R1E_CWIDTH, &cwidth, 1);
 653         em28xx_write_regs(dev, EM28XX_R1F_CHEIGHT, &cheight, 1);
 654         return em28xx_write_regs(dev, EM28XX_R1B_OFLOW, &overflow, 1);
 655 }
 656
 657 static int em28xx_scaler_set(struct em28xx *dev, u16 h, u16 v)
 658 {
 659         u8 mode;
 660         /* the em2800 scaler only supports scaling down to 50% */
 661         if (dev->is_em2800)
 662                 mode = (v ? 0x20 : 0x00) | (h ? 0x10 : 0x00);
 663         else {
 664                 u8 buf[2];
 665                 buf[0] = h;
 666                 buf[1] = h >> 8;
 667                 em28xx_write_regs(dev, EM28XX_R30_HSCALELOW, (char *)buf, 2);
 668                 buf[0] = v;
 669                 buf[1] = v >> 8;
 670                 em28xx_write_regs(dev, EM28XX_R32_VSCALELOW, (char *)buf, 2);
 671                 /* it seems that both H and V scalers must be active
 672                    to work correctly */
 673                 mode = (h || v)? 0x30: 0x00;
 674         }
 675         return em28xx_write_reg_bits(dev, EM28XX_R26_COMPR, mode, 0x30);
 676 }
 677
 678 /* FIXME: this only function read values from dev */
 679 int em28xx_resolution_set(struct em28xx *dev)
 680 {
 681         int width, height;
 682         width = norm_maxw(dev);
 683         height = norm_maxh(dev) >> 1;
 684
 685         em28xx_outfmt_set_yuv422(dev);
 686         em28xx_accumulator_set(dev, 1, (width - 4) >> 2, 1, (height - 4) >> 2);
 687         em28xx_capture_area_set(dev, 0, 0, width >> 2, height >> 2);
 688         return em28xx_scaler_set(dev, dev->hscale, dev->vscale);
 689 }
 690
 691 int em28xx_set_alternate(struct em28xx *dev)
 692 {
 693         int errCode, prev_alt = dev->alt;
 694         int i;
 695         unsigned int min_pkt_size = dev->width * 2 + 4;
 696
 697         /* When image size is bigger than a certain value,
 698            the frame size should be increased, otherwise, only
 699            green screen will be received.
 700          */
 701         if (dev->width * 2 * dev->height > 720 * 240 * 2)
 702                 min_pkt_size *= 2;
 703
 704         for (i = 0; i < dev->num_alt; i++) {
 705                 /* stop when the selected alt setting offers enough bandwidth */
 706                 if (dev->alt_max_pkt_size[i] >= min_pkt_size) {
 707                         dev->alt = i;
 708                         break;
 709                 /* otherwise make sure that we end up with the maximum bandwidth
 710                    because the min_pkt_size equation might be wrong...
 711                 */
 712                 } else if (dev->alt_max_pkt_size[i] >
 713                            dev->alt_max_pkt_size[dev->alt])
 714                         dev->alt = i;
 715         }
 716
 717         if (dev->alt != prev_alt) {
 718                 em28xx_coredbg("minimum isoc packet size: %u (alt=%d)\n",
 719                                 min_pkt_size, dev->alt);
 720                 dev->max_pkt_size = dev->alt_max_pkt_size[dev->alt];
 721                 em28xx_coredbg("setting alternate %d with wMaxPacketSize=%u\n",
 722                                dev->alt, dev->max_pkt_size);
 723                 errCode = usb_set_interface(dev->udev, 0, dev->alt);
 724                 if (errCode < 0) {
 725                         em28xx_errdev("cannot change alternate number to %d (error=%i)\n",
 726                                         dev->alt, errCode);
 727                         return errCode;
 728                 }
 729         }
 730         return 0;
 731 }
 732
 733 int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio)
 734 {
 735         int rc = 0;
 736
 737         if (!gpio)
 738                 return rc;
 739
 740         dev->em28xx_write_regs_req(dev, 0x00, 0x48, "\x00", 1);
 741         if (dev->mode == EM28XX_ANALOG_MODE)
 742                 dev->em28xx_write_regs_req(dev, 0x00, 0x12, "\x67", 1);
 743         else
 744                 dev->em28xx_write_regs_req(dev, 0x00, 0x12, "\x37", 1);
 745         msleep(6);
 746
 747         /* Send GPIO reset sequences specified at board entry */
 748         while (gpio->sleep >= 0) {
 749                 if (gpio->reg >= 0) {
 750                         rc = em28xx_write_reg_bits(dev,
 751                                                    gpio->reg,
 752                                                    gpio->val,
 753                                                    gpio->mask);
 754                         if (rc < 0)
 755                                 return rc;
 756                 }
 757                 if (gpio->sleep > 0)
 758                         msleep(gpio->sleep);
 759
 760                 gpio++;
 761         }
 762         return rc;
 763 }
 764
 765 int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode)
 766 {
 767         if (dev->mode == set_mode)
 768                 return 0;
 769
 770         if (set_mode == EM28XX_MODE_UNDEFINED) {
 771                 dev->mode = set_mode;
 772                 return 0;
 773         }
 774
 775         dev->mode = set_mode;
 776
 777         if (dev->mode == EM28XX_DIGITAL_MODE)
 778                 return em28xx_gpio_set(dev, dev->digital_gpio);
 779         else
 780                 return em28xx_gpio_set(dev, dev->analog_gpio);
 781 }
 782 EXPORT_SYMBOL_GPL(em28xx_set_mode);
 783
 784 /* ------------------------------------------------------------------
 785         URB control
 786    ------------------------------------------------------------------*/
 787
 788 /*
 789  * IRQ callback, called by URB callback
 790  */
 791 static void em28xx_irq_callback(struct urb *urb)
 792 {
 793         struct em28xx_dmaqueue  *dma_q = urb->context;
 794         struct em28xx *dev = container_of(dma_q, struct em28xx, vidq);
 795         int rc, i;
 796
 797         /* Copy data from URB */
 798         spin_lock(&dev->slock);
 799         rc = dev->isoc_ctl.isoc_copy(dev, urb);
 800         spin_unlock(&dev->slock);
 801
 802         /* Reset urb buffers */
 803         for (i = 0; i < urb->number_of_packets; i++) {
 804                 urb->iso_frame_desc[i].status = 0;
 805                 urb->iso_frame_desc[i].actual_length = 0;
 806         }
 807         urb->status = 0;
 808
 809         urb->status = usb_submit_urb(urb, GFP_ATOMIC);
 810         if (urb->status) {
 811                 em28xx_isocdbg("urb resubmit failed (error=%i)\n",
 812                                urb->status);
 813         }
 814 }
 815
 816 /*
 817  * Stop and Deallocate URBs
 818  */
 819 void em28xx_uninit_isoc(struct em28xx *dev)
 820 {
 821         struct urb *urb;
 822         int i;
 823
 824         em28xx_isocdbg("em28xx: called em28xx_uninit_isoc\n");
 825
 826         dev->isoc_ctl.nfields = -1;
 827         for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
 828                 urb = dev->isoc_ctl.urb[i];
 829                 if (urb) {
 830                         usb_kill_urb(urb);
 831                         usb_unlink_urb(urb);
 832                         if (dev->isoc_ctl.transfer_buffer[i]) {
 833                                 usb_buffer_free(dev->udev,
 834                                         urb->transfer_buffer_length,
 835                                         dev->isoc_ctl.transfer_buffer[i],
 836                                         urb->transfer_dma);
 837                         }
 838                         usb_free_urb(urb);
 839                         dev->isoc_ctl.urb[i] = NULL;
 840                 }
 841                 dev->isoc_ctl.transfer_buffer[i] = NULL;
 842         }
 843
 844         kfree(dev->isoc_ctl.urb);
 845         kfree(dev->isoc_ctl.transfer_buffer);
 846
 847         dev->isoc_ctl.urb = NULL;
 848         dev->isoc_ctl.transfer_buffer = NULL;
 849         dev->isoc_ctl.num_bufs = 0;
 850
 851         em28xx_capture_start(dev, 0);
 852 }
 853 EXPORT_SYMBOL_GPL(em28xx_uninit_isoc);
 854
 855 /*
 856  * Allocate URBs and start IRQ
 857  */
 858 int em28xx_init_isoc(struct em28xx *dev, int max_packets,
 859                      int num_bufs, int max_pkt_size,
 860                      int (*isoc_copy) (struct em28xx *dev, struct urb *urb))
 861 {
 862         struct em28xx_dmaqueue *dma_q = &dev->vidq;
 863         int i;
 864         int sb_size, pipe;
 865         struct urb *urb;
 866         int j, k;
 867         int rc;
 868
 869         em28xx_isocdbg("em28xx: called em28xx_prepare_isoc\n");
 870
 871         /* De-allocates all pending stuff */
 872         em28xx_uninit_isoc(dev);
 873
 874         dev->isoc_ctl.isoc_copy = isoc_copy;
 875         dev->isoc_ctl.num_bufs = num_bufs;
 876
 877         dev->isoc_ctl.urb = kzalloc(sizeof(void *)*num_bufs,  GFP_KERNEL);
 878         if (!dev->isoc_ctl.urb) {
 879                 em28xx_errdev("cannot alloc memory for usb buffers\n");
 880                 return -ENOMEM;
 881         }
 882
 883         dev->isoc_ctl.transfer_buffer = kzalloc(sizeof(void *)*num_bufs,
 884                                               GFP_KERNEL);
 885         if (!dev->isoc_ctl.transfer_buffer) {
 886                 em28xx_errdev("cannot allocate memory for usbtransfer\n");
 887                 kfree(dev->isoc_ctl.urb);
 888                 return -ENOMEM;
 889         }
 890
 891         dev->isoc_ctl.max_pkt_size = max_pkt_size;
 892         dev->isoc_ctl.buf = NULL;
 893
 894         sb_size = max_packets * dev->isoc_ctl.max_pkt_size;
 895
 896         /* allocate urbs and transfer buffers */
 897         for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
 898                 urb = usb_alloc_urb(max_packets, GFP_KERNEL);
 899                 if (!urb) {
 900                         em28xx_err("cannot alloc isoc_ctl.urb %i\n", i);
 901                         em28xx_uninit_isoc(dev);
 902                         return -ENOMEM;
 903                 }
 904                 dev->isoc_ctl.urb[i] = urb;
 905
 906                 dev->isoc_ctl.transfer_buffer[i] = usb_buffer_alloc(dev->udev,
 907                         sb_size, GFP_KERNEL, &urb->transfer_dma);
 908                 if (!dev->isoc_ctl.transfer_buffer[i]) {
 909                         em28xx_err("unable to allocate %i bytes for transfer"
 910                                         " buffer %i%s\n",
 911                                         sb_size, i,
 912                                         in_interrupt()?" while in int":"");
 913                         em28xx_uninit_isoc(dev);
 914                         return -ENOMEM;
 915                 }
 916                 memset(dev->isoc_ctl.transfer_buffer[i], 0, sb_size);
 917
 918                 /* FIXME: this is a hack - should be
 919                         'desc.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK'
 920                         should also be using 'desc.bInterval'
 921                  */
 922                 pipe = usb_rcvisocpipe(dev->udev,
 923                         dev->mode == EM28XX_ANALOG_MODE ? 0x82 : 0x84);
 924
 925                 usb_fill_int_urb(urb, dev->udev, pipe,
 926                                  dev->isoc_ctl.transfer_buffer[i], sb_size,
 927                                  em28xx_irq_callback, dma_q, 1);
 928
 929                 urb->number_of_packets = max_packets;
 930                 urb->transfer_flags = URB_ISO_ASAP;
 931
 932                 k = 0;
 933                 for (j = 0; j < max_packets; j++) {
 934                         urb->iso_frame_desc[j].offset = k;
 935                         urb->iso_frame_desc[j].length =
 936                                                 dev->isoc_ctl.max_pkt_size;
 937                         k += dev->isoc_ctl.max_pkt_size;
 938                 }
 939         }
 940
 941         init_waitqueue_head(&dma_q->wq);
 942
 943         em28xx_capture_start(dev, 1);
 944
 945         /* submit urbs and enables IRQ */
 946         for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
 947                 rc = usb_submit_urb(dev->isoc_ctl.urb[i], GFP_ATOMIC);
 948                 if (rc) {
 949                         em28xx_err("submit of urb %i failed (error=%i)\n", i,
 950                                    rc);
 951                         em28xx_uninit_isoc(dev);
 952                         return rc;
 953                 }
 954         }
 955
 956         return 0;
 957 }
 958 EXPORT_SYMBOL_GPL(em28xx_init_isoc);