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md/raid5: correctly update sync_completed when we reach max_resync
[deliverable/linux.git] / drivers / media / video / gspca / ov519.c
1 /**
2 * OV519 driver
3 *
4 * Copyright (C) 2008 Jean-Francois Moine (http://moinejf.free.fr)
5 *
6 * This module is adapted from the ov51x-jpeg package, which itself
7 * was adapted from the ov511 driver.
8 *
9 * Original copyright for the ov511 driver is:
10 *
11 * Copyright (c) 1999-2004 Mark W. McClelland
12 * Support for OV519, OV8610 Copyright (c) 2003 Joerg Heckenbach
13 *
14 * ov51x-jpeg original copyright is:
15 *
16 * Copyright (c) 2004-2007 Romain Beauxis <toots@rastageeks.org>
17 * Support for OV7670 sensors was contributed by Sam Skipsey <aoanla@yahoo.com>
18 *
19 * This program is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License as published by
21 * the Free Software Foundation; either version 2 of the License, or
22 * any later version.
23 *
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
28 *
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
32 *
33 */
34 #define MODULE_NAME "ov519"
35
36 #include "gspca.h"
37
38 MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
39 MODULE_DESCRIPTION("OV519 USB Camera Driver");
40 MODULE_LICENSE("GPL");
41
42 /* global parameters */
43 static int frame_rate;
44
45 /* Number of times to retry a failed I2C transaction. Increase this if you
46 * are getting "Failed to read sensor ID..." */
47 static int i2c_detect_tries = 10;
48
49 /* ov519 device descriptor */
50 struct sd {
51 struct gspca_dev gspca_dev; /* !! must be the first item */
52
53 /* Determined by sensor type */
54 __u8 sif;
55
56 __u8 brightness;
57 __u8 contrast;
58 __u8 colors;
59 __u8 hflip;
60 __u8 vflip;
61
62 __u8 stopped; /* Streaming is temporarily paused */
63
64 __u8 frame_rate; /* current Framerate (OV519 only) */
65 __u8 clockdiv; /* clockdiv override for OV519 only */
66
67 char sensor; /* Type of image sensor chip (SEN_*) */
68 #define SEN_UNKNOWN 0
69 #define SEN_OV6620 1
70 #define SEN_OV6630 2
71 #define SEN_OV7610 3
72 #define SEN_OV7620 4
73 #define SEN_OV7640 5
74 #define SEN_OV7670 6
75 #define SEN_OV76BE 7
76 #define SEN_OV8610 8
77 };
78
79 /* V4L2 controls supported by the driver */
80 static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val);
81 static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val);
82 static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val);
83 static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val);
84 static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val);
85 static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val);
86 static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val);
87 static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val);
88 static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val);
89 static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val);
90
91 static struct ctrl sd_ctrls[] = {
92 {
93 {
94 .id = V4L2_CID_BRIGHTNESS,
95 .type = V4L2_CTRL_TYPE_INTEGER,
96 .name = "Brightness",
97 .minimum = 0,
98 .maximum = 255,
99 .step = 1,
100 #define BRIGHTNESS_DEF 127
101 .default_value = BRIGHTNESS_DEF,
102 },
103 .set = sd_setbrightness,
104 .get = sd_getbrightness,
105 },
106 {
107 {
108 .id = V4L2_CID_CONTRAST,
109 .type = V4L2_CTRL_TYPE_INTEGER,
110 .name = "Contrast",
111 .minimum = 0,
112 .maximum = 255,
113 .step = 1,
114 #define CONTRAST_DEF 127
115 .default_value = CONTRAST_DEF,
116 },
117 .set = sd_setcontrast,
118 .get = sd_getcontrast,
119 },
120 {
121 {
122 .id = V4L2_CID_SATURATION,
123 .type = V4L2_CTRL_TYPE_INTEGER,
124 .name = "Color",
125 .minimum = 0,
126 .maximum = 255,
127 .step = 1,
128 #define COLOR_DEF 127
129 .default_value = COLOR_DEF,
130 },
131 .set = sd_setcolors,
132 .get = sd_getcolors,
133 },
134 /* next controls work with ov7670 only */
135 #define HFLIP_IDX 3
136 {
137 {
138 .id = V4L2_CID_HFLIP,
139 .type = V4L2_CTRL_TYPE_BOOLEAN,
140 .name = "Mirror",
141 .minimum = 0,
142 .maximum = 1,
143 .step = 1,
144 #define HFLIP_DEF 0
145 .default_value = HFLIP_DEF,
146 },
147 .set = sd_sethflip,
148 .get = sd_gethflip,
149 },
150 #define VFLIP_IDX 4
151 {
152 {
153 .id = V4L2_CID_VFLIP,
154 .type = V4L2_CTRL_TYPE_BOOLEAN,
155 .name = "Vflip",
156 .minimum = 0,
157 .maximum = 1,
158 .step = 1,
159 #define VFLIP_DEF 0
160 .default_value = VFLIP_DEF,
161 },
162 .set = sd_setvflip,
163 .get = sd_getvflip,
164 },
165 };
166
167 static const struct v4l2_pix_format vga_mode[] = {
168 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
169 .bytesperline = 320,
170 .sizeimage = 320 * 240 * 3 / 8 + 590,
171 .colorspace = V4L2_COLORSPACE_JPEG,
172 .priv = 1},
173 {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
174 .bytesperline = 640,
175 .sizeimage = 640 * 480 * 3 / 8 + 590,
176 .colorspace = V4L2_COLORSPACE_JPEG,
177 .priv = 0},
178 };
179 static const struct v4l2_pix_format sif_mode[] = {
180 {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
181 .bytesperline = 176,
182 .sizeimage = 176 * 144 * 3 / 8 + 590,
183 .colorspace = V4L2_COLORSPACE_JPEG,
184 .priv = 1},
185 {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
186 .bytesperline = 352,
187 .sizeimage = 352 * 288 * 3 / 8 + 590,
188 .colorspace = V4L2_COLORSPACE_JPEG,
189 .priv = 0},
190 };
191
192 /* OV519 Camera interface register numbers */
193 #define OV519_R10_H_SIZE 0x10
194 #define OV519_R11_V_SIZE 0x11
195 #define OV519_R12_X_OFFSETL 0x12
196 #define OV519_R13_X_OFFSETH 0x13
197 #define OV519_R14_Y_OFFSETL 0x14
198 #define OV519_R15_Y_OFFSETH 0x15
199 #define OV519_R16_DIVIDER 0x16
200 #define OV519_R20_DFR 0x20
201 #define OV519_R25_FORMAT 0x25
202
203 /* OV519 System Controller register numbers */
204 #define OV519_SYS_RESET1 0x51
205 #define OV519_SYS_EN_CLK1 0x54
206
207 #define OV519_GPIO_DATA_OUT0 0x71
208 #define OV519_GPIO_IO_CTRL0 0x72
209
210 #define OV511_ENDPOINT_ADDRESS 1 /* Isoc endpoint number */
211
212 /* I2C registers */
213 #define R51x_I2C_W_SID 0x41
214 #define R51x_I2C_SADDR_3 0x42
215 #define R51x_I2C_SADDR_2 0x43
216 #define R51x_I2C_R_SID 0x44
217 #define R51x_I2C_DATA 0x45
218 #define R518_I2C_CTL 0x47 /* OV518(+) only */
219
220 /* I2C ADDRESSES */
221 #define OV7xx0_SID 0x42
222 #define OV8xx0_SID 0xa0
223 #define OV6xx0_SID 0xc0
224
225 /* OV7610 registers */
226 #define OV7610_REG_GAIN 0x00 /* gain setting (5:0) */
227 #define OV7610_REG_SAT 0x03 /* saturation */
228 #define OV8610_REG_HUE 0x04 /* 04 reserved */
229 #define OV7610_REG_CNT 0x05 /* Y contrast */
230 #define OV7610_REG_BRT 0x06 /* Y brightness */
231 #define OV7610_REG_COM_C 0x14 /* misc common regs */
232 #define OV7610_REG_ID_HIGH 0x1c /* manufacturer ID MSB */
233 #define OV7610_REG_ID_LOW 0x1d /* manufacturer ID LSB */
234 #define OV7610_REG_COM_I 0x29 /* misc settings */
235
236 /* OV7670 registers */
237 #define OV7670_REG_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
238 #define OV7670_REG_BLUE 0x01 /* blue gain */
239 #define OV7670_REG_RED 0x02 /* red gain */
240 #define OV7670_REG_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */
241 #define OV7670_REG_COM1 0x04 /* Control 1 */
242 #define OV7670_REG_AECHH 0x07 /* AEC MS 5 bits */
243 #define OV7670_REG_COM3 0x0c /* Control 3 */
244 #define OV7670_REG_COM4 0x0d /* Control 4 */
245 #define OV7670_REG_COM5 0x0e /* All "reserved" */
246 #define OV7670_REG_COM6 0x0f /* Control 6 */
247 #define OV7670_REG_AECH 0x10 /* More bits of AEC value */
248 #define OV7670_REG_CLKRC 0x11 /* Clock control */
249 #define OV7670_REG_COM7 0x12 /* Control 7 */
250 #define OV7670_COM7_FMT_VGA 0x00
251 #define OV7670_COM7_YUV 0x00 /* YUV */
252 #define OV7670_COM7_FMT_QVGA 0x10 /* QVGA format */
253 #define OV7670_COM7_FMT_MASK 0x38
254 #define OV7670_COM7_RESET 0x80 /* Register reset */
255 #define OV7670_REG_COM8 0x13 /* Control 8 */
256 #define OV7670_COM8_AEC 0x01 /* Auto exposure enable */
257 #define OV7670_COM8_AWB 0x02 /* White balance enable */
258 #define OV7670_COM8_AGC 0x04 /* Auto gain enable */
259 #define OV7670_COM8_BFILT 0x20 /* Band filter enable */
260 #define OV7670_COM8_AECSTEP 0x40 /* Unlimited AEC step size */
261 #define OV7670_COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */
262 #define OV7670_REG_COM9 0x14 /* Control 9 - gain ceiling */
263 #define OV7670_REG_COM10 0x15 /* Control 10 */
264 #define OV7670_REG_HSTART 0x17 /* Horiz start high bits */
265 #define OV7670_REG_HSTOP 0x18 /* Horiz stop high bits */
266 #define OV7670_REG_VSTART 0x19 /* Vert start high bits */
267 #define OV7670_REG_VSTOP 0x1a /* Vert stop high bits */
268 #define OV7670_REG_MVFP 0x1e /* Mirror / vflip */
269 #define OV7670_MVFP_VFLIP 0x10 /* vertical flip */
270 #define OV7670_MVFP_MIRROR 0x20 /* Mirror image */
271 #define OV7670_REG_AEW 0x24 /* AGC upper limit */
272 #define OV7670_REG_AEB 0x25 /* AGC lower limit */
273 #define OV7670_REG_VPT 0x26 /* AGC/AEC fast mode op region */
274 #define OV7670_REG_HREF 0x32 /* HREF pieces */
275 #define OV7670_REG_TSLB 0x3a /* lots of stuff */
276 #define OV7670_REG_COM11 0x3b /* Control 11 */
277 #define OV7670_COM11_EXP 0x02
278 #define OV7670_COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */
279 #define OV7670_REG_COM12 0x3c /* Control 12 */
280 #define OV7670_REG_COM13 0x3d /* Control 13 */
281 #define OV7670_COM13_GAMMA 0x80 /* Gamma enable */
282 #define OV7670_COM13_UVSAT 0x40 /* UV saturation auto adjustment */
283 #define OV7670_REG_COM14 0x3e /* Control 14 */
284 #define OV7670_REG_EDGE 0x3f /* Edge enhancement factor */
285 #define OV7670_REG_COM15 0x40 /* Control 15 */
286 #define OV7670_COM15_R00FF 0xc0 /* 00 to FF */
287 #define OV7670_REG_COM16 0x41 /* Control 16 */
288 #define OV7670_COM16_AWBGAIN 0x08 /* AWB gain enable */
289 #define OV7670_REG_BRIGHT 0x55 /* Brightness */
290 #define OV7670_REG_CONTRAS 0x56 /* Contrast control */
291 #define OV7670_REG_GFIX 0x69 /* Fix gain control */
292 #define OV7670_REG_RGB444 0x8c /* RGB 444 control */
293 #define OV7670_REG_HAECC1 0x9f /* Hist AEC/AGC control 1 */
294 #define OV7670_REG_HAECC2 0xa0 /* Hist AEC/AGC control 2 */
295 #define OV7670_REG_BD50MAX 0xa5 /* 50hz banding step limit */
296 #define OV7670_REG_HAECC3 0xa6 /* Hist AEC/AGC control 3 */
297 #define OV7670_REG_HAECC4 0xa7 /* Hist AEC/AGC control 4 */
298 #define OV7670_REG_HAECC5 0xa8 /* Hist AEC/AGC control 5 */
299 #define OV7670_REG_HAECC6 0xa9 /* Hist AEC/AGC control 6 */
300 #define OV7670_REG_HAECC7 0xaa /* Hist AEC/AGC control 7 */
301 #define OV7670_REG_BD60MAX 0xab /* 60hz banding step limit */
302
303 struct ov_regvals {
304 __u8 reg;
305 __u8 val;
306 };
307 struct ov_i2c_regvals {
308 __u8 reg;
309 __u8 val;
310 };
311
312 static const struct ov_i2c_regvals norm_6x20[] = {
313 { 0x12, 0x80 }, /* reset */
314 { 0x11, 0x01 },
315 { 0x03, 0x60 },
316 { 0x05, 0x7f }, /* For when autoadjust is off */
317 { 0x07, 0xa8 },
318 /* The ratio of 0x0c and 0x0d controls the white point */
319 { 0x0c, 0x24 },
320 { 0x0d, 0x24 },
321 { 0x0f, 0x15 }, /* COMS */
322 { 0x10, 0x75 }, /* AEC Exposure time */
323 { 0x12, 0x24 }, /* Enable AGC */
324 { 0x14, 0x04 },
325 /* 0x16: 0x06 helps frame stability with moving objects */
326 { 0x16, 0x06 },
327 /* { 0x20, 0x30 }, * Aperture correction enable */
328 { 0x26, 0xb2 }, /* BLC enable */
329 /* 0x28: 0x05 Selects RGB format if RGB on */
330 { 0x28, 0x05 },
331 { 0x2a, 0x04 }, /* Disable framerate adjust */
332 /* { 0x2b, 0xac }, * Framerate; Set 2a[7] first */
333 { 0x2d, 0x99 },
334 { 0x33, 0xa0 }, /* Color Processing Parameter */
335 { 0x34, 0xd2 }, /* Max A/D range */
336 { 0x38, 0x8b },
337 { 0x39, 0x40 },
338
339 { 0x3c, 0x39 }, /* Enable AEC mode changing */
340 { 0x3c, 0x3c }, /* Change AEC mode */
341 { 0x3c, 0x24 }, /* Disable AEC mode changing */
342
343 { 0x3d, 0x80 },
344 /* These next two registers (0x4a, 0x4b) are undocumented.
345 * They control the color balance */
346 { 0x4a, 0x80 },
347 { 0x4b, 0x80 },
348 { 0x4d, 0xd2 }, /* This reduces noise a bit */
349 { 0x4e, 0xc1 },
350 { 0x4f, 0x04 },
351 /* Do 50-53 have any effect? */
352 /* Toggle 0x12[2] off and on here? */
353 };
354
355 static const struct ov_i2c_regvals norm_6x30[] = {
356 { 0x12, 0x80 }, /* Reset */
357 { 0x00, 0x1f }, /* Gain */
358 { 0x01, 0x99 }, /* Blue gain */
359 { 0x02, 0x7c }, /* Red gain */
360 { 0x03, 0xc0 }, /* Saturation */
361 { 0x05, 0x0a }, /* Contrast */
362 { 0x06, 0x95 }, /* Brightness */
363 { 0x07, 0x2d }, /* Sharpness */
364 { 0x0c, 0x20 },
365 { 0x0d, 0x20 },
366 { 0x0e, 0x20 },
367 { 0x0f, 0x05 },
368 { 0x10, 0x9a },
369 { 0x11, 0x00 }, /* Pixel clock = fastest */
370 { 0x12, 0x24 }, /* Enable AGC and AWB */
371 { 0x13, 0x21 },
372 { 0x14, 0x80 },
373 { 0x15, 0x01 },
374 { 0x16, 0x03 },
375 { 0x17, 0x38 },
376 { 0x18, 0xea },
377 { 0x19, 0x04 },
378 { 0x1a, 0x93 },
379 { 0x1b, 0x00 },
380 { 0x1e, 0xc4 },
381 { 0x1f, 0x04 },
382 { 0x20, 0x20 },
383 { 0x21, 0x10 },
384 { 0x22, 0x88 },
385 { 0x23, 0xc0 }, /* Crystal circuit power level */
386 { 0x25, 0x9a }, /* Increase AEC black ratio */
387 { 0x26, 0xb2 }, /* BLC enable */
388 { 0x27, 0xa2 },
389 { 0x28, 0x00 },
390 { 0x29, 0x00 },
391 { 0x2a, 0x84 }, /* 60 Hz power */
392 { 0x2b, 0xa8 }, /* 60 Hz power */
393 { 0x2c, 0xa0 },
394 { 0x2d, 0x95 }, /* Enable auto-brightness */
395 { 0x2e, 0x88 },
396 { 0x33, 0x26 },
397 { 0x34, 0x03 },
398 { 0x36, 0x8f },
399 { 0x37, 0x80 },
400 { 0x38, 0x83 },
401 { 0x39, 0x80 },
402 { 0x3a, 0x0f },
403 { 0x3b, 0x3c },
404 { 0x3c, 0x1a },
405 { 0x3d, 0x80 },
406 { 0x3e, 0x80 },
407 { 0x3f, 0x0e },
408 { 0x40, 0x00 }, /* White bal */
409 { 0x41, 0x00 }, /* White bal */
410 { 0x42, 0x80 },
411 { 0x43, 0x3f }, /* White bal */
412 { 0x44, 0x80 },
413 { 0x45, 0x20 },
414 { 0x46, 0x20 },
415 { 0x47, 0x80 },
416 { 0x48, 0x7f },
417 { 0x49, 0x00 },
418 { 0x4a, 0x00 },
419 { 0x4b, 0x80 },
420 { 0x4c, 0xd0 },
421 { 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */
422 { 0x4e, 0x40 },
423 { 0x4f, 0x07 }, /* UV avg., col. killer: max */
424 { 0x50, 0xff },
425 { 0x54, 0x23 }, /* Max AGC gain: 18dB */
426 { 0x55, 0xff },
427 { 0x56, 0x12 },
428 { 0x57, 0x81 },
429 { 0x58, 0x75 },
430 { 0x59, 0x01 }, /* AGC dark current comp.: +1 */
431 { 0x5a, 0x2c },
432 { 0x5b, 0x0f }, /* AWB chrominance levels */
433 { 0x5c, 0x10 },
434 { 0x3d, 0x80 },
435 { 0x27, 0xa6 },
436 { 0x12, 0x20 }, /* Toggle AWB */
437 { 0x12, 0x24 },
438 };
439
440 /* Lawrence Glaister <lg@jfm.bc.ca> reports:
441 *
442 * Register 0x0f in the 7610 has the following effects:
443 *
444 * 0x85 (AEC method 1): Best overall, good contrast range
445 * 0x45 (AEC method 2): Very overexposed
446 * 0xa5 (spec sheet default): Ok, but the black level is
447 * shifted resulting in loss of contrast
448 * 0x05 (old driver setting): very overexposed, too much
449 * contrast
450 */
451 static const struct ov_i2c_regvals norm_7610[] = {
452 { 0x10, 0xff },
453 { 0x16, 0x06 },
454 { 0x28, 0x24 },
455 { 0x2b, 0xac },
456 { 0x12, 0x00 },
457 { 0x38, 0x81 },
458 { 0x28, 0x24 }, /* 0c */
459 { 0x0f, 0x85 }, /* lg's setting */
460 { 0x15, 0x01 },
461 { 0x20, 0x1c },
462 { 0x23, 0x2a },
463 { 0x24, 0x10 },
464 { 0x25, 0x8a },
465 { 0x26, 0xa2 },
466 { 0x27, 0xc2 },
467 { 0x2a, 0x04 },
468 { 0x2c, 0xfe },
469 { 0x2d, 0x93 },
470 { 0x30, 0x71 },
471 { 0x31, 0x60 },
472 { 0x32, 0x26 },
473 { 0x33, 0x20 },
474 { 0x34, 0x48 },
475 { 0x12, 0x24 },
476 { 0x11, 0x01 },
477 { 0x0c, 0x24 },
478 { 0x0d, 0x24 },
479 };
480
481 static const struct ov_i2c_regvals norm_7620[] = {
482 { 0x00, 0x00 }, /* gain */
483 { 0x01, 0x80 }, /* blue gain */
484 { 0x02, 0x80 }, /* red gain */
485 { 0x03, 0xc0 }, /* OV7670_REG_VREF */
486 { 0x06, 0x60 },
487 { 0x07, 0x00 },
488 { 0x0c, 0x24 },
489 { 0x0c, 0x24 },
490 { 0x0d, 0x24 },
491 { 0x11, 0x01 },
492 { 0x12, 0x24 },
493 { 0x13, 0x01 },
494 { 0x14, 0x84 },
495 { 0x15, 0x01 },
496 { 0x16, 0x03 },
497 { 0x17, 0x2f },
498 { 0x18, 0xcf },
499 { 0x19, 0x06 },
500 { 0x1a, 0xf5 },
501 { 0x1b, 0x00 },
502 { 0x20, 0x18 },
503 { 0x21, 0x80 },
504 { 0x22, 0x80 },
505 { 0x23, 0x00 },
506 { 0x26, 0xa2 },
507 { 0x27, 0xea },
508 { 0x28, 0x20 },
509 { 0x29, 0x00 },
510 { 0x2a, 0x10 },
511 { 0x2b, 0x00 },
512 { 0x2c, 0x88 },
513 { 0x2d, 0x91 },
514 { 0x2e, 0x80 },
515 { 0x2f, 0x44 },
516 { 0x60, 0x27 },
517 { 0x61, 0x02 },
518 { 0x62, 0x5f },
519 { 0x63, 0xd5 },
520 { 0x64, 0x57 },
521 { 0x65, 0x83 },
522 { 0x66, 0x55 },
523 { 0x67, 0x92 },
524 { 0x68, 0xcf },
525 { 0x69, 0x76 },
526 { 0x6a, 0x22 },
527 { 0x6b, 0x00 },
528 { 0x6c, 0x02 },
529 { 0x6d, 0x44 },
530 { 0x6e, 0x80 },
531 { 0x6f, 0x1d },
532 { 0x70, 0x8b },
533 { 0x71, 0x00 },
534 { 0x72, 0x14 },
535 { 0x73, 0x54 },
536 { 0x74, 0x00 },
537 { 0x75, 0x8e },
538 { 0x76, 0x00 },
539 { 0x77, 0xff },
540 { 0x78, 0x80 },
541 { 0x79, 0x80 },
542 { 0x7a, 0x80 },
543 { 0x7b, 0xe2 },
544 { 0x7c, 0x00 },
545 };
546
547 /* 7640 and 7648. The defaults should be OK for most registers. */
548 static const struct ov_i2c_regvals norm_7640[] = {
549 { 0x12, 0x80 },
550 { 0x12, 0x14 },
551 };
552
553 /* 7670. Defaults taken from OmniVision provided data,
554 * as provided by Jonathan Corbet of OLPC */
555 static const struct ov_i2c_regvals norm_7670[] = {
556 { OV7670_REG_COM7, OV7670_COM7_RESET },
557 { OV7670_REG_TSLB, 0x04 }, /* OV */
558 { OV7670_REG_COM7, OV7670_COM7_FMT_VGA }, /* VGA */
559 { OV7670_REG_CLKRC, 0x01 },
560 /*
561 * Set the hardware window. These values from OV don't entirely
562 * make sense - hstop is less than hstart. But they work...
563 */
564 { OV7670_REG_HSTART, 0x13 },
565 { OV7670_REG_HSTOP, 0x01 },
566 { OV7670_REG_HREF, 0xb6 },
567 { OV7670_REG_VSTART, 0x02 },
568 { OV7670_REG_VSTOP, 0x7a },
569 { OV7670_REG_VREF, 0x0a },
570
571 { OV7670_REG_COM3, 0x00 },
572 { OV7670_REG_COM14, 0x00 },
573 /* Mystery scaling numbers */
574 { 0x70, 0x3a },
575 { 0x71, 0x35 },
576 { 0x72, 0x11 },
577 { 0x73, 0xf0 },
578 { 0xa2, 0x02 },
579 /* { OV7670_REG_COM10, 0x0 }, */
580
581 /* Gamma curve values */
582 { 0x7a, 0x20 },
583 { 0x7b, 0x10 },
584 { 0x7c, 0x1e },
585 { 0x7d, 0x35 },
586 { 0x7e, 0x5a },
587 { 0x7f, 0x69 },
588 { 0x80, 0x76 },
589 { 0x81, 0x80 },
590 { 0x82, 0x88 },
591 { 0x83, 0x8f },
592 { 0x84, 0x96 },
593 { 0x85, 0xa3 },
594 { 0x86, 0xaf },
595 { 0x87, 0xc4 },
596 { 0x88, 0xd7 },
597 { 0x89, 0xe8 },
598
599 /* AGC and AEC parameters. Note we start by disabling those features,
600 then turn them only after tweaking the values. */
601 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
602 | OV7670_COM8_AECSTEP
603 | OV7670_COM8_BFILT },
604 { OV7670_REG_GAIN, 0x00 },
605 { OV7670_REG_AECH, 0x00 },
606 { OV7670_REG_COM4, 0x40 }, /* magic reserved bit */
607 { OV7670_REG_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
608 { OV7670_REG_BD50MAX, 0x05 },
609 { OV7670_REG_BD60MAX, 0x07 },
610 { OV7670_REG_AEW, 0x95 },
611 { OV7670_REG_AEB, 0x33 },
612 { OV7670_REG_VPT, 0xe3 },
613 { OV7670_REG_HAECC1, 0x78 },
614 { OV7670_REG_HAECC2, 0x68 },
615 { 0xa1, 0x03 }, /* magic */
616 { OV7670_REG_HAECC3, 0xd8 },
617 { OV7670_REG_HAECC4, 0xd8 },
618 { OV7670_REG_HAECC5, 0xf0 },
619 { OV7670_REG_HAECC6, 0x90 },
620 { OV7670_REG_HAECC7, 0x94 },
621 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
622 | OV7670_COM8_AECSTEP
623 | OV7670_COM8_BFILT
624 | OV7670_COM8_AGC
625 | OV7670_COM8_AEC },
626
627 /* Almost all of these are magic "reserved" values. */
628 { OV7670_REG_COM5, 0x61 },
629 { OV7670_REG_COM6, 0x4b },
630 { 0x16, 0x02 },
631 { OV7670_REG_MVFP, 0x07 },
632 { 0x21, 0x02 },
633 { 0x22, 0x91 },
634 { 0x29, 0x07 },
635 { 0x33, 0x0b },
636 { 0x35, 0x0b },
637 { 0x37, 0x1d },
638 { 0x38, 0x71 },
639 { 0x39, 0x2a },
640 { OV7670_REG_COM12, 0x78 },
641 { 0x4d, 0x40 },
642 { 0x4e, 0x20 },
643 { OV7670_REG_GFIX, 0x00 },
644 { 0x6b, 0x4a },
645 { 0x74, 0x10 },
646 { 0x8d, 0x4f },
647 { 0x8e, 0x00 },
648 { 0x8f, 0x00 },
649 { 0x90, 0x00 },
650 { 0x91, 0x00 },
651 { 0x96, 0x00 },
652 { 0x9a, 0x00 },
653 { 0xb0, 0x84 },
654 { 0xb1, 0x0c },
655 { 0xb2, 0x0e },
656 { 0xb3, 0x82 },
657 { 0xb8, 0x0a },
658
659 /* More reserved magic, some of which tweaks white balance */
660 { 0x43, 0x0a },
661 { 0x44, 0xf0 },
662 { 0x45, 0x34 },
663 { 0x46, 0x58 },
664 { 0x47, 0x28 },
665 { 0x48, 0x3a },
666 { 0x59, 0x88 },
667 { 0x5a, 0x88 },
668 { 0x5b, 0x44 },
669 { 0x5c, 0x67 },
670 { 0x5d, 0x49 },
671 { 0x5e, 0x0e },
672 { 0x6c, 0x0a },
673 { 0x6d, 0x55 },
674 { 0x6e, 0x11 },
675 { 0x6f, 0x9f },
676 /* "9e for advance AWB" */
677 { 0x6a, 0x40 },
678 { OV7670_REG_BLUE, 0x40 },
679 { OV7670_REG_RED, 0x60 },
680 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
681 | OV7670_COM8_AECSTEP
682 | OV7670_COM8_BFILT
683 | OV7670_COM8_AGC
684 | OV7670_COM8_AEC
685 | OV7670_COM8_AWB },
686
687 /* Matrix coefficients */
688 { 0x4f, 0x80 },
689 { 0x50, 0x80 },
690 { 0x51, 0x00 },
691 { 0x52, 0x22 },
692 { 0x53, 0x5e },
693 { 0x54, 0x80 },
694 { 0x58, 0x9e },
695
696 { OV7670_REG_COM16, OV7670_COM16_AWBGAIN },
697 { OV7670_REG_EDGE, 0x00 },
698 { 0x75, 0x05 },
699 { 0x76, 0xe1 },
700 { 0x4c, 0x00 },
701 { 0x77, 0x01 },
702 { OV7670_REG_COM13, OV7670_COM13_GAMMA
703 | OV7670_COM13_UVSAT
704 | 2}, /* was 3 */
705 { 0x4b, 0x09 },
706 { 0xc9, 0x60 },
707 { OV7670_REG_COM16, 0x38 },
708 { 0x56, 0x40 },
709
710 { 0x34, 0x11 },
711 { OV7670_REG_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO },
712 { 0xa4, 0x88 },
713 { 0x96, 0x00 },
714 { 0x97, 0x30 },
715 { 0x98, 0x20 },
716 { 0x99, 0x30 },
717 { 0x9a, 0x84 },
718 { 0x9b, 0x29 },
719 { 0x9c, 0x03 },
720 { 0x9d, 0x4c },
721 { 0x9e, 0x3f },
722 { 0x78, 0x04 },
723
724 /* Extra-weird stuff. Some sort of multiplexor register */
725 { 0x79, 0x01 },
726 { 0xc8, 0xf0 },
727 { 0x79, 0x0f },
728 { 0xc8, 0x00 },
729 { 0x79, 0x10 },
730 { 0xc8, 0x7e },
731 { 0x79, 0x0a },
732 { 0xc8, 0x80 },
733 { 0x79, 0x0b },
734 { 0xc8, 0x01 },
735 { 0x79, 0x0c },
736 { 0xc8, 0x0f },
737 { 0x79, 0x0d },
738 { 0xc8, 0x20 },
739 { 0x79, 0x09 },
740 { 0xc8, 0x80 },
741 { 0x79, 0x02 },
742 { 0xc8, 0xc0 },
743 { 0x79, 0x03 },
744 { 0xc8, 0x40 },
745 { 0x79, 0x05 },
746 { 0xc8, 0x30 },
747 { 0x79, 0x26 },
748 };
749
750 static const struct ov_i2c_regvals norm_8610[] = {
751 { 0x12, 0x80 },
752 { 0x00, 0x00 },
753 { 0x01, 0x80 },
754 { 0x02, 0x80 },
755 { 0x03, 0xc0 },
756 { 0x04, 0x30 },
757 { 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */
758 { 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */
759 { 0x0a, 0x86 },
760 { 0x0b, 0xb0 },
761 { 0x0c, 0x20 },
762 { 0x0d, 0x20 },
763 { 0x11, 0x01 },
764 { 0x12, 0x25 },
765 { 0x13, 0x01 },
766 { 0x14, 0x04 },
767 { 0x15, 0x01 }, /* Lin and Win think different about UV order */
768 { 0x16, 0x03 },
769 { 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */
770 { 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */
771 { 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */
772 { 0x1a, 0xf5 },
773 { 0x1b, 0x00 },
774 { 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */
775 { 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */
776 { 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */
777 { 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */
778 { 0x26, 0xa2 },
779 { 0x27, 0xea },
780 { 0x28, 0x00 },
781 { 0x29, 0x00 },
782 { 0x2a, 0x80 },
783 { 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */
784 { 0x2c, 0xac },
785 { 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */
786 { 0x2e, 0x80 },
787 { 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */
788 { 0x4c, 0x00 },
789 { 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */
790 { 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */
791 { 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */
792 { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */
793 { 0x63, 0xff },
794 { 0x64, 0x53 }, /* new windrv 090403 says 0x57,
795 * maybe thats wrong */
796 { 0x65, 0x00 },
797 { 0x66, 0x55 },
798 { 0x67, 0xb0 },
799 { 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */
800 { 0x69, 0x02 },
801 { 0x6a, 0x22 },
802 { 0x6b, 0x00 },
803 { 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but
804 * deleting bit7 colors the first images red */
805 { 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */
806 { 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */
807 { 0x6f, 0x01 },
808 { 0x70, 0x8b },
809 { 0x71, 0x00 },
810 { 0x72, 0x14 },
811 { 0x73, 0x54 },
812 { 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */
813 { 0x75, 0x0e },
814 { 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */
815 { 0x77, 0xff },
816 { 0x78, 0x80 },
817 { 0x79, 0x80 },
818 { 0x7a, 0x80 },
819 { 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */
820 { 0x7c, 0x00 },
821 { 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */
822 { 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */
823 { 0x7f, 0xfb },
824 { 0x80, 0x28 },
825 { 0x81, 0x00 },
826 { 0x82, 0x23 },
827 { 0x83, 0x0b },
828 { 0x84, 0x00 },
829 { 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */
830 { 0x86, 0xc9 },
831 { 0x87, 0x00 },
832 { 0x88, 0x00 },
833 { 0x89, 0x01 },
834 { 0x12, 0x20 },
835 { 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */
836 };
837
838 static unsigned char ov7670_abs_to_sm(unsigned char v)
839 {
840 if (v > 127)
841 return v & 0x7f;
842 return (128 - v) | 0x80;
843 }
844
845 /* Write a OV519 register */
846 static int reg_w(struct sd *sd, __u16 index, __u8 value)
847 {
848 int ret;
849
850 sd->gspca_dev.usb_buf[0] = value;
851 ret = usb_control_msg(sd->gspca_dev.dev,
852 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
853 1, /* REQ_IO (ov518/519) */
854 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
855 0, index,
856 sd->gspca_dev.usb_buf, 1, 500);
857 if (ret < 0)
858 PDEBUG(D_ERR, "Write reg [%02x] %02x failed", index, value);
859 return ret;
860 }
861
862 /* Read from a OV519 register */
863 /* returns: negative is error, pos or zero is data */
864 static int reg_r(struct sd *sd, __u16 index)
865 {
866 int ret;
867
868 ret = usb_control_msg(sd->gspca_dev.dev,
869 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
870 1, /* REQ_IO */
871 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
872 0, index, sd->gspca_dev.usb_buf, 1, 500);
873
874 if (ret >= 0)
875 ret = sd->gspca_dev.usb_buf[0];
876 else
877 PDEBUG(D_ERR, "Read reg [0x%02x] failed", index);
878 return ret;
879 }
880
881 /* Read 8 values from a OV519 register */
882 static int reg_r8(struct sd *sd,
883 __u16 index)
884 {
885 int ret;
886
887 ret = usb_control_msg(sd->gspca_dev.dev,
888 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
889 1, /* REQ_IO */
890 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
891 0, index, sd->gspca_dev.usb_buf, 8, 500);
892
893 if (ret >= 0)
894 ret = sd->gspca_dev.usb_buf[0];
895 else
896 PDEBUG(D_ERR, "Read reg 8 [0x%02x] failed", index);
897 return ret;
898 }
899
900 /*
901 * Writes bits at positions specified by mask to an OV51x reg. Bits that are in
902 * the same position as 1's in "mask" are cleared and set to "value". Bits
903 * that are in the same position as 0's in "mask" are preserved, regardless
904 * of their respective state in "value".
905 */
906 static int reg_w_mask(struct sd *sd,
907 __u16 index,
908 __u8 value,
909 __u8 mask)
910 {
911 int ret;
912 __u8 oldval;
913
914 if (mask != 0xff) {
915 value &= mask; /* Enforce mask on value */
916 ret = reg_r(sd, index);
917 if (ret < 0)
918 return ret;
919
920 oldval = ret & ~mask; /* Clear the masked bits */
921 value |= oldval; /* Set the desired bits */
922 }
923 return reg_w(sd, index, value);
924 }
925
926 /*
927 * The OV518 I2C I/O procedure is different, hence, this function.
928 * This is normally only called from i2c_w(). Note that this function
929 * always succeeds regardless of whether the sensor is present and working.
930 */
931 static int i2c_w(struct sd *sd,
932 __u8 reg,
933 __u8 value)
934 {
935 int rc;
936
937 PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
938
939 /* Select camera register */
940 rc = reg_w(sd, R51x_I2C_SADDR_3, reg);
941 if (rc < 0)
942 return rc;
943
944 /* Write "value" to I2C data port of OV511 */
945 rc = reg_w(sd, R51x_I2C_DATA, value);
946 if (rc < 0)
947 return rc;
948
949 /* Initiate 3-byte write cycle */
950 rc = reg_w(sd, R518_I2C_CTL, 0x01);
951 if (rc < 0)
952 return rc;
953
954 /* wait for write complete */
955 msleep(4);
956 return reg_r8(sd, R518_I2C_CTL);
957 }
958
959 /*
960 * returns: negative is error, pos or zero is data
961 *
962 * The OV518 I2C I/O procedure is different, hence, this function.
963 * This is normally only called from i2c_r(). Note that this function
964 * always succeeds regardless of whether the sensor is present and working.
965 */
966 static int i2c_r(struct sd *sd, __u8 reg)
967 {
968 int rc, value;
969
970 /* Select camera register */
971 rc = reg_w(sd, R51x_I2C_SADDR_2, reg);
972 if (rc < 0)
973 return rc;
974
975 /* Initiate 2-byte write cycle */
976 rc = reg_w(sd, R518_I2C_CTL, 0x03);
977 if (rc < 0)
978 return rc;
979
980 /* Initiate 2-byte read cycle */
981 rc = reg_w(sd, R518_I2C_CTL, 0x05);
982 if (rc < 0)
983 return rc;
984 value = reg_r(sd, R51x_I2C_DATA);
985 PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value);
986 return value;
987 }
988
989 /* Writes bits at positions specified by mask to an I2C reg. Bits that are in
990 * the same position as 1's in "mask" are cleared and set to "value". Bits
991 * that are in the same position as 0's in "mask" are preserved, regardless
992 * of their respective state in "value".
993 */
994 static int i2c_w_mask(struct sd *sd,
995 __u8 reg,
996 __u8 value,
997 __u8 mask)
998 {
999 int rc;
1000 __u8 oldval;
1001
1002 value &= mask; /* Enforce mask on value */
1003 rc = i2c_r(sd, reg);
1004 if (rc < 0)
1005 return rc;
1006 oldval = rc & ~mask; /* Clear the masked bits */
1007 value |= oldval; /* Set the desired bits */
1008 return i2c_w(sd, reg, value);
1009 }
1010
1011 /* Temporarily stops OV511 from functioning. Must do this before changing
1012 * registers while the camera is streaming */
1013 static inline int ov51x_stop(struct sd *sd)
1014 {
1015 PDEBUG(D_STREAM, "stopping");
1016 sd->stopped = 1;
1017 return reg_w(sd, OV519_SYS_RESET1, 0x0f);
1018 }
1019
1020 /* Restarts OV511 after ov511_stop() is called. Has no effect if it is not
1021 * actually stopped (for performance). */
1022 static inline int ov51x_restart(struct sd *sd)
1023 {
1024 PDEBUG(D_STREAM, "restarting");
1025 if (!sd->stopped)
1026 return 0;
1027 sd->stopped = 0;
1028
1029 /* Reinitialize the stream */
1030 return reg_w(sd, OV519_SYS_RESET1, 0x00);
1031 }
1032
1033 /* This does an initial reset of an OmniVision sensor and ensures that I2C
1034 * is synchronized. Returns <0 on failure.
1035 */
1036 static int init_ov_sensor(struct sd *sd)
1037 {
1038 int i;
1039
1040 /* Reset the sensor */
1041 if (i2c_w(sd, 0x12, 0x80) < 0)
1042 return -EIO;
1043
1044 /* Wait for it to initialize */
1045 msleep(150);
1046
1047 for (i = 0; i < i2c_detect_tries; i++) {
1048 if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f &&
1049 i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) {
1050 PDEBUG(D_PROBE, "I2C synced in %d attempt(s)", i);
1051 return 0;
1052 }
1053
1054 /* Reset the sensor */
1055 if (i2c_w(sd, 0x12, 0x80) < 0)
1056 return -EIO;
1057 /* Wait for it to initialize */
1058 msleep(150);
1059 /* Dummy read to sync I2C */
1060 if (i2c_r(sd, 0x00) < 0)
1061 return -EIO;
1062 }
1063 return -EIO;
1064 }
1065
1066 /* Set the read and write slave IDs. The "slave" argument is the write slave,
1067 * and the read slave will be set to (slave + 1).
1068 * This should not be called from outside the i2c I/O functions.
1069 * Sets I2C read and write slave IDs. Returns <0 for error
1070 */
1071 static int ov51x_set_slave_ids(struct sd *sd,
1072 __u8 slave)
1073 {
1074 int rc;
1075
1076 rc = reg_w(sd, R51x_I2C_W_SID, slave);
1077 if (rc < 0)
1078 return rc;
1079 return reg_w(sd, R51x_I2C_R_SID, slave + 1);
1080 }
1081
1082 static int write_regvals(struct sd *sd,
1083 const struct ov_regvals *regvals,
1084 int n)
1085 {
1086 int rc;
1087
1088 while (--n >= 0) {
1089 rc = reg_w(sd, regvals->reg, regvals->val);
1090 if (rc < 0)
1091 return rc;
1092 regvals++;
1093 }
1094 return 0;
1095 }
1096
1097 static int write_i2c_regvals(struct sd *sd,
1098 const struct ov_i2c_regvals *regvals,
1099 int n)
1100 {
1101 int rc;
1102
1103 while (--n >= 0) {
1104 rc = i2c_w(sd, regvals->reg, regvals->val);
1105 if (rc < 0)
1106 return rc;
1107 regvals++;
1108 }
1109 return 0;
1110 }
1111
1112 /****************************************************************************
1113 *
1114 * OV511 and sensor configuration
1115 *
1116 ***************************************************************************/
1117
1118 /* This initializes the OV8110, OV8610 sensor. The OV8110 uses
1119 * the same register settings as the OV8610, since they are very similar.
1120 */
1121 static int ov8xx0_configure(struct sd *sd)
1122 {
1123 int rc;
1124
1125 PDEBUG(D_PROBE, "starting ov8xx0 configuration");
1126
1127 /* Detect sensor (sub)type */
1128 rc = i2c_r(sd, OV7610_REG_COM_I);
1129 if (rc < 0) {
1130 PDEBUG(D_ERR, "Error detecting sensor type");
1131 return -1;
1132 }
1133 if ((rc & 3) == 1) {
1134 sd->sensor = SEN_OV8610;
1135 } else {
1136 PDEBUG(D_ERR, "Unknown image sensor version: %d", rc & 3);
1137 return -1;
1138 }
1139
1140 /* Set sensor-specific vars */
1141 /* sd->sif = 0; already done */
1142 return 0;
1143 }
1144
1145 /* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses
1146 * the same register settings as the OV7610, since they are very similar.
1147 */
1148 static int ov7xx0_configure(struct sd *sd)
1149 {
1150 int rc, high, low;
1151
1152
1153 PDEBUG(D_PROBE, "starting OV7xx0 configuration");
1154
1155 /* Detect sensor (sub)type */
1156 rc = i2c_r(sd, OV7610_REG_COM_I);
1157
1158 /* add OV7670 here
1159 * it appears to be wrongly detected as a 7610 by default */
1160 if (rc < 0) {
1161 PDEBUG(D_ERR, "Error detecting sensor type");
1162 return -1;
1163 }
1164 if ((rc & 3) == 3) {
1165 /* quick hack to make OV7670s work */
1166 high = i2c_r(sd, 0x0a);
1167 low = i2c_r(sd, 0x0b);
1168 /* info("%x, %x", high, low); */
1169 if (high == 0x76 && low == 0x73) {
1170 PDEBUG(D_PROBE, "Sensor is an OV7670");
1171 sd->sensor = SEN_OV7670;
1172 } else {
1173 PDEBUG(D_PROBE, "Sensor is an OV7610");
1174 sd->sensor = SEN_OV7610;
1175 }
1176 } else if ((rc & 3) == 1) {
1177 /* I don't know what's different about the 76BE yet. */
1178 if (i2c_r(sd, 0x15) & 1)
1179 PDEBUG(D_PROBE, "Sensor is an OV7620AE");
1180 else
1181 PDEBUG(D_PROBE, "Sensor is an OV76BE");
1182
1183 /* OV511+ will return all zero isoc data unless we
1184 * configure the sensor as a 7620. Someone needs to
1185 * find the exact reg. setting that causes this. */
1186 sd->sensor = SEN_OV76BE;
1187 } else if ((rc & 3) == 0) {
1188 /* try to read product id registers */
1189 high = i2c_r(sd, 0x0a);
1190 if (high < 0) {
1191 PDEBUG(D_ERR, "Error detecting camera chip PID");
1192 return high;
1193 }
1194 low = i2c_r(sd, 0x0b);
1195 if (low < 0) {
1196 PDEBUG(D_ERR, "Error detecting camera chip VER");
1197 return low;
1198 }
1199 if (high == 0x76) {
1200 switch (low) {
1201 case 0x30:
1202 PDEBUG(D_PROBE, "Sensor is an OV7630/OV7635");
1203 PDEBUG(D_ERR,
1204 "7630 is not supported by this driver");
1205 return -1;
1206 case 0x40:
1207 PDEBUG(D_PROBE, "Sensor is an OV7645");
1208 sd->sensor = SEN_OV7640; /* FIXME */
1209 break;
1210 case 0x45:
1211 PDEBUG(D_PROBE, "Sensor is an OV7645B");
1212 sd->sensor = SEN_OV7640; /* FIXME */
1213 break;
1214 case 0x48:
1215 PDEBUG(D_PROBE, "Sensor is an OV7648");
1216 sd->sensor = SEN_OV7640; /* FIXME */
1217 break;
1218 default:
1219 PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low);
1220 return -1;
1221 }
1222 } else {
1223 PDEBUG(D_PROBE, "Sensor is an OV7620");
1224 sd->sensor = SEN_OV7620;
1225 }
1226 } else {
1227 PDEBUG(D_ERR, "Unknown image sensor version: %d", rc & 3);
1228 return -1;
1229 }
1230
1231 /* Set sensor-specific vars */
1232 /* sd->sif = 0; already done */
1233 return 0;
1234 }
1235
1236 /* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */
1237 static int ov6xx0_configure(struct sd *sd)
1238 {
1239 int rc;
1240 PDEBUG(D_PROBE, "starting OV6xx0 configuration");
1241
1242 /* Detect sensor (sub)type */
1243 rc = i2c_r(sd, OV7610_REG_COM_I);
1244 if (rc < 0) {
1245 PDEBUG(D_ERR, "Error detecting sensor type");
1246 return -1;
1247 }
1248
1249 /* Ugh. The first two bits are the version bits, but
1250 * the entire register value must be used. I guess OVT
1251 * underestimated how many variants they would make. */
1252 switch (rc) {
1253 case 0x00:
1254 sd->sensor = SEN_OV6630;
1255 PDEBUG(D_ERR,
1256 "WARNING: Sensor is an OV66308. Your camera may have");
1257 PDEBUG(D_ERR, "been misdetected in previous driver versions.");
1258 break;
1259 case 0x01:
1260 sd->sensor = SEN_OV6620;
1261 break;
1262 case 0x02:
1263 sd->sensor = SEN_OV6630;
1264 PDEBUG(D_PROBE, "Sensor is an OV66308AE");
1265 break;
1266 case 0x03:
1267 sd->sensor = SEN_OV6630;
1268 PDEBUG(D_PROBE, "Sensor is an OV66308AF");
1269 break;
1270 case 0x90:
1271 sd->sensor = SEN_OV6630;
1272 PDEBUG(D_ERR,
1273 "WARNING: Sensor is an OV66307. Your camera may have");
1274 PDEBUG(D_ERR, "been misdetected in previous driver versions.");
1275 break;
1276 default:
1277 PDEBUG(D_ERR, "FATAL: Unknown sensor version: 0x%02x", rc);
1278 return -1;
1279 }
1280
1281 /* Set sensor-specific vars */
1282 sd->sif = 1;
1283
1284 return 0;
1285 }
1286
1287 /* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */
1288 static void ov51x_led_control(struct sd *sd, int on)
1289 {
1290 reg_w_mask(sd, OV519_GPIO_DATA_OUT0, !on, 1); /* 0 / 1 */
1291 }
1292
1293 /* this function is called at probe time */
1294 static int sd_config(struct gspca_dev *gspca_dev,
1295 const struct usb_device_id *id)
1296 {
1297 struct sd *sd = (struct sd *) gspca_dev;
1298 struct cam *cam;
1299
1300 static const struct ov_regvals init_519[] = {
1301 { 0x5a, 0x6d }, /* EnableSystem */
1302 { 0x53, 0x9b },
1303 { 0x54, 0xff }, /* set bit2 to enable jpeg */
1304 { 0x5d, 0x03 },
1305 { 0x49, 0x01 },
1306 { 0x48, 0x00 },
1307 /* Set LED pin to output mode. Bit 4 must be cleared or sensor
1308 * detection will fail. This deserves further investigation. */
1309 { OV519_GPIO_IO_CTRL0, 0xee },
1310 { 0x51, 0x0f }, /* SetUsbInit */
1311 { 0x51, 0x00 },
1312 { 0x22, 0x00 },
1313 /* windows reads 0x55 at this point*/
1314 };
1315
1316 if (write_regvals(sd, init_519, ARRAY_SIZE(init_519)))
1317 goto error;
1318 ov51x_led_control(sd, 0); /* turn LED off */
1319
1320 /* Test for 76xx */
1321 if (ov51x_set_slave_ids(sd, OV7xx0_SID) < 0)
1322 goto error;
1323
1324 /* The OV519 must be more aggressive about sensor detection since
1325 * I2C write will never fail if the sensor is not present. We have
1326 * to try to initialize the sensor to detect its presence */
1327 if (init_ov_sensor(sd) >= 0) {
1328 if (ov7xx0_configure(sd) < 0) {
1329 PDEBUG(D_ERR, "Failed to configure OV7xx0");
1330 goto error;
1331 }
1332 } else {
1333
1334 /* Test for 6xx0 */
1335 if (ov51x_set_slave_ids(sd, OV6xx0_SID) < 0)
1336 goto error;
1337
1338 if (init_ov_sensor(sd) >= 0) {
1339 if (ov6xx0_configure(sd) < 0) {
1340 PDEBUG(D_ERR, "Failed to configure OV6xx0");
1341 goto error;
1342 }
1343 } else {
1344
1345 /* Test for 8xx0 */
1346 if (ov51x_set_slave_ids(sd, OV8xx0_SID) < 0)
1347 goto error;
1348
1349 if (init_ov_sensor(sd) < 0) {
1350 PDEBUG(D_ERR,
1351 "Can't determine sensor slave IDs");
1352 goto error;
1353 }
1354 if (ov8xx0_configure(sd) < 0) {
1355 PDEBUG(D_ERR,
1356 "Failed to configure OV8xx0 sensor");
1357 goto error;
1358 }
1359 }
1360 }
1361
1362 cam = &gspca_dev->cam;
1363 if (!sd->sif) {
1364 cam->cam_mode = vga_mode;
1365 cam->nmodes = ARRAY_SIZE(vga_mode);
1366 } else {
1367 cam->cam_mode = sif_mode;
1368 cam->nmodes = ARRAY_SIZE(sif_mode);
1369 }
1370 sd->brightness = BRIGHTNESS_DEF;
1371 sd->contrast = CONTRAST_DEF;
1372 sd->colors = COLOR_DEF;
1373 sd->hflip = HFLIP_DEF;
1374 sd->vflip = VFLIP_DEF;
1375 if (sd->sensor != SEN_OV7670)
1376 gspca_dev->ctrl_dis = (1 << HFLIP_IDX)
1377 | (1 << VFLIP_IDX);
1378 return 0;
1379 error:
1380 PDEBUG(D_ERR, "OV519 Config failed");
1381 return -EBUSY;
1382 }
1383
1384 /* this function is called at probe and resume time */
1385 static int sd_init(struct gspca_dev *gspca_dev)
1386 {
1387 struct sd *sd = (struct sd *) gspca_dev;
1388
1389 /* initialize the sensor */
1390 switch (sd->sensor) {
1391 case SEN_OV6620:
1392 if (write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20)))
1393 return -EIO;
1394 break;
1395 case SEN_OV6630:
1396 if (write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30)))
1397 return -EIO;
1398 break;
1399 default:
1400 /* case SEN_OV7610: */
1401 /* case SEN_OV76BE: */
1402 if (write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610)))
1403 return -EIO;
1404 break;
1405 case SEN_OV7620:
1406 if (write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620)))
1407 return -EIO;
1408 break;
1409 case SEN_OV7640:
1410 if (write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640)))
1411 return -EIO;
1412 break;
1413 case SEN_OV7670:
1414 if (write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670)))
1415 return -EIO;
1416 break;
1417 case SEN_OV8610:
1418 if (write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610)))
1419 return -EIO;
1420 break;
1421 }
1422 return 0;
1423 }
1424
1425 /* Sets up the OV519 with the given image parameters
1426 *
1427 * OV519 needs a completely different approach, until we can figure out what
1428 * the individual registers do.
1429 *
1430 * Do not put any sensor-specific code in here (including I2C I/O functions)
1431 */
1432 static int ov519_mode_init_regs(struct sd *sd)
1433 {
1434 static const struct ov_regvals mode_init_519_ov7670[] = {
1435 { 0x5d, 0x03 }, /* Turn off suspend mode */
1436 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
1437 { 0x54, 0x0f }, /* bit2 (jpeg enable) */
1438 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
1439 { 0xa3, 0x18 },
1440 { 0xa4, 0x04 },
1441 { 0xa5, 0x28 },
1442 { 0x37, 0x00 }, /* SetUsbInit */
1443 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
1444 /* Enable both fields, YUV Input, disable defect comp (why?) */
1445 { 0x20, 0x0c },
1446 { 0x21, 0x38 },
1447 { 0x22, 0x1d },
1448 { 0x17, 0x50 }, /* undocumented */
1449 { 0x37, 0x00 }, /* undocumented */
1450 { 0x40, 0xff }, /* I2C timeout counter */
1451 { 0x46, 0x00 }, /* I2C clock prescaler */
1452 { 0x59, 0x04 }, /* new from windrv 090403 */
1453 { 0xff, 0x00 }, /* undocumented */
1454 /* windows reads 0x55 at this point, why? */
1455 };
1456
1457 static const struct ov_regvals mode_init_519[] = {
1458 { 0x5d, 0x03 }, /* Turn off suspend mode */
1459 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
1460 { 0x54, 0x0f }, /* bit2 (jpeg enable) */
1461 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
1462 { 0xa3, 0x18 },
1463 { 0xa4, 0x04 },
1464 { 0xa5, 0x28 },
1465 { 0x37, 0x00 }, /* SetUsbInit */
1466 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
1467 /* Enable both fields, YUV Input, disable defect comp (why?) */
1468 { 0x22, 0x1d },
1469 { 0x17, 0x50 }, /* undocumented */
1470 { 0x37, 0x00 }, /* undocumented */
1471 { 0x40, 0xff }, /* I2C timeout counter */
1472 { 0x46, 0x00 }, /* I2C clock prescaler */
1473 { 0x59, 0x04 }, /* new from windrv 090403 */
1474 { 0xff, 0x00 }, /* undocumented */
1475 /* windows reads 0x55 at this point, why? */
1476 };
1477
1478 /******** Set the mode ********/
1479 if (sd->sensor != SEN_OV7670) {
1480 if (write_regvals(sd, mode_init_519,
1481 ARRAY_SIZE(mode_init_519)))
1482 return -EIO;
1483 if (sd->sensor == SEN_OV7640) {
1484 /* Select 8-bit input mode */
1485 reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10);
1486 }
1487 } else {
1488 if (write_regvals(sd, mode_init_519_ov7670,
1489 ARRAY_SIZE(mode_init_519_ov7670)))
1490 return -EIO;
1491 }
1492
1493 reg_w(sd, OV519_R10_H_SIZE, sd->gspca_dev.width >> 4);
1494 reg_w(sd, OV519_R11_V_SIZE, sd->gspca_dev.height >> 3);
1495 reg_w(sd, OV519_R12_X_OFFSETL, 0x00);
1496 reg_w(sd, OV519_R13_X_OFFSETH, 0x00);
1497 reg_w(sd, OV519_R14_Y_OFFSETL, 0x00);
1498 reg_w(sd, OV519_R15_Y_OFFSETH, 0x00);
1499 reg_w(sd, OV519_R16_DIVIDER, 0x00);
1500 reg_w(sd, OV519_R25_FORMAT, 0x03); /* YUV422 */
1501 reg_w(sd, 0x26, 0x00); /* Undocumented */
1502
1503 /******** Set the framerate ********/
1504 if (frame_rate > 0)
1505 sd->frame_rate = frame_rate;
1506
1507 /* FIXME: These are only valid at the max resolution. */
1508 sd->clockdiv = 0;
1509 switch (sd->sensor) {
1510 case SEN_OV7640:
1511 switch (sd->frame_rate) {
1512 default:
1513 /* case 30: */
1514 reg_w(sd, 0xa4, 0x0c);
1515 reg_w(sd, 0x23, 0xff);
1516 break;
1517 case 25:
1518 reg_w(sd, 0xa4, 0x0c);
1519 reg_w(sd, 0x23, 0x1f);
1520 break;
1521 case 20:
1522 reg_w(sd, 0xa4, 0x0c);
1523 reg_w(sd, 0x23, 0x1b);
1524 break;
1525 case 15:
1526 reg_w(sd, 0xa4, 0x04);
1527 reg_w(sd, 0x23, 0xff);
1528 sd->clockdiv = 1;
1529 break;
1530 case 10:
1531 reg_w(sd, 0xa4, 0x04);
1532 reg_w(sd, 0x23, 0x1f);
1533 sd->clockdiv = 1;
1534 break;
1535 case 5:
1536 reg_w(sd, 0xa4, 0x04);
1537 reg_w(sd, 0x23, 0x1b);
1538 sd->clockdiv = 1;
1539 break;
1540 }
1541 break;
1542 case SEN_OV8610:
1543 switch (sd->frame_rate) {
1544 default: /* 15 fps */
1545 /* case 15: */
1546 reg_w(sd, 0xa4, 0x06);
1547 reg_w(sd, 0x23, 0xff);
1548 break;
1549 case 10:
1550 reg_w(sd, 0xa4, 0x06);
1551 reg_w(sd, 0x23, 0x1f);
1552 break;
1553 case 5:
1554 reg_w(sd, 0xa4, 0x06);
1555 reg_w(sd, 0x23, 0x1b);
1556 break;
1557 }
1558 break;
1559 case SEN_OV7670: /* guesses, based on 7640 */
1560 PDEBUG(D_STREAM, "Setting framerate to %d fps",
1561 (sd->frame_rate == 0) ? 15 : sd->frame_rate);
1562 reg_w(sd, 0xa4, 0x10);
1563 switch (sd->frame_rate) {
1564 case 30:
1565 reg_w(sd, 0x23, 0xff);
1566 break;
1567 case 20:
1568 reg_w(sd, 0x23, 0x1b);
1569 break;
1570 default:
1571 /* case 15: */
1572 reg_w(sd, 0x23, 0xff);
1573 sd->clockdiv = 1;
1574 break;
1575 }
1576 break;
1577 }
1578 return 0;
1579 }
1580
1581 static int mode_init_ov_sensor_regs(struct sd *sd)
1582 {
1583 struct gspca_dev *gspca_dev;
1584 int qvga;
1585
1586 gspca_dev = &sd->gspca_dev;
1587 qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv;
1588
1589 /******** Mode (VGA/QVGA) and sensor specific regs ********/
1590 switch (sd->sensor) {
1591 case SEN_OV8610:
1592 /* For OV8610 qvga means qsvga */
1593 i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5);
1594 break;
1595 case SEN_OV7610:
1596 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
1597 break;
1598 case SEN_OV7620:
1599 /* i2c_w(sd, 0x2b, 0x00); */
1600 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
1601 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
1602 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
1603 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
1604 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
1605 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
1606 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
1607 break;
1608 case SEN_OV76BE:
1609 /* i2c_w(sd, 0x2b, 0x00); */
1610 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
1611 break;
1612 case SEN_OV7640:
1613 /* i2c_w(sd, 0x2b, 0x00); */
1614 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
1615 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
1616 /* i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a); */
1617 /* i2c_w(sd, 0x25, qvga ? 0x30 : 0x60); */
1618 /* i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40); */
1619 /* i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0); */
1620 /* i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20); */
1621 break;
1622 case SEN_OV7670:
1623 /* set COM7_FMT_VGA or COM7_FMT_QVGA
1624 * do we need to set anything else?
1625 * HSTART etc are set in set_ov_sensor_window itself */
1626 i2c_w_mask(sd, OV7670_REG_COM7,
1627 qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA,
1628 OV7670_COM7_FMT_MASK);
1629 break;
1630 case SEN_OV6620:
1631 case SEN_OV6630:
1632 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
1633 break;
1634 default:
1635 return -EINVAL;
1636 }
1637
1638 /******** Palette-specific regs ********/
1639 if (sd->sensor == SEN_OV7610 || sd->sensor == SEN_OV76BE) {
1640 /* not valid on the OV6620/OV7620/6630? */
1641 i2c_w_mask(sd, 0x0e, 0x00, 0x40);
1642 }
1643
1644 /* The OV518 needs special treatment. Although both the OV518
1645 * and the OV6630 support a 16-bit video bus, only the 8 bit Y
1646 * bus is actually used. The UV bus is tied to ground.
1647 * Therefore, the OV6630 needs to be in 8-bit multiplexed
1648 * output mode */
1649
1650 /* OV7640 is 8-bit only */
1651
1652 if (sd->sensor != SEN_OV6630 && sd->sensor != SEN_OV7640)
1653 i2c_w_mask(sd, 0x13, 0x00, 0x20);
1654
1655 /******** Clock programming ********/
1656 /* The OV6620 needs special handling. This prevents the
1657 * severe banding that normally occurs */
1658 if (sd->sensor == SEN_OV6620) {
1659
1660 /* Clock down */
1661 i2c_w(sd, 0x2a, 0x04);
1662 i2c_w(sd, 0x11, sd->clockdiv);
1663 i2c_w(sd, 0x2a, 0x84);
1664 /* This next setting is critical. It seems to improve
1665 * the gain or the contrast. The "reserved" bits seem
1666 * to have some effect in this case. */
1667 i2c_w(sd, 0x2d, 0x85);
1668 } else {
1669 i2c_w(sd, 0x11, sd->clockdiv);
1670 }
1671
1672 /******** Special Features ********/
1673 /* no evidence this is possible with OV7670, either */
1674 /* Test Pattern */
1675 if (sd->sensor != SEN_OV7640 && sd->sensor != SEN_OV7670)
1676 i2c_w_mask(sd, 0x12, 0x00, 0x02);
1677
1678 /* Enable auto white balance */
1679 if (sd->sensor == SEN_OV7670)
1680 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_AWB,
1681 OV7670_COM8_AWB);
1682 else
1683 i2c_w_mask(sd, 0x12, 0x04, 0x04);
1684
1685 /* This will go away as soon as ov51x_mode_init_sensor_regs() */
1686 /* is fully tested. */
1687 /* 7620/6620/6630? don't have register 0x35, so play it safe */
1688 if (sd->sensor == SEN_OV7610 || sd->sensor == SEN_OV76BE) {
1689 if (!qvga)
1690 i2c_w(sd, 0x35, 0x9e);
1691 else
1692 i2c_w(sd, 0x35, 0x1e);
1693 }
1694 return 0;
1695 }
1696
1697 static void sethvflip(struct sd *sd)
1698 {
1699 if (sd->sensor != SEN_OV7670)
1700 return;
1701 if (sd->gspca_dev.streaming)
1702 ov51x_stop(sd);
1703 i2c_w_mask(sd, OV7670_REG_MVFP,
1704 OV7670_MVFP_MIRROR * sd->hflip
1705 | OV7670_MVFP_VFLIP * sd->vflip,
1706 OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP);
1707 if (sd->gspca_dev.streaming)
1708 ov51x_restart(sd);
1709 }
1710
1711 static int set_ov_sensor_window(struct sd *sd)
1712 {
1713 struct gspca_dev *gspca_dev;
1714 int qvga;
1715 int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale;
1716 int ret, hstart, hstop, vstop, vstart;
1717 __u8 v;
1718
1719 gspca_dev = &sd->gspca_dev;
1720 qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv;
1721
1722 /* The different sensor ICs handle setting up of window differently.
1723 * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */
1724 switch (sd->sensor) {
1725 case SEN_OV8610:
1726 hwsbase = 0x1e;
1727 hwebase = 0x1e;
1728 vwsbase = 0x02;
1729 vwebase = 0x02;
1730 break;
1731 case SEN_OV7610:
1732 case SEN_OV76BE:
1733 hwsbase = 0x38;
1734 hwebase = 0x3a;
1735 vwsbase = vwebase = 0x05;
1736 break;
1737 case SEN_OV6620:
1738 case SEN_OV6630:
1739 hwsbase = 0x38;
1740 hwebase = 0x3a;
1741 vwsbase = 0x05;
1742 vwebase = 0x06;
1743 break;
1744 case SEN_OV7620:
1745 hwsbase = 0x2f; /* From 7620.SET (spec is wrong) */
1746 hwebase = 0x2f;
1747 vwsbase = vwebase = 0x05;
1748 break;
1749 case SEN_OV7640:
1750 hwsbase = 0x1a;
1751 hwebase = 0x1a;
1752 vwsbase = vwebase = 0x03;
1753 break;
1754 case SEN_OV7670:
1755 /*handling of OV7670 hardware sensor start and stop values
1756 * is very odd, compared to the other OV sensors */
1757 vwsbase = vwebase = hwebase = hwsbase = 0x00;
1758 break;
1759 default:
1760 return -EINVAL;
1761 }
1762
1763 switch (sd->sensor) {
1764 case SEN_OV6620:
1765 case SEN_OV6630:
1766 if (qvga) { /* QCIF */
1767 hwscale = 0;
1768 vwscale = 0;
1769 } else { /* CIF */
1770 hwscale = 1;
1771 vwscale = 1; /* The datasheet says 0;
1772 * it's wrong */
1773 }
1774 break;
1775 case SEN_OV8610:
1776 if (qvga) { /* QSVGA */
1777 hwscale = 1;
1778 vwscale = 1;
1779 } else { /* SVGA */
1780 hwscale = 2;
1781 vwscale = 2;
1782 }
1783 break;
1784 default: /* SEN_OV7xx0 */
1785 if (qvga) { /* QVGA */
1786 hwscale = 1;
1787 vwscale = 0;
1788 } else { /* VGA */
1789 hwscale = 2;
1790 vwscale = 1;
1791 }
1792 }
1793
1794 ret = mode_init_ov_sensor_regs(sd);
1795 if (ret < 0)
1796 return ret;
1797
1798 if (sd->sensor == SEN_OV8610) {
1799 i2c_w_mask(sd, 0x2d, 0x05, 0x40);
1800 /* old 0x95, new 0x05 from windrv 090403 */
1801 /* bits 5-7: reserved */
1802 i2c_w_mask(sd, 0x28, 0x20, 0x20);
1803 /* bit 5: progressive mode on */
1804 }
1805
1806 /* The below is wrong for OV7670s because their window registers
1807 * only store the high bits in 0x17 to 0x1a */
1808
1809 /* SRH Use sd->max values instead of requested win values */
1810 /* SCS Since we're sticking with only the max hardware widths
1811 * for a given mode */
1812 /* I can hard code this for OV7670s */
1813 /* Yes, these numbers do look odd, but they're tested and work! */
1814 if (sd->sensor == SEN_OV7670) {
1815 if (qvga) { /* QVGA from ov7670.c by
1816 * Jonathan Corbet */
1817 hstart = 164;
1818 hstop = 20;
1819 vstart = 14;
1820 vstop = 494;
1821 } else { /* VGA */
1822 hstart = 158;
1823 hstop = 14;
1824 vstart = 10;
1825 vstop = 490;
1826 }
1827 /* OV7670 hardware window registers are split across
1828 * multiple locations */
1829 i2c_w(sd, OV7670_REG_HSTART, hstart >> 3);
1830 i2c_w(sd, OV7670_REG_HSTOP, hstop >> 3);
1831 v = i2c_r(sd, OV7670_REG_HREF);
1832 v = (v & 0xc0) | ((hstop & 0x7) << 3) | (hstart & 0x07);
1833 msleep(10); /* need to sleep between read and write to
1834 * same reg! */
1835 i2c_w(sd, OV7670_REG_HREF, v);
1836
1837 i2c_w(sd, OV7670_REG_VSTART, vstart >> 2);
1838 i2c_w(sd, OV7670_REG_VSTOP, vstop >> 2);
1839 v = i2c_r(sd, OV7670_REG_VREF);
1840 v = (v & 0xc0) | ((vstop & 0x3) << 2) | (vstart & 0x03);
1841 msleep(10); /* need to sleep between read and write to
1842 * same reg! */
1843 i2c_w(sd, OV7670_REG_VREF, v);
1844 sethvflip(sd);
1845 } else {
1846 i2c_w(sd, 0x17, hwsbase);
1847 i2c_w(sd, 0x18, hwebase + (sd->gspca_dev.width >> hwscale));
1848 i2c_w(sd, 0x19, vwsbase);
1849 i2c_w(sd, 0x1a, vwebase + (sd->gspca_dev.height >> vwscale));
1850 }
1851 return 0;
1852 }
1853
1854 /* -- start the camera -- */
1855 static int sd_start(struct gspca_dev *gspca_dev)
1856 {
1857 struct sd *sd = (struct sd *) gspca_dev;
1858 int ret;
1859
1860 ret = ov519_mode_init_regs(sd);
1861 if (ret < 0)
1862 goto out;
1863 ret = set_ov_sensor_window(sd);
1864 if (ret < 0)
1865 goto out;
1866
1867 ret = ov51x_restart(sd);
1868 if (ret < 0)
1869 goto out;
1870 ov51x_led_control(sd, 1);
1871 return 0;
1872 out:
1873 PDEBUG(D_ERR, "camera start error:%d", ret);
1874 return ret;
1875 }
1876
1877 static void sd_stopN(struct gspca_dev *gspca_dev)
1878 {
1879 struct sd *sd = (struct sd *) gspca_dev;
1880
1881 ov51x_stop(sd);
1882 ov51x_led_control(sd, 0);
1883 }
1884
1885 static void sd_pkt_scan(struct gspca_dev *gspca_dev,
1886 struct gspca_frame *frame, /* target */
1887 __u8 *data, /* isoc packet */
1888 int len) /* iso packet length */
1889 {
1890 /* Header of ov519 is 16 bytes:
1891 * Byte Value Description
1892 * 0 0xff magic
1893 * 1 0xff magic
1894 * 2 0xff magic
1895 * 3 0xXX 0x50 = SOF, 0x51 = EOF
1896 * 9 0xXX 0x01 initial frame without data,
1897 * 0x00 standard frame with image
1898 * 14 Lo in EOF: length of image data / 8
1899 * 15 Hi
1900 */
1901
1902 if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) {
1903 switch (data[3]) {
1904 case 0x50: /* start of frame */
1905 #define HDRSZ 16
1906 data += HDRSZ;
1907 len -= HDRSZ;
1908 #undef HDRSZ
1909 if (data[0] == 0xff || data[1] == 0xd8)
1910 gspca_frame_add(gspca_dev, FIRST_PACKET, frame,
1911 data, len);
1912 else
1913 gspca_dev->last_packet_type = DISCARD_PACKET;
1914 return;
1915 case 0x51: /* end of frame */
1916 if (data[9] != 0)
1917 gspca_dev->last_packet_type = DISCARD_PACKET;
1918 gspca_frame_add(gspca_dev, LAST_PACKET, frame,
1919 data, 0);
1920 return;
1921 }
1922 }
1923
1924 /* intermediate packet */
1925 gspca_frame_add(gspca_dev, INTER_PACKET, frame,
1926 data, len);
1927 }
1928
1929 /* -- management routines -- */
1930
1931 static void setbrightness(struct gspca_dev *gspca_dev)
1932 {
1933 struct sd *sd = (struct sd *) gspca_dev;
1934 int val;
1935
1936 val = sd->brightness;
1937 switch (sd->sensor) {
1938 case SEN_OV8610:
1939 case SEN_OV7610:
1940 case SEN_OV76BE:
1941 case SEN_OV6620:
1942 case SEN_OV6630:
1943 case SEN_OV7640:
1944 i2c_w(sd, OV7610_REG_BRT, val);
1945 break;
1946 case SEN_OV7620:
1947 /* 7620 doesn't like manual changes when in auto mode */
1948 /*fixme
1949 * if (!sd->auto_brt) */
1950 i2c_w(sd, OV7610_REG_BRT, val);
1951 break;
1952 case SEN_OV7670:
1953 /*win trace
1954 * i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_AEC); */
1955 i2c_w(sd, OV7670_REG_BRIGHT, ov7670_abs_to_sm(val));
1956 break;
1957 }
1958 }
1959
1960 static void setcontrast(struct gspca_dev *gspca_dev)
1961 {
1962 struct sd *sd = (struct sd *) gspca_dev;
1963 int val;
1964
1965 val = sd->contrast;
1966 switch (sd->sensor) {
1967 case SEN_OV7610:
1968 case SEN_OV6620:
1969 i2c_w(sd, OV7610_REG_CNT, val);
1970 break;
1971 case SEN_OV6630:
1972 i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f);
1973 case SEN_OV8610: {
1974 static const __u8 ctab[] = {
1975 0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f
1976 };
1977
1978 /* Use Y gamma control instead. Bit 0 enables it. */
1979 i2c_w(sd, 0x64, ctab[val >> 5]);
1980 break;
1981 }
1982 case SEN_OV7620: {
1983 static const __u8 ctab[] = {
1984 0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57,
1985 0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff
1986 };
1987
1988 /* Use Y gamma control instead. Bit 0 enables it. */
1989 i2c_w(sd, 0x64, ctab[val >> 4]);
1990 break;
1991 }
1992 case SEN_OV7640:
1993 /* Use gain control instead. */
1994 i2c_w(sd, OV7610_REG_GAIN, val >> 2);
1995 break;
1996 case SEN_OV7670:
1997 /* check that this isn't just the same as ov7610 */
1998 i2c_w(sd, OV7670_REG_CONTRAS, val >> 1);
1999 break;
2000 }
2001 }
2002
2003 static void setcolors(struct gspca_dev *gspca_dev)
2004 {
2005 struct sd *sd = (struct sd *) gspca_dev;
2006 int val;
2007
2008 val = sd->colors;
2009 switch (sd->sensor) {
2010 case SEN_OV8610:
2011 case SEN_OV7610:
2012 case SEN_OV76BE:
2013 case SEN_OV6620:
2014 case SEN_OV6630:
2015 i2c_w(sd, OV7610_REG_SAT, val);
2016 break;
2017 case SEN_OV7620:
2018 /* Use UV gamma control instead. Bits 0 & 7 are reserved. */
2019 /* rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e);
2020 if (rc < 0)
2021 goto out; */
2022 i2c_w(sd, OV7610_REG_SAT, val);
2023 break;
2024 case SEN_OV7640:
2025 i2c_w(sd, OV7610_REG_SAT, val & 0xf0);
2026 break;
2027 case SEN_OV7670:
2028 /* supported later once I work out how to do it
2029 * transparently fail now! */
2030 /* set REG_COM13 values for UV sat auto mode */
2031 break;
2032 }
2033 }
2034
2035 static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val)
2036 {
2037 struct sd *sd = (struct sd *) gspca_dev;
2038
2039 sd->brightness = val;
2040 if (gspca_dev->streaming)
2041 setbrightness(gspca_dev);
2042 return 0;
2043 }
2044
2045 static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val)
2046 {
2047 struct sd *sd = (struct sd *) gspca_dev;
2048
2049 *val = sd->brightness;
2050 return 0;
2051 }
2052
2053 static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val)
2054 {
2055 struct sd *sd = (struct sd *) gspca_dev;
2056
2057 sd->contrast = val;
2058 if (gspca_dev->streaming)
2059 setcontrast(gspca_dev);
2060 return 0;
2061 }
2062
2063 static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val)
2064 {
2065 struct sd *sd = (struct sd *) gspca_dev;
2066
2067 *val = sd->contrast;
2068 return 0;
2069 }
2070
2071 static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val)
2072 {
2073 struct sd *sd = (struct sd *) gspca_dev;
2074
2075 sd->colors = val;
2076 if (gspca_dev->streaming)
2077 setcolors(gspca_dev);
2078 return 0;
2079 }
2080
2081 static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val)
2082 {
2083 struct sd *sd = (struct sd *) gspca_dev;
2084
2085 *val = sd->colors;
2086 return 0;
2087 }
2088
2089 static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val)
2090 {
2091 struct sd *sd = (struct sd *) gspca_dev;
2092
2093 sd->hflip = val;
2094 if (gspca_dev->streaming)
2095 sethvflip(sd);
2096 return 0;
2097 }
2098
2099 static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val)
2100 {
2101 struct sd *sd = (struct sd *) gspca_dev;
2102
2103 *val = sd->hflip;
2104 return 0;
2105 }
2106
2107 static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val)
2108 {
2109 struct sd *sd = (struct sd *) gspca_dev;
2110
2111 sd->vflip = val;
2112 if (gspca_dev->streaming)
2113 sethvflip(sd);
2114 return 0;
2115 }
2116
2117 static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val)
2118 {
2119 struct sd *sd = (struct sd *) gspca_dev;
2120
2121 *val = sd->vflip;
2122 return 0;
2123 }
2124
2125 /* sub-driver description */
2126 static const struct sd_desc sd_desc = {
2127 .name = MODULE_NAME,
2128 .ctrls = sd_ctrls,
2129 .nctrls = ARRAY_SIZE(sd_ctrls),
2130 .config = sd_config,
2131 .init = sd_init,
2132 .start = sd_start,
2133 .stopN = sd_stopN,
2134 .pkt_scan = sd_pkt_scan,
2135 };
2136
2137 /* -- module initialisation -- */
2138 static const __devinitdata struct usb_device_id device_table[] = {
2139 {USB_DEVICE(0x041e, 0x4052)},
2140 {USB_DEVICE(0x041e, 0x405f)},
2141 {USB_DEVICE(0x041e, 0x4060)},
2142 {USB_DEVICE(0x041e, 0x4061)},
2143 {USB_DEVICE(0x041e, 0x4064)},
2144 {USB_DEVICE(0x041e, 0x4068)},
2145 {USB_DEVICE(0x045e, 0x028c)},
2146 {USB_DEVICE(0x054c, 0x0154)},
2147 {USB_DEVICE(0x054c, 0x0155)},
2148 {USB_DEVICE(0x05a9, 0x0519)},
2149 {USB_DEVICE(0x05a9, 0x0530)},
2150 {USB_DEVICE(0x05a9, 0x4519)},
2151 {USB_DEVICE(0x05a9, 0x8519)},
2152 {}
2153 };
2154
2155 MODULE_DEVICE_TABLE(usb, device_table);
2156
2157 /* -- device connect -- */
2158 static int sd_probe(struct usb_interface *intf,
2159 const struct usb_device_id *id)
2160 {
2161 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
2162 THIS_MODULE);
2163 }
2164
2165 static struct usb_driver sd_driver = {
2166 .name = MODULE_NAME,
2167 .id_table = device_table,
2168 .probe = sd_probe,
2169 .disconnect = gspca_disconnect,
2170 #ifdef CONFIG_PM
2171 .suspend = gspca_suspend,
2172 .resume = gspca_resume,
2173 #endif
2174 };
2175
2176 /* -- module insert / remove -- */
2177 static int __init sd_mod_init(void)
2178 {
2179 int ret;
2180 ret = usb_register(&sd_driver);
2181 if (ret < 0)
2182 return ret;
2183 PDEBUG(D_PROBE, "registered");
2184 return 0;
2185 }
2186 static void __exit sd_mod_exit(void)
2187 {
2188 usb_deregister(&sd_driver);
2189 PDEBUG(D_PROBE, "deregistered");
2190 }
2191
2192 module_init(sd_mod_init);
2193 module_exit(sd_mod_exit);
2194
2195 module_param(frame_rate, int, 0644);
2196 MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)");
Linux kernel - Deliverables
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