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V4L/DVB: gspca - main: Simplify image building
[deliverable/linux.git] / drivers / media / video / gspca / ov519.c
1 /**
2 * OV519 driver
3 *
4 * Copyright (C) 2008 Jean-Francois Moine (http://moinejf.free.fr)
5 * Copyright (C) 2009 Hans de Goede <hdegoede@redhat.com>
6 *
7 * This module is adapted from the ov51x-jpeg package, which itself
8 * was adapted from the ov511 driver.
9 *
10 * Original copyright for the ov511 driver is:
11 *
12 * Copyright (c) 1999-2006 Mark W. McClelland
13 * Support for OV519, OV8610 Copyright (c) 2003 Joerg Heckenbach
14 * Many improvements by Bret Wallach <bwallac1@san.rr.com>
15 * Color fixes by by Orion Sky Lawlor <olawlor@acm.org> (2/26/2000)
16 * OV7620 fixes by Charl P. Botha <cpbotha@ieee.org>
17 * Changes by Claudio Matsuoka <claudio@conectiva.com>
18 *
19 * ov51x-jpeg original copyright is:
20 *
21 * Copyright (c) 2004-2007 Romain Beauxis <toots@rastageeks.org>
22 * Support for OV7670 sensors was contributed by Sam Skipsey <aoanla@yahoo.com>
23 *
24 * This program is free software; you can redistribute it and/or modify
25 * it under the terms of the GNU General Public License as published by
26 * the Free Software Foundation; either version 2 of the License, or
27 * any later version.
28 *
29 * This program is distributed in the hope that it will be useful,
30 * but WITHOUT ANY WARRANTY; without even the implied warranty of
31 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
32 * GNU General Public License for more details.
33 *
34 * You should have received a copy of the GNU General Public License
35 * along with this program; if not, write to the Free Software
36 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
37 *
38 */
39 #define MODULE_NAME "ov519"
40
41 #include <linux/input.h>
42 #include "gspca.h"
43
44 /* The jpeg_hdr is used by w996Xcf only */
45 /* The CONEX_CAM define for jpeg.h needs renaming, now its used here too */
46 #define CONEX_CAM
47 #include "jpeg.h"
48
49 MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
50 MODULE_DESCRIPTION("OV519 USB Camera Driver");
51 MODULE_LICENSE("GPL");
52
53 /* global parameters */
54 static int frame_rate;
55
56 /* Number of times to retry a failed I2C transaction. Increase this if you
57 * are getting "Failed to read sensor ID..." */
58 static int i2c_detect_tries = 10;
59
60 /* ov519 device descriptor */
61 struct sd {
62 struct gspca_dev gspca_dev; /* !! must be the first item */
63
64 __u8 packet_nr;
65
66 char bridge;
67 #define BRIDGE_OV511 0
68 #define BRIDGE_OV511PLUS 1
69 #define BRIDGE_OV518 2
70 #define BRIDGE_OV518PLUS 3
71 #define BRIDGE_OV519 4
72 #define BRIDGE_OVFX2 5
73 #define BRIDGE_W9968CF 6
74 #define BRIDGE_MASK 7
75
76 char invert_led;
77 #define BRIDGE_INVERT_LED 8
78
79 char snapshot_pressed;
80 char snapshot_needs_reset;
81
82 /* Determined by sensor type */
83 __u8 sif;
84
85 __u8 brightness;
86 __u8 contrast;
87 __u8 colors;
88 __u8 hflip;
89 __u8 vflip;
90 __u8 autobrightness;
91 __u8 freq;
92 __u8 quality;
93 #define QUALITY_MIN 50
94 #define QUALITY_MAX 70
95 #define QUALITY_DEF 50
96
97 __u8 stopped; /* Streaming is temporarily paused */
98 __u8 first_frame;
99
100 __u8 frame_rate; /* current Framerate */
101 __u8 clockdiv; /* clockdiv override */
102
103 char sensor; /* Type of image sensor chip (SEN_*) */
104 #define SEN_UNKNOWN 0
105 #define SEN_OV2610 1
106 #define SEN_OV3610 2
107 #define SEN_OV6620 3
108 #define SEN_OV6630 4
109 #define SEN_OV66308AF 5
110 #define SEN_OV7610 6
111 #define SEN_OV7620 7
112 #define SEN_OV7620AE 8
113 #define SEN_OV7640 9
114 #define SEN_OV7648 10
115 #define SEN_OV7670 11
116 #define SEN_OV76BE 12
117 #define SEN_OV8610 13
118
119 u8 sensor_addr;
120 int sensor_width;
121 int sensor_height;
122 int sensor_reg_cache[256];
123
124 u8 jpeg_hdr[JPEG_HDR_SZ];
125 };
126
127 /* Note this is a bit of a hack, but the w9968cf driver needs the code for all
128 the ov sensors which is already present here. When we have the time we
129 really should move the sensor drivers to v4l2 sub drivers. */
130 #include "w996Xcf.c"
131
132 /* V4L2 controls supported by the driver */
133 static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val);
134 static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val);
135 static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val);
136 static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val);
137 static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val);
138 static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val);
139 static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val);
140 static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val);
141 static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val);
142 static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val);
143 static int sd_setautobrightness(struct gspca_dev *gspca_dev, __s32 val);
144 static int sd_getautobrightness(struct gspca_dev *gspca_dev, __s32 *val);
145 static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val);
146 static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val);
147 static void setbrightness(struct gspca_dev *gspca_dev);
148 static void setcontrast(struct gspca_dev *gspca_dev);
149 static void setcolors(struct gspca_dev *gspca_dev);
150 static void setautobrightness(struct sd *sd);
151 static void setfreq(struct sd *sd);
152
153 static const struct ctrl sd_ctrls[] = {
154 #define BRIGHTNESS_IDX 0
155 {
156 {
157 .id = V4L2_CID_BRIGHTNESS,
158 .type = V4L2_CTRL_TYPE_INTEGER,
159 .name = "Brightness",
160 .minimum = 0,
161 .maximum = 255,
162 .step = 1,
163 #define BRIGHTNESS_DEF 127
164 .default_value = BRIGHTNESS_DEF,
165 },
166 .set = sd_setbrightness,
167 .get = sd_getbrightness,
168 },
169 #define CONTRAST_IDX 1
170 {
171 {
172 .id = V4L2_CID_CONTRAST,
173 .type = V4L2_CTRL_TYPE_INTEGER,
174 .name = "Contrast",
175 .minimum = 0,
176 .maximum = 255,
177 .step = 1,
178 #define CONTRAST_DEF 127
179 .default_value = CONTRAST_DEF,
180 },
181 .set = sd_setcontrast,
182 .get = sd_getcontrast,
183 },
184 #define COLOR_IDX 2
185 {
186 {
187 .id = V4L2_CID_SATURATION,
188 .type = V4L2_CTRL_TYPE_INTEGER,
189 .name = "Color",
190 .minimum = 0,
191 .maximum = 255,
192 .step = 1,
193 #define COLOR_DEF 127
194 .default_value = COLOR_DEF,
195 },
196 .set = sd_setcolors,
197 .get = sd_getcolors,
198 },
199 /* The flip controls work with ov7670 only */
200 #define HFLIP_IDX 3
201 {
202 {
203 .id = V4L2_CID_HFLIP,
204 .type = V4L2_CTRL_TYPE_BOOLEAN,
205 .name = "Mirror",
206 .minimum = 0,
207 .maximum = 1,
208 .step = 1,
209 #define HFLIP_DEF 0
210 .default_value = HFLIP_DEF,
211 },
212 .set = sd_sethflip,
213 .get = sd_gethflip,
214 },
215 #define VFLIP_IDX 4
216 {
217 {
218 .id = V4L2_CID_VFLIP,
219 .type = V4L2_CTRL_TYPE_BOOLEAN,
220 .name = "Vflip",
221 .minimum = 0,
222 .maximum = 1,
223 .step = 1,
224 #define VFLIP_DEF 0
225 .default_value = VFLIP_DEF,
226 },
227 .set = sd_setvflip,
228 .get = sd_getvflip,
229 },
230 #define AUTOBRIGHT_IDX 5
231 {
232 {
233 .id = V4L2_CID_AUTOBRIGHTNESS,
234 .type = V4L2_CTRL_TYPE_BOOLEAN,
235 .name = "Auto Brightness",
236 .minimum = 0,
237 .maximum = 1,
238 .step = 1,
239 #define AUTOBRIGHT_DEF 1
240 .default_value = AUTOBRIGHT_DEF,
241 },
242 .set = sd_setautobrightness,
243 .get = sd_getautobrightness,
244 },
245 #define FREQ_IDX 6
246 {
247 {
248 .id = V4L2_CID_POWER_LINE_FREQUENCY,
249 .type = V4L2_CTRL_TYPE_MENU,
250 .name = "Light frequency filter",
251 .minimum = 0,
252 .maximum = 2, /* 0: 0, 1: 50Hz, 2:60Hz */
253 .step = 1,
254 #define FREQ_DEF 0
255 .default_value = FREQ_DEF,
256 },
257 .set = sd_setfreq,
258 .get = sd_getfreq,
259 },
260 #define OV7670_FREQ_IDX 7
261 {
262 {
263 .id = V4L2_CID_POWER_LINE_FREQUENCY,
264 .type = V4L2_CTRL_TYPE_MENU,
265 .name = "Light frequency filter",
266 .minimum = 0,
267 .maximum = 3, /* 0: 0, 1: 50Hz, 2:60Hz 3: Auto Hz */
268 .step = 1,
269 #define OV7670_FREQ_DEF 3
270 .default_value = OV7670_FREQ_DEF,
271 },
272 .set = sd_setfreq,
273 .get = sd_getfreq,
274 },
275 };
276
277 static const struct v4l2_pix_format ov519_vga_mode[] = {
278 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
279 .bytesperline = 320,
280 .sizeimage = 320 * 240 * 3 / 8 + 590,
281 .colorspace = V4L2_COLORSPACE_JPEG,
282 .priv = 1},
283 {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
284 .bytesperline = 640,
285 .sizeimage = 640 * 480 * 3 / 8 + 590,
286 .colorspace = V4L2_COLORSPACE_JPEG,
287 .priv = 0},
288 };
289 static const struct v4l2_pix_format ov519_sif_mode[] = {
290 {160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
291 .bytesperline = 160,
292 .sizeimage = 160 * 120 * 3 / 8 + 590,
293 .colorspace = V4L2_COLORSPACE_JPEG,
294 .priv = 3},
295 {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
296 .bytesperline = 176,
297 .sizeimage = 176 * 144 * 3 / 8 + 590,
298 .colorspace = V4L2_COLORSPACE_JPEG,
299 .priv = 1},
300 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
301 .bytesperline = 320,
302 .sizeimage = 320 * 240 * 3 / 8 + 590,
303 .colorspace = V4L2_COLORSPACE_JPEG,
304 .priv = 2},
305 {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
306 .bytesperline = 352,
307 .sizeimage = 352 * 288 * 3 / 8 + 590,
308 .colorspace = V4L2_COLORSPACE_JPEG,
309 .priv = 0},
310 };
311
312 /* Note some of the sizeimage values for the ov511 / ov518 may seem
313 larger then necessary, however they need to be this big as the ov511 /
314 ov518 always fills the entire isoc frame, using 0 padding bytes when
315 it doesn't have any data. So with low framerates the amount of data
316 transfered can become quite large (libv4l will remove all the 0 padding
317 in userspace). */
318 static const struct v4l2_pix_format ov518_vga_mode[] = {
319 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
320 .bytesperline = 320,
321 .sizeimage = 320 * 240 * 3,
322 .colorspace = V4L2_COLORSPACE_JPEG,
323 .priv = 1},
324 {640, 480, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
325 .bytesperline = 640,
326 .sizeimage = 640 * 480 * 2,
327 .colorspace = V4L2_COLORSPACE_JPEG,
328 .priv = 0},
329 };
330 static const struct v4l2_pix_format ov518_sif_mode[] = {
331 {160, 120, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
332 .bytesperline = 160,
333 .sizeimage = 70000,
334 .colorspace = V4L2_COLORSPACE_JPEG,
335 .priv = 3},
336 {176, 144, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
337 .bytesperline = 176,
338 .sizeimage = 70000,
339 .colorspace = V4L2_COLORSPACE_JPEG,
340 .priv = 1},
341 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
342 .bytesperline = 320,
343 .sizeimage = 320 * 240 * 3,
344 .colorspace = V4L2_COLORSPACE_JPEG,
345 .priv = 2},
346 {352, 288, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
347 .bytesperline = 352,
348 .sizeimage = 352 * 288 * 3,
349 .colorspace = V4L2_COLORSPACE_JPEG,
350 .priv = 0},
351 };
352
353 static const struct v4l2_pix_format ov511_vga_mode[] = {
354 {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
355 .bytesperline = 320,
356 .sizeimage = 320 * 240 * 3,
357 .colorspace = V4L2_COLORSPACE_JPEG,
358 .priv = 1},
359 {640, 480, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
360 .bytesperline = 640,
361 .sizeimage = 640 * 480 * 2,
362 .colorspace = V4L2_COLORSPACE_JPEG,
363 .priv = 0},
364 };
365 static const struct v4l2_pix_format ov511_sif_mode[] = {
366 {160, 120, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
367 .bytesperline = 160,
368 .sizeimage = 70000,
369 .colorspace = V4L2_COLORSPACE_JPEG,
370 .priv = 3},
371 {176, 144, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
372 .bytesperline = 176,
373 .sizeimage = 70000,
374 .colorspace = V4L2_COLORSPACE_JPEG,
375 .priv = 1},
376 {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
377 .bytesperline = 320,
378 .sizeimage = 320 * 240 * 3,
379 .colorspace = V4L2_COLORSPACE_JPEG,
380 .priv = 2},
381 {352, 288, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
382 .bytesperline = 352,
383 .sizeimage = 352 * 288 * 3,
384 .colorspace = V4L2_COLORSPACE_JPEG,
385 .priv = 0},
386 };
387
388 static const struct v4l2_pix_format ovfx2_vga_mode[] = {
389 {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
390 .bytesperline = 320,
391 .sizeimage = 320 * 240,
392 .colorspace = V4L2_COLORSPACE_SRGB,
393 .priv = 1},
394 {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
395 .bytesperline = 640,
396 .sizeimage = 640 * 480,
397 .colorspace = V4L2_COLORSPACE_SRGB,
398 .priv = 0},
399 };
400 static const struct v4l2_pix_format ovfx2_cif_mode[] = {
401 {160, 120, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
402 .bytesperline = 160,
403 .sizeimage = 160 * 120,
404 .colorspace = V4L2_COLORSPACE_SRGB,
405 .priv = 3},
406 {176, 144, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
407 .bytesperline = 176,
408 .sizeimage = 176 * 144,
409 .colorspace = V4L2_COLORSPACE_SRGB,
410 .priv = 1},
411 {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
412 .bytesperline = 320,
413 .sizeimage = 320 * 240,
414 .colorspace = V4L2_COLORSPACE_SRGB,
415 .priv = 2},
416 {352, 288, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
417 .bytesperline = 352,
418 .sizeimage = 352 * 288,
419 .colorspace = V4L2_COLORSPACE_SRGB,
420 .priv = 0},
421 };
422 static const struct v4l2_pix_format ovfx2_ov2610_mode[] = {
423 {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
424 .bytesperline = 1600,
425 .sizeimage = 1600 * 1200,
426 .colorspace = V4L2_COLORSPACE_SRGB},
427 };
428 static const struct v4l2_pix_format ovfx2_ov3610_mode[] = {
429 {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
430 .bytesperline = 640,
431 .sizeimage = 640 * 480,
432 .colorspace = V4L2_COLORSPACE_SRGB,
433 .priv = 1},
434 {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
435 .bytesperline = 800,
436 .sizeimage = 800 * 600,
437 .colorspace = V4L2_COLORSPACE_SRGB,
438 .priv = 1},
439 {1024, 768, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
440 .bytesperline = 1024,
441 .sizeimage = 1024 * 768,
442 .colorspace = V4L2_COLORSPACE_SRGB,
443 .priv = 1},
444 {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
445 .bytesperline = 1600,
446 .sizeimage = 1600 * 1200,
447 .colorspace = V4L2_COLORSPACE_SRGB,
448 .priv = 0},
449 {2048, 1536, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
450 .bytesperline = 2048,
451 .sizeimage = 2048 * 1536,
452 .colorspace = V4L2_COLORSPACE_SRGB,
453 .priv = 0},
454 };
455
456
457 /* Registers common to OV511 / OV518 */
458 #define R51x_FIFO_PSIZE 0x30 /* 2 bytes wide w/ OV518(+) */
459 #define R51x_SYS_RESET 0x50
460 /* Reset type flags */
461 #define OV511_RESET_OMNICE 0x08
462 #define R51x_SYS_INIT 0x53
463 #define R51x_SYS_SNAP 0x52
464 #define R51x_SYS_CUST_ID 0x5F
465 #define R51x_COMP_LUT_BEGIN 0x80
466
467 /* OV511 Camera interface register numbers */
468 #define R511_CAM_DELAY 0x10
469 #define R511_CAM_EDGE 0x11
470 #define R511_CAM_PXCNT 0x12
471 #define R511_CAM_LNCNT 0x13
472 #define R511_CAM_PXDIV 0x14
473 #define R511_CAM_LNDIV 0x15
474 #define R511_CAM_UV_EN 0x16
475 #define R511_CAM_LINE_MODE 0x17
476 #define R511_CAM_OPTS 0x18
477
478 #define R511_SNAP_FRAME 0x19
479 #define R511_SNAP_PXCNT 0x1A
480 #define R511_SNAP_LNCNT 0x1B
481 #define R511_SNAP_PXDIV 0x1C
482 #define R511_SNAP_LNDIV 0x1D
483 #define R511_SNAP_UV_EN 0x1E
484 #define R511_SNAP_UV_EN 0x1E
485 #define R511_SNAP_OPTS 0x1F
486
487 #define R511_DRAM_FLOW_CTL 0x20
488 #define R511_FIFO_OPTS 0x31
489 #define R511_I2C_CTL 0x40
490 #define R511_SYS_LED_CTL 0x55 /* OV511+ only */
491 #define R511_COMP_EN 0x78
492 #define R511_COMP_LUT_EN 0x79
493
494 /* OV518 Camera interface register numbers */
495 #define R518_GPIO_OUT 0x56 /* OV518(+) only */
496 #define R518_GPIO_CTL 0x57 /* OV518(+) only */
497
498 /* OV519 Camera interface register numbers */
499 #define OV519_R10_H_SIZE 0x10
500 #define OV519_R11_V_SIZE 0x11
501 #define OV519_R12_X_OFFSETL 0x12
502 #define OV519_R13_X_OFFSETH 0x13
503 #define OV519_R14_Y_OFFSETL 0x14
504 #define OV519_R15_Y_OFFSETH 0x15
505 #define OV519_R16_DIVIDER 0x16
506 #define OV519_R20_DFR 0x20
507 #define OV519_R25_FORMAT 0x25
508
509 /* OV519 System Controller register numbers */
510 #define OV519_SYS_RESET1 0x51
511 #define OV519_SYS_EN_CLK1 0x54
512
513 #define OV519_GPIO_DATA_OUT0 0x71
514 #define OV519_GPIO_IO_CTRL0 0x72
515
516 #define OV511_ENDPOINT_ADDRESS 1 /* Isoc endpoint number */
517
518 /*
519 * The FX2 chip does not give us a zero length read at end of frame.
520 * It does, however, give a short read at the end of a frame, if
521 * necessary, rather than run two frames together.
522 *
523 * By choosing the right bulk transfer size, we are guaranteed to always
524 * get a short read for the last read of each frame. Frame sizes are
525 * always a composite number (width * height, or a multiple) so if we
526 * choose a prime number, we are guaranteed that the last read of a
527 * frame will be short.
528 *
529 * But it isn't that easy: the 2.6 kernel requires a multiple of 4KB,
530 * otherwise EOVERFLOW "babbling" errors occur. I have not been able
531 * to figure out why. [PMiller]
532 *
533 * The constant (13 * 4096) is the largest "prime enough" number less than 64KB.
534 *
535 * It isn't enough to know the number of bytes per frame, in case we
536 * have data dropouts or buffer overruns (even though the FX2 double
537 * buffers, there are some pretty strict real time constraints for
538 * isochronous transfer for larger frame sizes).
539 */
540 #define OVFX2_BULK_SIZE (13 * 4096)
541
542 /* I2C registers */
543 #define R51x_I2C_W_SID 0x41
544 #define R51x_I2C_SADDR_3 0x42
545 #define R51x_I2C_SADDR_2 0x43
546 #define R51x_I2C_R_SID 0x44
547 #define R51x_I2C_DATA 0x45
548 #define R518_I2C_CTL 0x47 /* OV518(+) only */
549 #define OVFX2_I2C_ADDR 0x00
550
551 /* I2C ADDRESSES */
552 #define OV7xx0_SID 0x42
553 #define OV_HIRES_SID 0x60 /* OV9xxx / OV2xxx / OV3xxx */
554 #define OV8xx0_SID 0xa0
555 #define OV6xx0_SID 0xc0
556
557 /* OV7610 registers */
558 #define OV7610_REG_GAIN 0x00 /* gain setting (5:0) */
559 #define OV7610_REG_BLUE 0x01 /* blue channel balance */
560 #define OV7610_REG_RED 0x02 /* red channel balance */
561 #define OV7610_REG_SAT 0x03 /* saturation */
562 #define OV8610_REG_HUE 0x04 /* 04 reserved */
563 #define OV7610_REG_CNT 0x05 /* Y contrast */
564 #define OV7610_REG_BRT 0x06 /* Y brightness */
565 #define OV7610_REG_COM_C 0x14 /* misc common regs */
566 #define OV7610_REG_ID_HIGH 0x1c /* manufacturer ID MSB */
567 #define OV7610_REG_ID_LOW 0x1d /* manufacturer ID LSB */
568 #define OV7610_REG_COM_I 0x29 /* misc settings */
569
570 /* OV7670 registers */
571 #define OV7670_REG_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
572 #define OV7670_REG_BLUE 0x01 /* blue gain */
573 #define OV7670_REG_RED 0x02 /* red gain */
574 #define OV7670_REG_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */
575 #define OV7670_REG_COM1 0x04 /* Control 1 */
576 #define OV7670_REG_AECHH 0x07 /* AEC MS 5 bits */
577 #define OV7670_REG_COM3 0x0c /* Control 3 */
578 #define OV7670_REG_COM4 0x0d /* Control 4 */
579 #define OV7670_REG_COM5 0x0e /* All "reserved" */
580 #define OV7670_REG_COM6 0x0f /* Control 6 */
581 #define OV7670_REG_AECH 0x10 /* More bits of AEC value */
582 #define OV7670_REG_CLKRC 0x11 /* Clock control */
583 #define OV7670_REG_COM7 0x12 /* Control 7 */
584 #define OV7670_COM7_FMT_VGA 0x00
585 #define OV7670_COM7_YUV 0x00 /* YUV */
586 #define OV7670_COM7_FMT_QVGA 0x10 /* QVGA format */
587 #define OV7670_COM7_FMT_MASK 0x38
588 #define OV7670_COM7_RESET 0x80 /* Register reset */
589 #define OV7670_REG_COM8 0x13 /* Control 8 */
590 #define OV7670_COM8_AEC 0x01 /* Auto exposure enable */
591 #define OV7670_COM8_AWB 0x02 /* White balance enable */
592 #define OV7670_COM8_AGC 0x04 /* Auto gain enable */
593 #define OV7670_COM8_BFILT 0x20 /* Band filter enable */
594 #define OV7670_COM8_AECSTEP 0x40 /* Unlimited AEC step size */
595 #define OV7670_COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */
596 #define OV7670_REG_COM9 0x14 /* Control 9 - gain ceiling */
597 #define OV7670_REG_COM10 0x15 /* Control 10 */
598 #define OV7670_REG_HSTART 0x17 /* Horiz start high bits */
599 #define OV7670_REG_HSTOP 0x18 /* Horiz stop high bits */
600 #define OV7670_REG_VSTART 0x19 /* Vert start high bits */
601 #define OV7670_REG_VSTOP 0x1a /* Vert stop high bits */
602 #define OV7670_REG_MVFP 0x1e /* Mirror / vflip */
603 #define OV7670_MVFP_VFLIP 0x10 /* vertical flip */
604 #define OV7670_MVFP_MIRROR 0x20 /* Mirror image */
605 #define OV7670_REG_AEW 0x24 /* AGC upper limit */
606 #define OV7670_REG_AEB 0x25 /* AGC lower limit */
607 #define OV7670_REG_VPT 0x26 /* AGC/AEC fast mode op region */
608 #define OV7670_REG_HREF 0x32 /* HREF pieces */
609 #define OV7670_REG_TSLB 0x3a /* lots of stuff */
610 #define OV7670_REG_COM11 0x3b /* Control 11 */
611 #define OV7670_COM11_EXP 0x02
612 #define OV7670_COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */
613 #define OV7670_REG_COM12 0x3c /* Control 12 */
614 #define OV7670_REG_COM13 0x3d /* Control 13 */
615 #define OV7670_COM13_GAMMA 0x80 /* Gamma enable */
616 #define OV7670_COM13_UVSAT 0x40 /* UV saturation auto adjustment */
617 #define OV7670_REG_COM14 0x3e /* Control 14 */
618 #define OV7670_REG_EDGE 0x3f /* Edge enhancement factor */
619 #define OV7670_REG_COM15 0x40 /* Control 15 */
620 #define OV7670_COM15_R00FF 0xc0 /* 00 to FF */
621 #define OV7670_REG_COM16 0x41 /* Control 16 */
622 #define OV7670_COM16_AWBGAIN 0x08 /* AWB gain enable */
623 #define OV7670_REG_BRIGHT 0x55 /* Brightness */
624 #define OV7670_REG_CONTRAS 0x56 /* Contrast control */
625 #define OV7670_REG_GFIX 0x69 /* Fix gain control */
626 #define OV7670_REG_RGB444 0x8c /* RGB 444 control */
627 #define OV7670_REG_HAECC1 0x9f /* Hist AEC/AGC control 1 */
628 #define OV7670_REG_HAECC2 0xa0 /* Hist AEC/AGC control 2 */
629 #define OV7670_REG_BD50MAX 0xa5 /* 50hz banding step limit */
630 #define OV7670_REG_HAECC3 0xa6 /* Hist AEC/AGC control 3 */
631 #define OV7670_REG_HAECC4 0xa7 /* Hist AEC/AGC control 4 */
632 #define OV7670_REG_HAECC5 0xa8 /* Hist AEC/AGC control 5 */
633 #define OV7670_REG_HAECC6 0xa9 /* Hist AEC/AGC control 6 */
634 #define OV7670_REG_HAECC7 0xaa /* Hist AEC/AGC control 7 */
635 #define OV7670_REG_BD60MAX 0xab /* 60hz banding step limit */
636
637 struct ov_regvals {
638 __u8 reg;
639 __u8 val;
640 };
641 struct ov_i2c_regvals {
642 __u8 reg;
643 __u8 val;
644 };
645
646 /* Settings for OV2610 camera chip */
647 static const struct ov_i2c_regvals norm_2610[] =
648 {
649 { 0x12, 0x80 }, /* reset */
650 };
651
652 static const struct ov_i2c_regvals norm_3620b[] =
653 {
654 /*
655 * From the datasheet: "Note that after writing to register COMH
656 * (0x12) to change the sensor mode, registers related to the
657 * sensor’s cropping window will be reset back to their default
658 * values."
659 *
660 * "wait 4096 external clock ... to make sure the sensor is
661 * stable and ready to access registers" i.e. 160us at 24MHz
662 */
663
664 { 0x12, 0x80 }, /* COMH reset */
665 { 0x12, 0x00 }, /* QXGA, master */
666
667 /*
668 * 11 CLKRC "Clock Rate Control"
669 * [7] internal frequency doublers: on
670 * [6] video port mode: master
671 * [5:0] clock divider: 1
672 */
673 { 0x11, 0x80 },
674
675 /*
676 * 13 COMI "Common Control I"
677 * = 192 (0xC0) 11000000
678 * COMI[7] "AEC speed selection"
679 * = 1 (0x01) 1....... "Faster AEC correction"
680 * COMI[6] "AEC speed step selection"
681 * = 1 (0x01) .1...... "Big steps, fast"
682 * COMI[5] "Banding filter on off"
683 * = 0 (0x00) ..0..... "Off"
684 * COMI[4] "Banding filter option"
685 * = 0 (0x00) ...0.... "Main clock is 48 MHz and
686 * the PLL is ON"
687 * COMI[3] "Reserved"
688 * = 0 (0x00) ....0...
689 * COMI[2] "AGC auto manual control selection"
690 * = 0 (0x00) .....0.. "Manual"
691 * COMI[1] "AWB auto manual control selection"
692 * = 0 (0x00) ......0. "Manual"
693 * COMI[0] "Exposure control"
694 * = 0 (0x00) .......0 "Manual"
695 */
696 { 0x13, 0xC0 },
697
698 /*
699 * 09 COMC "Common Control C"
700 * = 8 (0x08) 00001000
701 * COMC[7:5] "Reserved"
702 * = 0 (0x00) 000.....
703 * COMC[4] "Sleep Mode Enable"
704 * = 0 (0x00) ...0.... "Normal mode"
705 * COMC[3:2] "Sensor sampling reset timing selection"
706 * = 2 (0x02) ....10.. "Longer reset time"
707 * COMC[1:0] "Output drive current select"
708 * = 0 (0x00) ......00 "Weakest"
709 */
710 { 0x09, 0x08 },
711
712 /*
713 * 0C COMD "Common Control D"
714 * = 8 (0x08) 00001000
715 * COMD[7] "Reserved"
716 * = 0 (0x00) 0.......
717 * COMD[6] "Swap MSB and LSB at the output port"
718 * = 0 (0x00) .0...... "False"
719 * COMD[5:3] "Reserved"
720 * = 1 (0x01) ..001...
721 * COMD[2] "Output Average On Off"
722 * = 0 (0x00) .....0.. "Output Normal"
723 * COMD[1] "Sensor precharge voltage selection"
724 * = 0 (0x00) ......0. "Selects internal
725 * reference precharge
726 * voltage"
727 * COMD[0] "Snapshot option"
728 * = 0 (0x00) .......0 "Enable live video output
729 * after snapshot sequence"
730 */
731 { 0x0c, 0x08 },
732
733 /*
734 * 0D COME "Common Control E"
735 * = 161 (0xA1) 10100001
736 * COME[7] "Output average option"
737 * = 1 (0x01) 1....... "Output average of 4 pixels"
738 * COME[6] "Anti-blooming control"
739 * = 0 (0x00) .0...... "Off"
740 * COME[5:3] "Reserved"
741 * = 4 (0x04) ..100...
742 * COME[2] "Clock output power down pin status"
743 * = 0 (0x00) .....0.. "Tri-state data output pin
744 * on power down"
745 * COME[1] "Data output pin status selection at power down"
746 * = 0 (0x00) ......0. "Tri-state VSYNC, PCLK,
747 * HREF, and CHSYNC pins on
748 * power down"
749 * COME[0] "Auto zero circuit select"
750 * = 1 (0x01) .......1 "On"
751 */
752 { 0x0d, 0xA1 },
753
754 /*
755 * 0E COMF "Common Control F"
756 * = 112 (0x70) 01110000
757 * COMF[7] "System clock selection"
758 * = 0 (0x00) 0....... "Use 24 MHz system clock"
759 * COMF[6:4] "Reserved"
760 * = 7 (0x07) .111....
761 * COMF[3] "Manual auto negative offset canceling selection"
762 * = 0 (0x00) ....0... "Auto detect negative
763 * offset and cancel it"
764 * COMF[2:0] "Reserved"
765 * = 0 (0x00) .....000
766 */
767 { 0x0e, 0x70 },
768
769 /*
770 * 0F COMG "Common Control G"
771 * = 66 (0x42) 01000010
772 * COMG[7] "Optical black output selection"
773 * = 0 (0x00) 0....... "Disable"
774 * COMG[6] "Black level calibrate selection"
775 * = 1 (0x01) .1...... "Use optical black pixels
776 * to calibrate"
777 * COMG[5:4] "Reserved"
778 * = 0 (0x00) ..00....
779 * COMG[3] "Channel offset adjustment"
780 * = 0 (0x00) ....0... "Disable offset adjustment"
781 * COMG[2] "ADC black level calibration option"
782 * = 0 (0x00) .....0.. "Use B/G line and G/R
783 * line to calibrate each
784 * channel's black level"
785 * COMG[1] "Reserved"
786 * = 1 (0x01) ......1.
787 * COMG[0] "ADC black level calibration enable"
788 * = 0 (0x00) .......0 "Disable"
789 */
790 { 0x0f, 0x42 },
791
792 /*
793 * 14 COMJ "Common Control J"
794 * = 198 (0xC6) 11000110
795 * COMJ[7:6] "AGC gain ceiling"
796 * = 3 (0x03) 11...... "8x"
797 * COMJ[5:4] "Reserved"
798 * = 0 (0x00) ..00....
799 * COMJ[3] "Auto banding filter"
800 * = 0 (0x00) ....0... "Banding filter is always
801 * on off depending on
802 * COMI[5] setting"
803 * COMJ[2] "VSYNC drop option"
804 * = 1 (0x01) .....1.. "SYNC is dropped if frame
805 * data is dropped"
806 * COMJ[1] "Frame data drop"
807 * = 1 (0x01) ......1. "Drop frame data if
808 * exposure is not within
809 * tolerance. In AEC mode,
810 * data is normally dropped
811 * when data is out of
812 * range."
813 * COMJ[0] "Reserved"
814 * = 0 (0x00) .......0
815 */
816 { 0x14, 0xC6 },
817
818 /*
819 * 15 COMK "Common Control K"
820 * = 2 (0x02) 00000010
821 * COMK[7] "CHSYNC pin output swap"
822 * = 0 (0x00) 0....... "CHSYNC"
823 * COMK[6] "HREF pin output swap"
824 * = 0 (0x00) .0...... "HREF"
825 * COMK[5] "PCLK output selection"
826 * = 0 (0x00) ..0..... "PCLK always output"
827 * COMK[4] "PCLK edge selection"
828 * = 0 (0x00) ...0.... "Data valid on falling edge"
829 * COMK[3] "HREF output polarity"
830 * = 0 (0x00) ....0... "positive"
831 * COMK[2] "Reserved"
832 * = 0 (0x00) .....0..
833 * COMK[1] "VSYNC polarity"
834 * = 1 (0x01) ......1. "negative"
835 * COMK[0] "HSYNC polarity"
836 * = 0 (0x00) .......0 "positive"
837 */
838 { 0x15, 0x02 },
839
840 /*
841 * 33 CHLF "Current Control"
842 * = 9 (0x09) 00001001
843 * CHLF[7:6] "Sensor current control"
844 * = 0 (0x00) 00......
845 * CHLF[5] "Sensor current range control"
846 * = 0 (0x00) ..0..... "normal range"
847 * CHLF[4] "Sensor current"
848 * = 0 (0x00) ...0.... "normal current"
849 * CHLF[3] "Sensor buffer current control"
850 * = 1 (0x01) ....1... "half current"
851 * CHLF[2] "Column buffer current control"
852 * = 0 (0x00) .....0.. "normal current"
853 * CHLF[1] "Analog DSP current control"
854 * = 0 (0x00) ......0. "normal current"
855 * CHLF[1] "ADC current control"
856 * = 0 (0x00) ......0. "normal current"
857 */
858 { 0x33, 0x09 },
859
860 /*
861 * 34 VBLM "Blooming Control"
862 * = 80 (0x50) 01010000
863 * VBLM[7] "Hard soft reset switch"
864 * = 0 (0x00) 0....... "Hard reset"
865 * VBLM[6:4] "Blooming voltage selection"
866 * = 5 (0x05) .101....
867 * VBLM[3:0] "Sensor current control"
868 * = 0 (0x00) ....0000
869 */
870 { 0x34, 0x50 },
871
872 /*
873 * 36 VCHG "Sensor Precharge Voltage Control"
874 * = 0 (0x00) 00000000
875 * VCHG[7] "Reserved"
876 * = 0 (0x00) 0.......
877 * VCHG[6:4] "Sensor precharge voltage control"
878 * = 0 (0x00) .000....
879 * VCHG[3:0] "Sensor array common reference"
880 * = 0 (0x00) ....0000
881 */
882 { 0x36, 0x00 },
883
884 /*
885 * 37 ADC "ADC Reference Control"
886 * = 4 (0x04) 00000100
887 * ADC[7:4] "Reserved"
888 * = 0 (0x00) 0000....
889 * ADC[3] "ADC input signal range"
890 * = 0 (0x00) ....0... "Input signal 1.0x"
891 * ADC[2:0] "ADC range control"
892 * = 4 (0x04) .....100
893 */
894 { 0x37, 0x04 },
895
896 /*
897 * 38 ACOM "Analog Common Ground"
898 * = 82 (0x52) 01010010
899 * ACOM[7] "Analog gain control"
900 * = 0 (0x00) 0....... "Gain 1x"
901 * ACOM[6] "Analog black level calibration"
902 * = 1 (0x01) .1...... "On"
903 * ACOM[5:0] "Reserved"
904 * = 18 (0x12) ..010010
905 */
906 { 0x38, 0x52 },
907
908 /*
909 * 3A FREFA "Internal Reference Adjustment"
910 * = 0 (0x00) 00000000
911 * FREFA[7:0] "Range"
912 * = 0 (0x00) 00000000
913 */
914 { 0x3a, 0x00 },
915
916 /*
917 * 3C FVOPT "Internal Reference Adjustment"
918 * = 31 (0x1F) 00011111
919 * FVOPT[7:0] "Range"
920 * = 31 (0x1F) 00011111
921 */
922 { 0x3c, 0x1F },
923
924 /*
925 * 44 Undocumented = 0 (0x00) 00000000
926 * 44[7:0] "It's a secret"
927 * = 0 (0x00) 00000000
928 */
929 { 0x44, 0x00 },
930
931 /*
932 * 40 Undocumented = 0 (0x00) 00000000
933 * 40[7:0] "It's a secret"
934 * = 0 (0x00) 00000000
935 */
936 { 0x40, 0x00 },
937
938 /*
939 * 41 Undocumented = 0 (0x00) 00000000
940 * 41[7:0] "It's a secret"
941 * = 0 (0x00) 00000000
942 */
943 { 0x41, 0x00 },
944
945 /*
946 * 42 Undocumented = 0 (0x00) 00000000
947 * 42[7:0] "It's a secret"
948 * = 0 (0x00) 00000000
949 */
950 { 0x42, 0x00 },
951
952 /*
953 * 43 Undocumented = 0 (0x00) 00000000
954 * 43[7:0] "It's a secret"
955 * = 0 (0x00) 00000000
956 */
957 { 0x43, 0x00 },
958
959 /*
960 * 45 Undocumented = 128 (0x80) 10000000
961 * 45[7:0] "It's a secret"
962 * = 128 (0x80) 10000000
963 */
964 { 0x45, 0x80 },
965
966 /*
967 * 48 Undocumented = 192 (0xC0) 11000000
968 * 48[7:0] "It's a secret"
969 * = 192 (0xC0) 11000000
970 */
971 { 0x48, 0xC0 },
972
973 /*
974 * 49 Undocumented = 25 (0x19) 00011001
975 * 49[7:0] "It's a secret"
976 * = 25 (0x19) 00011001
977 */
978 { 0x49, 0x19 },
979
980 /*
981 * 4B Undocumented = 128 (0x80) 10000000
982 * 4B[7:0] "It's a secret"
983 * = 128 (0x80) 10000000
984 */
985 { 0x4B, 0x80 },
986
987 /*
988 * 4D Undocumented = 196 (0xC4) 11000100
989 * 4D[7:0] "It's a secret"
990 * = 196 (0xC4) 11000100
991 */
992 { 0x4D, 0xC4 },
993
994 /*
995 * 35 VREF "Reference Voltage Control"
996 * = 76 (0x4C) 01001100
997 * VREF[7:5] "Column high reference control"
998 * = 2 (0x02) 010..... "higher voltage"
999 * VREF[4:2] "Column low reference control"
1000 * = 3 (0x03) ...011.. "Highest voltage"
1001 * VREF[1:0] "Reserved"
1002 * = 0 (0x00) ......00
1003 */
1004 { 0x35, 0x4C },
1005
1006 /*
1007 * 3D Undocumented = 0 (0x00) 00000000
1008 * 3D[7:0] "It's a secret"
1009 * = 0 (0x00) 00000000
1010 */
1011 { 0x3D, 0x00 },
1012
1013 /*
1014 * 3E Undocumented = 0 (0x00) 00000000
1015 * 3E[7:0] "It's a secret"
1016 * = 0 (0x00) 00000000
1017 */
1018 { 0x3E, 0x00 },
1019
1020 /*
1021 * 3B FREFB "Internal Reference Adjustment"
1022 * = 24 (0x18) 00011000
1023 * FREFB[7:0] "Range"
1024 * = 24 (0x18) 00011000
1025 */
1026 { 0x3b, 0x18 },
1027
1028 /*
1029 * 33 CHLF "Current Control"
1030 * = 25 (0x19) 00011001
1031 * CHLF[7:6] "Sensor current control"
1032 * = 0 (0x00) 00......
1033 * CHLF[5] "Sensor current range control"
1034 * = 0 (0x00) ..0..... "normal range"
1035 * CHLF[4] "Sensor current"
1036 * = 1 (0x01) ...1.... "double current"
1037 * CHLF[3] "Sensor buffer current control"
1038 * = 1 (0x01) ....1... "half current"
1039 * CHLF[2] "Column buffer current control"
1040 * = 0 (0x00) .....0.. "normal current"
1041 * CHLF[1] "Analog DSP current control"
1042 * = 0 (0x00) ......0. "normal current"
1043 * CHLF[1] "ADC current control"
1044 * = 0 (0x00) ......0. "normal current"
1045 */
1046 { 0x33, 0x19 },
1047
1048 /*
1049 * 34 VBLM "Blooming Control"
1050 * = 90 (0x5A) 01011010
1051 * VBLM[7] "Hard soft reset switch"
1052 * = 0 (0x00) 0....... "Hard reset"
1053 * VBLM[6:4] "Blooming voltage selection"
1054 * = 5 (0x05) .101....
1055 * VBLM[3:0] "Sensor current control"
1056 * = 10 (0x0A) ....1010
1057 */
1058 { 0x34, 0x5A },
1059
1060 /*
1061 * 3B FREFB "Internal Reference Adjustment"
1062 * = 0 (0x00) 00000000
1063 * FREFB[7:0] "Range"
1064 * = 0 (0x00) 00000000
1065 */
1066 { 0x3b, 0x00 },
1067
1068 /*
1069 * 33 CHLF "Current Control"
1070 * = 9 (0x09) 00001001
1071 * CHLF[7:6] "Sensor current control"
1072 * = 0 (0x00) 00......
1073 * CHLF[5] "Sensor current range control"
1074 * = 0 (0x00) ..0..... "normal range"
1075 * CHLF[4] "Sensor current"
1076 * = 0 (0x00) ...0.... "normal current"
1077 * CHLF[3] "Sensor buffer current control"
1078 * = 1 (0x01) ....1... "half current"
1079 * CHLF[2] "Column buffer current control"
1080 * = 0 (0x00) .....0.. "normal current"
1081 * CHLF[1] "Analog DSP current control"
1082 * = 0 (0x00) ......0. "normal current"
1083 * CHLF[1] "ADC current control"
1084 * = 0 (0x00) ......0. "normal current"
1085 */
1086 { 0x33, 0x09 },
1087
1088 /*
1089 * 34 VBLM "Blooming Control"
1090 * = 80 (0x50) 01010000
1091 * VBLM[7] "Hard soft reset switch"
1092 * = 0 (0x00) 0....... "Hard reset"
1093 * VBLM[6:4] "Blooming voltage selection"
1094 * = 5 (0x05) .101....
1095 * VBLM[3:0] "Sensor current control"
1096 * = 0 (0x00) ....0000
1097 */
1098 { 0x34, 0x50 },
1099
1100 /*
1101 * 12 COMH "Common Control H"
1102 * = 64 (0x40) 01000000
1103 * COMH[7] "SRST"
1104 * = 0 (0x00) 0....... "No-op"
1105 * COMH[6:4] "Resolution selection"
1106 * = 4 (0x04) .100.... "XGA"
1107 * COMH[3] "Master slave selection"
1108 * = 0 (0x00) ....0... "Master mode"
1109 * COMH[2] "Internal B/R channel option"
1110 * = 0 (0x00) .....0.. "B/R use same channel"
1111 * COMH[1] "Color bar test pattern"
1112 * = 0 (0x00) ......0. "Off"
1113 * COMH[0] "Reserved"
1114 * = 0 (0x00) .......0
1115 */
1116 { 0x12, 0x40 },
1117
1118 /*
1119 * 17 HREFST "Horizontal window start"
1120 * = 31 (0x1F) 00011111
1121 * HREFST[7:0] "Horizontal window start, 8 MSBs"
1122 * = 31 (0x1F) 00011111
1123 */
1124 { 0x17, 0x1F },
1125
1126 /*
1127 * 18 HREFEND "Horizontal window end"
1128 * = 95 (0x5F) 01011111
1129 * HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1130 * = 95 (0x5F) 01011111
1131 */
1132 { 0x18, 0x5F },
1133
1134 /*
1135 * 19 VSTRT "Vertical window start"
1136 * = 0 (0x00) 00000000
1137 * VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1138 * = 0 (0x00) 00000000
1139 */
1140 { 0x19, 0x00 },
1141
1142 /*
1143 * 1A VEND "Vertical window end"
1144 * = 96 (0x60) 01100000
1145 * VEND[7:0] "Vertical Window End, 8 MSBs"
1146 * = 96 (0x60) 01100000
1147 */
1148 { 0x1a, 0x60 },
1149
1150 /*
1151 * 32 COMM "Common Control M"
1152 * = 18 (0x12) 00010010
1153 * COMM[7:6] "Pixel clock divide option"
1154 * = 0 (0x00) 00...... "/1"
1155 * COMM[5:3] "Horizontal window end position, 3 LSBs"
1156 * = 2 (0x02) ..010...
1157 * COMM[2:0] "Horizontal window start position, 3 LSBs"
1158 * = 2 (0x02) .....010
1159 */
1160 { 0x32, 0x12 },
1161
1162 /*
1163 * 03 COMA "Common Control A"
1164 * = 74 (0x4A) 01001010
1165 * COMA[7:4] "AWB Update Threshold"
1166 * = 4 (0x04) 0100....
1167 * COMA[3:2] "Vertical window end line control 2 LSBs"
1168 * = 2 (0x02) ....10..
1169 * COMA[1:0] "Vertical window start line control 2 LSBs"
1170 * = 2 (0x02) ......10
1171 */
1172 { 0x03, 0x4A },
1173
1174 /*
1175 * 11 CLKRC "Clock Rate Control"
1176 * = 128 (0x80) 10000000
1177 * CLKRC[7] "Internal frequency doublers on off seclection"
1178 * = 1 (0x01) 1....... "On"
1179 * CLKRC[6] "Digital video master slave selection"
1180 * = 0 (0x00) .0...... "Master mode, sensor
1181 * provides PCLK"
1182 * CLKRC[5:0] "Clock divider { CLK = PCLK/(1+CLKRC[5:0]) }"
1183 * = 0 (0x00) ..000000
1184 */
1185 { 0x11, 0x80 },
1186
1187 /*
1188 * 12 COMH "Common Control H"
1189 * = 0 (0x00) 00000000
1190 * COMH[7] "SRST"
1191 * = 0 (0x00) 0....... "No-op"
1192 * COMH[6:4] "Resolution selection"
1193 * = 0 (0x00) .000.... "QXGA"
1194 * COMH[3] "Master slave selection"
1195 * = 0 (0x00) ....0... "Master mode"
1196 * COMH[2] "Internal B/R channel option"
1197 * = 0 (0x00) .....0.. "B/R use same channel"
1198 * COMH[1] "Color bar test pattern"
1199 * = 0 (0x00) ......0. "Off"
1200 * COMH[0] "Reserved"
1201 * = 0 (0x00) .......0
1202 */
1203 { 0x12, 0x00 },
1204
1205 /*
1206 * 12 COMH "Common Control H"
1207 * = 64 (0x40) 01000000
1208 * COMH[7] "SRST"
1209 * = 0 (0x00) 0....... "No-op"
1210 * COMH[6:4] "Resolution selection"
1211 * = 4 (0x04) .100.... "XGA"
1212 * COMH[3] "Master slave selection"
1213 * = 0 (0x00) ....0... "Master mode"
1214 * COMH[2] "Internal B/R channel option"
1215 * = 0 (0x00) .....0.. "B/R use same channel"
1216 * COMH[1] "Color bar test pattern"
1217 * = 0 (0x00) ......0. "Off"
1218 * COMH[0] "Reserved"
1219 * = 0 (0x00) .......0
1220 */
1221 { 0x12, 0x40 },
1222
1223 /*
1224 * 17 HREFST "Horizontal window start"
1225 * = 31 (0x1F) 00011111
1226 * HREFST[7:0] "Horizontal window start, 8 MSBs"
1227 * = 31 (0x1F) 00011111
1228 */
1229 { 0x17, 0x1F },
1230
1231 /*
1232 * 18 HREFEND "Horizontal window end"
1233 * = 95 (0x5F) 01011111
1234 * HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1235 * = 95 (0x5F) 01011111
1236 */
1237 { 0x18, 0x5F },
1238
1239 /*
1240 * 19 VSTRT "Vertical window start"
1241 * = 0 (0x00) 00000000
1242 * VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1243 * = 0 (0x00) 00000000
1244 */
1245 { 0x19, 0x00 },
1246
1247 /*
1248 * 1A VEND "Vertical window end"
1249 * = 96 (0x60) 01100000
1250 * VEND[7:0] "Vertical Window End, 8 MSBs"
1251 * = 96 (0x60) 01100000
1252 */
1253 { 0x1a, 0x60 },
1254
1255 /*
1256 * 32 COMM "Common Control M"
1257 * = 18 (0x12) 00010010
1258 * COMM[7:6] "Pixel clock divide option"
1259 * = 0 (0x00) 00...... "/1"
1260 * COMM[5:3] "Horizontal window end position, 3 LSBs"
1261 * = 2 (0x02) ..010...
1262 * COMM[2:0] "Horizontal window start position, 3 LSBs"
1263 * = 2 (0x02) .....010
1264 */
1265 { 0x32, 0x12 },
1266
1267 /*
1268 * 03 COMA "Common Control A"
1269 * = 74 (0x4A) 01001010
1270 * COMA[7:4] "AWB Update Threshold"
1271 * = 4 (0x04) 0100....
1272 * COMA[3:2] "Vertical window end line control 2 LSBs"
1273 * = 2 (0x02) ....10..
1274 * COMA[1:0] "Vertical window start line control 2 LSBs"
1275 * = 2 (0x02) ......10
1276 */
1277 { 0x03, 0x4A },
1278
1279 /*
1280 * 02 RED "Red Gain Control"
1281 * = 175 (0xAF) 10101111
1282 * RED[7] "Action"
1283 * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1284 * RED[6:0] "Value"
1285 * = 47 (0x2F) .0101111
1286 */
1287 { 0x02, 0xAF },
1288
1289 /*
1290 * 2D ADDVSL "VSYNC Pulse Width"
1291 * = 210 (0xD2) 11010010
1292 * ADDVSL[7:0] "VSYNC pulse width, LSB"
1293 * = 210 (0xD2) 11010010
1294 */
1295 { 0x2d, 0xD2 },
1296
1297 /*
1298 * 00 GAIN = 24 (0x18) 00011000
1299 * GAIN[7:6] "Reserved"
1300 * = 0 (0x00) 00......
1301 * GAIN[5] "Double"
1302 * = 0 (0x00) ..0..... "False"
1303 * GAIN[4] "Double"
1304 * = 1 (0x01) ...1.... "True"
1305 * GAIN[3:0] "Range"
1306 * = 8 (0x08) ....1000
1307 */
1308 { 0x00, 0x18 },
1309
1310 /*
1311 * 01 BLUE "Blue Gain Control"
1312 * = 240 (0xF0) 11110000
1313 * BLUE[7] "Action"
1314 * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1315 * BLUE[6:0] "Value"
1316 * = 112 (0x70) .1110000
1317 */
1318 { 0x01, 0xF0 },
1319
1320 /*
1321 * 10 AEC "Automatic Exposure Control"
1322 * = 10 (0x0A) 00001010
1323 * AEC[7:0] "Automatic Exposure Control, 8 MSBs"
1324 * = 10 (0x0A) 00001010
1325 */
1326 { 0x10, 0x0A },
1327
1328 { 0xE1, 0x67 },
1329 { 0xE3, 0x03 },
1330 { 0xE4, 0x26 },
1331 { 0xE5, 0x3E },
1332 { 0xF8, 0x01 },
1333 { 0xFF, 0x01 },
1334 };
1335
1336 static const struct ov_i2c_regvals norm_6x20[] = {
1337 { 0x12, 0x80 }, /* reset */
1338 { 0x11, 0x01 },
1339 { 0x03, 0x60 },
1340 { 0x05, 0x7f }, /* For when autoadjust is off */
1341 { 0x07, 0xa8 },
1342 /* The ratio of 0x0c and 0x0d controls the white point */
1343 { 0x0c, 0x24 },
1344 { 0x0d, 0x24 },
1345 { 0x0f, 0x15 }, /* COMS */
1346 { 0x10, 0x75 }, /* AEC Exposure time */
1347 { 0x12, 0x24 }, /* Enable AGC */
1348 { 0x14, 0x04 },
1349 /* 0x16: 0x06 helps frame stability with moving objects */
1350 { 0x16, 0x06 },
1351 /* { 0x20, 0x30 }, * Aperture correction enable */
1352 { 0x26, 0xb2 }, /* BLC enable */
1353 /* 0x28: 0x05 Selects RGB format if RGB on */
1354 { 0x28, 0x05 },
1355 { 0x2a, 0x04 }, /* Disable framerate adjust */
1356 /* { 0x2b, 0xac }, * Framerate; Set 2a[7] first */
1357 { 0x2d, 0x85 },
1358 { 0x33, 0xa0 }, /* Color Processing Parameter */
1359 { 0x34, 0xd2 }, /* Max A/D range */
1360 { 0x38, 0x8b },
1361 { 0x39, 0x40 },
1362
1363 { 0x3c, 0x39 }, /* Enable AEC mode changing */
1364 { 0x3c, 0x3c }, /* Change AEC mode */
1365 { 0x3c, 0x24 }, /* Disable AEC mode changing */
1366
1367 { 0x3d, 0x80 },
1368 /* These next two registers (0x4a, 0x4b) are undocumented.
1369 * They control the color balance */
1370 { 0x4a, 0x80 },
1371 { 0x4b, 0x80 },
1372 { 0x4d, 0xd2 }, /* This reduces noise a bit */
1373 { 0x4e, 0xc1 },
1374 { 0x4f, 0x04 },
1375 /* Do 50-53 have any effect? */
1376 /* Toggle 0x12[2] off and on here? */
1377 };
1378
1379 static const struct ov_i2c_regvals norm_6x30[] = {
1380 { 0x12, 0x80 }, /* Reset */
1381 { 0x00, 0x1f }, /* Gain */
1382 { 0x01, 0x99 }, /* Blue gain */
1383 { 0x02, 0x7c }, /* Red gain */
1384 { 0x03, 0xc0 }, /* Saturation */
1385 { 0x05, 0x0a }, /* Contrast */
1386 { 0x06, 0x95 }, /* Brightness */
1387 { 0x07, 0x2d }, /* Sharpness */
1388 { 0x0c, 0x20 },
1389 { 0x0d, 0x20 },
1390 { 0x0e, 0xa0 }, /* Was 0x20, bit7 enables a 2x gain which we need */
1391 { 0x0f, 0x05 },
1392 { 0x10, 0x9a },
1393 { 0x11, 0x00 }, /* Pixel clock = fastest */
1394 { 0x12, 0x24 }, /* Enable AGC and AWB */
1395 { 0x13, 0x21 },
1396 { 0x14, 0x80 },
1397 { 0x15, 0x01 },
1398 { 0x16, 0x03 },
1399 { 0x17, 0x38 },
1400 { 0x18, 0xea },
1401 { 0x19, 0x04 },
1402 { 0x1a, 0x93 },
1403 { 0x1b, 0x00 },
1404 { 0x1e, 0xc4 },
1405 { 0x1f, 0x04 },
1406 { 0x20, 0x20 },
1407 { 0x21, 0x10 },
1408 { 0x22, 0x88 },
1409 { 0x23, 0xc0 }, /* Crystal circuit power level */
1410 { 0x25, 0x9a }, /* Increase AEC black ratio */
1411 { 0x26, 0xb2 }, /* BLC enable */
1412 { 0x27, 0xa2 },
1413 { 0x28, 0x00 },
1414 { 0x29, 0x00 },
1415 { 0x2a, 0x84 }, /* 60 Hz power */
1416 { 0x2b, 0xa8 }, /* 60 Hz power */
1417 { 0x2c, 0xa0 },
1418 { 0x2d, 0x95 }, /* Enable auto-brightness */
1419 { 0x2e, 0x88 },
1420 { 0x33, 0x26 },
1421 { 0x34, 0x03 },
1422 { 0x36, 0x8f },
1423 { 0x37, 0x80 },
1424 { 0x38, 0x83 },
1425 { 0x39, 0x80 },
1426 { 0x3a, 0x0f },
1427 { 0x3b, 0x3c },
1428 { 0x3c, 0x1a },
1429 { 0x3d, 0x80 },
1430 { 0x3e, 0x80 },
1431 { 0x3f, 0x0e },
1432 { 0x40, 0x00 }, /* White bal */
1433 { 0x41, 0x00 }, /* White bal */
1434 { 0x42, 0x80 },
1435 { 0x43, 0x3f }, /* White bal */
1436 { 0x44, 0x80 },
1437 { 0x45, 0x20 },
1438 { 0x46, 0x20 },
1439 { 0x47, 0x80 },
1440 { 0x48, 0x7f },
1441 { 0x49, 0x00 },
1442 { 0x4a, 0x00 },
1443 { 0x4b, 0x80 },
1444 { 0x4c, 0xd0 },
1445 { 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */
1446 { 0x4e, 0x40 },
1447 { 0x4f, 0x07 }, /* UV avg., col. killer: max */
1448 { 0x50, 0xff },
1449 { 0x54, 0x23 }, /* Max AGC gain: 18dB */
1450 { 0x55, 0xff },
1451 { 0x56, 0x12 },
1452 { 0x57, 0x81 },
1453 { 0x58, 0x75 },
1454 { 0x59, 0x01 }, /* AGC dark current comp.: +1 */
1455 { 0x5a, 0x2c },
1456 { 0x5b, 0x0f }, /* AWB chrominance levels */
1457 { 0x5c, 0x10 },
1458 { 0x3d, 0x80 },
1459 { 0x27, 0xa6 },
1460 { 0x12, 0x20 }, /* Toggle AWB */
1461 { 0x12, 0x24 },
1462 };
1463
1464 /* Lawrence Glaister <lg@jfm.bc.ca> reports:
1465 *
1466 * Register 0x0f in the 7610 has the following effects:
1467 *
1468 * 0x85 (AEC method 1): Best overall, good contrast range
1469 * 0x45 (AEC method 2): Very overexposed
1470 * 0xa5 (spec sheet default): Ok, but the black level is
1471 * shifted resulting in loss of contrast
1472 * 0x05 (old driver setting): very overexposed, too much
1473 * contrast
1474 */
1475 static const struct ov_i2c_regvals norm_7610[] = {
1476 { 0x10, 0xff },
1477 { 0x16, 0x06 },
1478 { 0x28, 0x24 },
1479 { 0x2b, 0xac },
1480 { 0x12, 0x00 },
1481 { 0x38, 0x81 },
1482 { 0x28, 0x24 }, /* 0c */
1483 { 0x0f, 0x85 }, /* lg's setting */
1484 { 0x15, 0x01 },
1485 { 0x20, 0x1c },
1486 { 0x23, 0x2a },
1487 { 0x24, 0x10 },
1488 { 0x25, 0x8a },
1489 { 0x26, 0xa2 },
1490 { 0x27, 0xc2 },
1491 { 0x2a, 0x04 },
1492 { 0x2c, 0xfe },
1493 { 0x2d, 0x93 },
1494 { 0x30, 0x71 },
1495 { 0x31, 0x60 },
1496 { 0x32, 0x26 },
1497 { 0x33, 0x20 },
1498 { 0x34, 0x48 },
1499 { 0x12, 0x24 },
1500 { 0x11, 0x01 },
1501 { 0x0c, 0x24 },
1502 { 0x0d, 0x24 },
1503 };
1504
1505 static const struct ov_i2c_regvals norm_7620[] = {
1506 { 0x12, 0x80 }, /* reset */
1507 { 0x00, 0x00 }, /* gain */
1508 { 0x01, 0x80 }, /* blue gain */
1509 { 0x02, 0x80 }, /* red gain */
1510 { 0x03, 0xc0 }, /* OV7670_REG_VREF */
1511 { 0x06, 0x60 },
1512 { 0x07, 0x00 },
1513 { 0x0c, 0x24 },
1514 { 0x0c, 0x24 },
1515 { 0x0d, 0x24 },
1516 { 0x11, 0x01 },
1517 { 0x12, 0x24 },
1518 { 0x13, 0x01 },
1519 { 0x14, 0x84 },
1520 { 0x15, 0x01 },
1521 { 0x16, 0x03 },
1522 { 0x17, 0x2f },
1523 { 0x18, 0xcf },
1524 { 0x19, 0x06 },
1525 { 0x1a, 0xf5 },
1526 { 0x1b, 0x00 },
1527 { 0x20, 0x18 },
1528 { 0x21, 0x80 },
1529 { 0x22, 0x80 },
1530 { 0x23, 0x00 },
1531 { 0x26, 0xa2 },
1532 { 0x27, 0xea },
1533 { 0x28, 0x22 }, /* Was 0x20, bit1 enables a 2x gain which we need */
1534 { 0x29, 0x00 },
1535 { 0x2a, 0x10 },
1536 { 0x2b, 0x00 },
1537 { 0x2c, 0x88 },
1538 { 0x2d, 0x91 },
1539 { 0x2e, 0x80 },
1540 { 0x2f, 0x44 },
1541 { 0x60, 0x27 },
1542 { 0x61, 0x02 },
1543 { 0x62, 0x5f },
1544 { 0x63, 0xd5 },
1545 { 0x64, 0x57 },
1546 { 0x65, 0x83 },
1547 { 0x66, 0x55 },
1548 { 0x67, 0x92 },
1549 { 0x68, 0xcf },
1550 { 0x69, 0x76 },
1551 { 0x6a, 0x22 },
1552 { 0x6b, 0x00 },
1553 { 0x6c, 0x02 },
1554 { 0x6d, 0x44 },
1555 { 0x6e, 0x80 },
1556 { 0x6f, 0x1d },
1557 { 0x70, 0x8b },
1558 { 0x71, 0x00 },
1559 { 0x72, 0x14 },
1560 { 0x73, 0x54 },
1561 { 0x74, 0x00 },
1562 { 0x75, 0x8e },
1563 { 0x76, 0x00 },
1564 { 0x77, 0xff },
1565 { 0x78, 0x80 },
1566 { 0x79, 0x80 },
1567 { 0x7a, 0x80 },
1568 { 0x7b, 0xe2 },
1569 { 0x7c, 0x00 },
1570 };
1571
1572 /* 7640 and 7648. The defaults should be OK for most registers. */
1573 static const struct ov_i2c_regvals norm_7640[] = {
1574 { 0x12, 0x80 },
1575 { 0x12, 0x14 },
1576 };
1577
1578 /* 7670. Defaults taken from OmniVision provided data,
1579 * as provided by Jonathan Corbet of OLPC */
1580 static const struct ov_i2c_regvals norm_7670[] = {
1581 { OV7670_REG_COM7, OV7670_COM7_RESET },
1582 { OV7670_REG_TSLB, 0x04 }, /* OV */
1583 { OV7670_REG_COM7, OV7670_COM7_FMT_VGA }, /* VGA */
1584 { OV7670_REG_CLKRC, 0x01 },
1585 /*
1586 * Set the hardware window. These values from OV don't entirely
1587 * make sense - hstop is less than hstart. But they work...
1588 */
1589 { OV7670_REG_HSTART, 0x13 },
1590 { OV7670_REG_HSTOP, 0x01 },
1591 { OV7670_REG_HREF, 0xb6 },
1592 { OV7670_REG_VSTART, 0x02 },
1593 { OV7670_REG_VSTOP, 0x7a },
1594 { OV7670_REG_VREF, 0x0a },
1595
1596 { OV7670_REG_COM3, 0x00 },
1597 { OV7670_REG_COM14, 0x00 },
1598 /* Mystery scaling numbers */
1599 { 0x70, 0x3a },
1600 { 0x71, 0x35 },
1601 { 0x72, 0x11 },
1602 { 0x73, 0xf0 },
1603 { 0xa2, 0x02 },
1604 /* { OV7670_REG_COM10, 0x0 }, */
1605
1606 /* Gamma curve values */
1607 { 0x7a, 0x20 },
1608 { 0x7b, 0x10 },
1609 { 0x7c, 0x1e },
1610 { 0x7d, 0x35 },
1611 { 0x7e, 0x5a },
1612 { 0x7f, 0x69 },
1613 { 0x80, 0x76 },
1614 { 0x81, 0x80 },
1615 { 0x82, 0x88 },
1616 { 0x83, 0x8f },
1617 { 0x84, 0x96 },
1618 { 0x85, 0xa3 },
1619 { 0x86, 0xaf },
1620 { 0x87, 0xc4 },
1621 { 0x88, 0xd7 },
1622 { 0x89, 0xe8 },
1623
1624 /* AGC and AEC parameters. Note we start by disabling those features,
1625 then turn them only after tweaking the values. */
1626 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
1627 | OV7670_COM8_AECSTEP
1628 | OV7670_COM8_BFILT },
1629 { OV7670_REG_GAIN, 0x00 },
1630 { OV7670_REG_AECH, 0x00 },
1631 { OV7670_REG_COM4, 0x40 }, /* magic reserved bit */
1632 { OV7670_REG_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
1633 { OV7670_REG_BD50MAX, 0x05 },
1634 { OV7670_REG_BD60MAX, 0x07 },
1635 { OV7670_REG_AEW, 0x95 },
1636 { OV7670_REG_AEB, 0x33 },
1637 { OV7670_REG_VPT, 0xe3 },
1638 { OV7670_REG_HAECC1, 0x78 },
1639 { OV7670_REG_HAECC2, 0x68 },
1640 { 0xa1, 0x03 }, /* magic */
1641 { OV7670_REG_HAECC3, 0xd8 },
1642 { OV7670_REG_HAECC4, 0xd8 },
1643 { OV7670_REG_HAECC5, 0xf0 },
1644 { OV7670_REG_HAECC6, 0x90 },
1645 { OV7670_REG_HAECC7, 0x94 },
1646 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
1647 | OV7670_COM8_AECSTEP
1648 | OV7670_COM8_BFILT
1649 | OV7670_COM8_AGC
1650 | OV7670_COM8_AEC },
1651
1652 /* Almost all of these are magic "reserved" values. */
1653 { OV7670_REG_COM5, 0x61 },
1654 { OV7670_REG_COM6, 0x4b },
1655 { 0x16, 0x02 },
1656 { OV7670_REG_MVFP, 0x07 },
1657 { 0x21, 0x02 },
1658 { 0x22, 0x91 },
1659 { 0x29, 0x07 },
1660 { 0x33, 0x0b },
1661 { 0x35, 0x0b },
1662 { 0x37, 0x1d },
1663 { 0x38, 0x71 },
1664 { 0x39, 0x2a },
1665 { OV7670_REG_COM12, 0x78 },
1666 { 0x4d, 0x40 },
1667 { 0x4e, 0x20 },
1668 { OV7670_REG_GFIX, 0x00 },
1669 { 0x6b, 0x4a },
1670 { 0x74, 0x10 },
1671 { 0x8d, 0x4f },
1672 { 0x8e, 0x00 },
1673 { 0x8f, 0x00 },
1674 { 0x90, 0x00 },
1675 { 0x91, 0x00 },
1676 { 0x96, 0x00 },
1677 { 0x9a, 0x00 },
1678 { 0xb0, 0x84 },
1679 { 0xb1, 0x0c },
1680 { 0xb2, 0x0e },
1681 { 0xb3, 0x82 },
1682 { 0xb8, 0x0a },
1683
1684 /* More reserved magic, some of which tweaks white balance */
1685 { 0x43, 0x0a },
1686 { 0x44, 0xf0 },
1687 { 0x45, 0x34 },
1688 { 0x46, 0x58 },
1689 { 0x47, 0x28 },
1690 { 0x48, 0x3a },
1691 { 0x59, 0x88 },
1692 { 0x5a, 0x88 },
1693 { 0x5b, 0x44 },
1694 { 0x5c, 0x67 },
1695 { 0x5d, 0x49 },
1696 { 0x5e, 0x0e },
1697 { 0x6c, 0x0a },
1698 { 0x6d, 0x55 },
1699 { 0x6e, 0x11 },
1700 { 0x6f, 0x9f },
1701 /* "9e for advance AWB" */
1702 { 0x6a, 0x40 },
1703 { OV7670_REG_BLUE, 0x40 },
1704 { OV7670_REG_RED, 0x60 },
1705 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
1706 | OV7670_COM8_AECSTEP
1707 | OV7670_COM8_BFILT
1708 | OV7670_COM8_AGC
1709 | OV7670_COM8_AEC
1710 | OV7670_COM8_AWB },
1711
1712 /* Matrix coefficients */
1713 { 0x4f, 0x80 },
1714 { 0x50, 0x80 },
1715 { 0x51, 0x00 },
1716 { 0x52, 0x22 },
1717 { 0x53, 0x5e },
1718 { 0x54, 0x80 },
1719 { 0x58, 0x9e },
1720
1721 { OV7670_REG_COM16, OV7670_COM16_AWBGAIN },
1722 { OV7670_REG_EDGE, 0x00 },
1723 { 0x75, 0x05 },
1724 { 0x76, 0xe1 },
1725 { 0x4c, 0x00 },
1726 { 0x77, 0x01 },
1727 { OV7670_REG_COM13, OV7670_COM13_GAMMA
1728 | OV7670_COM13_UVSAT
1729 | 2}, /* was 3 */
1730 { 0x4b, 0x09 },
1731 { 0xc9, 0x60 },
1732 { OV7670_REG_COM16, 0x38 },
1733 { 0x56, 0x40 },
1734
1735 { 0x34, 0x11 },
1736 { OV7670_REG_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO },
1737 { 0xa4, 0x88 },
1738 { 0x96, 0x00 },
1739 { 0x97, 0x30 },
1740 { 0x98, 0x20 },
1741 { 0x99, 0x30 },
1742 { 0x9a, 0x84 },
1743 { 0x9b, 0x29 },
1744 { 0x9c, 0x03 },
1745 { 0x9d, 0x4c },
1746 { 0x9e, 0x3f },
1747 { 0x78, 0x04 },
1748
1749 /* Extra-weird stuff. Some sort of multiplexor register */
1750 { 0x79, 0x01 },
1751 { 0xc8, 0xf0 },
1752 { 0x79, 0x0f },
1753 { 0xc8, 0x00 },
1754 { 0x79, 0x10 },
1755 { 0xc8, 0x7e },
1756 { 0x79, 0x0a },
1757 { 0xc8, 0x80 },
1758 { 0x79, 0x0b },
1759 { 0xc8, 0x01 },
1760 { 0x79, 0x0c },
1761 { 0xc8, 0x0f },
1762 { 0x79, 0x0d },
1763 { 0xc8, 0x20 },
1764 { 0x79, 0x09 },
1765 { 0xc8, 0x80 },
1766 { 0x79, 0x02 },
1767 { 0xc8, 0xc0 },
1768 { 0x79, 0x03 },
1769 { 0xc8, 0x40 },
1770 { 0x79, 0x05 },
1771 { 0xc8, 0x30 },
1772 { 0x79, 0x26 },
1773 };
1774
1775 static const struct ov_i2c_regvals norm_8610[] = {
1776 { 0x12, 0x80 },
1777 { 0x00, 0x00 },
1778 { 0x01, 0x80 },
1779 { 0x02, 0x80 },
1780 { 0x03, 0xc0 },
1781 { 0x04, 0x30 },
1782 { 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */
1783 { 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */
1784 { 0x0a, 0x86 },
1785 { 0x0b, 0xb0 },
1786 { 0x0c, 0x20 },
1787 { 0x0d, 0x20 },
1788 { 0x11, 0x01 },
1789 { 0x12, 0x25 },
1790 { 0x13, 0x01 },
1791 { 0x14, 0x04 },
1792 { 0x15, 0x01 }, /* Lin and Win think different about UV order */
1793 { 0x16, 0x03 },
1794 { 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */
1795 { 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */
1796 { 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */
1797 { 0x1a, 0xf5 },
1798 { 0x1b, 0x00 },
1799 { 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */
1800 { 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */
1801 { 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */
1802 { 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */
1803 { 0x26, 0xa2 },
1804 { 0x27, 0xea },
1805 { 0x28, 0x00 },
1806 { 0x29, 0x00 },
1807 { 0x2a, 0x80 },
1808 { 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */
1809 { 0x2c, 0xac },
1810 { 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */
1811 { 0x2e, 0x80 },
1812 { 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */
1813 { 0x4c, 0x00 },
1814 { 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */
1815 { 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */
1816 { 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */
1817 { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */
1818 { 0x63, 0xff },
1819 { 0x64, 0x53 }, /* new windrv 090403 says 0x57,
1820 * maybe thats wrong */
1821 { 0x65, 0x00 },
1822 { 0x66, 0x55 },
1823 { 0x67, 0xb0 },
1824 { 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */
1825 { 0x69, 0x02 },
1826 { 0x6a, 0x22 },
1827 { 0x6b, 0x00 },
1828 { 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but
1829 * deleting bit7 colors the first images red */
1830 { 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */
1831 { 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */
1832 { 0x6f, 0x01 },
1833 { 0x70, 0x8b },
1834 { 0x71, 0x00 },
1835 { 0x72, 0x14 },
1836 { 0x73, 0x54 },
1837 { 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */
1838 { 0x75, 0x0e },
1839 { 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */
1840 { 0x77, 0xff },
1841 { 0x78, 0x80 },
1842 { 0x79, 0x80 },
1843 { 0x7a, 0x80 },
1844 { 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */
1845 { 0x7c, 0x00 },
1846 { 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */
1847 { 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */
1848 { 0x7f, 0xfb },
1849 { 0x80, 0x28 },
1850 { 0x81, 0x00 },
1851 { 0x82, 0x23 },
1852 { 0x83, 0x0b },
1853 { 0x84, 0x00 },
1854 { 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */
1855 { 0x86, 0xc9 },
1856 { 0x87, 0x00 },
1857 { 0x88, 0x00 },
1858 { 0x89, 0x01 },
1859 { 0x12, 0x20 },
1860 { 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */
1861 };
1862
1863 static unsigned char ov7670_abs_to_sm(unsigned char v)
1864 {
1865 if (v > 127)
1866 return v & 0x7f;
1867 return (128 - v) | 0x80;
1868 }
1869
1870 /* Write a OV519 register */
1871 static int reg_w(struct sd *sd, __u16 index, __u16 value)
1872 {
1873 int ret, req = 0;
1874
1875 switch (sd->bridge) {
1876 case BRIDGE_OV511:
1877 case BRIDGE_OV511PLUS:
1878 req = 2;
1879 break;
1880 case BRIDGE_OVFX2:
1881 req = 0x0a;
1882 /* fall through */
1883 case BRIDGE_W9968CF:
1884 ret = usb_control_msg(sd->gspca_dev.dev,
1885 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
1886 req,
1887 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1888 value, index, NULL, 0, 500);
1889 goto leave;
1890 default:
1891 req = 1;
1892 }
1893
1894 sd->gspca_dev.usb_buf[0] = value;
1895 ret = usb_control_msg(sd->gspca_dev.dev,
1896 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
1897 req,
1898 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1899 0, index,
1900 sd->gspca_dev.usb_buf, 1, 500);
1901 leave:
1902 if (ret < 0) {
1903 PDEBUG(D_ERR, "Write reg 0x%04x -> [0x%02x] failed",
1904 value, index);
1905 return ret;
1906 }
1907
1908 PDEBUG(D_USBO, "Write reg 0x%04x -> [0x%02x]", value, index);
1909 return 0;
1910 }
1911
1912 /* Read from a OV519 register, note not valid for the w9968cf!! */
1913 /* returns: negative is error, pos or zero is data */
1914 static int reg_r(struct sd *sd, __u16 index)
1915 {
1916 int ret;
1917 int req;
1918
1919 switch (sd->bridge) {
1920 case BRIDGE_OV511:
1921 case BRIDGE_OV511PLUS:
1922 req = 3;
1923 break;
1924 case BRIDGE_OVFX2:
1925 req = 0x0b;
1926 break;
1927 default:
1928 req = 1;
1929 }
1930
1931 ret = usb_control_msg(sd->gspca_dev.dev,
1932 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
1933 req,
1934 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1935 0, index, sd->gspca_dev.usb_buf, 1, 500);
1936
1937 if (ret >= 0) {
1938 ret = sd->gspca_dev.usb_buf[0];
1939 PDEBUG(D_USBI, "Read reg [0x%02X] -> 0x%04X", index, ret);
1940 } else
1941 PDEBUG(D_ERR, "Read reg [0x%02x] failed", index);
1942
1943 return ret;
1944 }
1945
1946 /* Read 8 values from a OV519 register */
1947 static int reg_r8(struct sd *sd,
1948 __u16 index)
1949 {
1950 int ret;
1951
1952 ret = usb_control_msg(sd->gspca_dev.dev,
1953 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
1954 1, /* REQ_IO */
1955 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1956 0, index, sd->gspca_dev.usb_buf, 8, 500);
1957
1958 if (ret >= 0)
1959 ret = sd->gspca_dev.usb_buf[0];
1960 else
1961 PDEBUG(D_ERR, "Read reg 8 [0x%02x] failed", index);
1962
1963 return ret;
1964 }
1965
1966 /*
1967 * Writes bits at positions specified by mask to an OV51x reg. Bits that are in
1968 * the same position as 1's in "mask" are cleared and set to "value". Bits
1969 * that are in the same position as 0's in "mask" are preserved, regardless
1970 * of their respective state in "value".
1971 */
1972 static int reg_w_mask(struct sd *sd,
1973 __u16 index,
1974 __u8 value,
1975 __u8 mask)
1976 {
1977 int ret;
1978 __u8 oldval;
1979
1980 if (mask != 0xff) {
1981 value &= mask; /* Enforce mask on value */
1982 ret = reg_r(sd, index);
1983 if (ret < 0)
1984 return ret;
1985
1986 oldval = ret & ~mask; /* Clear the masked bits */
1987 value |= oldval; /* Set the desired bits */
1988 }
1989 return reg_w(sd, index, value);
1990 }
1991
1992 /*
1993 * Writes multiple (n) byte value to a single register. Only valid with certain
1994 * registers (0x30 and 0xc4 - 0xce).
1995 */
1996 static int ov518_reg_w32(struct sd *sd, __u16 index, u32 value, int n)
1997 {
1998 int ret;
1999
2000 *((__le32 *) sd->gspca_dev.usb_buf) = __cpu_to_le32(value);
2001
2002 ret = usb_control_msg(sd->gspca_dev.dev,
2003 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2004 1 /* REG_IO */,
2005 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2006 0, index,
2007 sd->gspca_dev.usb_buf, n, 500);
2008 if (ret < 0) {
2009 PDEBUG(D_ERR, "Write reg32 [%02x] %08x failed", index, value);
2010 return ret;
2011 }
2012
2013 return 0;
2014 }
2015
2016 static int ov511_i2c_w(struct sd *sd, __u8 reg, __u8 value)
2017 {
2018 int rc, retries;
2019
2020 PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
2021
2022 /* Three byte write cycle */
2023 for (retries = 6; ; ) {
2024 /* Select camera register */
2025 rc = reg_w(sd, R51x_I2C_SADDR_3, reg);
2026 if (rc < 0)
2027 return rc;
2028
2029 /* Write "value" to I2C data port of OV511 */
2030 rc = reg_w(sd, R51x_I2C_DATA, value);
2031 if (rc < 0)
2032 return rc;
2033
2034 /* Initiate 3-byte write cycle */
2035 rc = reg_w(sd, R511_I2C_CTL, 0x01);
2036 if (rc < 0)
2037 return rc;
2038
2039 do {
2040 rc = reg_r(sd, R511_I2C_CTL);
2041 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2042
2043 if (rc < 0)
2044 return rc;
2045
2046 if ((rc & 2) == 0) /* Ack? */
2047 break;
2048 if (--retries < 0) {
2049 PDEBUG(D_USBO, "i2c write retries exhausted");
2050 return -1;
2051 }
2052 }
2053
2054 return 0;
2055 }
2056
2057 static int ov511_i2c_r(struct sd *sd, __u8 reg)
2058 {
2059 int rc, value, retries;
2060
2061 /* Two byte write cycle */
2062 for (retries = 6; ; ) {
2063 /* Select camera register */
2064 rc = reg_w(sd, R51x_I2C_SADDR_2, reg);
2065 if (rc < 0)
2066 return rc;
2067
2068 /* Initiate 2-byte write cycle */
2069 rc = reg_w(sd, R511_I2C_CTL, 0x03);
2070 if (rc < 0)
2071 return rc;
2072
2073 do {
2074 rc = reg_r(sd, R511_I2C_CTL);
2075 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2076
2077 if (rc < 0)
2078 return rc;
2079
2080 if ((rc & 2) == 0) /* Ack? */
2081 break;
2082
2083 /* I2C abort */
2084 reg_w(sd, R511_I2C_CTL, 0x10);
2085
2086 if (--retries < 0) {
2087 PDEBUG(D_USBI, "i2c write retries exhausted");
2088 return -1;
2089 }
2090 }
2091
2092 /* Two byte read cycle */
2093 for (retries = 6; ; ) {
2094 /* Initiate 2-byte read cycle */
2095 rc = reg_w(sd, R511_I2C_CTL, 0x05);
2096 if (rc < 0)
2097 return rc;
2098
2099 do {
2100 rc = reg_r(sd, R511_I2C_CTL);
2101 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2102
2103 if (rc < 0)
2104 return rc;
2105
2106 if ((rc & 2) == 0) /* Ack? */
2107 break;
2108
2109 /* I2C abort */
2110 rc = reg_w(sd, R511_I2C_CTL, 0x10);
2111 if (rc < 0)
2112 return rc;
2113
2114 if (--retries < 0) {
2115 PDEBUG(D_USBI, "i2c read retries exhausted");
2116 return -1;
2117 }
2118 }
2119
2120 value = reg_r(sd, R51x_I2C_DATA);
2121
2122 PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value);
2123
2124 /* This is needed to make i2c_w() work */
2125 rc = reg_w(sd, R511_I2C_CTL, 0x05);
2126 if (rc < 0)
2127 return rc;
2128
2129 return value;
2130 }
2131
2132 /*
2133 * The OV518 I2C I/O procedure is different, hence, this function.
2134 * This is normally only called from i2c_w(). Note that this function
2135 * always succeeds regardless of whether the sensor is present and working.
2136 */
2137 static int ov518_i2c_w(struct sd *sd,
2138 __u8 reg,
2139 __u8 value)
2140 {
2141 int rc;
2142
2143 PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
2144
2145 /* Select camera register */
2146 rc = reg_w(sd, R51x_I2C_SADDR_3, reg);
2147 if (rc < 0)
2148 return rc;
2149
2150 /* Write "value" to I2C data port of OV511 */
2151 rc = reg_w(sd, R51x_I2C_DATA, value);
2152 if (rc < 0)
2153 return rc;
2154
2155 /* Initiate 3-byte write cycle */
2156 rc = reg_w(sd, R518_I2C_CTL, 0x01);
2157 if (rc < 0)
2158 return rc;
2159
2160 /* wait for write complete */
2161 msleep(4);
2162 return reg_r8(sd, R518_I2C_CTL);
2163 }
2164
2165 /*
2166 * returns: negative is error, pos or zero is data
2167 *
2168 * The OV518 I2C I/O procedure is different, hence, this function.
2169 * This is normally only called from i2c_r(). Note that this function
2170 * always succeeds regardless of whether the sensor is present and working.
2171 */
2172 static int ov518_i2c_r(struct sd *sd, __u8 reg)
2173 {
2174 int rc, value;
2175
2176 /* Select camera register */
2177 rc = reg_w(sd, R51x_I2C_SADDR_2, reg);
2178 if (rc < 0)
2179 return rc;
2180
2181 /* Initiate 2-byte write cycle */
2182 rc = reg_w(sd, R518_I2C_CTL, 0x03);
2183 if (rc < 0)
2184 return rc;
2185
2186 /* Initiate 2-byte read cycle */
2187 rc = reg_w(sd, R518_I2C_CTL, 0x05);
2188 if (rc < 0)
2189 return rc;
2190 value = reg_r(sd, R51x_I2C_DATA);
2191 PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value);
2192 return value;
2193 }
2194
2195 static int ovfx2_i2c_w(struct sd *sd, __u8 reg, __u8 value)
2196 {
2197 int ret;
2198
2199 ret = usb_control_msg(sd->gspca_dev.dev,
2200 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2201 0x02,
2202 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2203 (__u16)value, (__u16)reg, NULL, 0, 500);
2204
2205 if (ret < 0) {
2206 PDEBUG(D_ERR, "i2c 0x%02x -> [0x%02x] failed", value, reg);
2207 return ret;
2208 }
2209
2210 PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
2211 return 0;
2212 }
2213
2214 static int ovfx2_i2c_r(struct sd *sd, __u8 reg)
2215 {
2216 int ret;
2217
2218 ret = usb_control_msg(sd->gspca_dev.dev,
2219 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2220 0x03,
2221 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2222 0, (__u16)reg, sd->gspca_dev.usb_buf, 1, 500);
2223
2224 if (ret >= 0) {
2225 ret = sd->gspca_dev.usb_buf[0];
2226 PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, ret);
2227 } else
2228 PDEBUG(D_ERR, "i2c read [0x%02x] failed", reg);
2229
2230 return ret;
2231 }
2232
2233 static int i2c_w(struct sd *sd, __u8 reg, __u8 value)
2234 {
2235 int ret = -1;
2236
2237 if (sd->sensor_reg_cache[reg] == value)
2238 return 0;
2239
2240 switch (sd->bridge) {
2241 case BRIDGE_OV511:
2242 case BRIDGE_OV511PLUS:
2243 ret = ov511_i2c_w(sd, reg, value);
2244 break;
2245 case BRIDGE_OV518:
2246 case BRIDGE_OV518PLUS:
2247 case BRIDGE_OV519:
2248 ret = ov518_i2c_w(sd, reg, value);
2249 break;
2250 case BRIDGE_OVFX2:
2251 ret = ovfx2_i2c_w(sd, reg, value);
2252 break;
2253 case BRIDGE_W9968CF:
2254 ret = w9968cf_i2c_w(sd, reg, value);
2255 break;
2256 }
2257
2258 if (ret >= 0) {
2259 /* Up on sensor reset empty the register cache */
2260 if (reg == 0x12 && (value & 0x80))
2261 memset(sd->sensor_reg_cache, -1,
2262 sizeof(sd->sensor_reg_cache));
2263 else
2264 sd->sensor_reg_cache[reg] = value;
2265 }
2266
2267 return ret;
2268 }
2269
2270 static int i2c_r(struct sd *sd, __u8 reg)
2271 {
2272 int ret = -1;
2273
2274 if (sd->sensor_reg_cache[reg] != -1)
2275 return sd->sensor_reg_cache[reg];
2276
2277 switch (sd->bridge) {
2278 case BRIDGE_OV511:
2279 case BRIDGE_OV511PLUS:
2280 ret = ov511_i2c_r(sd, reg);
2281 break;
2282 case BRIDGE_OV518:
2283 case BRIDGE_OV518PLUS:
2284 case BRIDGE_OV519:
2285 ret = ov518_i2c_r(sd, reg);
2286 break;
2287 case BRIDGE_OVFX2:
2288 ret = ovfx2_i2c_r(sd, reg);
2289 break;
2290 case BRIDGE_W9968CF:
2291 ret = w9968cf_i2c_r(sd, reg);
2292 break;
2293 }
2294
2295 if (ret >= 0)
2296 sd->sensor_reg_cache[reg] = ret;
2297
2298 return ret;
2299 }
2300
2301 /* Writes bits at positions specified by mask to an I2C reg. Bits that are in
2302 * the same position as 1's in "mask" are cleared and set to "value". Bits
2303 * that are in the same position as 0's in "mask" are preserved, regardless
2304 * of their respective state in "value".
2305 */
2306 static int i2c_w_mask(struct sd *sd,
2307 __u8 reg,
2308 __u8 value,
2309 __u8 mask)
2310 {
2311 int rc;
2312 __u8 oldval;
2313
2314 value &= mask; /* Enforce mask on value */
2315 rc = i2c_r(sd, reg);
2316 if (rc < 0)
2317 return rc;
2318 oldval = rc & ~mask; /* Clear the masked bits */
2319 value |= oldval; /* Set the desired bits */
2320 return i2c_w(sd, reg, value);
2321 }
2322
2323 /* Temporarily stops OV511 from functioning. Must do this before changing
2324 * registers while the camera is streaming */
2325 static inline int ov51x_stop(struct sd *sd)
2326 {
2327 PDEBUG(D_STREAM, "stopping");
2328 sd->stopped = 1;
2329 switch (sd->bridge) {
2330 case BRIDGE_OV511:
2331 case BRIDGE_OV511PLUS:
2332 return reg_w(sd, R51x_SYS_RESET, 0x3d);
2333 case BRIDGE_OV518:
2334 case BRIDGE_OV518PLUS:
2335 return reg_w_mask(sd, R51x_SYS_RESET, 0x3a, 0x3a);
2336 case BRIDGE_OV519:
2337 return reg_w(sd, OV519_SYS_RESET1, 0x0f);
2338 case BRIDGE_OVFX2:
2339 return reg_w_mask(sd, 0x0f, 0x00, 0x02);
2340 case BRIDGE_W9968CF:
2341 return reg_w(sd, 0x3c, 0x0a05); /* stop USB transfer */
2342 }
2343
2344 return 0;
2345 }
2346
2347 /* Restarts OV511 after ov511_stop() is called. Has no effect if it is not
2348 * actually stopped (for performance). */
2349 static inline int ov51x_restart(struct sd *sd)
2350 {
2351 int rc;
2352
2353 PDEBUG(D_STREAM, "restarting");
2354 if (!sd->stopped)
2355 return 0;
2356 sd->stopped = 0;
2357
2358 /* Reinitialize the stream */
2359 switch (sd->bridge) {
2360 case BRIDGE_OV511:
2361 case BRIDGE_OV511PLUS:
2362 return reg_w(sd, R51x_SYS_RESET, 0x00);
2363 case BRIDGE_OV518:
2364 case BRIDGE_OV518PLUS:
2365 rc = reg_w(sd, 0x2f, 0x80);
2366 if (rc < 0)
2367 return rc;
2368 return reg_w(sd, R51x_SYS_RESET, 0x00);
2369 case BRIDGE_OV519:
2370 return reg_w(sd, OV519_SYS_RESET1, 0x00);
2371 case BRIDGE_OVFX2:
2372 return reg_w_mask(sd, 0x0f, 0x02, 0x02);
2373 case BRIDGE_W9968CF:
2374 return reg_w(sd, 0x3c, 0x8a05); /* USB FIFO enable */
2375 }
2376
2377 return 0;
2378 }
2379
2380 static int ov51x_set_slave_ids(struct sd *sd, __u8 slave);
2381
2382 /* This does an initial reset of an OmniVision sensor and ensures that I2C
2383 * is synchronized. Returns <0 on failure.
2384 */
2385 static int init_ov_sensor(struct sd *sd, __u8 slave)
2386 {
2387 int i;
2388
2389 if (ov51x_set_slave_ids(sd, slave) < 0)
2390 return -EIO;
2391
2392 /* Reset the sensor */
2393 if (i2c_w(sd, 0x12, 0x80) < 0)
2394 return -EIO;
2395
2396 /* Wait for it to initialize */
2397 msleep(150);
2398
2399 for (i = 0; i < i2c_detect_tries; i++) {
2400 if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f &&
2401 i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) {
2402 PDEBUG(D_PROBE, "I2C synced in %d attempt(s)", i);
2403 return 0;
2404 }
2405
2406 /* Reset the sensor */
2407 if (i2c_w(sd, 0x12, 0x80) < 0)
2408 return -EIO;
2409 /* Wait for it to initialize */
2410 msleep(150);
2411 /* Dummy read to sync I2C */
2412 if (i2c_r(sd, 0x00) < 0)
2413 return -EIO;
2414 }
2415 return -EIO;
2416 }
2417
2418 /* Set the read and write slave IDs. The "slave" argument is the write slave,
2419 * and the read slave will be set to (slave + 1).
2420 * This should not be called from outside the i2c I/O functions.
2421 * Sets I2C read and write slave IDs. Returns <0 for error
2422 */
2423 static int ov51x_set_slave_ids(struct sd *sd,
2424 __u8 slave)
2425 {
2426 int rc;
2427
2428 switch (sd->bridge) {
2429 case BRIDGE_OVFX2:
2430 return reg_w(sd, OVFX2_I2C_ADDR, slave);
2431 case BRIDGE_W9968CF:
2432 sd->sensor_addr = slave;
2433 return 0;
2434 }
2435
2436 rc = reg_w(sd, R51x_I2C_W_SID, slave);
2437 if (rc < 0)
2438 return rc;
2439 return reg_w(sd, R51x_I2C_R_SID, slave + 1);
2440 }
2441
2442 static int write_regvals(struct sd *sd,
2443 const struct ov_regvals *regvals,
2444 int n)
2445 {
2446 int rc;
2447
2448 while (--n >= 0) {
2449 rc = reg_w(sd, regvals->reg, regvals->val);
2450 if (rc < 0)
2451 return rc;
2452 regvals++;
2453 }
2454 return 0;
2455 }
2456
2457 static int write_i2c_regvals(struct sd *sd,
2458 const struct ov_i2c_regvals *regvals,
2459 int n)
2460 {
2461 int rc;
2462
2463 while (--n >= 0) {
2464 rc = i2c_w(sd, regvals->reg, regvals->val);
2465 if (rc < 0)
2466 return rc;
2467 regvals++;
2468 }
2469 return 0;
2470 }
2471
2472 /****************************************************************************
2473 *
2474 * OV511 and sensor configuration
2475 *
2476 ***************************************************************************/
2477
2478 /* This initializes the OV2x10 / OV3610 / OV3620 */
2479 static int ov_hires_configure(struct sd *sd)
2480 {
2481 int high, low;
2482
2483 if (sd->bridge != BRIDGE_OVFX2) {
2484 PDEBUG(D_ERR, "error hires sensors only supported with ovfx2");
2485 return -1;
2486 }
2487
2488 PDEBUG(D_PROBE, "starting ov hires configuration");
2489
2490 /* Detect sensor (sub)type */
2491 high = i2c_r(sd, 0x0a);
2492 low = i2c_r(sd, 0x0b);
2493 /* info("%x, %x", high, low); */
2494 if (high == 0x96 && low == 0x40) {
2495 PDEBUG(D_PROBE, "Sensor is an OV2610");
2496 sd->sensor = SEN_OV2610;
2497 } else if (high == 0x36 && (low & 0x0f) == 0x00) {
2498 PDEBUG(D_PROBE, "Sensor is an OV3610");
2499 sd->sensor = SEN_OV3610;
2500 } else {
2501 PDEBUG(D_ERR, "Error unknown sensor type: 0x%02x%02x",
2502 high, low);
2503 return -1;
2504 }
2505
2506 /* Set sensor-specific vars */
2507 return 0;
2508 }
2509
2510
2511 /* This initializes the OV8110, OV8610 sensor. The OV8110 uses
2512 * the same register settings as the OV8610, since they are very similar.
2513 */
2514 static int ov8xx0_configure(struct sd *sd)
2515 {
2516 int rc;
2517
2518 PDEBUG(D_PROBE, "starting ov8xx0 configuration");
2519
2520 /* Detect sensor (sub)type */
2521 rc = i2c_r(sd, OV7610_REG_COM_I);
2522 if (rc < 0) {
2523 PDEBUG(D_ERR, "Error detecting sensor type");
2524 return -1;
2525 }
2526 if ((rc & 3) == 1) {
2527 sd->sensor = SEN_OV8610;
2528 } else {
2529 PDEBUG(D_ERR, "Unknown image sensor version: %d", rc & 3);
2530 return -1;
2531 }
2532
2533 /* Set sensor-specific vars */
2534 return 0;
2535 }
2536
2537 /* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses
2538 * the same register settings as the OV7610, since they are very similar.
2539 */
2540 static int ov7xx0_configure(struct sd *sd)
2541 {
2542 int rc, high, low;
2543
2544
2545 PDEBUG(D_PROBE, "starting OV7xx0 configuration");
2546
2547 /* Detect sensor (sub)type */
2548 rc = i2c_r(sd, OV7610_REG_COM_I);
2549
2550 /* add OV7670 here
2551 * it appears to be wrongly detected as a 7610 by default */
2552 if (rc < 0) {
2553 PDEBUG(D_ERR, "Error detecting sensor type");
2554 return -1;
2555 }
2556 if ((rc & 3) == 3) {
2557 /* quick hack to make OV7670s work */
2558 high = i2c_r(sd, 0x0a);
2559 low = i2c_r(sd, 0x0b);
2560 /* info("%x, %x", high, low); */
2561 if (high == 0x76 && low == 0x73) {
2562 PDEBUG(D_PROBE, "Sensor is an OV7670");
2563 sd->sensor = SEN_OV7670;
2564 } else {
2565 PDEBUG(D_PROBE, "Sensor is an OV7610");
2566 sd->sensor = SEN_OV7610;
2567 }
2568 } else if ((rc & 3) == 1) {
2569 /* I don't know what's different about the 76BE yet. */
2570 if (i2c_r(sd, 0x15) & 1) {
2571 PDEBUG(D_PROBE, "Sensor is an OV7620AE");
2572 sd->sensor = SEN_OV7620AE;
2573 } else {
2574 PDEBUG(D_PROBE, "Sensor is an OV76BE");
2575 sd->sensor = SEN_OV76BE;
2576 }
2577 } else if ((rc & 3) == 0) {
2578 /* try to read product id registers */
2579 high = i2c_r(sd, 0x0a);
2580 if (high < 0) {
2581 PDEBUG(D_ERR, "Error detecting camera chip PID");
2582 return high;
2583 }
2584 low = i2c_r(sd, 0x0b);
2585 if (low < 0) {
2586 PDEBUG(D_ERR, "Error detecting camera chip VER");
2587 return low;
2588 }
2589 if (high == 0x76) {
2590 switch (low) {
2591 case 0x30:
2592 PDEBUG(D_PROBE, "Sensor is an OV7630/OV7635");
2593 PDEBUG(D_ERR,
2594 "7630 is not supported by this driver");
2595 return -1;
2596 case 0x40:
2597 PDEBUG(D_PROBE, "Sensor is an OV7645");
2598 sd->sensor = SEN_OV7640; /* FIXME */
2599 break;
2600 case 0x45:
2601 PDEBUG(D_PROBE, "Sensor is an OV7645B");
2602 sd->sensor = SEN_OV7640; /* FIXME */
2603 break;
2604 case 0x48:
2605 PDEBUG(D_PROBE, "Sensor is an OV7648");
2606 sd->sensor = SEN_OV7648;
2607 break;
2608 default:
2609 PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low);
2610 return -1;
2611 }
2612 } else {
2613 PDEBUG(D_PROBE, "Sensor is an OV7620");
2614 sd->sensor = SEN_OV7620;
2615 }
2616 } else {
2617 PDEBUG(D_ERR, "Unknown image sensor version: %d", rc & 3);
2618 return -1;
2619 }
2620
2621 /* Set sensor-specific vars */
2622 return 0;
2623 }
2624
2625 /* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */
2626 static int ov6xx0_configure(struct sd *sd)
2627 {
2628 int rc;
2629 PDEBUG(D_PROBE, "starting OV6xx0 configuration");
2630
2631 /* Detect sensor (sub)type */
2632 rc = i2c_r(sd, OV7610_REG_COM_I);
2633 if (rc < 0) {
2634 PDEBUG(D_ERR, "Error detecting sensor type");
2635 return -1;
2636 }
2637
2638 /* Ugh. The first two bits are the version bits, but
2639 * the entire register value must be used. I guess OVT
2640 * underestimated how many variants they would make. */
2641 switch (rc) {
2642 case 0x00:
2643 sd->sensor = SEN_OV6630;
2644 PDEBUG(D_ERR,
2645 "WARNING: Sensor is an OV66308. Your camera may have");
2646 PDEBUG(D_ERR, "been misdetected in previous driver versions.");
2647 break;
2648 case 0x01:
2649 sd->sensor = SEN_OV6620;
2650 PDEBUG(D_PROBE, "Sensor is an OV6620");
2651 break;
2652 case 0x02:
2653 sd->sensor = SEN_OV6630;
2654 PDEBUG(D_PROBE, "Sensor is an OV66308AE");
2655 break;
2656 case 0x03:
2657 sd->sensor = SEN_OV66308AF;
2658 PDEBUG(D_PROBE, "Sensor is an OV66308AF");
2659 break;
2660 case 0x90:
2661 sd->sensor = SEN_OV6630;
2662 PDEBUG(D_ERR,
2663 "WARNING: Sensor is an OV66307. Your camera may have");
2664 PDEBUG(D_ERR, "been misdetected in previous driver versions.");
2665 break;
2666 default:
2667 PDEBUG(D_ERR, "FATAL: Unknown sensor version: 0x%02x", rc);
2668 return -1;
2669 }
2670
2671 /* Set sensor-specific vars */
2672 sd->sif = 1;
2673
2674 return 0;
2675 }
2676
2677 /* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */
2678 static void ov51x_led_control(struct sd *sd, int on)
2679 {
2680 if (sd->invert_led)
2681 on = !on;
2682
2683 switch (sd->bridge) {
2684 /* OV511 has no LED control */
2685 case BRIDGE_OV511PLUS:
2686 reg_w(sd, R511_SYS_LED_CTL, on ? 1 : 0);
2687 break;
2688 case BRIDGE_OV518:
2689 case BRIDGE_OV518PLUS:
2690 reg_w_mask(sd, R518_GPIO_OUT, on ? 0x02 : 0x00, 0x02);
2691 break;
2692 case BRIDGE_OV519:
2693 reg_w_mask(sd, OV519_GPIO_DATA_OUT0, !on, 1); /* 0 / 1 */
2694 break;
2695 }
2696 }
2697
2698 static void sd_reset_snapshot(struct gspca_dev *gspca_dev)
2699 {
2700 struct sd *sd = (struct sd *) gspca_dev;
2701
2702 if (!sd->snapshot_needs_reset)
2703 return;
2704
2705 /* Note it is important that we clear sd->snapshot_needs_reset,
2706 before actually clearing the snapshot state in the bridge
2707 otherwise we might race with the pkt_scan interrupt handler */
2708 sd->snapshot_needs_reset = 0;
2709
2710 switch (sd->bridge) {
2711 case BRIDGE_OV511:
2712 case BRIDGE_OV511PLUS:
2713 reg_w(sd, R51x_SYS_SNAP, 0x02);
2714 reg_w(sd, R51x_SYS_SNAP, 0x00);
2715 break;
2716 case BRIDGE_OV518:
2717 case BRIDGE_OV518PLUS:
2718 reg_w(sd, R51x_SYS_SNAP, 0x02); /* Reset */
2719 reg_w(sd, R51x_SYS_SNAP, 0x01); /* Enable */
2720 break;
2721 case BRIDGE_OV519:
2722 reg_w(sd, R51x_SYS_RESET, 0x40);
2723 reg_w(sd, R51x_SYS_RESET, 0x00);
2724 break;
2725 }
2726 }
2727
2728 static int ov51x_upload_quan_tables(struct sd *sd)
2729 {
2730 const unsigned char yQuanTable511[] = {
2731 0, 1, 1, 2, 2, 3, 3, 4,
2732 1, 1, 1, 2, 2, 3, 4, 4,
2733 1, 1, 2, 2, 3, 4, 4, 4,
2734 2, 2, 2, 3, 4, 4, 4, 4,
2735 2, 2, 3, 4, 4, 5, 5, 5,
2736 3, 3, 4, 4, 5, 5, 5, 5,
2737 3, 4, 4, 4, 5, 5, 5, 5,
2738 4, 4, 4, 4, 5, 5, 5, 5
2739 };
2740
2741 const unsigned char uvQuanTable511[] = {
2742 0, 2, 2, 3, 4, 4, 4, 4,
2743 2, 2, 2, 4, 4, 4, 4, 4,
2744 2, 2, 3, 4, 4, 4, 4, 4,
2745 3, 4, 4, 4, 4, 4, 4, 4,
2746 4, 4, 4, 4, 4, 4, 4, 4,
2747 4, 4, 4, 4, 4, 4, 4, 4,
2748 4, 4, 4, 4, 4, 4, 4, 4,
2749 4, 4, 4, 4, 4, 4, 4, 4
2750 };
2751
2752 /* OV518 quantization tables are 8x4 (instead of 8x8) */
2753 const unsigned char yQuanTable518[] = {
2754 5, 4, 5, 6, 6, 7, 7, 7,
2755 5, 5, 5, 5, 6, 7, 7, 7,
2756 6, 6, 6, 6, 7, 7, 7, 8,
2757 7, 7, 6, 7, 7, 7, 8, 8
2758 };
2759
2760 const unsigned char uvQuanTable518[] = {
2761 6, 6, 6, 7, 7, 7, 7, 7,
2762 6, 6, 6, 7, 7, 7, 7, 7,
2763 6, 6, 6, 7, 7, 7, 7, 8,
2764 7, 7, 7, 7, 7, 7, 8, 8
2765 };
2766
2767 const unsigned char *pYTable, *pUVTable;
2768 unsigned char val0, val1;
2769 int i, size, rc, reg = R51x_COMP_LUT_BEGIN;
2770
2771 PDEBUG(D_PROBE, "Uploading quantization tables");
2772
2773 if (sd->bridge == BRIDGE_OV511 || sd->bridge == BRIDGE_OV511PLUS) {
2774 pYTable = yQuanTable511;
2775 pUVTable = uvQuanTable511;
2776 size = 32;
2777 } else {
2778 pYTable = yQuanTable518;
2779 pUVTable = uvQuanTable518;
2780 size = 16;
2781 }
2782
2783 for (i = 0; i < size; i++) {
2784 val0 = *pYTable++;
2785 val1 = *pYTable++;
2786 val0 &= 0x0f;
2787 val1 &= 0x0f;
2788 val0 |= val1 << 4;
2789 rc = reg_w(sd, reg, val0);
2790 if (rc < 0)
2791 return rc;
2792
2793 val0 = *pUVTable++;
2794 val1 = *pUVTable++;
2795 val0 &= 0x0f;
2796 val1 &= 0x0f;
2797 val0 |= val1 << 4;
2798 rc = reg_w(sd, reg + size, val0);
2799 if (rc < 0)
2800 return rc;
2801
2802 reg++;
2803 }
2804
2805 return 0;
2806 }
2807
2808 /* This initializes the OV511/OV511+ and the sensor */
2809 static int ov511_configure(struct gspca_dev *gspca_dev)
2810 {
2811 struct sd *sd = (struct sd *) gspca_dev;
2812 int rc;
2813
2814 /* For 511 and 511+ */
2815 const struct ov_regvals init_511[] = {
2816 { R51x_SYS_RESET, 0x7f },
2817 { R51x_SYS_INIT, 0x01 },
2818 { R51x_SYS_RESET, 0x7f },
2819 { R51x_SYS_INIT, 0x01 },
2820 { R51x_SYS_RESET, 0x3f },
2821 { R51x_SYS_INIT, 0x01 },
2822 { R51x_SYS_RESET, 0x3d },
2823 };
2824
2825 const struct ov_regvals norm_511[] = {
2826 { R511_DRAM_FLOW_CTL, 0x01 },
2827 { R51x_SYS_SNAP, 0x00 },
2828 { R51x_SYS_SNAP, 0x02 },
2829 { R51x_SYS_SNAP, 0x00 },
2830 { R511_FIFO_OPTS, 0x1f },
2831 { R511_COMP_EN, 0x00 },
2832 { R511_COMP_LUT_EN, 0x03 },
2833 };
2834
2835 const struct ov_regvals norm_511_p[] = {
2836 { R511_DRAM_FLOW_CTL, 0xff },
2837 { R51x_SYS_SNAP, 0x00 },
2838 { R51x_SYS_SNAP, 0x02 },
2839 { R51x_SYS_SNAP, 0x00 },
2840 { R511_FIFO_OPTS, 0xff },
2841 { R511_COMP_EN, 0x00 },
2842 { R511_COMP_LUT_EN, 0x03 },
2843 };
2844
2845 const struct ov_regvals compress_511[] = {
2846 { 0x70, 0x1f },
2847 { 0x71, 0x05 },
2848 { 0x72, 0x06 },
2849 { 0x73, 0x06 },
2850 { 0x74, 0x14 },
2851 { 0x75, 0x03 },
2852 { 0x76, 0x04 },
2853 { 0x77, 0x04 },
2854 };
2855
2856 PDEBUG(D_PROBE, "Device custom id %x", reg_r(sd, R51x_SYS_CUST_ID));
2857
2858 rc = write_regvals(sd, init_511, ARRAY_SIZE(init_511));
2859 if (rc < 0)
2860 return rc;
2861
2862 switch (sd->bridge) {
2863 case BRIDGE_OV511:
2864 rc = write_regvals(sd, norm_511, ARRAY_SIZE(norm_511));
2865 if (rc < 0)
2866 return rc;
2867 break;
2868 case BRIDGE_OV511PLUS:
2869 rc = write_regvals(sd, norm_511_p, ARRAY_SIZE(norm_511_p));
2870 if (rc < 0)
2871 return rc;
2872 break;
2873 }
2874
2875 /* Init compression */
2876 rc = write_regvals(sd, compress_511, ARRAY_SIZE(compress_511));
2877 if (rc < 0)
2878 return rc;
2879
2880 rc = ov51x_upload_quan_tables(sd);
2881 if (rc < 0) {
2882 PDEBUG(D_ERR, "Error uploading quantization tables");
2883 return rc;
2884 }
2885
2886 return 0;
2887 }
2888
2889 /* This initializes the OV518/OV518+ and the sensor */
2890 static int ov518_configure(struct gspca_dev *gspca_dev)
2891 {
2892 struct sd *sd = (struct sd *) gspca_dev;
2893 int rc;
2894
2895 /* For 518 and 518+ */
2896 const struct ov_regvals init_518[] = {
2897 { R51x_SYS_RESET, 0x40 },
2898 { R51x_SYS_INIT, 0xe1 },
2899 { R51x_SYS_RESET, 0x3e },
2900 { R51x_SYS_INIT, 0xe1 },
2901 { R51x_SYS_RESET, 0x00 },
2902 { R51x_SYS_INIT, 0xe1 },
2903 { 0x46, 0x00 },
2904 { 0x5d, 0x03 },
2905 };
2906
2907 const struct ov_regvals norm_518[] = {
2908 { R51x_SYS_SNAP, 0x02 }, /* Reset */
2909 { R51x_SYS_SNAP, 0x01 }, /* Enable */
2910 { 0x31, 0x0f },
2911 { 0x5d, 0x03 },
2912 { 0x24, 0x9f },
2913 { 0x25, 0x90 },
2914 { 0x20, 0x00 },
2915 { 0x51, 0x04 },
2916 { 0x71, 0x19 },
2917 { 0x2f, 0x80 },
2918 };
2919
2920 const struct ov_regvals norm_518_p[] = {
2921 { R51x_SYS_SNAP, 0x02 }, /* Reset */
2922 { R51x_SYS_SNAP, 0x01 }, /* Enable */
2923 { 0x31, 0x0f },
2924 { 0x5d, 0x03 },
2925 { 0x24, 0x9f },
2926 { 0x25, 0x90 },
2927 { 0x20, 0x60 },
2928 { 0x51, 0x02 },
2929 { 0x71, 0x19 },
2930 { 0x40, 0xff },
2931 { 0x41, 0x42 },
2932 { 0x46, 0x00 },
2933 { 0x33, 0x04 },
2934 { 0x21, 0x19 },
2935 { 0x3f, 0x10 },
2936 { 0x2f, 0x80 },
2937 };
2938
2939 /* First 5 bits of custom ID reg are a revision ID on OV518 */
2940 PDEBUG(D_PROBE, "Device revision %d",
2941 0x1F & reg_r(sd, R51x_SYS_CUST_ID));
2942
2943 rc = write_regvals(sd, init_518, ARRAY_SIZE(init_518));
2944 if (rc < 0)
2945 return rc;
2946
2947 /* Set LED GPIO pin to output mode */
2948 rc = reg_w_mask(sd, R518_GPIO_CTL, 0x00, 0x02);
2949 if (rc < 0)
2950 return rc;
2951
2952 switch (sd->bridge) {
2953 case BRIDGE_OV518:
2954 rc = write_regvals(sd, norm_518, ARRAY_SIZE(norm_518));
2955 if (rc < 0)
2956 return rc;
2957 break;
2958 case BRIDGE_OV518PLUS:
2959 rc = write_regvals(sd, norm_518_p, ARRAY_SIZE(norm_518_p));
2960 if (rc < 0)
2961 return rc;
2962 break;
2963 }
2964
2965 rc = ov51x_upload_quan_tables(sd);
2966 if (rc < 0) {
2967 PDEBUG(D_ERR, "Error uploading quantization tables");
2968 return rc;
2969 }
2970
2971 rc = reg_w(sd, 0x2f, 0x80);
2972 if (rc < 0)
2973 return rc;
2974
2975 return 0;
2976 }
2977
2978 static int ov519_configure(struct sd *sd)
2979 {
2980 static const struct ov_regvals init_519[] = {
2981 { 0x5a, 0x6d }, /* EnableSystem */
2982 { 0x53, 0x9b },
2983 { 0x54, 0xff }, /* set bit2 to enable jpeg */
2984 { 0x5d, 0x03 },
2985 { 0x49, 0x01 },
2986 { 0x48, 0x00 },
2987 /* Set LED pin to output mode. Bit 4 must be cleared or sensor
2988 * detection will fail. This deserves further investigation. */
2989 { OV519_GPIO_IO_CTRL0, 0xee },
2990 { 0x51, 0x0f }, /* SetUsbInit */
2991 { 0x51, 0x00 },
2992 { 0x22, 0x00 },
2993 /* windows reads 0x55 at this point*/
2994 };
2995
2996 return write_regvals(sd, init_519, ARRAY_SIZE(init_519));
2997 }
2998
2999 static int ovfx2_configure(struct sd *sd)
3000 {
3001 static const struct ov_regvals init_fx2[] = {
3002 { 0x00, 0x60 },
3003 { 0x02, 0x01 },
3004 { 0x0f, 0x1d },
3005 { 0xe9, 0x82 },
3006 { 0xea, 0xc7 },
3007 { 0xeb, 0x10 },
3008 { 0xec, 0xf6 },
3009 };
3010
3011 sd->stopped = 1;
3012
3013 return write_regvals(sd, init_fx2, ARRAY_SIZE(init_fx2));
3014 }
3015
3016 /* this function is called at probe time */
3017 static int sd_config(struct gspca_dev *gspca_dev,
3018 const struct usb_device_id *id)
3019 {
3020 struct sd *sd = (struct sd *) gspca_dev;
3021 struct cam *cam = &gspca_dev->cam;
3022 int ret = 0;
3023
3024 sd->bridge = id->driver_info & BRIDGE_MASK;
3025 sd->invert_led = id->driver_info & BRIDGE_INVERT_LED;
3026
3027 switch (sd->bridge) {
3028 case BRIDGE_OV511:
3029 case BRIDGE_OV511PLUS:
3030 ret = ov511_configure(gspca_dev);
3031 break;
3032 case BRIDGE_OV518:
3033 case BRIDGE_OV518PLUS:
3034 ret = ov518_configure(gspca_dev);
3035 break;
3036 case BRIDGE_OV519:
3037 ret = ov519_configure(sd);
3038 break;
3039 case BRIDGE_OVFX2:
3040 ret = ovfx2_configure(sd);
3041 cam->bulk_size = OVFX2_BULK_SIZE;
3042 cam->bulk_nurbs = MAX_NURBS;
3043 cam->bulk = 1;
3044 break;
3045 case BRIDGE_W9968CF:
3046 ret = w9968cf_configure(sd);
3047 cam->reverse_alts = 1;
3048 break;
3049 }
3050
3051 if (ret)
3052 goto error;
3053
3054 ov51x_led_control(sd, 0); /* turn LED off */
3055
3056 /* The OV519 must be more aggressive about sensor detection since
3057 * I2C write will never fail if the sensor is not present. We have
3058 * to try to initialize the sensor to detect its presence */
3059
3060 /* Test for 76xx */
3061 if (init_ov_sensor(sd, OV7xx0_SID) >= 0) {
3062 if (ov7xx0_configure(sd) < 0) {
3063 PDEBUG(D_ERR, "Failed to configure OV7xx0");
3064 goto error;
3065 }
3066 /* Test for 6xx0 */
3067 } else if (init_ov_sensor(sd, OV6xx0_SID) >= 0) {
3068 if (ov6xx0_configure(sd) < 0) {
3069 PDEBUG(D_ERR, "Failed to configure OV6xx0");
3070 goto error;
3071 }
3072 /* Test for 8xx0 */
3073 } else if (init_ov_sensor(sd, OV8xx0_SID) >= 0) {
3074 if (ov8xx0_configure(sd) < 0) {
3075 PDEBUG(D_ERR, "Failed to configure OV8xx0");
3076 goto error;
3077 }
3078 /* Test for 3xxx / 2xxx */
3079 } else if (init_ov_sensor(sd, OV_HIRES_SID) >= 0) {
3080 if (ov_hires_configure(sd) < 0) {
3081 PDEBUG(D_ERR, "Failed to configure high res OV");
3082 goto error;
3083 }
3084 } else {
3085 PDEBUG(D_ERR, "Can't determine sensor slave IDs");
3086 goto error;
3087 }
3088
3089 switch (sd->bridge) {
3090 case BRIDGE_OV511:
3091 case BRIDGE_OV511PLUS:
3092 if (!sd->sif) {
3093 cam->cam_mode = ov511_vga_mode;
3094 cam->nmodes = ARRAY_SIZE(ov511_vga_mode);
3095 } else {
3096 cam->cam_mode = ov511_sif_mode;
3097 cam->nmodes = ARRAY_SIZE(ov511_sif_mode);
3098 }
3099 break;
3100 case BRIDGE_OV518:
3101 case BRIDGE_OV518PLUS:
3102 if (!sd->sif) {
3103 cam->cam_mode = ov518_vga_mode;
3104 cam->nmodes = ARRAY_SIZE(ov518_vga_mode);
3105 } else {
3106 cam->cam_mode = ov518_sif_mode;
3107 cam->nmodes = ARRAY_SIZE(ov518_sif_mode);
3108 }
3109 break;
3110 case BRIDGE_OV519:
3111 if (!sd->sif) {
3112 cam->cam_mode = ov519_vga_mode;
3113 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3114 } else {
3115 cam->cam_mode = ov519_sif_mode;
3116 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3117 }
3118 break;
3119 case BRIDGE_OVFX2:
3120 if (sd->sensor == SEN_OV2610) {
3121 cam->cam_mode = ovfx2_ov2610_mode;
3122 cam->nmodes = ARRAY_SIZE(ovfx2_ov2610_mode);
3123 } else if (sd->sensor == SEN_OV3610) {
3124 cam->cam_mode = ovfx2_ov3610_mode;
3125 cam->nmodes = ARRAY_SIZE(ovfx2_ov3610_mode);
3126 } else if (!sd->sif) {
3127 cam->cam_mode = ov519_vga_mode;
3128 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3129 } else {
3130 cam->cam_mode = ov519_sif_mode;
3131 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3132 }
3133 break;
3134 case BRIDGE_W9968CF:
3135 cam->cam_mode = w9968cf_vga_mode;
3136 cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode);
3137 if (sd->sif)
3138 cam->nmodes--;
3139
3140 /* w9968cf needs initialisation once the sensor is known */
3141 if (w9968cf_init(sd) < 0)
3142 goto error;
3143 break;
3144 }
3145 sd->brightness = BRIGHTNESS_DEF;
3146 if (sd->sensor == SEN_OV6630 || sd->sensor == SEN_OV66308AF)
3147 sd->contrast = 200; /* The default is too low for the ov6630 */
3148 else
3149 sd->contrast = CONTRAST_DEF;
3150 sd->colors = COLOR_DEF;
3151 sd->hflip = HFLIP_DEF;
3152 sd->vflip = VFLIP_DEF;
3153 sd->autobrightness = AUTOBRIGHT_DEF;
3154 if (sd->sensor == SEN_OV7670) {
3155 sd->freq = OV7670_FREQ_DEF;
3156 gspca_dev->ctrl_dis = (1 << FREQ_IDX) | (1 << COLOR_IDX);
3157 } else {
3158 sd->freq = FREQ_DEF;
3159 gspca_dev->ctrl_dis = (1 << HFLIP_IDX) | (1 << VFLIP_IDX) |
3160 (1 << OV7670_FREQ_IDX);
3161 }
3162 sd->quality = QUALITY_DEF;
3163 if (sd->sensor == SEN_OV7640 ||
3164 sd->sensor == SEN_OV7648)
3165 gspca_dev->ctrl_dis |= (1 << AUTOBRIGHT_IDX) |
3166 (1 << CONTRAST_IDX);
3167 if (sd->sensor == SEN_OV7670)
3168 gspca_dev->ctrl_dis |= 1 << AUTOBRIGHT_IDX;
3169 /* OV8610 Frequency filter control should work but needs testing */
3170 if (sd->sensor == SEN_OV8610)
3171 gspca_dev->ctrl_dis |= 1 << FREQ_IDX;
3172 /* No controls for the OV2610/OV3610 */
3173 if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610)
3174 gspca_dev->ctrl_dis |= 0xFF;
3175
3176 return 0;
3177 error:
3178 PDEBUG(D_ERR, "OV519 Config failed");
3179 return -EBUSY;
3180 }
3181
3182 /* this function is called at probe and resume time */
3183 static int sd_init(struct gspca_dev *gspca_dev)
3184 {
3185 struct sd *sd = (struct sd *) gspca_dev;
3186
3187 /* initialize the sensor */
3188 switch (sd->sensor) {
3189 case SEN_OV2610:
3190 if (write_i2c_regvals(sd, norm_2610, ARRAY_SIZE(norm_2610)))
3191 return -EIO;
3192 /* Enable autogain, autoexpo, awb, bandfilter */
3193 if (i2c_w_mask(sd, 0x13, 0x27, 0x27) < 0)
3194 return -EIO;
3195 break;
3196 case SEN_OV3610:
3197 if (write_i2c_regvals(sd, norm_3620b, ARRAY_SIZE(norm_3620b)))
3198 return -EIO;
3199 /* Enable autogain, autoexpo, awb, bandfilter */
3200 if (i2c_w_mask(sd, 0x13, 0x27, 0x27) < 0)
3201 return -EIO;
3202 break;
3203 case SEN_OV6620:
3204 if (write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20)))
3205 return -EIO;
3206 break;
3207 case SEN_OV6630:
3208 case SEN_OV66308AF:
3209 if (write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30)))
3210 return -EIO;
3211 break;
3212 default:
3213 /* case SEN_OV7610: */
3214 /* case SEN_OV76BE: */
3215 if (write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610)))
3216 return -EIO;
3217 if (i2c_w_mask(sd, 0x0e, 0x00, 0x40))
3218 return -EIO;
3219 break;
3220 case SEN_OV7620:
3221 case SEN_OV7620AE:
3222 if (write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620)))
3223 return -EIO;
3224 break;
3225 case SEN_OV7640:
3226 case SEN_OV7648:
3227 if (write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640)))
3228 return -EIO;
3229 break;
3230 case SEN_OV7670:
3231 if (write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670)))
3232 return -EIO;
3233 break;
3234 case SEN_OV8610:
3235 if (write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610)))
3236 return -EIO;
3237 break;
3238 }
3239 return 0;
3240 }
3241
3242 /* Set up the OV511/OV511+ with the given image parameters.
3243 *
3244 * Do not put any sensor-specific code in here (including I2C I/O functions)
3245 */
3246 static int ov511_mode_init_regs(struct sd *sd)
3247 {
3248 int hsegs, vsegs, packet_size, fps, needed;
3249 int interlaced = 0;
3250 struct usb_host_interface *alt;
3251 struct usb_interface *intf;
3252
3253 intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3254 alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3255 if (!alt) {
3256 PDEBUG(D_ERR, "Couldn't get altsetting");
3257 return -EIO;
3258 }
3259
3260 packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3261 reg_w(sd, R51x_FIFO_PSIZE, packet_size >> 5);
3262
3263 reg_w(sd, R511_CAM_UV_EN, 0x01);
3264 reg_w(sd, R511_SNAP_UV_EN, 0x01);
3265 reg_w(sd, R511_SNAP_OPTS, 0x03);
3266
3267 /* Here I'm assuming that snapshot size == image size.
3268 * I hope that's always true. --claudio
3269 */
3270 hsegs = (sd->gspca_dev.width >> 3) - 1;
3271 vsegs = (sd->gspca_dev.height >> 3) - 1;
3272
3273 reg_w(sd, R511_CAM_PXCNT, hsegs);
3274 reg_w(sd, R511_CAM_LNCNT, vsegs);
3275 reg_w(sd, R511_CAM_PXDIV, 0x00);
3276 reg_w(sd, R511_CAM_LNDIV, 0x00);
3277
3278 /* YUV420, low pass filter on */
3279 reg_w(sd, R511_CAM_OPTS, 0x03);
3280
3281 /* Snapshot additions */
3282 reg_w(sd, R511_SNAP_PXCNT, hsegs);
3283 reg_w(sd, R511_SNAP_LNCNT, vsegs);
3284 reg_w(sd, R511_SNAP_PXDIV, 0x00);
3285 reg_w(sd, R511_SNAP_LNDIV, 0x00);
3286
3287 /******** Set the framerate ********/
3288 if (frame_rate > 0)
3289 sd->frame_rate = frame_rate;
3290
3291 switch (sd->sensor) {
3292 case SEN_OV6620:
3293 /* No framerate control, doesn't like higher rates yet */
3294 sd->clockdiv = 3;
3295 break;
3296
3297 /* Note once the FIXME's in mode_init_ov_sensor_regs() are fixed
3298 for more sensors we need to do this for them too */
3299 case SEN_OV7620:
3300 case SEN_OV7620AE:
3301 case SEN_OV7640:
3302 case SEN_OV7648:
3303 case SEN_OV76BE:
3304 if (sd->gspca_dev.width == 320)
3305 interlaced = 1;
3306 /* Fall through */
3307 case SEN_OV6630:
3308 case SEN_OV7610:
3309 case SEN_OV7670:
3310 switch (sd->frame_rate) {
3311 case 30:
3312 case 25:
3313 /* Not enough bandwidth to do 640x480 @ 30 fps */
3314 if (sd->gspca_dev.width != 640) {
3315 sd->clockdiv = 0;
3316 break;
3317 }
3318 /* Fall through for 640x480 case */
3319 default:
3320 /* case 20: */
3321 /* case 15: */
3322 sd->clockdiv = 1;
3323 break;
3324 case 10:
3325 sd->clockdiv = 2;
3326 break;
3327 case 5:
3328 sd->clockdiv = 5;
3329 break;
3330 }
3331 if (interlaced) {
3332 sd->clockdiv = (sd->clockdiv + 1) * 2 - 1;
3333 /* Higher then 10 does not work */
3334 if (sd->clockdiv > 10)
3335 sd->clockdiv = 10;
3336 }
3337 break;
3338
3339 case SEN_OV8610:
3340 /* No framerate control ?? */
3341 sd->clockdiv = 0;
3342 break;
3343 }
3344
3345 /* Check if we have enough bandwidth to disable compression */
3346 fps = (interlaced ? 60 : 30) / (sd->clockdiv + 1) + 1;
3347 needed = fps * sd->gspca_dev.width * sd->gspca_dev.height * 3 / 2;
3348 /* 1400 is a conservative estimate of the max nr of isoc packets/sec */
3349 if (needed > 1400 * packet_size) {
3350 /* Enable Y and UV quantization and compression */
3351 reg_w(sd, R511_COMP_EN, 0x07);
3352 reg_w(sd, R511_COMP_LUT_EN, 0x03);
3353 } else {
3354 reg_w(sd, R511_COMP_EN, 0x06);
3355 reg_w(sd, R511_COMP_LUT_EN, 0x00);
3356 }
3357
3358 reg_w(sd, R51x_SYS_RESET, OV511_RESET_OMNICE);
3359 reg_w(sd, R51x_SYS_RESET, 0);
3360
3361 return 0;
3362 }
3363
3364 /* Sets up the OV518/OV518+ with the given image parameters
3365 *
3366 * OV518 needs a completely different approach, until we can figure out what
3367 * the individual registers do. Also, only 15 FPS is supported now.
3368 *
3369 * Do not put any sensor-specific code in here (including I2C I/O functions)
3370 */
3371 static int ov518_mode_init_regs(struct sd *sd)
3372 {
3373 int hsegs, vsegs, packet_size;
3374 struct usb_host_interface *alt;
3375 struct usb_interface *intf;
3376
3377 intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3378 alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3379 if (!alt) {
3380 PDEBUG(D_ERR, "Couldn't get altsetting");
3381 return -EIO;
3382 }
3383
3384 packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3385 ov518_reg_w32(sd, R51x_FIFO_PSIZE, packet_size & ~7, 2);
3386
3387 /******** Set the mode ********/
3388
3389 reg_w(sd, 0x2b, 0);
3390 reg_w(sd, 0x2c, 0);
3391 reg_w(sd, 0x2d, 0);
3392 reg_w(sd, 0x2e, 0);
3393 reg_w(sd, 0x3b, 0);
3394 reg_w(sd, 0x3c, 0);
3395 reg_w(sd, 0x3d, 0);
3396 reg_w(sd, 0x3e, 0);
3397
3398 if (sd->bridge == BRIDGE_OV518) {
3399 /* Set 8-bit (YVYU) input format */
3400 reg_w_mask(sd, 0x20, 0x08, 0x08);
3401
3402 /* Set 12-bit (4:2:0) output format */
3403 reg_w_mask(sd, 0x28, 0x80, 0xf0);
3404 reg_w_mask(sd, 0x38, 0x80, 0xf0);
3405 } else {
3406 reg_w(sd, 0x28, 0x80);
3407 reg_w(sd, 0x38, 0x80);
3408 }
3409
3410 hsegs = sd->gspca_dev.width / 16;
3411 vsegs = sd->gspca_dev.height / 4;
3412
3413 reg_w(sd, 0x29, hsegs);
3414 reg_w(sd, 0x2a, vsegs);
3415
3416 reg_w(sd, 0x39, hsegs);
3417 reg_w(sd, 0x3a, vsegs);
3418
3419 /* Windows driver does this here; who knows why */
3420 reg_w(sd, 0x2f, 0x80);
3421
3422 /******** Set the framerate ********/
3423 sd->clockdiv = 1;
3424
3425 /* Mode independent, but framerate dependent, regs */
3426 /* 0x51: Clock divider; Only works on some cams which use 2 crystals */
3427 reg_w(sd, 0x51, 0x04);
3428 reg_w(sd, 0x22, 0x18);
3429 reg_w(sd, 0x23, 0xff);
3430
3431 if (sd->bridge == BRIDGE_OV518PLUS) {
3432 switch (sd->sensor) {
3433 case SEN_OV7620AE:
3434 if (sd->gspca_dev.width == 320) {
3435 reg_w(sd, 0x20, 0x00);
3436 reg_w(sd, 0x21, 0x19);
3437 } else {
3438 reg_w(sd, 0x20, 0x60);
3439 reg_w(sd, 0x21, 0x1f);
3440 }
3441 break;
3442 case SEN_OV7620:
3443 reg_w(sd, 0x20, 0x00);
3444 reg_w(sd, 0x21, 0x19);
3445 break;
3446 default:
3447 reg_w(sd, 0x21, 0x19);
3448 }
3449 } else
3450 reg_w(sd, 0x71, 0x17); /* Compression-related? */
3451
3452 /* FIXME: Sensor-specific */
3453 /* Bit 5 is what matters here. Of course, it is "reserved" */
3454 i2c_w(sd, 0x54, 0x23);
3455
3456 reg_w(sd, 0x2f, 0x80);
3457
3458 if (sd->bridge == BRIDGE_OV518PLUS) {
3459 reg_w(sd, 0x24, 0x94);
3460 reg_w(sd, 0x25, 0x90);
3461 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
3462 ov518_reg_w32(sd, 0xc6, 540, 2); /* 21ch */
3463 ov518_reg_w32(sd, 0xc7, 540, 2); /* 21ch */
3464 ov518_reg_w32(sd, 0xc8, 108, 2); /* 6ch */
3465 ov518_reg_w32(sd, 0xca, 131098, 3); /* 2001ah */
3466 ov518_reg_w32(sd, 0xcb, 532, 2); /* 214h */
3467 ov518_reg_w32(sd, 0xcc, 2400, 2); /* 960h */
3468 ov518_reg_w32(sd, 0xcd, 32, 2); /* 20h */
3469 ov518_reg_w32(sd, 0xce, 608, 2); /* 260h */
3470 } else {
3471 reg_w(sd, 0x24, 0x9f);
3472 reg_w(sd, 0x25, 0x90);
3473 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
3474 ov518_reg_w32(sd, 0xc6, 381, 2); /* 17dh */
3475 ov518_reg_w32(sd, 0xc7, 381, 2); /* 17dh */
3476 ov518_reg_w32(sd, 0xc8, 128, 2); /* 80h */
3477 ov518_reg_w32(sd, 0xca, 183331, 3); /* 2cc23h */
3478 ov518_reg_w32(sd, 0xcb, 746, 2); /* 2eah */
3479 ov518_reg_w32(sd, 0xcc, 1750, 2); /* 6d6h */
3480 ov518_reg_w32(sd, 0xcd, 45, 2); /* 2dh */
3481 ov518_reg_w32(sd, 0xce, 851, 2); /* 353h */
3482 }
3483
3484 reg_w(sd, 0x2f, 0x80);
3485
3486 return 0;
3487 }
3488
3489
3490 /* Sets up the OV519 with the given image parameters
3491 *
3492 * OV519 needs a completely different approach, until we can figure out what
3493 * the individual registers do.
3494 *
3495 * Do not put any sensor-specific code in here (including I2C I/O functions)
3496 */
3497 static int ov519_mode_init_regs(struct sd *sd)
3498 {
3499 static const struct ov_regvals mode_init_519_ov7670[] = {
3500 { 0x5d, 0x03 }, /* Turn off suspend mode */
3501 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3502 { 0x54, 0x0f }, /* bit2 (jpeg enable) */
3503 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3504 { 0xa3, 0x18 },
3505 { 0xa4, 0x04 },
3506 { 0xa5, 0x28 },
3507 { 0x37, 0x00 }, /* SetUsbInit */
3508 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3509 /* Enable both fields, YUV Input, disable defect comp (why?) */
3510 { 0x20, 0x0c },
3511 { 0x21, 0x38 },
3512 { 0x22, 0x1d },
3513 { 0x17, 0x50 }, /* undocumented */
3514 { 0x37, 0x00 }, /* undocumented */
3515 { 0x40, 0xff }, /* I2C timeout counter */
3516 { 0x46, 0x00 }, /* I2C clock prescaler */
3517 { 0x59, 0x04 }, /* new from windrv 090403 */
3518 { 0xff, 0x00 }, /* undocumented */
3519 /* windows reads 0x55 at this point, why? */
3520 };
3521
3522 static const struct ov_regvals mode_init_519[] = {
3523 { 0x5d, 0x03 }, /* Turn off suspend mode */
3524 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3525 { 0x54, 0x0f }, /* bit2 (jpeg enable) */
3526 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3527 { 0xa3, 0x18 },
3528 { 0xa4, 0x04 },
3529 { 0xa5, 0x28 },
3530 { 0x37, 0x00 }, /* SetUsbInit */
3531 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3532 /* Enable both fields, YUV Input, disable defect comp (why?) */
3533 { 0x22, 0x1d },
3534 { 0x17, 0x50 }, /* undocumented */
3535 { 0x37, 0x00 }, /* undocumented */
3536 { 0x40, 0xff }, /* I2C timeout counter */
3537 { 0x46, 0x00 }, /* I2C clock prescaler */
3538 { 0x59, 0x04 }, /* new from windrv 090403 */
3539 { 0xff, 0x00 }, /* undocumented */
3540 /* windows reads 0x55 at this point, why? */
3541 };
3542
3543 /******** Set the mode ********/
3544 if (sd->sensor != SEN_OV7670) {
3545 if (write_regvals(sd, mode_init_519,
3546 ARRAY_SIZE(mode_init_519)))
3547 return -EIO;
3548 if (sd->sensor == SEN_OV7640 ||
3549 sd->sensor == SEN_OV7648) {
3550 /* Select 8-bit input mode */
3551 reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10);
3552 }
3553 } else {
3554 if (write_regvals(sd, mode_init_519_ov7670,
3555 ARRAY_SIZE(mode_init_519_ov7670)))
3556 return -EIO;
3557 }
3558
3559 reg_w(sd, OV519_R10_H_SIZE, sd->gspca_dev.width >> 4);
3560 reg_w(sd, OV519_R11_V_SIZE, sd->gspca_dev.height >> 3);
3561 if (sd->sensor == SEN_OV7670 &&
3562 sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3563 reg_w(sd, OV519_R12_X_OFFSETL, 0x04);
3564 else if (sd->sensor == SEN_OV7648 &&
3565 sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3566 reg_w(sd, OV519_R12_X_OFFSETL, 0x01);
3567 else
3568 reg_w(sd, OV519_R12_X_OFFSETL, 0x00);
3569 reg_w(sd, OV519_R13_X_OFFSETH, 0x00);
3570 reg_w(sd, OV519_R14_Y_OFFSETL, 0x00);
3571 reg_w(sd, OV519_R15_Y_OFFSETH, 0x00);
3572 reg_w(sd, OV519_R16_DIVIDER, 0x00);
3573 reg_w(sd, OV519_R25_FORMAT, 0x03); /* YUV422 */
3574 reg_w(sd, 0x26, 0x00); /* Undocumented */
3575
3576 /******** Set the framerate ********/
3577 if (frame_rate > 0)
3578 sd->frame_rate = frame_rate;
3579
3580 /* FIXME: These are only valid at the max resolution. */
3581 sd->clockdiv = 0;
3582 switch (sd->sensor) {
3583 case SEN_OV7640:
3584 case SEN_OV7648:
3585 switch (sd->frame_rate) {
3586 default:
3587 /* case 30: */
3588 reg_w(sd, 0xa4, 0x0c);
3589 reg_w(sd, 0x23, 0xff);
3590 break;
3591 case 25:
3592 reg_w(sd, 0xa4, 0x0c);
3593 reg_w(sd, 0x23, 0x1f);
3594 break;
3595 case 20:
3596 reg_w(sd, 0xa4, 0x0c);
3597 reg_w(sd, 0x23, 0x1b);
3598 break;
3599 case 15:
3600 reg_w(sd, 0xa4, 0x04);
3601 reg_w(sd, 0x23, 0xff);
3602 sd->clockdiv = 1;
3603 break;
3604 case 10:
3605 reg_w(sd, 0xa4, 0x04);
3606 reg_w(sd, 0x23, 0x1f);
3607 sd->clockdiv = 1;
3608 break;
3609 case 5:
3610 reg_w(sd, 0xa4, 0x04);
3611 reg_w(sd, 0x23, 0x1b);
3612 sd->clockdiv = 1;
3613 break;
3614 }
3615 break;
3616 case SEN_OV8610:
3617 switch (sd->frame_rate) {
3618 default: /* 15 fps */
3619 /* case 15: */
3620 reg_w(sd, 0xa4, 0x06);
3621 reg_w(sd, 0x23, 0xff);
3622 break;
3623 case 10:
3624 reg_w(sd, 0xa4, 0x06);
3625 reg_w(sd, 0x23, 0x1f);
3626 break;
3627 case 5:
3628 reg_w(sd, 0xa4, 0x06);
3629 reg_w(sd, 0x23, 0x1b);
3630 break;
3631 }
3632 break;
3633 case SEN_OV7670: /* guesses, based on 7640 */
3634 PDEBUG(D_STREAM, "Setting framerate to %d fps",
3635 (sd->frame_rate == 0) ? 15 : sd->frame_rate);
3636 reg_w(sd, 0xa4, 0x10);
3637 switch (sd->frame_rate) {
3638 case 30:
3639 reg_w(sd, 0x23, 0xff);
3640 break;
3641 case 20:
3642 reg_w(sd, 0x23, 0x1b);
3643 break;
3644 default:
3645 /* case 15: */
3646 reg_w(sd, 0x23, 0xff);
3647 sd->clockdiv = 1;
3648 break;
3649 }
3650 break;
3651 }
3652 return 0;
3653 }
3654
3655 static int mode_init_ov_sensor_regs(struct sd *sd)
3656 {
3657 struct gspca_dev *gspca_dev;
3658 int qvga, xstart, xend, ystart, yend;
3659 __u8 v;
3660
3661 gspca_dev = &sd->gspca_dev;
3662 qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 1;
3663
3664 /******** Mode (VGA/QVGA) and sensor specific regs ********/
3665 switch (sd->sensor) {
3666 case SEN_OV2610:
3667 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3668 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3669 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
3670 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
3671 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3672 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
3673 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3674 return 0;
3675 case SEN_OV3610:
3676 if (qvga) {
3677 xstart = (1040 - gspca_dev->width) / 2 + (0x1f << 4);
3678 ystart = (776 - gspca_dev->height) / 2;
3679 } else {
3680 xstart = (2076 - gspca_dev->width) / 2 + (0x10 << 4);
3681 ystart = (1544 - gspca_dev->height) / 2;
3682 }
3683 xend = xstart + gspca_dev->width;
3684 yend = ystart + gspca_dev->height;
3685 /* Writing to the COMH register resets the other windowing regs
3686 to their default values, so we must do this first. */
3687 i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0xf0);
3688 i2c_w_mask(sd, 0x32,
3689 (((xend >> 1) & 7) << 3) | ((xstart >> 1) & 7),
3690 0x3f);
3691 i2c_w_mask(sd, 0x03,
3692 (((yend >> 1) & 3) << 2) | ((ystart >> 1) & 3),
3693 0x0f);
3694 i2c_w(sd, 0x17, xstart >> 4);
3695 i2c_w(sd, 0x18, xend >> 4);
3696 i2c_w(sd, 0x19, ystart >> 3);
3697 i2c_w(sd, 0x1a, yend >> 3);
3698 return 0;
3699 case SEN_OV8610:
3700 /* For OV8610 qvga means qsvga */
3701 i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5);
3702 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3703 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3704 i2c_w_mask(sd, 0x2d, 0x00, 0x40); /* from windrv 090403 */
3705 i2c_w_mask(sd, 0x28, 0x20, 0x20); /* progressive mode on */
3706 break;
3707 case SEN_OV7610:
3708 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3709 i2c_w(sd, 0x35, qvga?0x1e:0x9e);
3710 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3711 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3712 break;
3713 case SEN_OV7620:
3714 case SEN_OV7620AE:
3715 case SEN_OV76BE:
3716 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3717 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3718 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
3719 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
3720 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3721 i2c_w_mask(sd, 0x67, qvga ? 0xb0 : 0x90, 0xf0);
3722 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3723 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3724 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3725 if (sd->sensor == SEN_OV76BE)
3726 i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
3727 break;
3728 case SEN_OV7640:
3729 case SEN_OV7648:
3730 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3731 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3732 /* Setting this undocumented bit in qvga mode removes a very
3733 annoying vertical shaking of the image */
3734 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3735 /* Unknown */
3736 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
3737 /* Allow higher automatic gain (to allow higher framerates) */
3738 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3739 i2c_w_mask(sd, 0x12, 0x04, 0x04); /* AWB: 1 */
3740 break;
3741 case SEN_OV7670:
3742 /* set COM7_FMT_VGA or COM7_FMT_QVGA
3743 * do we need to set anything else?
3744 * HSTART etc are set in set_ov_sensor_window itself */
3745 i2c_w_mask(sd, OV7670_REG_COM7,
3746 qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA,
3747 OV7670_COM7_FMT_MASK);
3748 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3749 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_AWB,
3750 OV7670_COM8_AWB);
3751 if (qvga) { /* QVGA from ov7670.c by
3752 * Jonathan Corbet */
3753 xstart = 164;
3754 xend = 28;
3755 ystart = 14;
3756 yend = 494;
3757 } else { /* VGA */
3758 xstart = 158;
3759 xend = 14;
3760 ystart = 10;
3761 yend = 490;
3762 }
3763 /* OV7670 hardware window registers are split across
3764 * multiple locations */
3765 i2c_w(sd, OV7670_REG_HSTART, xstart >> 3);
3766 i2c_w(sd, OV7670_REG_HSTOP, xend >> 3);
3767 v = i2c_r(sd, OV7670_REG_HREF);
3768 v = (v & 0xc0) | ((xend & 0x7) << 3) | (xstart & 0x07);
3769 msleep(10); /* need to sleep between read and write to
3770 * same reg! */
3771 i2c_w(sd, OV7670_REG_HREF, v);
3772
3773 i2c_w(sd, OV7670_REG_VSTART, ystart >> 2);
3774 i2c_w(sd, OV7670_REG_VSTOP, yend >> 2);
3775 v = i2c_r(sd, OV7670_REG_VREF);
3776 v = (v & 0xc0) | ((yend & 0x3) << 2) | (ystart & 0x03);
3777 msleep(10); /* need to sleep between read and write to
3778 * same reg! */
3779 i2c_w(sd, OV7670_REG_VREF, v);
3780 break;
3781 case SEN_OV6620:
3782 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3783 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3784 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3785 break;
3786 case SEN_OV6630:
3787 case SEN_OV66308AF:
3788 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3789 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3790 break;
3791 default:
3792 return -EINVAL;
3793 }
3794
3795 /******** Clock programming ********/
3796 i2c_w(sd, 0x11, sd->clockdiv);
3797
3798 return 0;
3799 }
3800
3801 static void sethvflip(struct sd *sd)
3802 {
3803 if (sd->sensor != SEN_OV7670)
3804 return;
3805 if (sd->gspca_dev.streaming)
3806 ov51x_stop(sd);
3807 i2c_w_mask(sd, OV7670_REG_MVFP,
3808 OV7670_MVFP_MIRROR * sd->hflip
3809 | OV7670_MVFP_VFLIP * sd->vflip,
3810 OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP);
3811 if (sd->gspca_dev.streaming)
3812 ov51x_restart(sd);
3813 }
3814
3815 static int set_ov_sensor_window(struct sd *sd)
3816 {
3817 struct gspca_dev *gspca_dev;
3818 int qvga, crop;
3819 int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale;
3820 int ret;
3821
3822 /* mode setup is fully handled in mode_init_ov_sensor_regs for these */
3823 if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610 ||
3824 sd->sensor == SEN_OV7670)
3825 return mode_init_ov_sensor_regs(sd);
3826
3827 gspca_dev = &sd->gspca_dev;
3828 qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 1;
3829 crop = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 2;
3830
3831 /* The different sensor ICs handle setting up of window differently.
3832 * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */
3833 switch (sd->sensor) {
3834 case SEN_OV8610:
3835 hwsbase = 0x1e;
3836 hwebase = 0x1e;
3837 vwsbase = 0x02;
3838 vwebase = 0x02;
3839 break;
3840 case SEN_OV7610:
3841 case SEN_OV76BE:
3842 hwsbase = 0x38;
3843 hwebase = 0x3a;
3844 vwsbase = vwebase = 0x05;
3845 break;
3846 case SEN_OV6620:
3847 case SEN_OV6630:
3848 case SEN_OV66308AF:
3849 hwsbase = 0x38;
3850 hwebase = 0x3a;
3851 vwsbase = 0x05;
3852 vwebase = 0x06;
3853 if (sd->sensor == SEN_OV66308AF && qvga)
3854 /* HDG: this fixes U and V getting swapped */
3855 hwsbase++;
3856 if (crop) {
3857 hwsbase += 8;
3858 hwebase += 8;
3859 vwsbase += 11;
3860 vwebase += 11;
3861 }
3862 break;
3863 case SEN_OV7620:
3864 case SEN_OV7620AE:
3865 hwsbase = 0x2f; /* From 7620.SET (spec is wrong) */
3866 hwebase = 0x2f;
3867 vwsbase = vwebase = 0x05;
3868 break;
3869 case SEN_OV7640:
3870 case SEN_OV7648:
3871 hwsbase = 0x1a;
3872 hwebase = 0x1a;
3873 vwsbase = vwebase = 0x03;
3874 break;
3875 default:
3876 return -EINVAL;
3877 }
3878
3879 switch (sd->sensor) {
3880 case SEN_OV6620:
3881 case SEN_OV6630:
3882 case SEN_OV66308AF:
3883 if (qvga) { /* QCIF */
3884 hwscale = 0;
3885 vwscale = 0;
3886 } else { /* CIF */
3887 hwscale = 1;
3888 vwscale = 1; /* The datasheet says 0;
3889 * it's wrong */
3890 }
3891 break;
3892 case SEN_OV8610:
3893 if (qvga) { /* QSVGA */
3894 hwscale = 1;
3895 vwscale = 1;
3896 } else { /* SVGA */
3897 hwscale = 2;
3898 vwscale = 2;
3899 }
3900 break;
3901 default: /* SEN_OV7xx0 */
3902 if (qvga) { /* QVGA */
3903 hwscale = 1;
3904 vwscale = 0;
3905 } else { /* VGA */
3906 hwscale = 2;
3907 vwscale = 1;
3908 }
3909 }
3910
3911 ret = mode_init_ov_sensor_regs(sd);
3912 if (ret < 0)
3913 return ret;
3914
3915 i2c_w(sd, 0x17, hwsbase);
3916 i2c_w(sd, 0x18, hwebase + (sd->sensor_width >> hwscale));
3917 i2c_w(sd, 0x19, vwsbase);
3918 i2c_w(sd, 0x1a, vwebase + (sd->sensor_height >> vwscale));
3919
3920 return 0;
3921 }
3922
3923 /* -- start the camera -- */
3924 static int sd_start(struct gspca_dev *gspca_dev)
3925 {
3926 struct sd *sd = (struct sd *) gspca_dev;
3927 int ret = 0;
3928
3929 /* Default for most bridges, allow bridge_mode_init_regs to override */
3930 sd->sensor_width = sd->gspca_dev.width;
3931 sd->sensor_height = sd->gspca_dev.height;
3932
3933 switch (sd->bridge) {
3934 case BRIDGE_OV511:
3935 case BRIDGE_OV511PLUS:
3936 ret = ov511_mode_init_regs(sd);
3937 break;
3938 case BRIDGE_OV518:
3939 case BRIDGE_OV518PLUS:
3940 ret = ov518_mode_init_regs(sd);
3941 break;
3942 case BRIDGE_OV519:
3943 ret = ov519_mode_init_regs(sd);
3944 break;
3945 /* case BRIDGE_OVFX2: nothing to do */
3946 case BRIDGE_W9968CF:
3947 ret = w9968cf_mode_init_regs(sd);
3948 break;
3949 }
3950 if (ret < 0)
3951 goto out;
3952
3953 ret = set_ov_sensor_window(sd);
3954 if (ret < 0)
3955 goto out;
3956
3957 setcontrast(gspca_dev);
3958 setbrightness(gspca_dev);
3959 setcolors(gspca_dev);
3960 sethvflip(sd);
3961 setautobrightness(sd);
3962 setfreq(sd);
3963
3964 /* Force clear snapshot state in case the snapshot button was
3965 pressed while we weren't streaming */
3966 sd->snapshot_needs_reset = 1;
3967 sd_reset_snapshot(gspca_dev);
3968 sd->snapshot_pressed = 0;
3969
3970 sd->first_frame = 3;
3971
3972 ret = ov51x_restart(sd);
3973 if (ret < 0)
3974 goto out;
3975 ov51x_led_control(sd, 1);
3976 return 0;
3977 out:
3978 PDEBUG(D_ERR, "camera start error:%d", ret);
3979 return ret;
3980 }
3981
3982 static void sd_stopN(struct gspca_dev *gspca_dev)
3983 {
3984 struct sd *sd = (struct sd *) gspca_dev;
3985
3986 ov51x_stop(sd);
3987 ov51x_led_control(sd, 0);
3988 }
3989
3990 static void sd_stop0(struct gspca_dev *gspca_dev)
3991 {
3992 struct sd *sd = (struct sd *) gspca_dev;
3993
3994 if (sd->bridge == BRIDGE_W9968CF)
3995 w9968cf_stop0(sd);
3996 }
3997
3998 static void ov51x_handle_button(struct gspca_dev *gspca_dev, u8 state)
3999 {
4000 struct sd *sd = (struct sd *) gspca_dev;
4001
4002 if (sd->snapshot_pressed != state) {
4003 #ifdef CONFIG_INPUT
4004 input_report_key(gspca_dev->input_dev, KEY_CAMERA, state);
4005 input_sync(gspca_dev->input_dev);
4006 #endif
4007 if (state)
4008 sd->snapshot_needs_reset = 1;
4009
4010 sd->snapshot_pressed = state;
4011 } else {
4012 /* On the ov511 / ov519 we need to reset the button state
4013 multiple times, as resetting does not work as long as the
4014 button stays pressed */
4015 switch (sd->bridge) {
4016 case BRIDGE_OV511:
4017 case BRIDGE_OV511PLUS:
4018 case BRIDGE_OV519:
4019 if (state)
4020 sd->snapshot_needs_reset = 1;
4021 break;
4022 }
4023 }
4024 }
4025
4026 static void ov511_pkt_scan(struct gspca_dev *gspca_dev,
4027 u8 *in, /* isoc packet */
4028 int len) /* iso packet length */
4029 {
4030 struct sd *sd = (struct sd *) gspca_dev;
4031
4032 /* SOF/EOF packets have 1st to 8th bytes zeroed and the 9th
4033 * byte non-zero. The EOF packet has image width/height in the
4034 * 10th and 11th bytes. The 9th byte is given as follows:
4035 *
4036 * bit 7: EOF
4037 * 6: compression enabled
4038 * 5: 422/420/400 modes
4039 * 4: 422/420/400 modes
4040 * 3: 1
4041 * 2: snapshot button on
4042 * 1: snapshot frame
4043 * 0: even/odd field
4044 */
4045 if (!(in[0] | in[1] | in[2] | in[3] | in[4] | in[5] | in[6] | in[7]) &&
4046 (in[8] & 0x08)) {
4047 ov51x_handle_button(gspca_dev, (in[8] >> 2) & 1);
4048 if (in[8] & 0x80) {
4049 /* Frame end */
4050 if ((in[9] + 1) * 8 != gspca_dev->width ||
4051 (in[10] + 1) * 8 != gspca_dev->height) {
4052 PDEBUG(D_ERR, "Invalid frame size, got: %dx%d,"
4053 " requested: %dx%d\n",
4054 (in[9] + 1) * 8, (in[10] + 1) * 8,
4055 gspca_dev->width, gspca_dev->height);
4056 gspca_dev->last_packet_type = DISCARD_PACKET;
4057 return;
4058 }
4059 /* Add 11 byte footer to frame, might be usefull */
4060 gspca_frame_add(gspca_dev, LAST_PACKET, in, 11);
4061 return;
4062 } else {
4063 /* Frame start */
4064 gspca_frame_add(gspca_dev, FIRST_PACKET, in, 0);
4065 sd->packet_nr = 0;
4066 }
4067 }
4068
4069 /* Ignore the packet number */
4070 len--;
4071
4072 /* intermediate packet */
4073 gspca_frame_add(gspca_dev, INTER_PACKET, in, len);
4074 }
4075
4076 static void ov518_pkt_scan(struct gspca_dev *gspca_dev,
4077 u8 *data, /* isoc packet */
4078 int len) /* iso packet length */
4079 {
4080 struct sd *sd = (struct sd *) gspca_dev;
4081
4082 /* A false positive here is likely, until OVT gives me
4083 * the definitive SOF/EOF format */
4084 if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) {
4085 ov51x_handle_button(gspca_dev, (data[6] >> 1) & 1);
4086 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
4087 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4088 sd->packet_nr = 0;
4089 }
4090
4091 if (gspca_dev->last_packet_type == DISCARD_PACKET)
4092 return;
4093
4094 /* Does this device use packet numbers ? */
4095 if (len & 7) {
4096 len--;
4097 if (sd->packet_nr == data[len])
4098 sd->packet_nr++;
4099 /* The last few packets of the frame (which are all 0's
4100 except that they may contain part of the footer), are
4101 numbered 0 */
4102 else if (sd->packet_nr == 0 || data[len]) {
4103 PDEBUG(D_ERR, "Invalid packet nr: %d (expect: %d)",
4104 (int)data[len], (int)sd->packet_nr);
4105 gspca_dev->last_packet_type = DISCARD_PACKET;
4106 return;
4107 }
4108 }
4109
4110 /* intermediate packet */
4111 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4112 }
4113
4114 static void ov519_pkt_scan(struct gspca_dev *gspca_dev,
4115 u8 *data, /* isoc packet */
4116 int len) /* iso packet length */
4117 {
4118 /* Header of ov519 is 16 bytes:
4119 * Byte Value Description
4120 * 0 0xff magic
4121 * 1 0xff magic
4122 * 2 0xff magic
4123 * 3 0xXX 0x50 = SOF, 0x51 = EOF
4124 * 9 0xXX 0x01 initial frame without data,
4125 * 0x00 standard frame with image
4126 * 14 Lo in EOF: length of image data / 8
4127 * 15 Hi
4128 */
4129
4130 if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) {
4131 switch (data[3]) {
4132 case 0x50: /* start of frame */
4133 /* Don't check the button state here, as the state
4134 usually (always ?) changes at EOF and checking it
4135 here leads to unnecessary snapshot state resets. */
4136 #define HDRSZ 16
4137 data += HDRSZ;
4138 len -= HDRSZ;
4139 #undef HDRSZ
4140 if (data[0] == 0xff || data[1] == 0xd8)
4141 gspca_frame_add(gspca_dev, FIRST_PACKET,
4142 data, len);
4143 else
4144 gspca_dev->last_packet_type = DISCARD_PACKET;
4145 return;
4146 case 0x51: /* end of frame */
4147 ov51x_handle_button(gspca_dev, data[11] & 1);
4148 if (data[9] != 0)
4149 gspca_dev->last_packet_type = DISCARD_PACKET;
4150 gspca_frame_add(gspca_dev, LAST_PACKET,
4151 NULL, 0);
4152 return;
4153 }
4154 }
4155
4156 /* intermediate packet */
4157 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4158 }
4159
4160 static void ovfx2_pkt_scan(struct gspca_dev *gspca_dev,
4161 u8 *data, /* isoc packet */
4162 int len) /* iso packet length */
4163 {
4164 struct sd *sd = (struct sd *) gspca_dev;
4165
4166 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4167
4168 /* A short read signals EOF */
4169 if (len < OVFX2_BULK_SIZE) {
4170 /* If the frame is short, and it is one of the first ones
4171 the sensor and bridge are still syncing, so drop it. */
4172 if (sd->first_frame) {
4173 sd->first_frame--;
4174 if (gspca_dev->image_len <
4175 sd->gspca_dev.width * sd->gspca_dev.height)
4176 gspca_dev->last_packet_type = DISCARD_PACKET;
4177 }
4178 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
4179 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4180 }
4181 }
4182
4183 static void sd_pkt_scan(struct gspca_dev *gspca_dev,
4184 u8 *data, /* isoc packet */
4185 int len) /* iso packet length */
4186 {
4187 struct sd *sd = (struct sd *) gspca_dev;
4188
4189 switch (sd->bridge) {
4190 case BRIDGE_OV511:
4191 case BRIDGE_OV511PLUS:
4192 ov511_pkt_scan(gspca_dev, data, len);
4193 break;
4194 case BRIDGE_OV518:
4195 case BRIDGE_OV518PLUS:
4196 ov518_pkt_scan(gspca_dev, data, len);
4197 break;
4198 case BRIDGE_OV519:
4199 ov519_pkt_scan(gspca_dev, data, len);
4200 break;
4201 case BRIDGE_OVFX2:
4202 ovfx2_pkt_scan(gspca_dev, data, len);
4203 break;
4204 case BRIDGE_W9968CF:
4205 w9968cf_pkt_scan(gspca_dev, data, len);
4206 break;
4207 }
4208 }
4209
4210 /* -- management routines -- */
4211
4212 static void setbrightness(struct gspca_dev *gspca_dev)
4213 {
4214 struct sd *sd = (struct sd *) gspca_dev;
4215 int val;
4216
4217 val = sd->brightness;
4218 switch (sd->sensor) {
4219 case SEN_OV8610:
4220 case SEN_OV7610:
4221 case SEN_OV76BE:
4222 case SEN_OV6620:
4223 case SEN_OV6630:
4224 case SEN_OV66308AF:
4225 case SEN_OV7640:
4226 case SEN_OV7648:
4227 i2c_w(sd, OV7610_REG_BRT, val);
4228 break;
4229 case SEN_OV7620:
4230 case SEN_OV7620AE:
4231 /* 7620 doesn't like manual changes when in auto mode */
4232 if (!sd->autobrightness)
4233 i2c_w(sd, OV7610_REG_BRT, val);
4234 break;
4235 case SEN_OV7670:
4236 /*win trace
4237 * i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_AEC); */
4238 i2c_w(sd, OV7670_REG_BRIGHT, ov7670_abs_to_sm(val));
4239 break;
4240 }
4241 }
4242
4243 static void setcontrast(struct gspca_dev *gspca_dev)
4244 {
4245 struct sd *sd = (struct sd *) gspca_dev;
4246 int val;
4247
4248 val = sd->contrast;
4249 switch (sd->sensor) {
4250 case SEN_OV7610:
4251 case SEN_OV6620:
4252 i2c_w(sd, OV7610_REG_CNT, val);
4253 break;
4254 case SEN_OV6630:
4255 case SEN_OV66308AF:
4256 i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f);
4257 break;
4258 case SEN_OV8610: {
4259 static const __u8 ctab[] = {
4260 0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f
4261 };
4262
4263 /* Use Y gamma control instead. Bit 0 enables it. */
4264 i2c_w(sd, 0x64, ctab[val >> 5]);
4265 break;
4266 }
4267 case SEN_OV7620:
4268 case SEN_OV7620AE: {
4269 static const __u8 ctab[] = {
4270 0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57,
4271 0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff
4272 };
4273
4274 /* Use Y gamma control instead. Bit 0 enables it. */
4275 i2c_w(sd, 0x64, ctab[val >> 4]);
4276 break;
4277 }
4278 case SEN_OV7670:
4279 /* check that this isn't just the same as ov7610 */
4280 i2c_w(sd, OV7670_REG_CONTRAS, val >> 1);
4281 break;
4282 }
4283 }
4284
4285 static void setcolors(struct gspca_dev *gspca_dev)
4286 {
4287 struct sd *sd = (struct sd *) gspca_dev;
4288 int val;
4289
4290 val = sd->colors;
4291 switch (sd->sensor) {
4292 case SEN_OV8610:
4293 case SEN_OV7610:
4294 case SEN_OV76BE:
4295 case SEN_OV6620:
4296 case SEN_OV6630:
4297 case SEN_OV66308AF:
4298 i2c_w(sd, OV7610_REG_SAT, val);
4299 break;
4300 case SEN_OV7620:
4301 case SEN_OV7620AE:
4302 /* Use UV gamma control instead. Bits 0 & 7 are reserved. */
4303 /* rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e);
4304 if (rc < 0)
4305 goto out; */
4306 i2c_w(sd, OV7610_REG_SAT, val);
4307 break;
4308 case SEN_OV7640:
4309 case SEN_OV7648:
4310 i2c_w(sd, OV7610_REG_SAT, val & 0xf0);
4311 break;
4312 case SEN_OV7670:
4313 /* supported later once I work out how to do it
4314 * transparently fail now! */
4315 /* set REG_COM13 values for UV sat auto mode */
4316 break;
4317 }
4318 }
4319
4320 static void setautobrightness(struct sd *sd)
4321 {
4322 if (sd->sensor == SEN_OV7640 || sd->sensor == SEN_OV7648 ||
4323 sd->sensor == SEN_OV7670 ||
4324 sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610)
4325 return;
4326
4327 i2c_w_mask(sd, 0x2d, sd->autobrightness ? 0x10 : 0x00, 0x10);
4328 }
4329
4330 static void setfreq(struct sd *sd)
4331 {
4332 if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610)
4333 return;
4334
4335 if (sd->sensor == SEN_OV7670) {
4336 switch (sd->freq) {
4337 case 0: /* Banding filter disabled */
4338 i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_BFILT);
4339 break;
4340 case 1: /* 50 hz */
4341 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
4342 OV7670_COM8_BFILT);
4343 i2c_w_mask(sd, OV7670_REG_COM11, 0x08, 0x18);
4344 break;
4345 case 2: /* 60 hz */
4346 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
4347 OV7670_COM8_BFILT);
4348 i2c_w_mask(sd, OV7670_REG_COM11, 0x00, 0x18);
4349 break;
4350 case 3: /* Auto hz */
4351 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
4352 OV7670_COM8_BFILT);
4353 i2c_w_mask(sd, OV7670_REG_COM11, OV7670_COM11_HZAUTO,
4354 0x18);
4355 break;
4356 }
4357 } else {
4358 switch (sd->freq) {
4359 case 0: /* Banding filter disabled */
4360 i2c_w_mask(sd, 0x2d, 0x00, 0x04);
4361 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4362 break;
4363 case 1: /* 50 hz (filter on and framerate adj) */
4364 i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4365 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4366 /* 20 fps -> 16.667 fps */
4367 if (sd->sensor == SEN_OV6620 ||
4368 sd->sensor == SEN_OV6630 ||
4369 sd->sensor == SEN_OV66308AF)
4370 i2c_w(sd, 0x2b, 0x5e);
4371 else
4372 i2c_w(sd, 0x2b, 0xac);
4373 break;
4374 case 2: /* 60 hz (filter on, ...) */
4375 i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4376 if (sd->sensor == SEN_OV6620 ||
4377 sd->sensor == SEN_OV6630 ||
4378 sd->sensor == SEN_OV66308AF) {
4379 /* 20 fps -> 15 fps */
4380 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4381 i2c_w(sd, 0x2b, 0xa8);
4382 } else {
4383 /* no framerate adj. */
4384 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4385 }
4386 break;
4387 }
4388 }
4389 }
4390
4391 static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val)
4392 {
4393 struct sd *sd = (struct sd *) gspca_dev;
4394
4395 sd->brightness = val;
4396 if (gspca_dev->streaming)
4397 setbrightness(gspca_dev);
4398 return 0;
4399 }
4400
4401 static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val)
4402 {
4403 struct sd *sd = (struct sd *) gspca_dev;
4404
4405 *val = sd->brightness;
4406 return 0;
4407 }
4408
4409 static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val)
4410 {
4411 struct sd *sd = (struct sd *) gspca_dev;
4412
4413 sd->contrast = val;
4414 if (gspca_dev->streaming)
4415 setcontrast(gspca_dev);
4416 return 0;
4417 }
4418
4419 static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val)
4420 {
4421 struct sd *sd = (struct sd *) gspca_dev;
4422
4423 *val = sd->contrast;
4424 return 0;
4425 }
4426
4427 static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val)
4428 {
4429 struct sd *sd = (struct sd *) gspca_dev;
4430
4431 sd->colors = val;
4432 if (gspca_dev->streaming)
4433 setcolors(gspca_dev);
4434 return 0;
4435 }
4436
4437 static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val)
4438 {
4439 struct sd *sd = (struct sd *) gspca_dev;
4440
4441 *val = sd->colors;
4442 return 0;
4443 }
4444
4445 static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val)
4446 {
4447 struct sd *sd = (struct sd *) gspca_dev;
4448
4449 sd->hflip = val;
4450 if (gspca_dev->streaming)
4451 sethvflip(sd);
4452 return 0;
4453 }
4454
4455 static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val)
4456 {
4457 struct sd *sd = (struct sd *) gspca_dev;
4458
4459 *val = sd->hflip;
4460 return 0;
4461 }
4462
4463 static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val)
4464 {
4465 struct sd *sd = (struct sd *) gspca_dev;
4466
4467 sd->vflip = val;
4468 if (gspca_dev->streaming)
4469 sethvflip(sd);
4470 return 0;
4471 }
4472
4473 static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val)
4474 {
4475 struct sd *sd = (struct sd *) gspca_dev;
4476
4477 *val = sd->vflip;
4478 return 0;
4479 }
4480
4481 static int sd_setautobrightness(struct gspca_dev *gspca_dev, __s32 val)
4482 {
4483 struct sd *sd = (struct sd *) gspca_dev;
4484
4485 sd->autobrightness = val;
4486 if (gspca_dev->streaming)
4487 setautobrightness(sd);
4488 return 0;
4489 }
4490
4491 static int sd_getautobrightness(struct gspca_dev *gspca_dev, __s32 *val)
4492 {
4493 struct sd *sd = (struct sd *) gspca_dev;
4494
4495 *val = sd->autobrightness;
4496 return 0;
4497 }
4498
4499 static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val)
4500 {
4501 struct sd *sd = (struct sd *) gspca_dev;
4502
4503 sd->freq = val;
4504 if (gspca_dev->streaming) {
4505 setfreq(sd);
4506 /* Ugly but necessary */
4507 if (sd->bridge == BRIDGE_W9968CF)
4508 w9968cf_set_crop_window(sd);
4509 }
4510 return 0;
4511 }
4512
4513 static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val)
4514 {
4515 struct sd *sd = (struct sd *) gspca_dev;
4516
4517 *val = sd->freq;
4518 return 0;
4519 }
4520
4521 static int sd_querymenu(struct gspca_dev *gspca_dev,
4522 struct v4l2_querymenu *menu)
4523 {
4524 struct sd *sd = (struct sd *) gspca_dev;
4525
4526 switch (menu->id) {
4527 case V4L2_CID_POWER_LINE_FREQUENCY:
4528 switch (menu->index) {
4529 case 0: /* V4L2_CID_POWER_LINE_FREQUENCY_DISABLED */
4530 strcpy((char *) menu->name, "NoFliker");
4531 return 0;
4532 case 1: /* V4L2_CID_POWER_LINE_FREQUENCY_50HZ */
4533 strcpy((char *) menu->name, "50 Hz");
4534 return 0;
4535 case 2: /* V4L2_CID_POWER_LINE_FREQUENCY_60HZ */
4536 strcpy((char *) menu->name, "60 Hz");
4537 return 0;
4538 case 3:
4539 if (sd->sensor != SEN_OV7670)
4540 return -EINVAL;
4541
4542 strcpy((char *) menu->name, "Automatic");
4543 return 0;
4544 }
4545 break;
4546 }
4547 return -EINVAL;
4548 }
4549
4550 static int sd_get_jcomp(struct gspca_dev *gspca_dev,
4551 struct v4l2_jpegcompression *jcomp)
4552 {
4553 struct sd *sd = (struct sd *) gspca_dev;
4554
4555 if (sd->bridge != BRIDGE_W9968CF)
4556 return -EINVAL;
4557
4558 memset(jcomp, 0, sizeof *jcomp);
4559 jcomp->quality = sd->quality;
4560 jcomp->jpeg_markers = V4L2_JPEG_MARKER_DHT | V4L2_JPEG_MARKER_DQT |
4561 V4L2_JPEG_MARKER_DRI;
4562 return 0;
4563 }
4564
4565 static int sd_set_jcomp(struct gspca_dev *gspca_dev,
4566 struct v4l2_jpegcompression *jcomp)
4567 {
4568 struct sd *sd = (struct sd *) gspca_dev;
4569
4570 if (sd->bridge != BRIDGE_W9968CF)
4571 return -EINVAL;
4572
4573 if (gspca_dev->streaming)
4574 return -EBUSY;
4575
4576 if (jcomp->quality < QUALITY_MIN)
4577 sd->quality = QUALITY_MIN;
4578 else if (jcomp->quality > QUALITY_MAX)
4579 sd->quality = QUALITY_MAX;
4580 else
4581 sd->quality = jcomp->quality;
4582
4583 /* Return resulting jcomp params to app */
4584 sd_get_jcomp(gspca_dev, jcomp);
4585
4586 return 0;
4587 }
4588
4589 /* sub-driver description */
4590 static const struct sd_desc sd_desc = {
4591 .name = MODULE_NAME,
4592 .ctrls = sd_ctrls,
4593 .nctrls = ARRAY_SIZE(sd_ctrls),
4594 .config = sd_config,
4595 .init = sd_init,
4596 .start = sd_start,
4597 .stopN = sd_stopN,
4598 .stop0 = sd_stop0,
4599 .pkt_scan = sd_pkt_scan,
4600 .dq_callback = sd_reset_snapshot,
4601 .querymenu = sd_querymenu,
4602 .get_jcomp = sd_get_jcomp,
4603 .set_jcomp = sd_set_jcomp,
4604 #ifdef CONFIG_INPUT
4605 .other_input = 1,
4606 #endif
4607 };
4608
4609 /* -- module initialisation -- */
4610 static const __devinitdata struct usb_device_id device_table[] = {
4611 {USB_DEVICE(0x041e, 0x4003), .driver_info = BRIDGE_W9968CF },
4612 {USB_DEVICE(0x041e, 0x4052), .driver_info = BRIDGE_OV519 },
4613 {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 },
4614 {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 },
4615 {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 },
4616 {USB_DEVICE(0x041e, 0x4064),
4617 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4618 {USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 },
4619 {USB_DEVICE(0x041e, 0x4068),
4620 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4621 {USB_DEVICE(0x045e, 0x028c), .driver_info = BRIDGE_OV519 },
4622 {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 },
4623 {USB_DEVICE(0x054c, 0x0155),
4624 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4625 {USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 },
4626 {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 },
4627 {USB_DEVICE(0x05a9, 0x0519), .driver_info = BRIDGE_OV519 },
4628 {USB_DEVICE(0x05a9, 0x0530), .driver_info = BRIDGE_OV519 },
4629 {USB_DEVICE(0x05a9, 0x2800), .driver_info = BRIDGE_OVFX2 },
4630 {USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 },
4631 {USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 },
4632 {USB_DEVICE(0x05a9, 0xa511), .driver_info = BRIDGE_OV511PLUS },
4633 {USB_DEVICE(0x05a9, 0xa518), .driver_info = BRIDGE_OV518PLUS },
4634 {USB_DEVICE(0x0813, 0x0002), .driver_info = BRIDGE_OV511PLUS },
4635 {USB_DEVICE(0x0b62, 0x0059), .driver_info = BRIDGE_OVFX2 },
4636 {USB_DEVICE(0x0e96, 0xc001), .driver_info = BRIDGE_OVFX2 },
4637 {USB_DEVICE(0x1046, 0x9967), .driver_info = BRIDGE_W9968CF },
4638 {USB_DEVICE(0x8020, 0xEF04), .driver_info = BRIDGE_OVFX2 },
4639 {}
4640 };
4641
4642 MODULE_DEVICE_TABLE(usb, device_table);
4643
4644 /* -- device connect -- */
4645 static int sd_probe(struct usb_interface *intf,
4646 const struct usb_device_id *id)
4647 {
4648 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
4649 THIS_MODULE);
4650 }
4651
4652 static struct usb_driver sd_driver = {
4653 .name = MODULE_NAME,
4654 .id_table = device_table,
4655 .probe = sd_probe,
4656 .disconnect = gspca_disconnect,
4657 #ifdef CONFIG_PM
4658 .suspend = gspca_suspend,
4659 .resume = gspca_resume,
4660 #endif
4661 };
4662
4663 /* -- module insert / remove -- */
4664 static int __init sd_mod_init(void)
4665 {
4666 int ret;
4667 ret = usb_register(&sd_driver);
4668 if (ret < 0)
4669 return ret;
4670 PDEBUG(D_PROBE, "registered");
4671 return 0;
4672 }
4673 static void __exit sd_mod_exit(void)
4674 {
4675 usb_deregister(&sd_driver);
4676 PDEBUG(D_PROBE, "deregistered");
4677 }
4678
4679 module_init(sd_mod_init);
4680 module_exit(sd_mod_exit);
4681
4682 module_param(frame_rate, int, 0644);
4683 MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)");
Linux kernel - Deliverables
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