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[media] gspca: Fix coding style issues
[deliverable/linux.git] / drivers / media / video / gspca / ov519.c
1 /**
2 * OV519 driver
3 *
4 * Copyright (C) 2008 Jean-Francois Moine (http://moinejf.free.fr)
5 * Copyright (C) 2009 Hans de Goede <hdegoede@redhat.com>
6 *
7 * This module is adapted from the ov51x-jpeg package, which itself
8 * was adapted from the ov511 driver.
9 *
10 * Original copyright for the ov511 driver is:
11 *
12 * Copyright (c) 1999-2006 Mark W. McClelland
13 * Support for OV519, OV8610 Copyright (c) 2003 Joerg Heckenbach
14 * Many improvements by Bret Wallach <bwallac1@san.rr.com>
15 * Color fixes by by Orion Sky Lawlor <olawlor@acm.org> (2/26/2000)
16 * OV7620 fixes by Charl P. Botha <cpbotha@ieee.org>
17 * Changes by Claudio Matsuoka <claudio@conectiva.com>
18 *
19 * ov51x-jpeg original copyright is:
20 *
21 * Copyright (c) 2004-2007 Romain Beauxis <toots@rastageeks.org>
22 * Support for OV7670 sensors was contributed by Sam Skipsey <aoanla@yahoo.com>
23 *
24 * This program is free software; you can redistribute it and/or modify
25 * it under the terms of the GNU General Public License as published by
26 * the Free Software Foundation; either version 2 of the License, or
27 * any later version.
28 *
29 * This program is distributed in the hope that it will be useful,
30 * but WITHOUT ANY WARRANTY; without even the implied warranty of
31 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
32 * GNU General Public License for more details.
33 *
34 * You should have received a copy of the GNU General Public License
35 * along with this program; if not, write to the Free Software
36 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
37 *
38 */
39 #define MODULE_NAME "ov519"
40
41 #include <linux/input.h>
42 #include "gspca.h"
43
44 /* The jpeg_hdr is used by w996Xcf only */
45 /* The CONEX_CAM define for jpeg.h needs renaming, now its used here too */
46 #define CONEX_CAM
47 #include "jpeg.h"
48
49 MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
50 MODULE_DESCRIPTION("OV519 USB Camera Driver");
51 MODULE_LICENSE("GPL");
52
53 /* global parameters */
54 static int frame_rate;
55
56 /* Number of times to retry a failed I2C transaction. Increase this if you
57 * are getting "Failed to read sensor ID..." */
58 static int i2c_detect_tries = 10;
59
60 /* controls */
61 enum e_ctrl {
62 BRIGHTNESS,
63 CONTRAST,
64 COLORS,
65 HFLIP,
66 VFLIP,
67 AUTOBRIGHT,
68 FREQ,
69 NCTRL /* number of controls */
70 };
71
72 /* ov519 device descriptor */
73 struct sd {
74 struct gspca_dev gspca_dev; /* !! must be the first item */
75
76 struct gspca_ctrl ctrls[NCTRL];
77
78 __u8 packet_nr;
79
80 char bridge;
81 #define BRIDGE_OV511 0
82 #define BRIDGE_OV511PLUS 1
83 #define BRIDGE_OV518 2
84 #define BRIDGE_OV518PLUS 3
85 #define BRIDGE_OV519 4
86 #define BRIDGE_OVFX2 5
87 #define BRIDGE_W9968CF 6
88 #define BRIDGE_MASK 7
89
90 char invert_led;
91 #define BRIDGE_INVERT_LED 8
92
93 char snapshot_pressed;
94 char snapshot_needs_reset;
95
96 /* Determined by sensor type */
97 __u8 sif;
98
99 __u8 quality;
100 #define QUALITY_MIN 50
101 #define QUALITY_MAX 70
102 #define QUALITY_DEF 50
103
104 __u8 stopped; /* Streaming is temporarily paused */
105 __u8 first_frame;
106
107 __u8 frame_rate; /* current Framerate */
108 __u8 clockdiv; /* clockdiv override */
109
110 char sensor; /* Type of image sensor chip (SEN_*) */
111 #define SEN_UNKNOWN 0
112 #define SEN_OV2610 1
113 #define SEN_OV3610 2
114 #define SEN_OV6620 3
115 #define SEN_OV6630 4
116 #define SEN_OV66308AF 5
117 #define SEN_OV7610 6
118 #define SEN_OV7620 7
119 #define SEN_OV7620AE 8
120 #define SEN_OV7640 9
121 #define SEN_OV7648 10
122 #define SEN_OV7670 11
123 #define SEN_OV76BE 12
124 #define SEN_OV8610 13
125
126 u8 sensor_addr;
127 int sensor_width;
128 int sensor_height;
129 int sensor_reg_cache[256];
130
131 u8 jpeg_hdr[JPEG_HDR_SZ];
132 };
133
134 /* Note this is a bit of a hack, but the w9968cf driver needs the code for all
135 the ov sensors which is already present here. When we have the time we
136 really should move the sensor drivers to v4l2 sub drivers. */
137 #include "w996Xcf.c"
138
139 /* V4L2 controls supported by the driver */
140 static void setbrightness(struct gspca_dev *gspca_dev);
141 static void setcontrast(struct gspca_dev *gspca_dev);
142 static void setcolors(struct gspca_dev *gspca_dev);
143 static void sethvflip(struct gspca_dev *gspca_dev);
144 static void setautobright(struct gspca_dev *gspca_dev);
145 static void setfreq(struct gspca_dev *gspca_dev);
146 static void setfreq_i(struct sd *sd);
147
148 static const struct ctrl sd_ctrls[] = {
149 [BRIGHTNESS] = {
150 {
151 .id = V4L2_CID_BRIGHTNESS,
152 .type = V4L2_CTRL_TYPE_INTEGER,
153 .name = "Brightness",
154 .minimum = 0,
155 .maximum = 255,
156 .step = 1,
157 .default_value = 127,
158 },
159 .set_control = setbrightness,
160 },
161 [CONTRAST] = {
162 {
163 .id = V4L2_CID_CONTRAST,
164 .type = V4L2_CTRL_TYPE_INTEGER,
165 .name = "Contrast",
166 .minimum = 0,
167 .maximum = 255,
168 .step = 1,
169 .default_value = 127,
170 },
171 .set_control = setcontrast,
172 },
173 [COLORS] = {
174 {
175 .id = V4L2_CID_SATURATION,
176 .type = V4L2_CTRL_TYPE_INTEGER,
177 .name = "Color",
178 .minimum = 0,
179 .maximum = 255,
180 .step = 1,
181 .default_value = 127,
182 },
183 .set_control = setcolors,
184 },
185 /* The flip controls work with ov7670 only */
186 [HFLIP] = {
187 {
188 .id = V4L2_CID_HFLIP,
189 .type = V4L2_CTRL_TYPE_BOOLEAN,
190 .name = "Mirror",
191 .minimum = 0,
192 .maximum = 1,
193 .step = 1,
194 .default_value = 0,
195 },
196 .set_control = sethvflip,
197 },
198 [VFLIP] = {
199 {
200 .id = V4L2_CID_VFLIP,
201 .type = V4L2_CTRL_TYPE_BOOLEAN,
202 .name = "Vflip",
203 .minimum = 0,
204 .maximum = 1,
205 .step = 1,
206 .default_value = 0,
207 },
208 .set_control = sethvflip,
209 },
210 [AUTOBRIGHT] = {
211 {
212 .id = V4L2_CID_AUTOBRIGHTNESS,
213 .type = V4L2_CTRL_TYPE_BOOLEAN,
214 .name = "Auto Brightness",
215 .minimum = 0,
216 .maximum = 1,
217 .step = 1,
218 .default_value = 1,
219 },
220 .set_control = setautobright,
221 },
222 [FREQ] = {
223 {
224 .id = V4L2_CID_POWER_LINE_FREQUENCY,
225 .type = V4L2_CTRL_TYPE_MENU,
226 .name = "Light frequency filter",
227 .minimum = 0,
228 .maximum = 2, /* 0: 0, 1: 50Hz, 2:60Hz */
229 .step = 1,
230 .default_value = 0,
231 },
232 .set_control = setfreq,
233 },
234 };
235
236 static const struct v4l2_pix_format ov519_vga_mode[] = {
237 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
238 .bytesperline = 320,
239 .sizeimage = 320 * 240 * 3 / 8 + 590,
240 .colorspace = V4L2_COLORSPACE_JPEG,
241 .priv = 1},
242 {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
243 .bytesperline = 640,
244 .sizeimage = 640 * 480 * 3 / 8 + 590,
245 .colorspace = V4L2_COLORSPACE_JPEG,
246 .priv = 0},
247 };
248 static const struct v4l2_pix_format ov519_sif_mode[] = {
249 {160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
250 .bytesperline = 160,
251 .sizeimage = 160 * 120 * 3 / 8 + 590,
252 .colorspace = V4L2_COLORSPACE_JPEG,
253 .priv = 3},
254 {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
255 .bytesperline = 176,
256 .sizeimage = 176 * 144 * 3 / 8 + 590,
257 .colorspace = V4L2_COLORSPACE_JPEG,
258 .priv = 1},
259 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
260 .bytesperline = 320,
261 .sizeimage = 320 * 240 * 3 / 8 + 590,
262 .colorspace = V4L2_COLORSPACE_JPEG,
263 .priv = 2},
264 {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
265 .bytesperline = 352,
266 .sizeimage = 352 * 288 * 3 / 8 + 590,
267 .colorspace = V4L2_COLORSPACE_JPEG,
268 .priv = 0},
269 };
270
271 /* Note some of the sizeimage values for the ov511 / ov518 may seem
272 larger then necessary, however they need to be this big as the ov511 /
273 ov518 always fills the entire isoc frame, using 0 padding bytes when
274 it doesn't have any data. So with low framerates the amount of data
275 transfered can become quite large (libv4l will remove all the 0 padding
276 in userspace). */
277 static const struct v4l2_pix_format ov518_vga_mode[] = {
278 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
279 .bytesperline = 320,
280 .sizeimage = 320 * 240 * 3,
281 .colorspace = V4L2_COLORSPACE_JPEG,
282 .priv = 1},
283 {640, 480, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
284 .bytesperline = 640,
285 .sizeimage = 640 * 480 * 2,
286 .colorspace = V4L2_COLORSPACE_JPEG,
287 .priv = 0},
288 };
289 static const struct v4l2_pix_format ov518_sif_mode[] = {
290 {160, 120, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
291 .bytesperline = 160,
292 .sizeimage = 70000,
293 .colorspace = V4L2_COLORSPACE_JPEG,
294 .priv = 3},
295 {176, 144, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
296 .bytesperline = 176,
297 .sizeimage = 70000,
298 .colorspace = V4L2_COLORSPACE_JPEG,
299 .priv = 1},
300 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
301 .bytesperline = 320,
302 .sizeimage = 320 * 240 * 3,
303 .colorspace = V4L2_COLORSPACE_JPEG,
304 .priv = 2},
305 {352, 288, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
306 .bytesperline = 352,
307 .sizeimage = 352 * 288 * 3,
308 .colorspace = V4L2_COLORSPACE_JPEG,
309 .priv = 0},
310 };
311
312 static const struct v4l2_pix_format ov511_vga_mode[] = {
313 {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
314 .bytesperline = 320,
315 .sizeimage = 320 * 240 * 3,
316 .colorspace = V4L2_COLORSPACE_JPEG,
317 .priv = 1},
318 {640, 480, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
319 .bytesperline = 640,
320 .sizeimage = 640 * 480 * 2,
321 .colorspace = V4L2_COLORSPACE_JPEG,
322 .priv = 0},
323 };
324 static const struct v4l2_pix_format ov511_sif_mode[] = {
325 {160, 120, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
326 .bytesperline = 160,
327 .sizeimage = 70000,
328 .colorspace = V4L2_COLORSPACE_JPEG,
329 .priv = 3},
330 {176, 144, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
331 .bytesperline = 176,
332 .sizeimage = 70000,
333 .colorspace = V4L2_COLORSPACE_JPEG,
334 .priv = 1},
335 {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
336 .bytesperline = 320,
337 .sizeimage = 320 * 240 * 3,
338 .colorspace = V4L2_COLORSPACE_JPEG,
339 .priv = 2},
340 {352, 288, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
341 .bytesperline = 352,
342 .sizeimage = 352 * 288 * 3,
343 .colorspace = V4L2_COLORSPACE_JPEG,
344 .priv = 0},
345 };
346
347 static const struct v4l2_pix_format ovfx2_vga_mode[] = {
348 {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
349 .bytesperline = 320,
350 .sizeimage = 320 * 240,
351 .colorspace = V4L2_COLORSPACE_SRGB,
352 .priv = 1},
353 {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
354 .bytesperline = 640,
355 .sizeimage = 640 * 480,
356 .colorspace = V4L2_COLORSPACE_SRGB,
357 .priv = 0},
358 };
359 static const struct v4l2_pix_format ovfx2_cif_mode[] = {
360 {160, 120, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
361 .bytesperline = 160,
362 .sizeimage = 160 * 120,
363 .colorspace = V4L2_COLORSPACE_SRGB,
364 .priv = 3},
365 {176, 144, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
366 .bytesperline = 176,
367 .sizeimage = 176 * 144,
368 .colorspace = V4L2_COLORSPACE_SRGB,
369 .priv = 1},
370 {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
371 .bytesperline = 320,
372 .sizeimage = 320 * 240,
373 .colorspace = V4L2_COLORSPACE_SRGB,
374 .priv = 2},
375 {352, 288, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
376 .bytesperline = 352,
377 .sizeimage = 352 * 288,
378 .colorspace = V4L2_COLORSPACE_SRGB,
379 .priv = 0},
380 };
381 static const struct v4l2_pix_format ovfx2_ov2610_mode[] = {
382 {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
383 .bytesperline = 1600,
384 .sizeimage = 1600 * 1200,
385 .colorspace = V4L2_COLORSPACE_SRGB},
386 };
387 static const struct v4l2_pix_format ovfx2_ov3610_mode[] = {
388 {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
389 .bytesperline = 640,
390 .sizeimage = 640 * 480,
391 .colorspace = V4L2_COLORSPACE_SRGB,
392 .priv = 1},
393 {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
394 .bytesperline = 800,
395 .sizeimage = 800 * 600,
396 .colorspace = V4L2_COLORSPACE_SRGB,
397 .priv = 1},
398 {1024, 768, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
399 .bytesperline = 1024,
400 .sizeimage = 1024 * 768,
401 .colorspace = V4L2_COLORSPACE_SRGB,
402 .priv = 1},
403 {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
404 .bytesperline = 1600,
405 .sizeimage = 1600 * 1200,
406 .colorspace = V4L2_COLORSPACE_SRGB,
407 .priv = 0},
408 {2048, 1536, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
409 .bytesperline = 2048,
410 .sizeimage = 2048 * 1536,
411 .colorspace = V4L2_COLORSPACE_SRGB,
412 .priv = 0},
413 };
414
415
416 /* Registers common to OV511 / OV518 */
417 #define R51x_FIFO_PSIZE 0x30 /* 2 bytes wide w/ OV518(+) */
418 #define R51x_SYS_RESET 0x50
419 /* Reset type flags */
420 #define OV511_RESET_OMNICE 0x08
421 #define R51x_SYS_INIT 0x53
422 #define R51x_SYS_SNAP 0x52
423 #define R51x_SYS_CUST_ID 0x5F
424 #define R51x_COMP_LUT_BEGIN 0x80
425
426 /* OV511 Camera interface register numbers */
427 #define R511_CAM_DELAY 0x10
428 #define R511_CAM_EDGE 0x11
429 #define R511_CAM_PXCNT 0x12
430 #define R511_CAM_LNCNT 0x13
431 #define R511_CAM_PXDIV 0x14
432 #define R511_CAM_LNDIV 0x15
433 #define R511_CAM_UV_EN 0x16
434 #define R511_CAM_LINE_MODE 0x17
435 #define R511_CAM_OPTS 0x18
436
437 #define R511_SNAP_FRAME 0x19
438 #define R511_SNAP_PXCNT 0x1A
439 #define R511_SNAP_LNCNT 0x1B
440 #define R511_SNAP_PXDIV 0x1C
441 #define R511_SNAP_LNDIV 0x1D
442 #define R511_SNAP_UV_EN 0x1E
443 #define R511_SNAP_UV_EN 0x1E
444 #define R511_SNAP_OPTS 0x1F
445
446 #define R511_DRAM_FLOW_CTL 0x20
447 #define R511_FIFO_OPTS 0x31
448 #define R511_I2C_CTL 0x40
449 #define R511_SYS_LED_CTL 0x55 /* OV511+ only */
450 #define R511_COMP_EN 0x78
451 #define R511_COMP_LUT_EN 0x79
452
453 /* OV518 Camera interface register numbers */
454 #define R518_GPIO_OUT 0x56 /* OV518(+) only */
455 #define R518_GPIO_CTL 0x57 /* OV518(+) only */
456
457 /* OV519 Camera interface register numbers */
458 #define OV519_R10_H_SIZE 0x10
459 #define OV519_R11_V_SIZE 0x11
460 #define OV519_R12_X_OFFSETL 0x12
461 #define OV519_R13_X_OFFSETH 0x13
462 #define OV519_R14_Y_OFFSETL 0x14
463 #define OV519_R15_Y_OFFSETH 0x15
464 #define OV519_R16_DIVIDER 0x16
465 #define OV519_R20_DFR 0x20
466 #define OV519_R25_FORMAT 0x25
467
468 /* OV519 System Controller register numbers */
469 #define OV519_SYS_RESET1 0x51
470 #define OV519_SYS_EN_CLK1 0x54
471
472 #define OV519_GPIO_DATA_OUT0 0x71
473 #define OV519_GPIO_IO_CTRL0 0x72
474
475 #define OV511_ENDPOINT_ADDRESS 1 /* Isoc endpoint number */
476
477 /*
478 * The FX2 chip does not give us a zero length read at end of frame.
479 * It does, however, give a short read at the end of a frame, if
480 * necessary, rather than run two frames together.
481 *
482 * By choosing the right bulk transfer size, we are guaranteed to always
483 * get a short read for the last read of each frame. Frame sizes are
484 * always a composite number (width * height, or a multiple) so if we
485 * choose a prime number, we are guaranteed that the last read of a
486 * frame will be short.
487 *
488 * But it isn't that easy: the 2.6 kernel requires a multiple of 4KB,
489 * otherwise EOVERFLOW "babbling" errors occur. I have not been able
490 * to figure out why. [PMiller]
491 *
492 * The constant (13 * 4096) is the largest "prime enough" number less than 64KB.
493 *
494 * It isn't enough to know the number of bytes per frame, in case we
495 * have data dropouts or buffer overruns (even though the FX2 double
496 * buffers, there are some pretty strict real time constraints for
497 * isochronous transfer for larger frame sizes).
498 */
499 #define OVFX2_BULK_SIZE (13 * 4096)
500
501 /* I2C registers */
502 #define R51x_I2C_W_SID 0x41
503 #define R51x_I2C_SADDR_3 0x42
504 #define R51x_I2C_SADDR_2 0x43
505 #define R51x_I2C_R_SID 0x44
506 #define R51x_I2C_DATA 0x45
507 #define R518_I2C_CTL 0x47 /* OV518(+) only */
508 #define OVFX2_I2C_ADDR 0x00
509
510 /* I2C ADDRESSES */
511 #define OV7xx0_SID 0x42
512 #define OV_HIRES_SID 0x60 /* OV9xxx / OV2xxx / OV3xxx */
513 #define OV8xx0_SID 0xa0
514 #define OV6xx0_SID 0xc0
515
516 /* OV7610 registers */
517 #define OV7610_REG_GAIN 0x00 /* gain setting (5:0) */
518 #define OV7610_REG_BLUE 0x01 /* blue channel balance */
519 #define OV7610_REG_RED 0x02 /* red channel balance */
520 #define OV7610_REG_SAT 0x03 /* saturation */
521 #define OV8610_REG_HUE 0x04 /* 04 reserved */
522 #define OV7610_REG_CNT 0x05 /* Y contrast */
523 #define OV7610_REG_BRT 0x06 /* Y brightness */
524 #define OV7610_REG_COM_C 0x14 /* misc common regs */
525 #define OV7610_REG_ID_HIGH 0x1c /* manufacturer ID MSB */
526 #define OV7610_REG_ID_LOW 0x1d /* manufacturer ID LSB */
527 #define OV7610_REG_COM_I 0x29 /* misc settings */
528
529 /* OV7670 registers */
530 #define OV7670_REG_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
531 #define OV7670_REG_BLUE 0x01 /* blue gain */
532 #define OV7670_REG_RED 0x02 /* red gain */
533 #define OV7670_REG_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */
534 #define OV7670_REG_COM1 0x04 /* Control 1 */
535 #define OV7670_REG_AECHH 0x07 /* AEC MS 5 bits */
536 #define OV7670_REG_COM3 0x0c /* Control 3 */
537 #define OV7670_REG_COM4 0x0d /* Control 4 */
538 #define OV7670_REG_COM5 0x0e /* All "reserved" */
539 #define OV7670_REG_COM6 0x0f /* Control 6 */
540 #define OV7670_REG_AECH 0x10 /* More bits of AEC value */
541 #define OV7670_REG_CLKRC 0x11 /* Clock control */
542 #define OV7670_REG_COM7 0x12 /* Control 7 */
543 #define OV7670_COM7_FMT_VGA 0x00
544 #define OV7670_COM7_YUV 0x00 /* YUV */
545 #define OV7670_COM7_FMT_QVGA 0x10 /* QVGA format */
546 #define OV7670_COM7_FMT_MASK 0x38
547 #define OV7670_COM7_RESET 0x80 /* Register reset */
548 #define OV7670_REG_COM8 0x13 /* Control 8 */
549 #define OV7670_COM8_AEC 0x01 /* Auto exposure enable */
550 #define OV7670_COM8_AWB 0x02 /* White balance enable */
551 #define OV7670_COM8_AGC 0x04 /* Auto gain enable */
552 #define OV7670_COM8_BFILT 0x20 /* Band filter enable */
553 #define OV7670_COM8_AECSTEP 0x40 /* Unlimited AEC step size */
554 #define OV7670_COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */
555 #define OV7670_REG_COM9 0x14 /* Control 9 - gain ceiling */
556 #define OV7670_REG_COM10 0x15 /* Control 10 */
557 #define OV7670_REG_HSTART 0x17 /* Horiz start high bits */
558 #define OV7670_REG_HSTOP 0x18 /* Horiz stop high bits */
559 #define OV7670_REG_VSTART 0x19 /* Vert start high bits */
560 #define OV7670_REG_VSTOP 0x1a /* Vert stop high bits */
561 #define OV7670_REG_MVFP 0x1e /* Mirror / vflip */
562 #define OV7670_MVFP_VFLIP 0x10 /* vertical flip */
563 #define OV7670_MVFP_MIRROR 0x20 /* Mirror image */
564 #define OV7670_REG_AEW 0x24 /* AGC upper limit */
565 #define OV7670_REG_AEB 0x25 /* AGC lower limit */
566 #define OV7670_REG_VPT 0x26 /* AGC/AEC fast mode op region */
567 #define OV7670_REG_HREF 0x32 /* HREF pieces */
568 #define OV7670_REG_TSLB 0x3a /* lots of stuff */
569 #define OV7670_REG_COM11 0x3b /* Control 11 */
570 #define OV7670_COM11_EXP 0x02
571 #define OV7670_COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */
572 #define OV7670_REG_COM12 0x3c /* Control 12 */
573 #define OV7670_REG_COM13 0x3d /* Control 13 */
574 #define OV7670_COM13_GAMMA 0x80 /* Gamma enable */
575 #define OV7670_COM13_UVSAT 0x40 /* UV saturation auto adjustment */
576 #define OV7670_REG_COM14 0x3e /* Control 14 */
577 #define OV7670_REG_EDGE 0x3f /* Edge enhancement factor */
578 #define OV7670_REG_COM15 0x40 /* Control 15 */
579 #define OV7670_COM15_R00FF 0xc0 /* 00 to FF */
580 #define OV7670_REG_COM16 0x41 /* Control 16 */
581 #define OV7670_COM16_AWBGAIN 0x08 /* AWB gain enable */
582 #define OV7670_REG_BRIGHT 0x55 /* Brightness */
583 #define OV7670_REG_CONTRAS 0x56 /* Contrast control */
584 #define OV7670_REG_GFIX 0x69 /* Fix gain control */
585 #define OV7670_REG_RGB444 0x8c /* RGB 444 control */
586 #define OV7670_REG_HAECC1 0x9f /* Hist AEC/AGC control 1 */
587 #define OV7670_REG_HAECC2 0xa0 /* Hist AEC/AGC control 2 */
588 #define OV7670_REG_BD50MAX 0xa5 /* 50hz banding step limit */
589 #define OV7670_REG_HAECC3 0xa6 /* Hist AEC/AGC control 3 */
590 #define OV7670_REG_HAECC4 0xa7 /* Hist AEC/AGC control 4 */
591 #define OV7670_REG_HAECC5 0xa8 /* Hist AEC/AGC control 5 */
592 #define OV7670_REG_HAECC6 0xa9 /* Hist AEC/AGC control 6 */
593 #define OV7670_REG_HAECC7 0xaa /* Hist AEC/AGC control 7 */
594 #define OV7670_REG_BD60MAX 0xab /* 60hz banding step limit */
595
596 struct ov_regvals {
597 __u8 reg;
598 __u8 val;
599 };
600 struct ov_i2c_regvals {
601 __u8 reg;
602 __u8 val;
603 };
604
605 /* Settings for OV2610 camera chip */
606 static const struct ov_i2c_regvals norm_2610[] = {
607 { 0x12, 0x80 }, /* reset */
608 };
609
610 static const struct ov_i2c_regvals norm_3620b[] = {
611 /*
612 * From the datasheet: "Note that after writing to register COMH
613 * (0x12) to change the sensor mode, registers related to the
614 * sensor’s cropping window will be reset back to their default
615 * values."
616 *
617 * "wait 4096 external clock ... to make sure the sensor is
618 * stable and ready to access registers" i.e. 160us at 24MHz
619 */
620
621 { 0x12, 0x80 }, /* COMH reset */
622 { 0x12, 0x00 }, /* QXGA, master */
623
624 /*
625 * 11 CLKRC "Clock Rate Control"
626 * [7] internal frequency doublers: on
627 * [6] video port mode: master
628 * [5:0] clock divider: 1
629 */
630 { 0x11, 0x80 },
631
632 /*
633 * 13 COMI "Common Control I"
634 * = 192 (0xC0) 11000000
635 * COMI[7] "AEC speed selection"
636 * = 1 (0x01) 1....... "Faster AEC correction"
637 * COMI[6] "AEC speed step selection"
638 * = 1 (0x01) .1...... "Big steps, fast"
639 * COMI[5] "Banding filter on off"
640 * = 0 (0x00) ..0..... "Off"
641 * COMI[4] "Banding filter option"
642 * = 0 (0x00) ...0.... "Main clock is 48 MHz and
643 * the PLL is ON"
644 * COMI[3] "Reserved"
645 * = 0 (0x00) ....0...
646 * COMI[2] "AGC auto manual control selection"
647 * = 0 (0x00) .....0.. "Manual"
648 * COMI[1] "AWB auto manual control selection"
649 * = 0 (0x00) ......0. "Manual"
650 * COMI[0] "Exposure control"
651 * = 0 (0x00) .......0 "Manual"
652 */
653 { 0x13, 0xC0 },
654
655 /*
656 * 09 COMC "Common Control C"
657 * = 8 (0x08) 00001000
658 * COMC[7:5] "Reserved"
659 * = 0 (0x00) 000.....
660 * COMC[4] "Sleep Mode Enable"
661 * = 0 (0x00) ...0.... "Normal mode"
662 * COMC[3:2] "Sensor sampling reset timing selection"
663 * = 2 (0x02) ....10.. "Longer reset time"
664 * COMC[1:0] "Output drive current select"
665 * = 0 (0x00) ......00 "Weakest"
666 */
667 { 0x09, 0x08 },
668
669 /*
670 * 0C COMD "Common Control D"
671 * = 8 (0x08) 00001000
672 * COMD[7] "Reserved"
673 * = 0 (0x00) 0.......
674 * COMD[6] "Swap MSB and LSB at the output port"
675 * = 0 (0x00) .0...... "False"
676 * COMD[5:3] "Reserved"
677 * = 1 (0x01) ..001...
678 * COMD[2] "Output Average On Off"
679 * = 0 (0x00) .....0.. "Output Normal"
680 * COMD[1] "Sensor precharge voltage selection"
681 * = 0 (0x00) ......0. "Selects internal
682 * reference precharge
683 * voltage"
684 * COMD[0] "Snapshot option"
685 * = 0 (0x00) .......0 "Enable live video output
686 * after snapshot sequence"
687 */
688 { 0x0c, 0x08 },
689
690 /*
691 * 0D COME "Common Control E"
692 * = 161 (0xA1) 10100001
693 * COME[7] "Output average option"
694 * = 1 (0x01) 1....... "Output average of 4 pixels"
695 * COME[6] "Anti-blooming control"
696 * = 0 (0x00) .0...... "Off"
697 * COME[5:3] "Reserved"
698 * = 4 (0x04) ..100...
699 * COME[2] "Clock output power down pin status"
700 * = 0 (0x00) .....0.. "Tri-state data output pin
701 * on power down"
702 * COME[1] "Data output pin status selection at power down"
703 * = 0 (0x00) ......0. "Tri-state VSYNC, PCLK,
704 * HREF, and CHSYNC pins on
705 * power down"
706 * COME[0] "Auto zero circuit select"
707 * = 1 (0x01) .......1 "On"
708 */
709 { 0x0d, 0xA1 },
710
711 /*
712 * 0E COMF "Common Control F"
713 * = 112 (0x70) 01110000
714 * COMF[7] "System clock selection"
715 * = 0 (0x00) 0....... "Use 24 MHz system clock"
716 * COMF[6:4] "Reserved"
717 * = 7 (0x07) .111....
718 * COMF[3] "Manual auto negative offset canceling selection"
719 * = 0 (0x00) ....0... "Auto detect negative
720 * offset and cancel it"
721 * COMF[2:0] "Reserved"
722 * = 0 (0x00) .....000
723 */
724 { 0x0e, 0x70 },
725
726 /*
727 * 0F COMG "Common Control G"
728 * = 66 (0x42) 01000010
729 * COMG[7] "Optical black output selection"
730 * = 0 (0x00) 0....... "Disable"
731 * COMG[6] "Black level calibrate selection"
732 * = 1 (0x01) .1...... "Use optical black pixels
733 * to calibrate"
734 * COMG[5:4] "Reserved"
735 * = 0 (0x00) ..00....
736 * COMG[3] "Channel offset adjustment"
737 * = 0 (0x00) ....0... "Disable offset adjustment"
738 * COMG[2] "ADC black level calibration option"
739 * = 0 (0x00) .....0.. "Use B/G line and G/R
740 * line to calibrate each
741 * channel's black level"
742 * COMG[1] "Reserved"
743 * = 1 (0x01) ......1.
744 * COMG[0] "ADC black level calibration enable"
745 * = 0 (0x00) .......0 "Disable"
746 */
747 { 0x0f, 0x42 },
748
749 /*
750 * 14 COMJ "Common Control J"
751 * = 198 (0xC6) 11000110
752 * COMJ[7:6] "AGC gain ceiling"
753 * = 3 (0x03) 11...... "8x"
754 * COMJ[5:4] "Reserved"
755 * = 0 (0x00) ..00....
756 * COMJ[3] "Auto banding filter"
757 * = 0 (0x00) ....0... "Banding filter is always
758 * on off depending on
759 * COMI[5] setting"
760 * COMJ[2] "VSYNC drop option"
761 * = 1 (0x01) .....1.. "SYNC is dropped if frame
762 * data is dropped"
763 * COMJ[1] "Frame data drop"
764 * = 1 (0x01) ......1. "Drop frame data if
765 * exposure is not within
766 * tolerance. In AEC mode,
767 * data is normally dropped
768 * when data is out of
769 * range."
770 * COMJ[0] "Reserved"
771 * = 0 (0x00) .......0
772 */
773 { 0x14, 0xC6 },
774
775 /*
776 * 15 COMK "Common Control K"
777 * = 2 (0x02) 00000010
778 * COMK[7] "CHSYNC pin output swap"
779 * = 0 (0x00) 0....... "CHSYNC"
780 * COMK[6] "HREF pin output swap"
781 * = 0 (0x00) .0...... "HREF"
782 * COMK[5] "PCLK output selection"
783 * = 0 (0x00) ..0..... "PCLK always output"
784 * COMK[4] "PCLK edge selection"
785 * = 0 (0x00) ...0.... "Data valid on falling edge"
786 * COMK[3] "HREF output polarity"
787 * = 0 (0x00) ....0... "positive"
788 * COMK[2] "Reserved"
789 * = 0 (0x00) .....0..
790 * COMK[1] "VSYNC polarity"
791 * = 1 (0x01) ......1. "negative"
792 * COMK[0] "HSYNC polarity"
793 * = 0 (0x00) .......0 "positive"
794 */
795 { 0x15, 0x02 },
796
797 /*
798 * 33 CHLF "Current Control"
799 * = 9 (0x09) 00001001
800 * CHLF[7:6] "Sensor current control"
801 * = 0 (0x00) 00......
802 * CHLF[5] "Sensor current range control"
803 * = 0 (0x00) ..0..... "normal range"
804 * CHLF[4] "Sensor current"
805 * = 0 (0x00) ...0.... "normal current"
806 * CHLF[3] "Sensor buffer current control"
807 * = 1 (0x01) ....1... "half current"
808 * CHLF[2] "Column buffer current control"
809 * = 0 (0x00) .....0.. "normal current"
810 * CHLF[1] "Analog DSP current control"
811 * = 0 (0x00) ......0. "normal current"
812 * CHLF[1] "ADC current control"
813 * = 0 (0x00) ......0. "normal current"
814 */
815 { 0x33, 0x09 },
816
817 /*
818 * 34 VBLM "Blooming Control"
819 * = 80 (0x50) 01010000
820 * VBLM[7] "Hard soft reset switch"
821 * = 0 (0x00) 0....... "Hard reset"
822 * VBLM[6:4] "Blooming voltage selection"
823 * = 5 (0x05) .101....
824 * VBLM[3:0] "Sensor current control"
825 * = 0 (0x00) ....0000
826 */
827 { 0x34, 0x50 },
828
829 /*
830 * 36 VCHG "Sensor Precharge Voltage Control"
831 * = 0 (0x00) 00000000
832 * VCHG[7] "Reserved"
833 * = 0 (0x00) 0.......
834 * VCHG[6:4] "Sensor precharge voltage control"
835 * = 0 (0x00) .000....
836 * VCHG[3:0] "Sensor array common reference"
837 * = 0 (0x00) ....0000
838 */
839 { 0x36, 0x00 },
840
841 /*
842 * 37 ADC "ADC Reference Control"
843 * = 4 (0x04) 00000100
844 * ADC[7:4] "Reserved"
845 * = 0 (0x00) 0000....
846 * ADC[3] "ADC input signal range"
847 * = 0 (0x00) ....0... "Input signal 1.0x"
848 * ADC[2:0] "ADC range control"
849 * = 4 (0x04) .....100
850 */
851 { 0x37, 0x04 },
852
853 /*
854 * 38 ACOM "Analog Common Ground"
855 * = 82 (0x52) 01010010
856 * ACOM[7] "Analog gain control"
857 * = 0 (0x00) 0....... "Gain 1x"
858 * ACOM[6] "Analog black level calibration"
859 * = 1 (0x01) .1...... "On"
860 * ACOM[5:0] "Reserved"
861 * = 18 (0x12) ..010010
862 */
863 { 0x38, 0x52 },
864
865 /*
866 * 3A FREFA "Internal Reference Adjustment"
867 * = 0 (0x00) 00000000
868 * FREFA[7:0] "Range"
869 * = 0 (0x00) 00000000
870 */
871 { 0x3a, 0x00 },
872
873 /*
874 * 3C FVOPT "Internal Reference Adjustment"
875 * = 31 (0x1F) 00011111
876 * FVOPT[7:0] "Range"
877 * = 31 (0x1F) 00011111
878 */
879 { 0x3c, 0x1F },
880
881 /*
882 * 44 Undocumented = 0 (0x00) 00000000
883 * 44[7:0] "It's a secret"
884 * = 0 (0x00) 00000000
885 */
886 { 0x44, 0x00 },
887
888 /*
889 * 40 Undocumented = 0 (0x00) 00000000
890 * 40[7:0] "It's a secret"
891 * = 0 (0x00) 00000000
892 */
893 { 0x40, 0x00 },
894
895 /*
896 * 41 Undocumented = 0 (0x00) 00000000
897 * 41[7:0] "It's a secret"
898 * = 0 (0x00) 00000000
899 */
900 { 0x41, 0x00 },
901
902 /*
903 * 42 Undocumented = 0 (0x00) 00000000
904 * 42[7:0] "It's a secret"
905 * = 0 (0x00) 00000000
906 */
907 { 0x42, 0x00 },
908
909 /*
910 * 43 Undocumented = 0 (0x00) 00000000
911 * 43[7:0] "It's a secret"
912 * = 0 (0x00) 00000000
913 */
914 { 0x43, 0x00 },
915
916 /*
917 * 45 Undocumented = 128 (0x80) 10000000
918 * 45[7:0] "It's a secret"
919 * = 128 (0x80) 10000000
920 */
921 { 0x45, 0x80 },
922
923 /*
924 * 48 Undocumented = 192 (0xC0) 11000000
925 * 48[7:0] "It's a secret"
926 * = 192 (0xC0) 11000000
927 */
928 { 0x48, 0xC0 },
929
930 /*
931 * 49 Undocumented = 25 (0x19) 00011001
932 * 49[7:0] "It's a secret"
933 * = 25 (0x19) 00011001
934 */
935 { 0x49, 0x19 },
936
937 /*
938 * 4B Undocumented = 128 (0x80) 10000000
939 * 4B[7:0] "It's a secret"
940 * = 128 (0x80) 10000000
941 */
942 { 0x4B, 0x80 },
943
944 /*
945 * 4D Undocumented = 196 (0xC4) 11000100
946 * 4D[7:0] "It's a secret"
947 * = 196 (0xC4) 11000100
948 */
949 { 0x4D, 0xC4 },
950
951 /*
952 * 35 VREF "Reference Voltage Control"
953 * = 76 (0x4C) 01001100
954 * VREF[7:5] "Column high reference control"
955 * = 2 (0x02) 010..... "higher voltage"
956 * VREF[4:2] "Column low reference control"
957 * = 3 (0x03) ...011.. "Highest voltage"
958 * VREF[1:0] "Reserved"
959 * = 0 (0x00) ......00
960 */
961 { 0x35, 0x4C },
962
963 /*
964 * 3D Undocumented = 0 (0x00) 00000000
965 * 3D[7:0] "It's a secret"
966 * = 0 (0x00) 00000000
967 */
968 { 0x3D, 0x00 },
969
970 /*
971 * 3E Undocumented = 0 (0x00) 00000000
972 * 3E[7:0] "It's a secret"
973 * = 0 (0x00) 00000000
974 */
975 { 0x3E, 0x00 },
976
977 /*
978 * 3B FREFB "Internal Reference Adjustment"
979 * = 24 (0x18) 00011000
980 * FREFB[7:0] "Range"
981 * = 24 (0x18) 00011000
982 */
983 { 0x3b, 0x18 },
984
985 /*
986 * 33 CHLF "Current Control"
987 * = 25 (0x19) 00011001
988 * CHLF[7:6] "Sensor current control"
989 * = 0 (0x00) 00......
990 * CHLF[5] "Sensor current range control"
991 * = 0 (0x00) ..0..... "normal range"
992 * CHLF[4] "Sensor current"
993 * = 1 (0x01) ...1.... "double current"
994 * CHLF[3] "Sensor buffer current control"
995 * = 1 (0x01) ....1... "half current"
996 * CHLF[2] "Column buffer current control"
997 * = 0 (0x00) .....0.. "normal current"
998 * CHLF[1] "Analog DSP current control"
999 * = 0 (0x00) ......0. "normal current"
1000 * CHLF[1] "ADC current control"
1001 * = 0 (0x00) ......0. "normal current"
1002 */
1003 { 0x33, 0x19 },
1004
1005 /*
1006 * 34 VBLM "Blooming Control"
1007 * = 90 (0x5A) 01011010
1008 * VBLM[7] "Hard soft reset switch"
1009 * = 0 (0x00) 0....... "Hard reset"
1010 * VBLM[6:4] "Blooming voltage selection"
1011 * = 5 (0x05) .101....
1012 * VBLM[3:0] "Sensor current control"
1013 * = 10 (0x0A) ....1010
1014 */
1015 { 0x34, 0x5A },
1016
1017 /*
1018 * 3B FREFB "Internal Reference Adjustment"
1019 * = 0 (0x00) 00000000
1020 * FREFB[7:0] "Range"
1021 * = 0 (0x00) 00000000
1022 */
1023 { 0x3b, 0x00 },
1024
1025 /*
1026 * 33 CHLF "Current Control"
1027 * = 9 (0x09) 00001001
1028 * CHLF[7:6] "Sensor current control"
1029 * = 0 (0x00) 00......
1030 * CHLF[5] "Sensor current range control"
1031 * = 0 (0x00) ..0..... "normal range"
1032 * CHLF[4] "Sensor current"
1033 * = 0 (0x00) ...0.... "normal current"
1034 * CHLF[3] "Sensor buffer current control"
1035 * = 1 (0x01) ....1... "half current"
1036 * CHLF[2] "Column buffer current control"
1037 * = 0 (0x00) .....0.. "normal current"
1038 * CHLF[1] "Analog DSP current control"
1039 * = 0 (0x00) ......0. "normal current"
1040 * CHLF[1] "ADC current control"
1041 * = 0 (0x00) ......0. "normal current"
1042 */
1043 { 0x33, 0x09 },
1044
1045 /*
1046 * 34 VBLM "Blooming Control"
1047 * = 80 (0x50) 01010000
1048 * VBLM[7] "Hard soft reset switch"
1049 * = 0 (0x00) 0....... "Hard reset"
1050 * VBLM[6:4] "Blooming voltage selection"
1051 * = 5 (0x05) .101....
1052 * VBLM[3:0] "Sensor current control"
1053 * = 0 (0x00) ....0000
1054 */
1055 { 0x34, 0x50 },
1056
1057 /*
1058 * 12 COMH "Common Control H"
1059 * = 64 (0x40) 01000000
1060 * COMH[7] "SRST"
1061 * = 0 (0x00) 0....... "No-op"
1062 * COMH[6:4] "Resolution selection"
1063 * = 4 (0x04) .100.... "XGA"
1064 * COMH[3] "Master slave selection"
1065 * = 0 (0x00) ....0... "Master mode"
1066 * COMH[2] "Internal B/R channel option"
1067 * = 0 (0x00) .....0.. "B/R use same channel"
1068 * COMH[1] "Color bar test pattern"
1069 * = 0 (0x00) ......0. "Off"
1070 * COMH[0] "Reserved"
1071 * = 0 (0x00) .......0
1072 */
1073 { 0x12, 0x40 },
1074
1075 /*
1076 * 17 HREFST "Horizontal window start"
1077 * = 31 (0x1F) 00011111
1078 * HREFST[7:0] "Horizontal window start, 8 MSBs"
1079 * = 31 (0x1F) 00011111
1080 */
1081 { 0x17, 0x1F },
1082
1083 /*
1084 * 18 HREFEND "Horizontal window end"
1085 * = 95 (0x5F) 01011111
1086 * HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1087 * = 95 (0x5F) 01011111
1088 */
1089 { 0x18, 0x5F },
1090
1091 /*
1092 * 19 VSTRT "Vertical window start"
1093 * = 0 (0x00) 00000000
1094 * VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1095 * = 0 (0x00) 00000000
1096 */
1097 { 0x19, 0x00 },
1098
1099 /*
1100 * 1A VEND "Vertical window end"
1101 * = 96 (0x60) 01100000
1102 * VEND[7:0] "Vertical Window End, 8 MSBs"
1103 * = 96 (0x60) 01100000
1104 */
1105 { 0x1a, 0x60 },
1106
1107 /*
1108 * 32 COMM "Common Control M"
1109 * = 18 (0x12) 00010010
1110 * COMM[7:6] "Pixel clock divide option"
1111 * = 0 (0x00) 00...... "/1"
1112 * COMM[5:3] "Horizontal window end position, 3 LSBs"
1113 * = 2 (0x02) ..010...
1114 * COMM[2:0] "Horizontal window start position, 3 LSBs"
1115 * = 2 (0x02) .....010
1116 */
1117 { 0x32, 0x12 },
1118
1119 /*
1120 * 03 COMA "Common Control A"
1121 * = 74 (0x4A) 01001010
1122 * COMA[7:4] "AWB Update Threshold"
1123 * = 4 (0x04) 0100....
1124 * COMA[3:2] "Vertical window end line control 2 LSBs"
1125 * = 2 (0x02) ....10..
1126 * COMA[1:0] "Vertical window start line control 2 LSBs"
1127 * = 2 (0x02) ......10
1128 */
1129 { 0x03, 0x4A },
1130
1131 /*
1132 * 11 CLKRC "Clock Rate Control"
1133 * = 128 (0x80) 10000000
1134 * CLKRC[7] "Internal frequency doublers on off seclection"
1135 * = 1 (0x01) 1....... "On"
1136 * CLKRC[6] "Digital video master slave selection"
1137 * = 0 (0x00) .0...... "Master mode, sensor
1138 * provides PCLK"
1139 * CLKRC[5:0] "Clock divider { CLK = PCLK/(1+CLKRC[5:0]) }"
1140 * = 0 (0x00) ..000000
1141 */
1142 { 0x11, 0x80 },
1143
1144 /*
1145 * 12 COMH "Common Control H"
1146 * = 0 (0x00) 00000000
1147 * COMH[7] "SRST"
1148 * = 0 (0x00) 0....... "No-op"
1149 * COMH[6:4] "Resolution selection"
1150 * = 0 (0x00) .000.... "QXGA"
1151 * COMH[3] "Master slave selection"
1152 * = 0 (0x00) ....0... "Master mode"
1153 * COMH[2] "Internal B/R channel option"
1154 * = 0 (0x00) .....0.. "B/R use same channel"
1155 * COMH[1] "Color bar test pattern"
1156 * = 0 (0x00) ......0. "Off"
1157 * COMH[0] "Reserved"
1158 * = 0 (0x00) .......0
1159 */
1160 { 0x12, 0x00 },
1161
1162 /*
1163 * 12 COMH "Common Control H"
1164 * = 64 (0x40) 01000000
1165 * COMH[7] "SRST"
1166 * = 0 (0x00) 0....... "No-op"
1167 * COMH[6:4] "Resolution selection"
1168 * = 4 (0x04) .100.... "XGA"
1169 * COMH[3] "Master slave selection"
1170 * = 0 (0x00) ....0... "Master mode"
1171 * COMH[2] "Internal B/R channel option"
1172 * = 0 (0x00) .....0.. "B/R use same channel"
1173 * COMH[1] "Color bar test pattern"
1174 * = 0 (0x00) ......0. "Off"
1175 * COMH[0] "Reserved"
1176 * = 0 (0x00) .......0
1177 */
1178 { 0x12, 0x40 },
1179
1180 /*
1181 * 17 HREFST "Horizontal window start"
1182 * = 31 (0x1F) 00011111
1183 * HREFST[7:0] "Horizontal window start, 8 MSBs"
1184 * = 31 (0x1F) 00011111
1185 */
1186 { 0x17, 0x1F },
1187
1188 /*
1189 * 18 HREFEND "Horizontal window end"
1190 * = 95 (0x5F) 01011111
1191 * HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1192 * = 95 (0x5F) 01011111
1193 */
1194 { 0x18, 0x5F },
1195
1196 /*
1197 * 19 VSTRT "Vertical window start"
1198 * = 0 (0x00) 00000000
1199 * VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1200 * = 0 (0x00) 00000000
1201 */
1202 { 0x19, 0x00 },
1203
1204 /*
1205 * 1A VEND "Vertical window end"
1206 * = 96 (0x60) 01100000
1207 * VEND[7:0] "Vertical Window End, 8 MSBs"
1208 * = 96 (0x60) 01100000
1209 */
1210 { 0x1a, 0x60 },
1211
1212 /*
1213 * 32 COMM "Common Control M"
1214 * = 18 (0x12) 00010010
1215 * COMM[7:6] "Pixel clock divide option"
1216 * = 0 (0x00) 00...... "/1"
1217 * COMM[5:3] "Horizontal window end position, 3 LSBs"
1218 * = 2 (0x02) ..010...
1219 * COMM[2:0] "Horizontal window start position, 3 LSBs"
1220 * = 2 (0x02) .....010
1221 */
1222 { 0x32, 0x12 },
1223
1224 /*
1225 * 03 COMA "Common Control A"
1226 * = 74 (0x4A) 01001010
1227 * COMA[7:4] "AWB Update Threshold"
1228 * = 4 (0x04) 0100....
1229 * COMA[3:2] "Vertical window end line control 2 LSBs"
1230 * = 2 (0x02) ....10..
1231 * COMA[1:0] "Vertical window start line control 2 LSBs"
1232 * = 2 (0x02) ......10
1233 */
1234 { 0x03, 0x4A },
1235
1236 /*
1237 * 02 RED "Red Gain Control"
1238 * = 175 (0xAF) 10101111
1239 * RED[7] "Action"
1240 * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1241 * RED[6:0] "Value"
1242 * = 47 (0x2F) .0101111
1243 */
1244 { 0x02, 0xAF },
1245
1246 /*
1247 * 2D ADDVSL "VSYNC Pulse Width"
1248 * = 210 (0xD2) 11010010
1249 * ADDVSL[7:0] "VSYNC pulse width, LSB"
1250 * = 210 (0xD2) 11010010
1251 */
1252 { 0x2d, 0xD2 },
1253
1254 /*
1255 * 00 GAIN = 24 (0x18) 00011000
1256 * GAIN[7:6] "Reserved"
1257 * = 0 (0x00) 00......
1258 * GAIN[5] "Double"
1259 * = 0 (0x00) ..0..... "False"
1260 * GAIN[4] "Double"
1261 * = 1 (0x01) ...1.... "True"
1262 * GAIN[3:0] "Range"
1263 * = 8 (0x08) ....1000
1264 */
1265 { 0x00, 0x18 },
1266
1267 /*
1268 * 01 BLUE "Blue Gain Control"
1269 * = 240 (0xF0) 11110000
1270 * BLUE[7] "Action"
1271 * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1272 * BLUE[6:0] "Value"
1273 * = 112 (0x70) .1110000
1274 */
1275 { 0x01, 0xF0 },
1276
1277 /*
1278 * 10 AEC "Automatic Exposure Control"
1279 * = 10 (0x0A) 00001010
1280 * AEC[7:0] "Automatic Exposure Control, 8 MSBs"
1281 * = 10 (0x0A) 00001010
1282 */
1283 { 0x10, 0x0A },
1284
1285 { 0xE1, 0x67 },
1286 { 0xE3, 0x03 },
1287 { 0xE4, 0x26 },
1288 { 0xE5, 0x3E },
1289 { 0xF8, 0x01 },
1290 { 0xFF, 0x01 },
1291 };
1292
1293 static const struct ov_i2c_regvals norm_6x20[] = {
1294 { 0x12, 0x80 }, /* reset */
1295 { 0x11, 0x01 },
1296 { 0x03, 0x60 },
1297 { 0x05, 0x7f }, /* For when autoadjust is off */
1298 { 0x07, 0xa8 },
1299 /* The ratio of 0x0c and 0x0d controls the white point */
1300 { 0x0c, 0x24 },
1301 { 0x0d, 0x24 },
1302 { 0x0f, 0x15 }, /* COMS */
1303 { 0x10, 0x75 }, /* AEC Exposure time */
1304 { 0x12, 0x24 }, /* Enable AGC */
1305 { 0x14, 0x04 },
1306 /* 0x16: 0x06 helps frame stability with moving objects */
1307 { 0x16, 0x06 },
1308 /* { 0x20, 0x30 }, * Aperture correction enable */
1309 { 0x26, 0xb2 }, /* BLC enable */
1310 /* 0x28: 0x05 Selects RGB format if RGB on */
1311 { 0x28, 0x05 },
1312 { 0x2a, 0x04 }, /* Disable framerate adjust */
1313 /* { 0x2b, 0xac }, * Framerate; Set 2a[7] first */
1314 { 0x2d, 0x85 },
1315 { 0x33, 0xa0 }, /* Color Processing Parameter */
1316 { 0x34, 0xd2 }, /* Max A/D range */
1317 { 0x38, 0x8b },
1318 { 0x39, 0x40 },
1319
1320 { 0x3c, 0x39 }, /* Enable AEC mode changing */
1321 { 0x3c, 0x3c }, /* Change AEC mode */
1322 { 0x3c, 0x24 }, /* Disable AEC mode changing */
1323
1324 { 0x3d, 0x80 },
1325 /* These next two registers (0x4a, 0x4b) are undocumented.
1326 * They control the color balance */
1327 { 0x4a, 0x80 },
1328 { 0x4b, 0x80 },
1329 { 0x4d, 0xd2 }, /* This reduces noise a bit */
1330 { 0x4e, 0xc1 },
1331 { 0x4f, 0x04 },
1332 /* Do 50-53 have any effect? */
1333 /* Toggle 0x12[2] off and on here? */
1334 };
1335
1336 static const struct ov_i2c_regvals norm_6x30[] = {
1337 { 0x12, 0x80 }, /* Reset */
1338 { 0x00, 0x1f }, /* Gain */
1339 { 0x01, 0x99 }, /* Blue gain */
1340 { 0x02, 0x7c }, /* Red gain */
1341 { 0x03, 0xc0 }, /* Saturation */
1342 { 0x05, 0x0a }, /* Contrast */
1343 { 0x06, 0x95 }, /* Brightness */
1344 { 0x07, 0x2d }, /* Sharpness */
1345 { 0x0c, 0x20 },
1346 { 0x0d, 0x20 },
1347 { 0x0e, 0xa0 }, /* Was 0x20, bit7 enables a 2x gain which we need */
1348 { 0x0f, 0x05 },
1349 { 0x10, 0x9a },
1350 { 0x11, 0x00 }, /* Pixel clock = fastest */
1351 { 0x12, 0x24 }, /* Enable AGC and AWB */
1352 { 0x13, 0x21 },
1353 { 0x14, 0x80 },
1354 { 0x15, 0x01 },
1355 { 0x16, 0x03 },
1356 { 0x17, 0x38 },
1357 { 0x18, 0xea },
1358 { 0x19, 0x04 },
1359 { 0x1a, 0x93 },
1360 { 0x1b, 0x00 },
1361 { 0x1e, 0xc4 },
1362 { 0x1f, 0x04 },
1363 { 0x20, 0x20 },
1364 { 0x21, 0x10 },
1365 { 0x22, 0x88 },
1366 { 0x23, 0xc0 }, /* Crystal circuit power level */
1367 { 0x25, 0x9a }, /* Increase AEC black ratio */
1368 { 0x26, 0xb2 }, /* BLC enable */
1369 { 0x27, 0xa2 },
1370 { 0x28, 0x00 },
1371 { 0x29, 0x00 },
1372 { 0x2a, 0x84 }, /* 60 Hz power */
1373 { 0x2b, 0xa8 }, /* 60 Hz power */
1374 { 0x2c, 0xa0 },
1375 { 0x2d, 0x95 }, /* Enable auto-brightness */
1376 { 0x2e, 0x88 },
1377 { 0x33, 0x26 },
1378 { 0x34, 0x03 },
1379 { 0x36, 0x8f },
1380 { 0x37, 0x80 },
1381 { 0x38, 0x83 },
1382 { 0x39, 0x80 },
1383 { 0x3a, 0x0f },
1384 { 0x3b, 0x3c },
1385 { 0x3c, 0x1a },
1386 { 0x3d, 0x80 },
1387 { 0x3e, 0x80 },
1388 { 0x3f, 0x0e },
1389 { 0x40, 0x00 }, /* White bal */
1390 { 0x41, 0x00 }, /* White bal */
1391 { 0x42, 0x80 },
1392 { 0x43, 0x3f }, /* White bal */
1393 { 0x44, 0x80 },
1394 { 0x45, 0x20 },
1395 { 0x46, 0x20 },
1396 { 0x47, 0x80 },
1397 { 0x48, 0x7f },
1398 { 0x49, 0x00 },
1399 { 0x4a, 0x00 },
1400 { 0x4b, 0x80 },
1401 { 0x4c, 0xd0 },
1402 { 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */
1403 { 0x4e, 0x40 },
1404 { 0x4f, 0x07 }, /* UV avg., col. killer: max */
1405 { 0x50, 0xff },
1406 { 0x54, 0x23 }, /* Max AGC gain: 18dB */
1407 { 0x55, 0xff },
1408 { 0x56, 0x12 },
1409 { 0x57, 0x81 },
1410 { 0x58, 0x75 },
1411 { 0x59, 0x01 }, /* AGC dark current comp.: +1 */
1412 { 0x5a, 0x2c },
1413 { 0x5b, 0x0f }, /* AWB chrominance levels */
1414 { 0x5c, 0x10 },
1415 { 0x3d, 0x80 },
1416 { 0x27, 0xa6 },
1417 { 0x12, 0x20 }, /* Toggle AWB */
1418 { 0x12, 0x24 },
1419 };
1420
1421 /* Lawrence Glaister <lg@jfm.bc.ca> reports:
1422 *
1423 * Register 0x0f in the 7610 has the following effects:
1424 *
1425 * 0x85 (AEC method 1): Best overall, good contrast range
1426 * 0x45 (AEC method 2): Very overexposed
1427 * 0xa5 (spec sheet default): Ok, but the black level is
1428 * shifted resulting in loss of contrast
1429 * 0x05 (old driver setting): very overexposed, too much
1430 * contrast
1431 */
1432 static const struct ov_i2c_regvals norm_7610[] = {
1433 { 0x10, 0xff },
1434 { 0x16, 0x06 },
1435 { 0x28, 0x24 },
1436 { 0x2b, 0xac },
1437 { 0x12, 0x00 },
1438 { 0x38, 0x81 },
1439 { 0x28, 0x24 }, /* 0c */
1440 { 0x0f, 0x85 }, /* lg's setting */
1441 { 0x15, 0x01 },
1442 { 0x20, 0x1c },
1443 { 0x23, 0x2a },
1444 { 0x24, 0x10 },
1445 { 0x25, 0x8a },
1446 { 0x26, 0xa2 },
1447 { 0x27, 0xc2 },
1448 { 0x2a, 0x04 },
1449 { 0x2c, 0xfe },
1450 { 0x2d, 0x93 },
1451 { 0x30, 0x71 },
1452 { 0x31, 0x60 },
1453 { 0x32, 0x26 },
1454 { 0x33, 0x20 },
1455 { 0x34, 0x48 },
1456 { 0x12, 0x24 },
1457 { 0x11, 0x01 },
1458 { 0x0c, 0x24 },
1459 { 0x0d, 0x24 },
1460 };
1461
1462 static const struct ov_i2c_regvals norm_7620[] = {
1463 { 0x12, 0x80 }, /* reset */
1464 { 0x00, 0x00 }, /* gain */
1465 { 0x01, 0x80 }, /* blue gain */
1466 { 0x02, 0x80 }, /* red gain */
1467 { 0x03, 0xc0 }, /* OV7670_REG_VREF */
1468 { 0x06, 0x60 },
1469 { 0x07, 0x00 },
1470 { 0x0c, 0x24 },
1471 { 0x0c, 0x24 },
1472 { 0x0d, 0x24 },
1473 { 0x11, 0x01 },
1474 { 0x12, 0x24 },
1475 { 0x13, 0x01 },
1476 { 0x14, 0x84 },
1477 { 0x15, 0x01 },
1478 { 0x16, 0x03 },
1479 { 0x17, 0x2f },
1480 { 0x18, 0xcf },
1481 { 0x19, 0x06 },
1482 { 0x1a, 0xf5 },
1483 { 0x1b, 0x00 },
1484 { 0x20, 0x18 },
1485 { 0x21, 0x80 },
1486 { 0x22, 0x80 },
1487 { 0x23, 0x00 },
1488 { 0x26, 0xa2 },
1489 { 0x27, 0xea },
1490 { 0x28, 0x22 }, /* Was 0x20, bit1 enables a 2x gain which we need */
1491 { 0x29, 0x00 },
1492 { 0x2a, 0x10 },
1493 { 0x2b, 0x00 },
1494 { 0x2c, 0x88 },
1495 { 0x2d, 0x91 },
1496 { 0x2e, 0x80 },
1497 { 0x2f, 0x44 },
1498 { 0x60, 0x27 },
1499 { 0x61, 0x02 },
1500 { 0x62, 0x5f },
1501 { 0x63, 0xd5 },
1502 { 0x64, 0x57 },
1503 { 0x65, 0x83 },
1504 { 0x66, 0x55 },
1505 { 0x67, 0x92 },
1506 { 0x68, 0xcf },
1507 { 0x69, 0x76 },
1508 { 0x6a, 0x22 },
1509 { 0x6b, 0x00 },
1510 { 0x6c, 0x02 },
1511 { 0x6d, 0x44 },
1512 { 0x6e, 0x80 },
1513 { 0x6f, 0x1d },
1514 { 0x70, 0x8b },
1515 { 0x71, 0x00 },
1516 { 0x72, 0x14 },
1517 { 0x73, 0x54 },
1518 { 0x74, 0x00 },
1519 { 0x75, 0x8e },
1520 { 0x76, 0x00 },
1521 { 0x77, 0xff },
1522 { 0x78, 0x80 },
1523 { 0x79, 0x80 },
1524 { 0x7a, 0x80 },
1525 { 0x7b, 0xe2 },
1526 { 0x7c, 0x00 },
1527 };
1528
1529 /* 7640 and 7648. The defaults should be OK for most registers. */
1530 static const struct ov_i2c_regvals norm_7640[] = {
1531 { 0x12, 0x80 },
1532 { 0x12, 0x14 },
1533 };
1534
1535 /* 7670. Defaults taken from OmniVision provided data,
1536 * as provided by Jonathan Corbet of OLPC */
1537 static const struct ov_i2c_regvals norm_7670[] = {
1538 { OV7670_REG_COM7, OV7670_COM7_RESET },
1539 { OV7670_REG_TSLB, 0x04 }, /* OV */
1540 { OV7670_REG_COM7, OV7670_COM7_FMT_VGA }, /* VGA */
1541 { OV7670_REG_CLKRC, 0x01 },
1542 /*
1543 * Set the hardware window. These values from OV don't entirely
1544 * make sense - hstop is less than hstart. But they work...
1545 */
1546 { OV7670_REG_HSTART, 0x13 },
1547 { OV7670_REG_HSTOP, 0x01 },
1548 { OV7670_REG_HREF, 0xb6 },
1549 { OV7670_REG_VSTART, 0x02 },
1550 { OV7670_REG_VSTOP, 0x7a },
1551 { OV7670_REG_VREF, 0x0a },
1552
1553 { OV7670_REG_COM3, 0x00 },
1554 { OV7670_REG_COM14, 0x00 },
1555 /* Mystery scaling numbers */
1556 { 0x70, 0x3a },
1557 { 0x71, 0x35 },
1558 { 0x72, 0x11 },
1559 { 0x73, 0xf0 },
1560 { 0xa2, 0x02 },
1561 /* { OV7670_REG_COM10, 0x0 }, */
1562
1563 /* Gamma curve values */
1564 { 0x7a, 0x20 },
1565 { 0x7b, 0x10 },
1566 { 0x7c, 0x1e },
1567 { 0x7d, 0x35 },
1568 { 0x7e, 0x5a },
1569 { 0x7f, 0x69 },
1570 { 0x80, 0x76 },
1571 { 0x81, 0x80 },
1572 { 0x82, 0x88 },
1573 { 0x83, 0x8f },
1574 { 0x84, 0x96 },
1575 { 0x85, 0xa3 },
1576 { 0x86, 0xaf },
1577 { 0x87, 0xc4 },
1578 { 0x88, 0xd7 },
1579 { 0x89, 0xe8 },
1580
1581 /* AGC and AEC parameters. Note we start by disabling those features,
1582 then turn them only after tweaking the values. */
1583 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
1584 | OV7670_COM8_AECSTEP
1585 | OV7670_COM8_BFILT },
1586 { OV7670_REG_GAIN, 0x00 },
1587 { OV7670_REG_AECH, 0x00 },
1588 { OV7670_REG_COM4, 0x40 }, /* magic reserved bit */
1589 { OV7670_REG_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
1590 { OV7670_REG_BD50MAX, 0x05 },
1591 { OV7670_REG_BD60MAX, 0x07 },
1592 { OV7670_REG_AEW, 0x95 },
1593 { OV7670_REG_AEB, 0x33 },
1594 { OV7670_REG_VPT, 0xe3 },
1595 { OV7670_REG_HAECC1, 0x78 },
1596 { OV7670_REG_HAECC2, 0x68 },
1597 { 0xa1, 0x03 }, /* magic */
1598 { OV7670_REG_HAECC3, 0xd8 },
1599 { OV7670_REG_HAECC4, 0xd8 },
1600 { OV7670_REG_HAECC5, 0xf0 },
1601 { OV7670_REG_HAECC6, 0x90 },
1602 { OV7670_REG_HAECC7, 0x94 },
1603 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
1604 | OV7670_COM8_AECSTEP
1605 | OV7670_COM8_BFILT
1606 | OV7670_COM8_AGC
1607 | OV7670_COM8_AEC },
1608
1609 /* Almost all of these are magic "reserved" values. */
1610 { OV7670_REG_COM5, 0x61 },
1611 { OV7670_REG_COM6, 0x4b },
1612 { 0x16, 0x02 },
1613 { OV7670_REG_MVFP, 0x07 },
1614 { 0x21, 0x02 },
1615 { 0x22, 0x91 },
1616 { 0x29, 0x07 },
1617 { 0x33, 0x0b },
1618 { 0x35, 0x0b },
1619 { 0x37, 0x1d },
1620 { 0x38, 0x71 },
1621 { 0x39, 0x2a },
1622 { OV7670_REG_COM12, 0x78 },
1623 { 0x4d, 0x40 },
1624 { 0x4e, 0x20 },
1625 { OV7670_REG_GFIX, 0x00 },
1626 { 0x6b, 0x4a },
1627 { 0x74, 0x10 },
1628 { 0x8d, 0x4f },
1629 { 0x8e, 0x00 },
1630 { 0x8f, 0x00 },
1631 { 0x90, 0x00 },
1632 { 0x91, 0x00 },
1633 { 0x96, 0x00 },
1634 { 0x9a, 0x00 },
1635 { 0xb0, 0x84 },
1636 { 0xb1, 0x0c },
1637 { 0xb2, 0x0e },
1638 { 0xb3, 0x82 },
1639 { 0xb8, 0x0a },
1640
1641 /* More reserved magic, some of which tweaks white balance */
1642 { 0x43, 0x0a },
1643 { 0x44, 0xf0 },
1644 { 0x45, 0x34 },
1645 { 0x46, 0x58 },
1646 { 0x47, 0x28 },
1647 { 0x48, 0x3a },
1648 { 0x59, 0x88 },
1649 { 0x5a, 0x88 },
1650 { 0x5b, 0x44 },
1651 { 0x5c, 0x67 },
1652 { 0x5d, 0x49 },
1653 { 0x5e, 0x0e },
1654 { 0x6c, 0x0a },
1655 { 0x6d, 0x55 },
1656 { 0x6e, 0x11 },
1657 { 0x6f, 0x9f },
1658 /* "9e for advance AWB" */
1659 { 0x6a, 0x40 },
1660 { OV7670_REG_BLUE, 0x40 },
1661 { OV7670_REG_RED, 0x60 },
1662 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
1663 | OV7670_COM8_AECSTEP
1664 | OV7670_COM8_BFILT
1665 | OV7670_COM8_AGC
1666 | OV7670_COM8_AEC
1667 | OV7670_COM8_AWB },
1668
1669 /* Matrix coefficients */
1670 { 0x4f, 0x80 },
1671 { 0x50, 0x80 },
1672 { 0x51, 0x00 },
1673 { 0x52, 0x22 },
1674 { 0x53, 0x5e },
1675 { 0x54, 0x80 },
1676 { 0x58, 0x9e },
1677
1678 { OV7670_REG_COM16, OV7670_COM16_AWBGAIN },
1679 { OV7670_REG_EDGE, 0x00 },
1680 { 0x75, 0x05 },
1681 { 0x76, 0xe1 },
1682 { 0x4c, 0x00 },
1683 { 0x77, 0x01 },
1684 { OV7670_REG_COM13, OV7670_COM13_GAMMA
1685 | OV7670_COM13_UVSAT
1686 | 2}, /* was 3 */
1687 { 0x4b, 0x09 },
1688 { 0xc9, 0x60 },
1689 { OV7670_REG_COM16, 0x38 },
1690 { 0x56, 0x40 },
1691
1692 { 0x34, 0x11 },
1693 { OV7670_REG_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO },
1694 { 0xa4, 0x88 },
1695 { 0x96, 0x00 },
1696 { 0x97, 0x30 },
1697 { 0x98, 0x20 },
1698 { 0x99, 0x30 },
1699 { 0x9a, 0x84 },
1700 { 0x9b, 0x29 },
1701 { 0x9c, 0x03 },
1702 { 0x9d, 0x4c },
1703 { 0x9e, 0x3f },
1704 { 0x78, 0x04 },
1705
1706 /* Extra-weird stuff. Some sort of multiplexor register */
1707 { 0x79, 0x01 },
1708 { 0xc8, 0xf0 },
1709 { 0x79, 0x0f },
1710 { 0xc8, 0x00 },
1711 { 0x79, 0x10 },
1712 { 0xc8, 0x7e },
1713 { 0x79, 0x0a },
1714 { 0xc8, 0x80 },
1715 { 0x79, 0x0b },
1716 { 0xc8, 0x01 },
1717 { 0x79, 0x0c },
1718 { 0xc8, 0x0f },
1719 { 0x79, 0x0d },
1720 { 0xc8, 0x20 },
1721 { 0x79, 0x09 },
1722 { 0xc8, 0x80 },
1723 { 0x79, 0x02 },
1724 { 0xc8, 0xc0 },
1725 { 0x79, 0x03 },
1726 { 0xc8, 0x40 },
1727 { 0x79, 0x05 },
1728 { 0xc8, 0x30 },
1729 { 0x79, 0x26 },
1730 };
1731
1732 static const struct ov_i2c_regvals norm_8610[] = {
1733 { 0x12, 0x80 },
1734 { 0x00, 0x00 },
1735 { 0x01, 0x80 },
1736 { 0x02, 0x80 },
1737 { 0x03, 0xc0 },
1738 { 0x04, 0x30 },
1739 { 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */
1740 { 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */
1741 { 0x0a, 0x86 },
1742 { 0x0b, 0xb0 },
1743 { 0x0c, 0x20 },
1744 { 0x0d, 0x20 },
1745 { 0x11, 0x01 },
1746 { 0x12, 0x25 },
1747 { 0x13, 0x01 },
1748 { 0x14, 0x04 },
1749 { 0x15, 0x01 }, /* Lin and Win think different about UV order */
1750 { 0x16, 0x03 },
1751 { 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */
1752 { 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */
1753 { 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */
1754 { 0x1a, 0xf5 },
1755 { 0x1b, 0x00 },
1756 { 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */
1757 { 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */
1758 { 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */
1759 { 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */
1760 { 0x26, 0xa2 },
1761 { 0x27, 0xea },
1762 { 0x28, 0x00 },
1763 { 0x29, 0x00 },
1764 { 0x2a, 0x80 },
1765 { 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */
1766 { 0x2c, 0xac },
1767 { 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */
1768 { 0x2e, 0x80 },
1769 { 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */
1770 { 0x4c, 0x00 },
1771 { 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */
1772 { 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */
1773 { 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */
1774 { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */
1775 { 0x63, 0xff },
1776 { 0x64, 0x53 }, /* new windrv 090403 says 0x57,
1777 * maybe thats wrong */
1778 { 0x65, 0x00 },
1779 { 0x66, 0x55 },
1780 { 0x67, 0xb0 },
1781 { 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */
1782 { 0x69, 0x02 },
1783 { 0x6a, 0x22 },
1784 { 0x6b, 0x00 },
1785 { 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but
1786 * deleting bit7 colors the first images red */
1787 { 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */
1788 { 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */
1789 { 0x6f, 0x01 },
1790 { 0x70, 0x8b },
1791 { 0x71, 0x00 },
1792 { 0x72, 0x14 },
1793 { 0x73, 0x54 },
1794 { 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */
1795 { 0x75, 0x0e },
1796 { 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */
1797 { 0x77, 0xff },
1798 { 0x78, 0x80 },
1799 { 0x79, 0x80 },
1800 { 0x7a, 0x80 },
1801 { 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */
1802 { 0x7c, 0x00 },
1803 { 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */
1804 { 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */
1805 { 0x7f, 0xfb },
1806 { 0x80, 0x28 },
1807 { 0x81, 0x00 },
1808 { 0x82, 0x23 },
1809 { 0x83, 0x0b },
1810 { 0x84, 0x00 },
1811 { 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */
1812 { 0x86, 0xc9 },
1813 { 0x87, 0x00 },
1814 { 0x88, 0x00 },
1815 { 0x89, 0x01 },
1816 { 0x12, 0x20 },
1817 { 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */
1818 };
1819
1820 static unsigned char ov7670_abs_to_sm(unsigned char v)
1821 {
1822 if (v > 127)
1823 return v & 0x7f;
1824 return (128 - v) | 0x80;
1825 }
1826
1827 /* Write a OV519 register */
1828 static int reg_w(struct sd *sd, __u16 index, __u16 value)
1829 {
1830 int ret, req = 0;
1831
1832 switch (sd->bridge) {
1833 case BRIDGE_OV511:
1834 case BRIDGE_OV511PLUS:
1835 req = 2;
1836 break;
1837 case BRIDGE_OVFX2:
1838 req = 0x0a;
1839 /* fall through */
1840 case BRIDGE_W9968CF:
1841 ret = usb_control_msg(sd->gspca_dev.dev,
1842 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
1843 req,
1844 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1845 value, index, NULL, 0, 500);
1846 goto leave;
1847 default:
1848 req = 1;
1849 }
1850
1851 sd->gspca_dev.usb_buf[0] = value;
1852 ret = usb_control_msg(sd->gspca_dev.dev,
1853 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
1854 req,
1855 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1856 0, index,
1857 sd->gspca_dev.usb_buf, 1, 500);
1858 leave:
1859 if (ret < 0) {
1860 err("Write reg 0x%04x -> [0x%02x] failed",
1861 value, index);
1862 return ret;
1863 }
1864
1865 PDEBUG(D_USBO, "Write reg 0x%04x -> [0x%02x]", value, index);
1866 return 0;
1867 }
1868
1869 /* Read from a OV519 register, note not valid for the w9968cf!! */
1870 /* returns: negative is error, pos or zero is data */
1871 static int reg_r(struct sd *sd, __u16 index)
1872 {
1873 int ret;
1874 int req;
1875
1876 switch (sd->bridge) {
1877 case BRIDGE_OV511:
1878 case BRIDGE_OV511PLUS:
1879 req = 3;
1880 break;
1881 case BRIDGE_OVFX2:
1882 req = 0x0b;
1883 break;
1884 default:
1885 req = 1;
1886 }
1887
1888 ret = usb_control_msg(sd->gspca_dev.dev,
1889 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
1890 req,
1891 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1892 0, index, sd->gspca_dev.usb_buf, 1, 500);
1893
1894 if (ret >= 0) {
1895 ret = sd->gspca_dev.usb_buf[0];
1896 PDEBUG(D_USBI, "Read reg [0x%02X] -> 0x%04X", index, ret);
1897 } else
1898 err("Read reg [0x%02x] failed", index);
1899
1900 return ret;
1901 }
1902
1903 /* Read 8 values from a OV519 register */
1904 static int reg_r8(struct sd *sd,
1905 __u16 index)
1906 {
1907 int ret;
1908
1909 ret = usb_control_msg(sd->gspca_dev.dev,
1910 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
1911 1, /* REQ_IO */
1912 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1913 0, index, sd->gspca_dev.usb_buf, 8, 500);
1914
1915 if (ret >= 0)
1916 ret = sd->gspca_dev.usb_buf[0];
1917 else
1918 err("Read reg 8 [0x%02x] failed", index);
1919
1920 return ret;
1921 }
1922
1923 /*
1924 * Writes bits at positions specified by mask to an OV51x reg. Bits that are in
1925 * the same position as 1's in "mask" are cleared and set to "value". Bits
1926 * that are in the same position as 0's in "mask" are preserved, regardless
1927 * of their respective state in "value".
1928 */
1929 static int reg_w_mask(struct sd *sd,
1930 __u16 index,
1931 __u8 value,
1932 __u8 mask)
1933 {
1934 int ret;
1935 __u8 oldval;
1936
1937 if (mask != 0xff) {
1938 value &= mask; /* Enforce mask on value */
1939 ret = reg_r(sd, index);
1940 if (ret < 0)
1941 return ret;
1942
1943 oldval = ret & ~mask; /* Clear the masked bits */
1944 value |= oldval; /* Set the desired bits */
1945 }
1946 return reg_w(sd, index, value);
1947 }
1948
1949 /*
1950 * Writes multiple (n) byte value to a single register. Only valid with certain
1951 * registers (0x30 and 0xc4 - 0xce).
1952 */
1953 static int ov518_reg_w32(struct sd *sd, __u16 index, u32 value, int n)
1954 {
1955 int ret;
1956
1957 *((__le32 *) sd->gspca_dev.usb_buf) = __cpu_to_le32(value);
1958
1959 ret = usb_control_msg(sd->gspca_dev.dev,
1960 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
1961 1 /* REG_IO */,
1962 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1963 0, index,
1964 sd->gspca_dev.usb_buf, n, 500);
1965 if (ret < 0) {
1966 err("Write reg32 [%02x] %08x failed", index, value);
1967 return ret;
1968 }
1969
1970 return 0;
1971 }
1972
1973 static int ov511_i2c_w(struct sd *sd, __u8 reg, __u8 value)
1974 {
1975 int rc, retries;
1976
1977 PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
1978
1979 /* Three byte write cycle */
1980 for (retries = 6; ; ) {
1981 /* Select camera register */
1982 rc = reg_w(sd, R51x_I2C_SADDR_3, reg);
1983 if (rc < 0)
1984 return rc;
1985
1986 /* Write "value" to I2C data port of OV511 */
1987 rc = reg_w(sd, R51x_I2C_DATA, value);
1988 if (rc < 0)
1989 return rc;
1990
1991 /* Initiate 3-byte write cycle */
1992 rc = reg_w(sd, R511_I2C_CTL, 0x01);
1993 if (rc < 0)
1994 return rc;
1995
1996 do {
1997 rc = reg_r(sd, R511_I2C_CTL);
1998 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
1999
2000 if (rc < 0)
2001 return rc;
2002
2003 if ((rc & 2) == 0) /* Ack? */
2004 break;
2005 if (--retries < 0) {
2006 PDEBUG(D_USBO, "i2c write retries exhausted");
2007 return -1;
2008 }
2009 }
2010
2011 return 0;
2012 }
2013
2014 static int ov511_i2c_r(struct sd *sd, __u8 reg)
2015 {
2016 int rc, value, retries;
2017
2018 /* Two byte write cycle */
2019 for (retries = 6; ; ) {
2020 /* Select camera register */
2021 rc = reg_w(sd, R51x_I2C_SADDR_2, reg);
2022 if (rc < 0)
2023 return rc;
2024
2025 /* Initiate 2-byte write cycle */
2026 rc = reg_w(sd, R511_I2C_CTL, 0x03);
2027 if (rc < 0)
2028 return rc;
2029
2030 do {
2031 rc = reg_r(sd, R511_I2C_CTL);
2032 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2033
2034 if (rc < 0)
2035 return rc;
2036
2037 if ((rc & 2) == 0) /* Ack? */
2038 break;
2039
2040 /* I2C abort */
2041 reg_w(sd, R511_I2C_CTL, 0x10);
2042
2043 if (--retries < 0) {
2044 PDEBUG(D_USBI, "i2c write retries exhausted");
2045 return -1;
2046 }
2047 }
2048
2049 /* Two byte read cycle */
2050 for (retries = 6; ; ) {
2051 /* Initiate 2-byte read cycle */
2052 rc = reg_w(sd, R511_I2C_CTL, 0x05);
2053 if (rc < 0)
2054 return rc;
2055
2056 do {
2057 rc = reg_r(sd, R511_I2C_CTL);
2058 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2059
2060 if (rc < 0)
2061 return rc;
2062
2063 if ((rc & 2) == 0) /* Ack? */
2064 break;
2065
2066 /* I2C abort */
2067 rc = reg_w(sd, R511_I2C_CTL, 0x10);
2068 if (rc < 0)
2069 return rc;
2070
2071 if (--retries < 0) {
2072 PDEBUG(D_USBI, "i2c read retries exhausted");
2073 return -1;
2074 }
2075 }
2076
2077 value = reg_r(sd, R51x_I2C_DATA);
2078
2079 PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value);
2080
2081 /* This is needed to make i2c_w() work */
2082 rc = reg_w(sd, R511_I2C_CTL, 0x05);
2083 if (rc < 0)
2084 return rc;
2085
2086 return value;
2087 }
2088
2089 /*
2090 * The OV518 I2C I/O procedure is different, hence, this function.
2091 * This is normally only called from i2c_w(). Note that this function
2092 * always succeeds regardless of whether the sensor is present and working.
2093 */
2094 static int ov518_i2c_w(struct sd *sd,
2095 __u8 reg,
2096 __u8 value)
2097 {
2098 int rc;
2099
2100 PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
2101
2102 /* Select camera register */
2103 rc = reg_w(sd, R51x_I2C_SADDR_3, reg);
2104 if (rc < 0)
2105 return rc;
2106
2107 /* Write "value" to I2C data port of OV511 */
2108 rc = reg_w(sd, R51x_I2C_DATA, value);
2109 if (rc < 0)
2110 return rc;
2111
2112 /* Initiate 3-byte write cycle */
2113 rc = reg_w(sd, R518_I2C_CTL, 0x01);
2114 if (rc < 0)
2115 return rc;
2116
2117 /* wait for write complete */
2118 msleep(4);
2119 return reg_r8(sd, R518_I2C_CTL);
2120 }
2121
2122 /*
2123 * returns: negative is error, pos or zero is data
2124 *
2125 * The OV518 I2C I/O procedure is different, hence, this function.
2126 * This is normally only called from i2c_r(). Note that this function
2127 * always succeeds regardless of whether the sensor is present and working.
2128 */
2129 static int ov518_i2c_r(struct sd *sd, __u8 reg)
2130 {
2131 int rc, value;
2132
2133 /* Select camera register */
2134 rc = reg_w(sd, R51x_I2C_SADDR_2, reg);
2135 if (rc < 0)
2136 return rc;
2137
2138 /* Initiate 2-byte write cycle */
2139 rc = reg_w(sd, R518_I2C_CTL, 0x03);
2140 if (rc < 0)
2141 return rc;
2142
2143 /* Initiate 2-byte read cycle */
2144 rc = reg_w(sd, R518_I2C_CTL, 0x05);
2145 if (rc < 0)
2146 return rc;
2147 value = reg_r(sd, R51x_I2C_DATA);
2148 PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value);
2149 return value;
2150 }
2151
2152 static int ovfx2_i2c_w(struct sd *sd, __u8 reg, __u8 value)
2153 {
2154 int ret;
2155
2156 ret = usb_control_msg(sd->gspca_dev.dev,
2157 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2158 0x02,
2159 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2160 (__u16)value, (__u16)reg, NULL, 0, 500);
2161
2162 if (ret < 0) {
2163 err("i2c 0x%02x -> [0x%02x] failed", value, reg);
2164 return ret;
2165 }
2166
2167 PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
2168 return 0;
2169 }
2170
2171 static int ovfx2_i2c_r(struct sd *sd, __u8 reg)
2172 {
2173 int ret;
2174
2175 ret = usb_control_msg(sd->gspca_dev.dev,
2176 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2177 0x03,
2178 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2179 0, (__u16)reg, sd->gspca_dev.usb_buf, 1, 500);
2180
2181 if (ret >= 0) {
2182 ret = sd->gspca_dev.usb_buf[0];
2183 PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, ret);
2184 } else
2185 err("i2c read [0x%02x] failed", reg);
2186
2187 return ret;
2188 }
2189
2190 static int i2c_w(struct sd *sd, __u8 reg, __u8 value)
2191 {
2192 int ret = -1;
2193
2194 if (sd->sensor_reg_cache[reg] == value)
2195 return 0;
2196
2197 switch (sd->bridge) {
2198 case BRIDGE_OV511:
2199 case BRIDGE_OV511PLUS:
2200 ret = ov511_i2c_w(sd, reg, value);
2201 break;
2202 case BRIDGE_OV518:
2203 case BRIDGE_OV518PLUS:
2204 case BRIDGE_OV519:
2205 ret = ov518_i2c_w(sd, reg, value);
2206 break;
2207 case BRIDGE_OVFX2:
2208 ret = ovfx2_i2c_w(sd, reg, value);
2209 break;
2210 case BRIDGE_W9968CF:
2211 ret = w9968cf_i2c_w(sd, reg, value);
2212 break;
2213 }
2214
2215 if (ret >= 0) {
2216 /* Up on sensor reset empty the register cache */
2217 if (reg == 0x12 && (value & 0x80))
2218 memset(sd->sensor_reg_cache, -1,
2219 sizeof(sd->sensor_reg_cache));
2220 else
2221 sd->sensor_reg_cache[reg] = value;
2222 }
2223
2224 return ret;
2225 }
2226
2227 static int i2c_r(struct sd *sd, __u8 reg)
2228 {
2229 int ret = -1;
2230
2231 if (sd->sensor_reg_cache[reg] != -1)
2232 return sd->sensor_reg_cache[reg];
2233
2234 switch (sd->bridge) {
2235 case BRIDGE_OV511:
2236 case BRIDGE_OV511PLUS:
2237 ret = ov511_i2c_r(sd, reg);
2238 break;
2239 case BRIDGE_OV518:
2240 case BRIDGE_OV518PLUS:
2241 case BRIDGE_OV519:
2242 ret = ov518_i2c_r(sd, reg);
2243 break;
2244 case BRIDGE_OVFX2:
2245 ret = ovfx2_i2c_r(sd, reg);
2246 break;
2247 case BRIDGE_W9968CF:
2248 ret = w9968cf_i2c_r(sd, reg);
2249 break;
2250 }
2251
2252 if (ret >= 0)
2253 sd->sensor_reg_cache[reg] = ret;
2254
2255 return ret;
2256 }
2257
2258 /* Writes bits at positions specified by mask to an I2C reg. Bits that are in
2259 * the same position as 1's in "mask" are cleared and set to "value". Bits
2260 * that are in the same position as 0's in "mask" are preserved, regardless
2261 * of their respective state in "value".
2262 */
2263 static int i2c_w_mask(struct sd *sd,
2264 __u8 reg,
2265 __u8 value,
2266 __u8 mask)
2267 {
2268 int rc;
2269 __u8 oldval;
2270
2271 value &= mask; /* Enforce mask on value */
2272 rc = i2c_r(sd, reg);
2273 if (rc < 0)
2274 return rc;
2275 oldval = rc & ~mask; /* Clear the masked bits */
2276 value |= oldval; /* Set the desired bits */
2277 return i2c_w(sd, reg, value);
2278 }
2279
2280 /* Temporarily stops OV511 from functioning. Must do this before changing
2281 * registers while the camera is streaming */
2282 static inline int ov51x_stop(struct sd *sd)
2283 {
2284 PDEBUG(D_STREAM, "stopping");
2285 sd->stopped = 1;
2286 switch (sd->bridge) {
2287 case BRIDGE_OV511:
2288 case BRIDGE_OV511PLUS:
2289 return reg_w(sd, R51x_SYS_RESET, 0x3d);
2290 case BRIDGE_OV518:
2291 case BRIDGE_OV518PLUS:
2292 return reg_w_mask(sd, R51x_SYS_RESET, 0x3a, 0x3a);
2293 case BRIDGE_OV519:
2294 return reg_w(sd, OV519_SYS_RESET1, 0x0f);
2295 case BRIDGE_OVFX2:
2296 return reg_w_mask(sd, 0x0f, 0x00, 0x02);
2297 case BRIDGE_W9968CF:
2298 return reg_w(sd, 0x3c, 0x0a05); /* stop USB transfer */
2299 }
2300
2301 return 0;
2302 }
2303
2304 /* Restarts OV511 after ov511_stop() is called. Has no effect if it is not
2305 * actually stopped (for performance). */
2306 static inline int ov51x_restart(struct sd *sd)
2307 {
2308 int rc;
2309
2310 PDEBUG(D_STREAM, "restarting");
2311 if (!sd->stopped)
2312 return 0;
2313 sd->stopped = 0;
2314
2315 /* Reinitialize the stream */
2316 switch (sd->bridge) {
2317 case BRIDGE_OV511:
2318 case BRIDGE_OV511PLUS:
2319 return reg_w(sd, R51x_SYS_RESET, 0x00);
2320 case BRIDGE_OV518:
2321 case BRIDGE_OV518PLUS:
2322 rc = reg_w(sd, 0x2f, 0x80);
2323 if (rc < 0)
2324 return rc;
2325 return reg_w(sd, R51x_SYS_RESET, 0x00);
2326 case BRIDGE_OV519:
2327 return reg_w(sd, OV519_SYS_RESET1, 0x00);
2328 case BRIDGE_OVFX2:
2329 return reg_w_mask(sd, 0x0f, 0x02, 0x02);
2330 case BRIDGE_W9968CF:
2331 return reg_w(sd, 0x3c, 0x8a05); /* USB FIFO enable */
2332 }
2333
2334 return 0;
2335 }
2336
2337 static int ov51x_set_slave_ids(struct sd *sd, __u8 slave);
2338
2339 /* This does an initial reset of an OmniVision sensor and ensures that I2C
2340 * is synchronized. Returns <0 on failure.
2341 */
2342 static int init_ov_sensor(struct sd *sd, __u8 slave)
2343 {
2344 int i;
2345
2346 if (ov51x_set_slave_ids(sd, slave) < 0)
2347 return -EIO;
2348
2349 /* Reset the sensor */
2350 if (i2c_w(sd, 0x12, 0x80) < 0)
2351 return -EIO;
2352
2353 /* Wait for it to initialize */
2354 msleep(150);
2355
2356 for (i = 0; i < i2c_detect_tries; i++) {
2357 if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f &&
2358 i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) {
2359 PDEBUG(D_PROBE, "I2C synced in %d attempt(s)", i);
2360 return 0;
2361 }
2362
2363 /* Reset the sensor */
2364 if (i2c_w(sd, 0x12, 0x80) < 0)
2365 return -EIO;
2366 /* Wait for it to initialize */
2367 msleep(150);
2368 /* Dummy read to sync I2C */
2369 if (i2c_r(sd, 0x00) < 0)
2370 return -EIO;
2371 }
2372 return -EIO;
2373 }
2374
2375 /* Set the read and write slave IDs. The "slave" argument is the write slave,
2376 * and the read slave will be set to (slave + 1).
2377 * This should not be called from outside the i2c I/O functions.
2378 * Sets I2C read and write slave IDs. Returns <0 for error
2379 */
2380 static int ov51x_set_slave_ids(struct sd *sd,
2381 __u8 slave)
2382 {
2383 int rc;
2384
2385 switch (sd->bridge) {
2386 case BRIDGE_OVFX2:
2387 return reg_w(sd, OVFX2_I2C_ADDR, slave);
2388 case BRIDGE_W9968CF:
2389 sd->sensor_addr = slave;
2390 return 0;
2391 }
2392
2393 rc = reg_w(sd, R51x_I2C_W_SID, slave);
2394 if (rc < 0)
2395 return rc;
2396 return reg_w(sd, R51x_I2C_R_SID, slave + 1);
2397 }
2398
2399 static int write_regvals(struct sd *sd,
2400 const struct ov_regvals *regvals,
2401 int n)
2402 {
2403 int rc;
2404
2405 while (--n >= 0) {
2406 rc = reg_w(sd, regvals->reg, regvals->val);
2407 if (rc < 0)
2408 return rc;
2409 regvals++;
2410 }
2411 return 0;
2412 }
2413
2414 static int write_i2c_regvals(struct sd *sd,
2415 const struct ov_i2c_regvals *regvals,
2416 int n)
2417 {
2418 int rc;
2419
2420 while (--n >= 0) {
2421 rc = i2c_w(sd, regvals->reg, regvals->val);
2422 if (rc < 0)
2423 return rc;
2424 regvals++;
2425 }
2426 return 0;
2427 }
2428
2429 /****************************************************************************
2430 *
2431 * OV511 and sensor configuration
2432 *
2433 ***************************************************************************/
2434
2435 /* This initializes the OV2x10 / OV3610 / OV3620 */
2436 static int ov_hires_configure(struct sd *sd)
2437 {
2438 int high, low;
2439
2440 if (sd->bridge != BRIDGE_OVFX2) {
2441 err("error hires sensors only supported with ovfx2");
2442 return -1;
2443 }
2444
2445 PDEBUG(D_PROBE, "starting ov hires configuration");
2446
2447 /* Detect sensor (sub)type */
2448 high = i2c_r(sd, 0x0a);
2449 low = i2c_r(sd, 0x0b);
2450 /* info("%x, %x", high, low); */
2451 if (high == 0x96 && low == 0x40) {
2452 PDEBUG(D_PROBE, "Sensor is an OV2610");
2453 sd->sensor = SEN_OV2610;
2454 } else if (high == 0x36 && (low & 0x0f) == 0x00) {
2455 PDEBUG(D_PROBE, "Sensor is an OV3610");
2456 sd->sensor = SEN_OV3610;
2457 } else {
2458 err("Error unknown sensor type: 0x%02x%02x",
2459 high, low);
2460 return -1;
2461 }
2462
2463 /* Set sensor-specific vars */
2464 return 0;
2465 }
2466
2467
2468 /* This initializes the OV8110, OV8610 sensor. The OV8110 uses
2469 * the same register settings as the OV8610, since they are very similar.
2470 */
2471 static int ov8xx0_configure(struct sd *sd)
2472 {
2473 int rc;
2474
2475 PDEBUG(D_PROBE, "starting ov8xx0 configuration");
2476
2477 /* Detect sensor (sub)type */
2478 rc = i2c_r(sd, OV7610_REG_COM_I);
2479 if (rc < 0) {
2480 PDEBUG(D_ERR, "Error detecting sensor type");
2481 return -1;
2482 }
2483 if ((rc & 3) == 1) {
2484 sd->sensor = SEN_OV8610;
2485 } else {
2486 err("Unknown image sensor version: %d", rc & 3);
2487 return -1;
2488 }
2489
2490 /* Set sensor-specific vars */
2491 return 0;
2492 }
2493
2494 /* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses
2495 * the same register settings as the OV7610, since they are very similar.
2496 */
2497 static int ov7xx0_configure(struct sd *sd)
2498 {
2499 int rc, high, low;
2500
2501
2502 PDEBUG(D_PROBE, "starting OV7xx0 configuration");
2503
2504 /* Detect sensor (sub)type */
2505 rc = i2c_r(sd, OV7610_REG_COM_I);
2506
2507 /* add OV7670 here
2508 * it appears to be wrongly detected as a 7610 by default */
2509 if (rc < 0) {
2510 PDEBUG(D_ERR, "Error detecting sensor type");
2511 return -1;
2512 }
2513 if ((rc & 3) == 3) {
2514 /* quick hack to make OV7670s work */
2515 high = i2c_r(sd, 0x0a);
2516 low = i2c_r(sd, 0x0b);
2517 /* info("%x, %x", high, low); */
2518 if (high == 0x76 && low == 0x73) {
2519 PDEBUG(D_PROBE, "Sensor is an OV7670");
2520 sd->sensor = SEN_OV7670;
2521 } else {
2522 PDEBUG(D_PROBE, "Sensor is an OV7610");
2523 sd->sensor = SEN_OV7610;
2524 }
2525 } else if ((rc & 3) == 1) {
2526 /* I don't know what's different about the 76BE yet. */
2527 if (i2c_r(sd, 0x15) & 1) {
2528 PDEBUG(D_PROBE, "Sensor is an OV7620AE");
2529 sd->sensor = SEN_OV7620AE;
2530 } else {
2531 PDEBUG(D_PROBE, "Sensor is an OV76BE");
2532 sd->sensor = SEN_OV76BE;
2533 }
2534 } else if ((rc & 3) == 0) {
2535 /* try to read product id registers */
2536 high = i2c_r(sd, 0x0a);
2537 if (high < 0) {
2538 PDEBUG(D_ERR, "Error detecting camera chip PID");
2539 return high;
2540 }
2541 low = i2c_r(sd, 0x0b);
2542 if (low < 0) {
2543 PDEBUG(D_ERR, "Error detecting camera chip VER");
2544 return low;
2545 }
2546 if (high == 0x76) {
2547 switch (low) {
2548 case 0x30:
2549 err("Sensor is an OV7630/OV7635");
2550 err("7630 is not supported by this driver");
2551 return -1;
2552 case 0x40:
2553 PDEBUG(D_PROBE, "Sensor is an OV7645");
2554 sd->sensor = SEN_OV7640; /* FIXME */
2555 break;
2556 case 0x45:
2557 PDEBUG(D_PROBE, "Sensor is an OV7645B");
2558 sd->sensor = SEN_OV7640; /* FIXME */
2559 break;
2560 case 0x48:
2561 PDEBUG(D_PROBE, "Sensor is an OV7648");
2562 sd->sensor = SEN_OV7648;
2563 break;
2564 default:
2565 PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low);
2566 return -1;
2567 }
2568 } else {
2569 PDEBUG(D_PROBE, "Sensor is an OV7620");
2570 sd->sensor = SEN_OV7620;
2571 }
2572 } else {
2573 err("Unknown image sensor version: %d", rc & 3);
2574 return -1;
2575 }
2576
2577 /* Set sensor-specific vars */
2578 return 0;
2579 }
2580
2581 /* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */
2582 static int ov6xx0_configure(struct sd *sd)
2583 {
2584 int rc;
2585 PDEBUG(D_PROBE, "starting OV6xx0 configuration");
2586
2587 /* Detect sensor (sub)type */
2588 rc = i2c_r(sd, OV7610_REG_COM_I);
2589 if (rc < 0) {
2590 PDEBUG(D_ERR, "Error detecting sensor type");
2591 return -1;
2592 }
2593
2594 /* Ugh. The first two bits are the version bits, but
2595 * the entire register value must be used. I guess OVT
2596 * underestimated how many variants they would make. */
2597 switch (rc) {
2598 case 0x00:
2599 sd->sensor = SEN_OV6630;
2600 warn("WARNING: Sensor is an OV66308. Your camera may have");
2601 warn("been misdetected in previous driver versions.");
2602 break;
2603 case 0x01:
2604 sd->sensor = SEN_OV6620;
2605 PDEBUG(D_PROBE, "Sensor is an OV6620");
2606 break;
2607 case 0x02:
2608 sd->sensor = SEN_OV6630;
2609 PDEBUG(D_PROBE, "Sensor is an OV66308AE");
2610 break;
2611 case 0x03:
2612 sd->sensor = SEN_OV66308AF;
2613 PDEBUG(D_PROBE, "Sensor is an OV66308AF");
2614 break;
2615 case 0x90:
2616 sd->sensor = SEN_OV6630;
2617 warn("WARNING: Sensor is an OV66307. Your camera may have");
2618 warn("been misdetected in previous driver versions.");
2619 break;
2620 default:
2621 err("FATAL: Unknown sensor version: 0x%02x", rc);
2622 return -1;
2623 }
2624
2625 /* Set sensor-specific vars */
2626 sd->sif = 1;
2627
2628 return 0;
2629 }
2630
2631 /* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */
2632 static void ov51x_led_control(struct sd *sd, int on)
2633 {
2634 if (sd->invert_led)
2635 on = !on;
2636
2637 switch (sd->bridge) {
2638 /* OV511 has no LED control */
2639 case BRIDGE_OV511PLUS:
2640 reg_w(sd, R511_SYS_LED_CTL, on ? 1 : 0);
2641 break;
2642 case BRIDGE_OV518:
2643 case BRIDGE_OV518PLUS:
2644 reg_w_mask(sd, R518_GPIO_OUT, on ? 0x02 : 0x00, 0x02);
2645 break;
2646 case BRIDGE_OV519:
2647 reg_w_mask(sd, OV519_GPIO_DATA_OUT0, !on, 1); /* 0 / 1 */
2648 break;
2649 }
2650 }
2651
2652 static void sd_reset_snapshot(struct gspca_dev *gspca_dev)
2653 {
2654 struct sd *sd = (struct sd *) gspca_dev;
2655
2656 if (!sd->snapshot_needs_reset)
2657 return;
2658
2659 /* Note it is important that we clear sd->snapshot_needs_reset,
2660 before actually clearing the snapshot state in the bridge
2661 otherwise we might race with the pkt_scan interrupt handler */
2662 sd->snapshot_needs_reset = 0;
2663
2664 switch (sd->bridge) {
2665 case BRIDGE_OV511:
2666 case BRIDGE_OV511PLUS:
2667 reg_w(sd, R51x_SYS_SNAP, 0x02);
2668 reg_w(sd, R51x_SYS_SNAP, 0x00);
2669 break;
2670 case BRIDGE_OV518:
2671 case BRIDGE_OV518PLUS:
2672 reg_w(sd, R51x_SYS_SNAP, 0x02); /* Reset */
2673 reg_w(sd, R51x_SYS_SNAP, 0x01); /* Enable */
2674 break;
2675 case BRIDGE_OV519:
2676 reg_w(sd, R51x_SYS_RESET, 0x40);
2677 reg_w(sd, R51x_SYS_RESET, 0x00);
2678 break;
2679 }
2680 }
2681
2682 static int ov51x_upload_quan_tables(struct sd *sd)
2683 {
2684 const unsigned char yQuanTable511[] = {
2685 0, 1, 1, 2, 2, 3, 3, 4,
2686 1, 1, 1, 2, 2, 3, 4, 4,
2687 1, 1, 2, 2, 3, 4, 4, 4,
2688 2, 2, 2, 3, 4, 4, 4, 4,
2689 2, 2, 3, 4, 4, 5, 5, 5,
2690 3, 3, 4, 4, 5, 5, 5, 5,
2691 3, 4, 4, 4, 5, 5, 5, 5,
2692 4, 4, 4, 4, 5, 5, 5, 5
2693 };
2694
2695 const unsigned char uvQuanTable511[] = {
2696 0, 2, 2, 3, 4, 4, 4, 4,
2697 2, 2, 2, 4, 4, 4, 4, 4,
2698 2, 2, 3, 4, 4, 4, 4, 4,
2699 3, 4, 4, 4, 4, 4, 4, 4,
2700 4, 4, 4, 4, 4, 4, 4, 4,
2701 4, 4, 4, 4, 4, 4, 4, 4,
2702 4, 4, 4, 4, 4, 4, 4, 4,
2703 4, 4, 4, 4, 4, 4, 4, 4
2704 };
2705
2706 /* OV518 quantization tables are 8x4 (instead of 8x8) */
2707 const unsigned char yQuanTable518[] = {
2708 5, 4, 5, 6, 6, 7, 7, 7,
2709 5, 5, 5, 5, 6, 7, 7, 7,
2710 6, 6, 6, 6, 7, 7, 7, 8,
2711 7, 7, 6, 7, 7, 7, 8, 8
2712 };
2713
2714 const unsigned char uvQuanTable518[] = {
2715 6, 6, 6, 7, 7, 7, 7, 7,
2716 6, 6, 6, 7, 7, 7, 7, 7,
2717 6, 6, 6, 7, 7, 7, 7, 8,
2718 7, 7, 7, 7, 7, 7, 8, 8
2719 };
2720
2721 const unsigned char *pYTable, *pUVTable;
2722 unsigned char val0, val1;
2723 int i, size, rc, reg = R51x_COMP_LUT_BEGIN;
2724
2725 PDEBUG(D_PROBE, "Uploading quantization tables");
2726
2727 if (sd->bridge == BRIDGE_OV511 || sd->bridge == BRIDGE_OV511PLUS) {
2728 pYTable = yQuanTable511;
2729 pUVTable = uvQuanTable511;
2730 size = 32;
2731 } else {
2732 pYTable = yQuanTable518;
2733 pUVTable = uvQuanTable518;
2734 size = 16;
2735 }
2736
2737 for (i = 0; i < size; i++) {
2738 val0 = *pYTable++;
2739 val1 = *pYTable++;
2740 val0 &= 0x0f;
2741 val1 &= 0x0f;
2742 val0 |= val1 << 4;
2743 rc = reg_w(sd, reg, val0);
2744 if (rc < 0)
2745 return rc;
2746
2747 val0 = *pUVTable++;
2748 val1 = *pUVTable++;
2749 val0 &= 0x0f;
2750 val1 &= 0x0f;
2751 val0 |= val1 << 4;
2752 rc = reg_w(sd, reg + size, val0);
2753 if (rc < 0)
2754 return rc;
2755
2756 reg++;
2757 }
2758
2759 return 0;
2760 }
2761
2762 /* This initializes the OV511/OV511+ and the sensor */
2763 static int ov511_configure(struct gspca_dev *gspca_dev)
2764 {
2765 struct sd *sd = (struct sd *) gspca_dev;
2766 int rc;
2767
2768 /* For 511 and 511+ */
2769 const struct ov_regvals init_511[] = {
2770 { R51x_SYS_RESET, 0x7f },
2771 { R51x_SYS_INIT, 0x01 },
2772 { R51x_SYS_RESET, 0x7f },
2773 { R51x_SYS_INIT, 0x01 },
2774 { R51x_SYS_RESET, 0x3f },
2775 { R51x_SYS_INIT, 0x01 },
2776 { R51x_SYS_RESET, 0x3d },
2777 };
2778
2779 const struct ov_regvals norm_511[] = {
2780 { R511_DRAM_FLOW_CTL, 0x01 },
2781 { R51x_SYS_SNAP, 0x00 },
2782 { R51x_SYS_SNAP, 0x02 },
2783 { R51x_SYS_SNAP, 0x00 },
2784 { R511_FIFO_OPTS, 0x1f },
2785 { R511_COMP_EN, 0x00 },
2786 { R511_COMP_LUT_EN, 0x03 },
2787 };
2788
2789 const struct ov_regvals norm_511_p[] = {
2790 { R511_DRAM_FLOW_CTL, 0xff },
2791 { R51x_SYS_SNAP, 0x00 },
2792 { R51x_SYS_SNAP, 0x02 },
2793 { R51x_SYS_SNAP, 0x00 },
2794 { R511_FIFO_OPTS, 0xff },
2795 { R511_COMP_EN, 0x00 },
2796 { R511_COMP_LUT_EN, 0x03 },
2797 };
2798
2799 const struct ov_regvals compress_511[] = {
2800 { 0x70, 0x1f },
2801 { 0x71, 0x05 },
2802 { 0x72, 0x06 },
2803 { 0x73, 0x06 },
2804 { 0x74, 0x14 },
2805 { 0x75, 0x03 },
2806 { 0x76, 0x04 },
2807 { 0x77, 0x04 },
2808 };
2809
2810 PDEBUG(D_PROBE, "Device custom id %x", reg_r(sd, R51x_SYS_CUST_ID));
2811
2812 rc = write_regvals(sd, init_511, ARRAY_SIZE(init_511));
2813 if (rc < 0)
2814 return rc;
2815
2816 switch (sd->bridge) {
2817 case BRIDGE_OV511:
2818 rc = write_regvals(sd, norm_511, ARRAY_SIZE(norm_511));
2819 if (rc < 0)
2820 return rc;
2821 break;
2822 case BRIDGE_OV511PLUS:
2823 rc = write_regvals(sd, norm_511_p, ARRAY_SIZE(norm_511_p));
2824 if (rc < 0)
2825 return rc;
2826 break;
2827 }
2828
2829 /* Init compression */
2830 rc = write_regvals(sd, compress_511, ARRAY_SIZE(compress_511));
2831 if (rc < 0)
2832 return rc;
2833
2834 rc = ov51x_upload_quan_tables(sd);
2835 if (rc < 0) {
2836 PDEBUG(D_ERR, "Error uploading quantization tables");
2837 return rc;
2838 }
2839
2840 return 0;
2841 }
2842
2843 /* This initializes the OV518/OV518+ and the sensor */
2844 static int ov518_configure(struct gspca_dev *gspca_dev)
2845 {
2846 struct sd *sd = (struct sd *) gspca_dev;
2847 int rc;
2848
2849 /* For 518 and 518+ */
2850 const struct ov_regvals init_518[] = {
2851 { R51x_SYS_RESET, 0x40 },
2852 { R51x_SYS_INIT, 0xe1 },
2853 { R51x_SYS_RESET, 0x3e },
2854 { R51x_SYS_INIT, 0xe1 },
2855 { R51x_SYS_RESET, 0x00 },
2856 { R51x_SYS_INIT, 0xe1 },
2857 { 0x46, 0x00 },
2858 { 0x5d, 0x03 },
2859 };
2860
2861 const struct ov_regvals norm_518[] = {
2862 { R51x_SYS_SNAP, 0x02 }, /* Reset */
2863 { R51x_SYS_SNAP, 0x01 }, /* Enable */
2864 { 0x31, 0x0f },
2865 { 0x5d, 0x03 },
2866 { 0x24, 0x9f },
2867 { 0x25, 0x90 },
2868 { 0x20, 0x00 },
2869 { 0x51, 0x04 },
2870 { 0x71, 0x19 },
2871 { 0x2f, 0x80 },
2872 };
2873
2874 const struct ov_regvals norm_518_p[] = {
2875 { R51x_SYS_SNAP, 0x02 }, /* Reset */
2876 { R51x_SYS_SNAP, 0x01 }, /* Enable */
2877 { 0x31, 0x0f },
2878 { 0x5d, 0x03 },
2879 { 0x24, 0x9f },
2880 { 0x25, 0x90 },
2881 { 0x20, 0x60 },
2882 { 0x51, 0x02 },
2883 { 0x71, 0x19 },
2884 { 0x40, 0xff },
2885 { 0x41, 0x42 },
2886 { 0x46, 0x00 },
2887 { 0x33, 0x04 },
2888 { 0x21, 0x19 },
2889 { 0x3f, 0x10 },
2890 { 0x2f, 0x80 },
2891 };
2892
2893 /* First 5 bits of custom ID reg are a revision ID on OV518 */
2894 PDEBUG(D_PROBE, "Device revision %d",
2895 0x1F & reg_r(sd, R51x_SYS_CUST_ID));
2896
2897 rc = write_regvals(sd, init_518, ARRAY_SIZE(init_518));
2898 if (rc < 0)
2899 return rc;
2900
2901 /* Set LED GPIO pin to output mode */
2902 rc = reg_w_mask(sd, R518_GPIO_CTL, 0x00, 0x02);
2903 if (rc < 0)
2904 return rc;
2905
2906 switch (sd->bridge) {
2907 case BRIDGE_OV518:
2908 rc = write_regvals(sd, norm_518, ARRAY_SIZE(norm_518));
2909 if (rc < 0)
2910 return rc;
2911 break;
2912 case BRIDGE_OV518PLUS:
2913 rc = write_regvals(sd, norm_518_p, ARRAY_SIZE(norm_518_p));
2914 if (rc < 0)
2915 return rc;
2916 break;
2917 }
2918
2919 rc = ov51x_upload_quan_tables(sd);
2920 if (rc < 0) {
2921 PDEBUG(D_ERR, "Error uploading quantization tables");
2922 return rc;
2923 }
2924
2925 rc = reg_w(sd, 0x2f, 0x80);
2926 if (rc < 0)
2927 return rc;
2928
2929 return 0;
2930 }
2931
2932 static int ov519_configure(struct sd *sd)
2933 {
2934 static const struct ov_regvals init_519[] = {
2935 { 0x5a, 0x6d }, /* EnableSystem */
2936 { 0x53, 0x9b },
2937 { 0x54, 0xff }, /* set bit2 to enable jpeg */
2938 { 0x5d, 0x03 },
2939 { 0x49, 0x01 },
2940 { 0x48, 0x00 },
2941 /* Set LED pin to output mode. Bit 4 must be cleared or sensor
2942 * detection will fail. This deserves further investigation. */
2943 { OV519_GPIO_IO_CTRL0, 0xee },
2944 { 0x51, 0x0f }, /* SetUsbInit */
2945 { 0x51, 0x00 },
2946 { 0x22, 0x00 },
2947 /* windows reads 0x55 at this point*/
2948 };
2949
2950 return write_regvals(sd, init_519, ARRAY_SIZE(init_519));
2951 }
2952
2953 static int ovfx2_configure(struct sd *sd)
2954 {
2955 static const struct ov_regvals init_fx2[] = {
2956 { 0x00, 0x60 },
2957 { 0x02, 0x01 },
2958 { 0x0f, 0x1d },
2959 { 0xe9, 0x82 },
2960 { 0xea, 0xc7 },
2961 { 0xeb, 0x10 },
2962 { 0xec, 0xf6 },
2963 };
2964
2965 sd->stopped = 1;
2966
2967 return write_regvals(sd, init_fx2, ARRAY_SIZE(init_fx2));
2968 }
2969
2970 /* this function is called at probe time */
2971 static int sd_config(struct gspca_dev *gspca_dev,
2972 const struct usb_device_id *id)
2973 {
2974 struct sd *sd = (struct sd *) gspca_dev;
2975 struct cam *cam = &gspca_dev->cam;
2976 int ret = 0;
2977
2978 sd->bridge = id->driver_info & BRIDGE_MASK;
2979 sd->invert_led = id->driver_info & BRIDGE_INVERT_LED;
2980
2981 switch (sd->bridge) {
2982 case BRIDGE_OV511:
2983 case BRIDGE_OV511PLUS:
2984 ret = ov511_configure(gspca_dev);
2985 break;
2986 case BRIDGE_OV518:
2987 case BRIDGE_OV518PLUS:
2988 ret = ov518_configure(gspca_dev);
2989 break;
2990 case BRIDGE_OV519:
2991 ret = ov519_configure(sd);
2992 break;
2993 case BRIDGE_OVFX2:
2994 ret = ovfx2_configure(sd);
2995 cam->bulk_size = OVFX2_BULK_SIZE;
2996 cam->bulk_nurbs = MAX_NURBS;
2997 cam->bulk = 1;
2998 break;
2999 case BRIDGE_W9968CF:
3000 ret = w9968cf_configure(sd);
3001 cam->reverse_alts = 1;
3002 break;
3003 }
3004
3005 if (ret)
3006 goto error;
3007
3008 ov51x_led_control(sd, 0); /* turn LED off */
3009
3010 /* The OV519 must be more aggressive about sensor detection since
3011 * I2C write will never fail if the sensor is not present. We have
3012 * to try to initialize the sensor to detect its presence */
3013
3014 /* Test for 76xx */
3015 if (init_ov_sensor(sd, OV7xx0_SID) >= 0) {
3016 if (ov7xx0_configure(sd) < 0) {
3017 PDEBUG(D_ERR, "Failed to configure OV7xx0");
3018 goto error;
3019 }
3020 /* Test for 6xx0 */
3021 } else if (init_ov_sensor(sd, OV6xx0_SID) >= 0) {
3022 if (ov6xx0_configure(sd) < 0) {
3023 PDEBUG(D_ERR, "Failed to configure OV6xx0");
3024 goto error;
3025 }
3026 /* Test for 8xx0 */
3027 } else if (init_ov_sensor(sd, OV8xx0_SID) >= 0) {
3028 if (ov8xx0_configure(sd) < 0) {
3029 PDEBUG(D_ERR, "Failed to configure OV8xx0");
3030 goto error;
3031 }
3032 /* Test for 3xxx / 2xxx */
3033 } else if (init_ov_sensor(sd, OV_HIRES_SID) >= 0) {
3034 if (ov_hires_configure(sd) < 0) {
3035 PDEBUG(D_ERR, "Failed to configure high res OV");
3036 goto error;
3037 }
3038 } else {
3039 err("Can't determine sensor slave IDs");
3040 goto error;
3041 }
3042
3043 switch (sd->bridge) {
3044 case BRIDGE_OV511:
3045 case BRIDGE_OV511PLUS:
3046 if (!sd->sif) {
3047 cam->cam_mode = ov511_vga_mode;
3048 cam->nmodes = ARRAY_SIZE(ov511_vga_mode);
3049 } else {
3050 cam->cam_mode = ov511_sif_mode;
3051 cam->nmodes = ARRAY_SIZE(ov511_sif_mode);
3052 }
3053 break;
3054 case BRIDGE_OV518:
3055 case BRIDGE_OV518PLUS:
3056 if (!sd->sif) {
3057 cam->cam_mode = ov518_vga_mode;
3058 cam->nmodes = ARRAY_SIZE(ov518_vga_mode);
3059 } else {
3060 cam->cam_mode = ov518_sif_mode;
3061 cam->nmodes = ARRAY_SIZE(ov518_sif_mode);
3062 }
3063 break;
3064 case BRIDGE_OV519:
3065 if (!sd->sif) {
3066 cam->cam_mode = ov519_vga_mode;
3067 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3068 } else {
3069 cam->cam_mode = ov519_sif_mode;
3070 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3071 }
3072 break;
3073 case BRIDGE_OVFX2:
3074 if (sd->sensor == SEN_OV2610) {
3075 cam->cam_mode = ovfx2_ov2610_mode;
3076 cam->nmodes = ARRAY_SIZE(ovfx2_ov2610_mode);
3077 } else if (sd->sensor == SEN_OV3610) {
3078 cam->cam_mode = ovfx2_ov3610_mode;
3079 cam->nmodes = ARRAY_SIZE(ovfx2_ov3610_mode);
3080 } else if (!sd->sif) {
3081 cam->cam_mode = ov519_vga_mode;
3082 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3083 } else {
3084 cam->cam_mode = ov519_sif_mode;
3085 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3086 }
3087 break;
3088 case BRIDGE_W9968CF:
3089 cam->cam_mode = w9968cf_vga_mode;
3090 cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode);
3091 if (sd->sif)
3092 cam->nmodes--;
3093
3094 /* w9968cf needs initialisation once the sensor is known */
3095 if (w9968cf_init(sd) < 0)
3096 goto error;
3097 break;
3098 }
3099 gspca_dev->cam.ctrls = sd->ctrls;
3100 if (sd->sensor == SEN_OV7670)
3101 gspca_dev->ctrl_dis = 1 << COLORS;
3102 else
3103 gspca_dev->ctrl_dis = (1 << HFLIP) | (1 << VFLIP);
3104 sd->quality = QUALITY_DEF;
3105 if (sd->sensor == SEN_OV7640 ||
3106 sd->sensor == SEN_OV7648)
3107 gspca_dev->ctrl_dis |= (1 << AUTOBRIGHT) | (1 << CONTRAST);
3108 if (sd->sensor == SEN_OV7670)
3109 gspca_dev->ctrl_dis |= 1 << AUTOBRIGHT;
3110 /* OV8610 Frequency filter control should work but needs testing */
3111 if (sd->sensor == SEN_OV8610)
3112 gspca_dev->ctrl_dis |= 1 << FREQ;
3113 /* No controls for the OV2610/OV3610 */
3114 if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610)
3115 gspca_dev->ctrl_dis |= (1 << NCTRL) - 1;
3116
3117 return 0;
3118 error:
3119 PDEBUG(D_ERR, "OV519 Config failed");
3120 return -EBUSY;
3121 }
3122
3123 /* this function is called at probe and resume time */
3124 static int sd_init(struct gspca_dev *gspca_dev)
3125 {
3126 struct sd *sd = (struct sd *) gspca_dev;
3127
3128 /* initialize the sensor */
3129 switch (sd->sensor) {
3130 case SEN_OV2610:
3131 if (write_i2c_regvals(sd, norm_2610, ARRAY_SIZE(norm_2610)))
3132 return -EIO;
3133 /* Enable autogain, autoexpo, awb, bandfilter */
3134 if (i2c_w_mask(sd, 0x13, 0x27, 0x27) < 0)
3135 return -EIO;
3136 break;
3137 case SEN_OV3610:
3138 if (write_i2c_regvals(sd, norm_3620b, ARRAY_SIZE(norm_3620b)))
3139 return -EIO;
3140 /* Enable autogain, autoexpo, awb, bandfilter */
3141 if (i2c_w_mask(sd, 0x13, 0x27, 0x27) < 0)
3142 return -EIO;
3143 break;
3144 case SEN_OV6620:
3145 if (write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20)))
3146 return -EIO;
3147 break;
3148 case SEN_OV6630:
3149 case SEN_OV66308AF:
3150 sd->ctrls[CONTRAST].def = 200;
3151 /* The default is too low for the ov6630 */
3152 if (write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30)))
3153 return -EIO;
3154 break;
3155 default:
3156 /* case SEN_OV7610: */
3157 /* case SEN_OV76BE: */
3158 if (write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610)))
3159 return -EIO;
3160 if (i2c_w_mask(sd, 0x0e, 0x00, 0x40))
3161 return -EIO;
3162 break;
3163 case SEN_OV7620:
3164 case SEN_OV7620AE:
3165 if (write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620)))
3166 return -EIO;
3167 break;
3168 case SEN_OV7640:
3169 case SEN_OV7648:
3170 if (write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640)))
3171 return -EIO;
3172 break;
3173 case SEN_OV7670:
3174 sd->ctrls[FREQ].max = 3; /* auto */
3175 sd->ctrls[FREQ].def = 3;
3176 if (write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670)))
3177 return -EIO;
3178 break;
3179 case SEN_OV8610:
3180 if (write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610)))
3181 return -EIO;
3182 break;
3183 }
3184 return 0;
3185 }
3186
3187 /* Set up the OV511/OV511+ with the given image parameters.
3188 *
3189 * Do not put any sensor-specific code in here (including I2C I/O functions)
3190 */
3191 static int ov511_mode_init_regs(struct sd *sd)
3192 {
3193 int hsegs, vsegs, packet_size, fps, needed;
3194 int interlaced = 0;
3195 struct usb_host_interface *alt;
3196 struct usb_interface *intf;
3197
3198 intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3199 alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3200 if (!alt) {
3201 err("Couldn't get altsetting");
3202 return -EIO;
3203 }
3204
3205 packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3206 reg_w(sd, R51x_FIFO_PSIZE, packet_size >> 5);
3207
3208 reg_w(sd, R511_CAM_UV_EN, 0x01);
3209 reg_w(sd, R511_SNAP_UV_EN, 0x01);
3210 reg_w(sd, R511_SNAP_OPTS, 0x03);
3211
3212 /* Here I'm assuming that snapshot size == image size.
3213 * I hope that's always true. --claudio
3214 */
3215 hsegs = (sd->gspca_dev.width >> 3) - 1;
3216 vsegs = (sd->gspca_dev.height >> 3) - 1;
3217
3218 reg_w(sd, R511_CAM_PXCNT, hsegs);
3219 reg_w(sd, R511_CAM_LNCNT, vsegs);
3220 reg_w(sd, R511_CAM_PXDIV, 0x00);
3221 reg_w(sd, R511_CAM_LNDIV, 0x00);
3222
3223 /* YUV420, low pass filter on */
3224 reg_w(sd, R511_CAM_OPTS, 0x03);
3225
3226 /* Snapshot additions */
3227 reg_w(sd, R511_SNAP_PXCNT, hsegs);
3228 reg_w(sd, R511_SNAP_LNCNT, vsegs);
3229 reg_w(sd, R511_SNAP_PXDIV, 0x00);
3230 reg_w(sd, R511_SNAP_LNDIV, 0x00);
3231
3232 /******** Set the framerate ********/
3233 if (frame_rate > 0)
3234 sd->frame_rate = frame_rate;
3235
3236 switch (sd->sensor) {
3237 case SEN_OV6620:
3238 /* No framerate control, doesn't like higher rates yet */
3239 sd->clockdiv = 3;
3240 break;
3241
3242 /* Note once the FIXME's in mode_init_ov_sensor_regs() are fixed
3243 for more sensors we need to do this for them too */
3244 case SEN_OV7620:
3245 case SEN_OV7620AE:
3246 case SEN_OV7640:
3247 case SEN_OV7648:
3248 case SEN_OV76BE:
3249 if (sd->gspca_dev.width == 320)
3250 interlaced = 1;
3251 /* Fall through */
3252 case SEN_OV6630:
3253 case SEN_OV7610:
3254 case SEN_OV7670:
3255 switch (sd->frame_rate) {
3256 case 30:
3257 case 25:
3258 /* Not enough bandwidth to do 640x480 @ 30 fps */
3259 if (sd->gspca_dev.width != 640) {
3260 sd->clockdiv = 0;
3261 break;
3262 }
3263 /* Fall through for 640x480 case */
3264 default:
3265 /* case 20: */
3266 /* case 15: */
3267 sd->clockdiv = 1;
3268 break;
3269 case 10:
3270 sd->clockdiv = 2;
3271 break;
3272 case 5:
3273 sd->clockdiv = 5;
3274 break;
3275 }
3276 if (interlaced) {
3277 sd->clockdiv = (sd->clockdiv + 1) * 2 - 1;
3278 /* Higher then 10 does not work */
3279 if (sd->clockdiv > 10)
3280 sd->clockdiv = 10;
3281 }
3282 break;
3283
3284 case SEN_OV8610:
3285 /* No framerate control ?? */
3286 sd->clockdiv = 0;
3287 break;
3288 }
3289
3290 /* Check if we have enough bandwidth to disable compression */
3291 fps = (interlaced ? 60 : 30) / (sd->clockdiv + 1) + 1;
3292 needed = fps * sd->gspca_dev.width * sd->gspca_dev.height * 3 / 2;
3293 /* 1400 is a conservative estimate of the max nr of isoc packets/sec */
3294 if (needed > 1400 * packet_size) {
3295 /* Enable Y and UV quantization and compression */
3296 reg_w(sd, R511_COMP_EN, 0x07);
3297 reg_w(sd, R511_COMP_LUT_EN, 0x03);
3298 } else {
3299 reg_w(sd, R511_COMP_EN, 0x06);
3300 reg_w(sd, R511_COMP_LUT_EN, 0x00);
3301 }
3302
3303 reg_w(sd, R51x_SYS_RESET, OV511_RESET_OMNICE);
3304 reg_w(sd, R51x_SYS_RESET, 0);
3305
3306 return 0;
3307 }
3308
3309 /* Sets up the OV518/OV518+ with the given image parameters
3310 *
3311 * OV518 needs a completely different approach, until we can figure out what
3312 * the individual registers do. Also, only 15 FPS is supported now.
3313 *
3314 * Do not put any sensor-specific code in here (including I2C I/O functions)
3315 */
3316 static int ov518_mode_init_regs(struct sd *sd)
3317 {
3318 int hsegs, vsegs, packet_size;
3319 struct usb_host_interface *alt;
3320 struct usb_interface *intf;
3321
3322 intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3323 alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3324 if (!alt) {
3325 err("Couldn't get altsetting");
3326 return -EIO;
3327 }
3328
3329 packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3330 ov518_reg_w32(sd, R51x_FIFO_PSIZE, packet_size & ~7, 2);
3331
3332 /******** Set the mode ********/
3333
3334 reg_w(sd, 0x2b, 0);
3335 reg_w(sd, 0x2c, 0);
3336 reg_w(sd, 0x2d, 0);
3337 reg_w(sd, 0x2e, 0);
3338 reg_w(sd, 0x3b, 0);
3339 reg_w(sd, 0x3c, 0);
3340 reg_w(sd, 0x3d, 0);
3341 reg_w(sd, 0x3e, 0);
3342
3343 if (sd->bridge == BRIDGE_OV518) {
3344 /* Set 8-bit (YVYU) input format */
3345 reg_w_mask(sd, 0x20, 0x08, 0x08);
3346
3347 /* Set 12-bit (4:2:0) output format */
3348 reg_w_mask(sd, 0x28, 0x80, 0xf0);
3349 reg_w_mask(sd, 0x38, 0x80, 0xf0);
3350 } else {
3351 reg_w(sd, 0x28, 0x80);
3352 reg_w(sd, 0x38, 0x80);
3353 }
3354
3355 hsegs = sd->gspca_dev.width / 16;
3356 vsegs = sd->gspca_dev.height / 4;
3357
3358 reg_w(sd, 0x29, hsegs);
3359 reg_w(sd, 0x2a, vsegs);
3360
3361 reg_w(sd, 0x39, hsegs);
3362 reg_w(sd, 0x3a, vsegs);
3363
3364 /* Windows driver does this here; who knows why */
3365 reg_w(sd, 0x2f, 0x80);
3366
3367 /******** Set the framerate ********/
3368 sd->clockdiv = 1;
3369
3370 /* Mode independent, but framerate dependent, regs */
3371 /* 0x51: Clock divider; Only works on some cams which use 2 crystals */
3372 reg_w(sd, 0x51, 0x04);
3373 reg_w(sd, 0x22, 0x18);
3374 reg_w(sd, 0x23, 0xff);
3375
3376 if (sd->bridge == BRIDGE_OV518PLUS) {
3377 switch (sd->sensor) {
3378 case SEN_OV7620AE:
3379 if (sd->gspca_dev.width == 320) {
3380 reg_w(sd, 0x20, 0x00);
3381 reg_w(sd, 0x21, 0x19);
3382 } else {
3383 reg_w(sd, 0x20, 0x60);
3384 reg_w(sd, 0x21, 0x1f);
3385 }
3386 break;
3387 case SEN_OV7620:
3388 reg_w(sd, 0x20, 0x00);
3389 reg_w(sd, 0x21, 0x19);
3390 break;
3391 default:
3392 reg_w(sd, 0x21, 0x19);
3393 }
3394 } else
3395 reg_w(sd, 0x71, 0x17); /* Compression-related? */
3396
3397 /* FIXME: Sensor-specific */
3398 /* Bit 5 is what matters here. Of course, it is "reserved" */
3399 i2c_w(sd, 0x54, 0x23);
3400
3401 reg_w(sd, 0x2f, 0x80);
3402
3403 if (sd->bridge == BRIDGE_OV518PLUS) {
3404 reg_w(sd, 0x24, 0x94);
3405 reg_w(sd, 0x25, 0x90);
3406 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
3407 ov518_reg_w32(sd, 0xc6, 540, 2); /* 21ch */
3408 ov518_reg_w32(sd, 0xc7, 540, 2); /* 21ch */
3409 ov518_reg_w32(sd, 0xc8, 108, 2); /* 6ch */
3410 ov518_reg_w32(sd, 0xca, 131098, 3); /* 2001ah */
3411 ov518_reg_w32(sd, 0xcb, 532, 2); /* 214h */
3412 ov518_reg_w32(sd, 0xcc, 2400, 2); /* 960h */
3413 ov518_reg_w32(sd, 0xcd, 32, 2); /* 20h */
3414 ov518_reg_w32(sd, 0xce, 608, 2); /* 260h */
3415 } else {
3416 reg_w(sd, 0x24, 0x9f);
3417 reg_w(sd, 0x25, 0x90);
3418 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
3419 ov518_reg_w32(sd, 0xc6, 381, 2); /* 17dh */
3420 ov518_reg_w32(sd, 0xc7, 381, 2); /* 17dh */
3421 ov518_reg_w32(sd, 0xc8, 128, 2); /* 80h */
3422 ov518_reg_w32(sd, 0xca, 183331, 3); /* 2cc23h */
3423 ov518_reg_w32(sd, 0xcb, 746, 2); /* 2eah */
3424 ov518_reg_w32(sd, 0xcc, 1750, 2); /* 6d6h */
3425 ov518_reg_w32(sd, 0xcd, 45, 2); /* 2dh */
3426 ov518_reg_w32(sd, 0xce, 851, 2); /* 353h */
3427 }
3428
3429 reg_w(sd, 0x2f, 0x80);
3430
3431 return 0;
3432 }
3433
3434
3435 /* Sets up the OV519 with the given image parameters
3436 *
3437 * OV519 needs a completely different approach, until we can figure out what
3438 * the individual registers do.
3439 *
3440 * Do not put any sensor-specific code in here (including I2C I/O functions)
3441 */
3442 static int ov519_mode_init_regs(struct sd *sd)
3443 {
3444 static const struct ov_regvals mode_init_519_ov7670[] = {
3445 { 0x5d, 0x03 }, /* Turn off suspend mode */
3446 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3447 { 0x54, 0x0f }, /* bit2 (jpeg enable) */
3448 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3449 { 0xa3, 0x18 },
3450 { 0xa4, 0x04 },
3451 { 0xa5, 0x28 },
3452 { 0x37, 0x00 }, /* SetUsbInit */
3453 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3454 /* Enable both fields, YUV Input, disable defect comp (why?) */
3455 { 0x20, 0x0c },
3456 { 0x21, 0x38 },
3457 { 0x22, 0x1d },
3458 { 0x17, 0x50 }, /* undocumented */
3459 { 0x37, 0x00 }, /* undocumented */
3460 { 0x40, 0xff }, /* I2C timeout counter */
3461 { 0x46, 0x00 }, /* I2C clock prescaler */
3462 { 0x59, 0x04 }, /* new from windrv 090403 */
3463 { 0xff, 0x00 }, /* undocumented */
3464 /* windows reads 0x55 at this point, why? */
3465 };
3466
3467 static const struct ov_regvals mode_init_519[] = {
3468 { 0x5d, 0x03 }, /* Turn off suspend mode */
3469 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3470 { 0x54, 0x0f }, /* bit2 (jpeg enable) */
3471 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3472 { 0xa3, 0x18 },
3473 { 0xa4, 0x04 },
3474 { 0xa5, 0x28 },
3475 { 0x37, 0x00 }, /* SetUsbInit */
3476 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3477 /* Enable both fields, YUV Input, disable defect comp (why?) */
3478 { 0x22, 0x1d },
3479 { 0x17, 0x50 }, /* undocumented */
3480 { 0x37, 0x00 }, /* undocumented */
3481 { 0x40, 0xff }, /* I2C timeout counter */
3482 { 0x46, 0x00 }, /* I2C clock prescaler */
3483 { 0x59, 0x04 }, /* new from windrv 090403 */
3484 { 0xff, 0x00 }, /* undocumented */
3485 /* windows reads 0x55 at this point, why? */
3486 };
3487
3488 /******** Set the mode ********/
3489 if (sd->sensor != SEN_OV7670) {
3490 if (write_regvals(sd, mode_init_519,
3491 ARRAY_SIZE(mode_init_519)))
3492 return -EIO;
3493 if (sd->sensor == SEN_OV7640 ||
3494 sd->sensor == SEN_OV7648) {
3495 /* Select 8-bit input mode */
3496 reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10);
3497 }
3498 } else {
3499 if (write_regvals(sd, mode_init_519_ov7670,
3500 ARRAY_SIZE(mode_init_519_ov7670)))
3501 return -EIO;
3502 }
3503
3504 reg_w(sd, OV519_R10_H_SIZE, sd->gspca_dev.width >> 4);
3505 reg_w(sd, OV519_R11_V_SIZE, sd->gspca_dev.height >> 3);
3506 if (sd->sensor == SEN_OV7670 &&
3507 sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3508 reg_w(sd, OV519_R12_X_OFFSETL, 0x04);
3509 else if (sd->sensor == SEN_OV7648 &&
3510 sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3511 reg_w(sd, OV519_R12_X_OFFSETL, 0x01);
3512 else
3513 reg_w(sd, OV519_R12_X_OFFSETL, 0x00);
3514 reg_w(sd, OV519_R13_X_OFFSETH, 0x00);
3515 reg_w(sd, OV519_R14_Y_OFFSETL, 0x00);
3516 reg_w(sd, OV519_R15_Y_OFFSETH, 0x00);
3517 reg_w(sd, OV519_R16_DIVIDER, 0x00);
3518 reg_w(sd, OV519_R25_FORMAT, 0x03); /* YUV422 */
3519 reg_w(sd, 0x26, 0x00); /* Undocumented */
3520
3521 /******** Set the framerate ********/
3522 if (frame_rate > 0)
3523 sd->frame_rate = frame_rate;
3524
3525 /* FIXME: These are only valid at the max resolution. */
3526 sd->clockdiv = 0;
3527 switch (sd->sensor) {
3528 case SEN_OV7640:
3529 case SEN_OV7648:
3530 switch (sd->frame_rate) {
3531 default:
3532 /* case 30: */
3533 reg_w(sd, 0xa4, 0x0c);
3534 reg_w(sd, 0x23, 0xff);
3535 break;
3536 case 25:
3537 reg_w(sd, 0xa4, 0x0c);
3538 reg_w(sd, 0x23, 0x1f);
3539 break;
3540 case 20:
3541 reg_w(sd, 0xa4, 0x0c);
3542 reg_w(sd, 0x23, 0x1b);
3543 break;
3544 case 15:
3545 reg_w(sd, 0xa4, 0x04);
3546 reg_w(sd, 0x23, 0xff);
3547 sd->clockdiv = 1;
3548 break;
3549 case 10:
3550 reg_w(sd, 0xa4, 0x04);
3551 reg_w(sd, 0x23, 0x1f);
3552 sd->clockdiv = 1;
3553 break;
3554 case 5:
3555 reg_w(sd, 0xa4, 0x04);
3556 reg_w(sd, 0x23, 0x1b);
3557 sd->clockdiv = 1;
3558 break;
3559 }
3560 break;
3561 case SEN_OV8610:
3562 switch (sd->frame_rate) {
3563 default: /* 15 fps */
3564 /* case 15: */
3565 reg_w(sd, 0xa4, 0x06);
3566 reg_w(sd, 0x23, 0xff);
3567 break;
3568 case 10:
3569 reg_w(sd, 0xa4, 0x06);
3570 reg_w(sd, 0x23, 0x1f);
3571 break;
3572 case 5:
3573 reg_w(sd, 0xa4, 0x06);
3574 reg_w(sd, 0x23, 0x1b);
3575 break;
3576 }
3577 break;
3578 case SEN_OV7670: /* guesses, based on 7640 */
3579 PDEBUG(D_STREAM, "Setting framerate to %d fps",
3580 (sd->frame_rate == 0) ? 15 : sd->frame_rate);
3581 reg_w(sd, 0xa4, 0x10);
3582 switch (sd->frame_rate) {
3583 case 30:
3584 reg_w(sd, 0x23, 0xff);
3585 break;
3586 case 20:
3587 reg_w(sd, 0x23, 0x1b);
3588 break;
3589 default:
3590 /* case 15: */
3591 reg_w(sd, 0x23, 0xff);
3592 sd->clockdiv = 1;
3593 break;
3594 }
3595 break;
3596 }
3597 return 0;
3598 }
3599
3600 static int mode_init_ov_sensor_regs(struct sd *sd)
3601 {
3602 struct gspca_dev *gspca_dev;
3603 int qvga, xstart, xend, ystart, yend;
3604 __u8 v;
3605
3606 gspca_dev = &sd->gspca_dev;
3607 qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 1;
3608
3609 /******** Mode (VGA/QVGA) and sensor specific regs ********/
3610 switch (sd->sensor) {
3611 case SEN_OV2610:
3612 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3613 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3614 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
3615 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
3616 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3617 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
3618 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3619 return 0;
3620 case SEN_OV3610:
3621 if (qvga) {
3622 xstart = (1040 - gspca_dev->width) / 2 + (0x1f << 4);
3623 ystart = (776 - gspca_dev->height) / 2;
3624 } else {
3625 xstart = (2076 - gspca_dev->width) / 2 + (0x10 << 4);
3626 ystart = (1544 - gspca_dev->height) / 2;
3627 }
3628 xend = xstart + gspca_dev->width;
3629 yend = ystart + gspca_dev->height;
3630 /* Writing to the COMH register resets the other windowing regs
3631 to their default values, so we must do this first. */
3632 i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0xf0);
3633 i2c_w_mask(sd, 0x32,
3634 (((xend >> 1) & 7) << 3) | ((xstart >> 1) & 7),
3635 0x3f);
3636 i2c_w_mask(sd, 0x03,
3637 (((yend >> 1) & 3) << 2) | ((ystart >> 1) & 3),
3638 0x0f);
3639 i2c_w(sd, 0x17, xstart >> 4);
3640 i2c_w(sd, 0x18, xend >> 4);
3641 i2c_w(sd, 0x19, ystart >> 3);
3642 i2c_w(sd, 0x1a, yend >> 3);
3643 return 0;
3644 case SEN_OV8610:
3645 /* For OV8610 qvga means qsvga */
3646 i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5);
3647 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3648 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3649 i2c_w_mask(sd, 0x2d, 0x00, 0x40); /* from windrv 090403 */
3650 i2c_w_mask(sd, 0x28, 0x20, 0x20); /* progressive mode on */
3651 break;
3652 case SEN_OV7610:
3653 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3654 i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
3655 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3656 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3657 break;
3658 case SEN_OV7620:
3659 case SEN_OV7620AE:
3660 case SEN_OV76BE:
3661 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3662 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3663 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
3664 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
3665 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3666 i2c_w_mask(sd, 0x67, qvga ? 0xb0 : 0x90, 0xf0);
3667 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3668 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3669 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3670 if (sd->sensor == SEN_OV76BE)
3671 i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
3672 break;
3673 case SEN_OV7640:
3674 case SEN_OV7648:
3675 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3676 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3677 /* Setting this undocumented bit in qvga mode removes a very
3678 annoying vertical shaking of the image */
3679 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3680 /* Unknown */
3681 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
3682 /* Allow higher automatic gain (to allow higher framerates) */
3683 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3684 i2c_w_mask(sd, 0x12, 0x04, 0x04); /* AWB: 1 */
3685 break;
3686 case SEN_OV7670:
3687 /* set COM7_FMT_VGA or COM7_FMT_QVGA
3688 * do we need to set anything else?
3689 * HSTART etc are set in set_ov_sensor_window itself */
3690 i2c_w_mask(sd, OV7670_REG_COM7,
3691 qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA,
3692 OV7670_COM7_FMT_MASK);
3693 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3694 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_AWB,
3695 OV7670_COM8_AWB);
3696 if (qvga) { /* QVGA from ov7670.c by
3697 * Jonathan Corbet */
3698 xstart = 164;
3699 xend = 28;
3700 ystart = 14;
3701 yend = 494;
3702 } else { /* VGA */
3703 xstart = 158;
3704 xend = 14;
3705 ystart = 10;
3706 yend = 490;
3707 }
3708 /* OV7670 hardware window registers are split across
3709 * multiple locations */
3710 i2c_w(sd, OV7670_REG_HSTART, xstart >> 3);
3711 i2c_w(sd, OV7670_REG_HSTOP, xend >> 3);
3712 v = i2c_r(sd, OV7670_REG_HREF);
3713 v = (v & 0xc0) | ((xend & 0x7) << 3) | (xstart & 0x07);
3714 msleep(10); /* need to sleep between read and write to
3715 * same reg! */
3716 i2c_w(sd, OV7670_REG_HREF, v);
3717
3718 i2c_w(sd, OV7670_REG_VSTART, ystart >> 2);
3719 i2c_w(sd, OV7670_REG_VSTOP, yend >> 2);
3720 v = i2c_r(sd, OV7670_REG_VREF);
3721 v = (v & 0xc0) | ((yend & 0x3) << 2) | (ystart & 0x03);
3722 msleep(10); /* need to sleep between read and write to
3723 * same reg! */
3724 i2c_w(sd, OV7670_REG_VREF, v);
3725 break;
3726 case SEN_OV6620:
3727 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3728 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3729 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3730 break;
3731 case SEN_OV6630:
3732 case SEN_OV66308AF:
3733 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3734 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3735 break;
3736 default:
3737 return -EINVAL;
3738 }
3739
3740 /******** Clock programming ********/
3741 i2c_w(sd, 0x11, sd->clockdiv);
3742
3743 return 0;
3744 }
3745
3746 static void sethvflip(struct gspca_dev *gspca_dev)
3747 {
3748 struct sd *sd = (struct sd *) gspca_dev;
3749
3750 if (sd->sensor != SEN_OV7670)
3751 return;
3752 if (sd->gspca_dev.streaming)
3753 ov51x_stop(sd);
3754 i2c_w_mask(sd, OV7670_REG_MVFP,
3755 OV7670_MVFP_MIRROR * sd->ctrls[HFLIP].val
3756 | OV7670_MVFP_VFLIP * sd->ctrls[VFLIP].val,
3757 OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP);
3758 if (sd->gspca_dev.streaming)
3759 ov51x_restart(sd);
3760 }
3761
3762 static int set_ov_sensor_window(struct sd *sd)
3763 {
3764 struct gspca_dev *gspca_dev;
3765 int qvga, crop;
3766 int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale;
3767 int ret;
3768
3769 /* mode setup is fully handled in mode_init_ov_sensor_regs for these */
3770 if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610 ||
3771 sd->sensor == SEN_OV7670)
3772 return mode_init_ov_sensor_regs(sd);
3773
3774 gspca_dev = &sd->gspca_dev;
3775 qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 1;
3776 crop = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 2;
3777
3778 /* The different sensor ICs handle setting up of window differently.
3779 * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */
3780 switch (sd->sensor) {
3781 case SEN_OV8610:
3782 hwsbase = 0x1e;
3783 hwebase = 0x1e;
3784 vwsbase = 0x02;
3785 vwebase = 0x02;
3786 break;
3787 case SEN_OV7610:
3788 case SEN_OV76BE:
3789 hwsbase = 0x38;
3790 hwebase = 0x3a;
3791 vwsbase = vwebase = 0x05;
3792 break;
3793 case SEN_OV6620:
3794 case SEN_OV6630:
3795 case SEN_OV66308AF:
3796 hwsbase = 0x38;
3797 hwebase = 0x3a;
3798 vwsbase = 0x05;
3799 vwebase = 0x06;
3800 if (sd->sensor == SEN_OV66308AF && qvga)
3801 /* HDG: this fixes U and V getting swapped */
3802 hwsbase++;
3803 if (crop) {
3804 hwsbase += 8;
3805 hwebase += 8;
3806 vwsbase += 11;
3807 vwebase += 11;
3808 }
3809 break;
3810 case SEN_OV7620:
3811 case SEN_OV7620AE:
3812 hwsbase = 0x2f; /* From 7620.SET (spec is wrong) */
3813 hwebase = 0x2f;
3814 vwsbase = vwebase = 0x05;
3815 break;
3816 case SEN_OV7640:
3817 case SEN_OV7648:
3818 hwsbase = 0x1a;
3819 hwebase = 0x1a;
3820 vwsbase = vwebase = 0x03;
3821 break;
3822 default:
3823 return -EINVAL;
3824 }
3825
3826 switch (sd->sensor) {
3827 case SEN_OV6620:
3828 case SEN_OV6630:
3829 case SEN_OV66308AF:
3830 if (qvga) { /* QCIF */
3831 hwscale = 0;
3832 vwscale = 0;
3833 } else { /* CIF */
3834 hwscale = 1;
3835 vwscale = 1; /* The datasheet says 0;
3836 * it's wrong */
3837 }
3838 break;
3839 case SEN_OV8610:
3840 if (qvga) { /* QSVGA */
3841 hwscale = 1;
3842 vwscale = 1;
3843 } else { /* SVGA */
3844 hwscale = 2;
3845 vwscale = 2;
3846 }
3847 break;
3848 default: /* SEN_OV7xx0 */
3849 if (qvga) { /* QVGA */
3850 hwscale = 1;
3851 vwscale = 0;
3852 } else { /* VGA */
3853 hwscale = 2;
3854 vwscale = 1;
3855 }
3856 }
3857
3858 ret = mode_init_ov_sensor_regs(sd);
3859 if (ret < 0)
3860 return ret;
3861
3862 i2c_w(sd, 0x17, hwsbase);
3863 i2c_w(sd, 0x18, hwebase + (sd->sensor_width >> hwscale));
3864 i2c_w(sd, 0x19, vwsbase);
3865 i2c_w(sd, 0x1a, vwebase + (sd->sensor_height >> vwscale));
3866
3867 return 0;
3868 }
3869
3870 /* -- start the camera -- */
3871 static int sd_start(struct gspca_dev *gspca_dev)
3872 {
3873 struct sd *sd = (struct sd *) gspca_dev;
3874 int ret = 0;
3875
3876 /* Default for most bridges, allow bridge_mode_init_regs to override */
3877 sd->sensor_width = sd->gspca_dev.width;
3878 sd->sensor_height = sd->gspca_dev.height;
3879
3880 switch (sd->bridge) {
3881 case BRIDGE_OV511:
3882 case BRIDGE_OV511PLUS:
3883 ret = ov511_mode_init_regs(sd);
3884 break;
3885 case BRIDGE_OV518:
3886 case BRIDGE_OV518PLUS:
3887 ret = ov518_mode_init_regs(sd);
3888 break;
3889 case BRIDGE_OV519:
3890 ret = ov519_mode_init_regs(sd);
3891 break;
3892 /* case BRIDGE_OVFX2: nothing to do */
3893 case BRIDGE_W9968CF:
3894 ret = w9968cf_mode_init_regs(sd);
3895 break;
3896 }
3897 if (ret < 0)
3898 goto out;
3899
3900 ret = set_ov_sensor_window(sd);
3901 if (ret < 0)
3902 goto out;
3903
3904 setcontrast(gspca_dev);
3905 setbrightness(gspca_dev);
3906 setcolors(gspca_dev);
3907 sethvflip(gspca_dev);
3908 setautobright(gspca_dev);
3909 setfreq_i(sd);
3910
3911 /* Force clear snapshot state in case the snapshot button was
3912 pressed while we weren't streaming */
3913 sd->snapshot_needs_reset = 1;
3914 sd_reset_snapshot(gspca_dev);
3915 sd->snapshot_pressed = 0;
3916
3917 sd->first_frame = 3;
3918
3919 ret = ov51x_restart(sd);
3920 if (ret < 0)
3921 goto out;
3922 ov51x_led_control(sd, 1);
3923 return 0;
3924 out:
3925 PDEBUG(D_ERR, "camera start error:%d", ret);
3926 return ret;
3927 }
3928
3929 static void sd_stopN(struct gspca_dev *gspca_dev)
3930 {
3931 struct sd *sd = (struct sd *) gspca_dev;
3932
3933 ov51x_stop(sd);
3934 ov51x_led_control(sd, 0);
3935 }
3936
3937 static void sd_stop0(struct gspca_dev *gspca_dev)
3938 {
3939 struct sd *sd = (struct sd *) gspca_dev;
3940
3941 if (sd->bridge == BRIDGE_W9968CF)
3942 w9968cf_stop0(sd);
3943 }
3944
3945 static void ov51x_handle_button(struct gspca_dev *gspca_dev, u8 state)
3946 {
3947 struct sd *sd = (struct sd *) gspca_dev;
3948
3949 if (sd->snapshot_pressed != state) {
3950 #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
3951 input_report_key(gspca_dev->input_dev, KEY_CAMERA, state);
3952 input_sync(gspca_dev->input_dev);
3953 #endif
3954 if (state)
3955 sd->snapshot_needs_reset = 1;
3956
3957 sd->snapshot_pressed = state;
3958 } else {
3959 /* On the ov511 / ov519 we need to reset the button state
3960 multiple times, as resetting does not work as long as the
3961 button stays pressed */
3962 switch (sd->bridge) {
3963 case BRIDGE_OV511:
3964 case BRIDGE_OV511PLUS:
3965 case BRIDGE_OV519:
3966 if (state)
3967 sd->snapshot_needs_reset = 1;
3968 break;
3969 }
3970 }
3971 }
3972
3973 static void ov511_pkt_scan(struct gspca_dev *gspca_dev,
3974 u8 *in, /* isoc packet */
3975 int len) /* iso packet length */
3976 {
3977 struct sd *sd = (struct sd *) gspca_dev;
3978
3979 /* SOF/EOF packets have 1st to 8th bytes zeroed and the 9th
3980 * byte non-zero. The EOF packet has image width/height in the
3981 * 10th and 11th bytes. The 9th byte is given as follows:
3982 *
3983 * bit 7: EOF
3984 * 6: compression enabled
3985 * 5: 422/420/400 modes
3986 * 4: 422/420/400 modes
3987 * 3: 1
3988 * 2: snapshot button on
3989 * 1: snapshot frame
3990 * 0: even/odd field
3991 */
3992 if (!(in[0] | in[1] | in[2] | in[3] | in[4] | in[5] | in[6] | in[7]) &&
3993 (in[8] & 0x08)) {
3994 ov51x_handle_button(gspca_dev, (in[8] >> 2) & 1);
3995 if (in[8] & 0x80) {
3996 /* Frame end */
3997 if ((in[9] + 1) * 8 != gspca_dev->width ||
3998 (in[10] + 1) * 8 != gspca_dev->height) {
3999 PDEBUG(D_ERR, "Invalid frame size, got: %dx%d,"
4000 " requested: %dx%d\n",
4001 (in[9] + 1) * 8, (in[10] + 1) * 8,
4002 gspca_dev->width, gspca_dev->height);
4003 gspca_dev->last_packet_type = DISCARD_PACKET;
4004 return;
4005 }
4006 /* Add 11 byte footer to frame, might be usefull */
4007 gspca_frame_add(gspca_dev, LAST_PACKET, in, 11);
4008 return;
4009 } else {
4010 /* Frame start */
4011 gspca_frame_add(gspca_dev, FIRST_PACKET, in, 0);
4012 sd->packet_nr = 0;
4013 }
4014 }
4015
4016 /* Ignore the packet number */
4017 len--;
4018
4019 /* intermediate packet */
4020 gspca_frame_add(gspca_dev, INTER_PACKET, in, len);
4021 }
4022
4023 static void ov518_pkt_scan(struct gspca_dev *gspca_dev,
4024 u8 *data, /* isoc packet */
4025 int len) /* iso packet length */
4026 {
4027 struct sd *sd = (struct sd *) gspca_dev;
4028
4029 /* A false positive here is likely, until OVT gives me
4030 * the definitive SOF/EOF format */
4031 if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) {
4032 ov51x_handle_button(gspca_dev, (data[6] >> 1) & 1);
4033 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
4034 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4035 sd->packet_nr = 0;
4036 }
4037
4038 if (gspca_dev->last_packet_type == DISCARD_PACKET)
4039 return;
4040
4041 /* Does this device use packet numbers ? */
4042 if (len & 7) {
4043 len--;
4044 if (sd->packet_nr == data[len])
4045 sd->packet_nr++;
4046 /* The last few packets of the frame (which are all 0's
4047 except that they may contain part of the footer), are
4048 numbered 0 */
4049 else if (sd->packet_nr == 0 || data[len]) {
4050 PDEBUG(D_ERR, "Invalid packet nr: %d (expect: %d)",
4051 (int)data[len], (int)sd->packet_nr);
4052 gspca_dev->last_packet_type = DISCARD_PACKET;
4053 return;
4054 }
4055 }
4056
4057 /* intermediate packet */
4058 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4059 }
4060
4061 static void ov519_pkt_scan(struct gspca_dev *gspca_dev,
4062 u8 *data, /* isoc packet */
4063 int len) /* iso packet length */
4064 {
4065 /* Header of ov519 is 16 bytes:
4066 * Byte Value Description
4067 * 0 0xff magic
4068 * 1 0xff magic
4069 * 2 0xff magic
4070 * 3 0xXX 0x50 = SOF, 0x51 = EOF
4071 * 9 0xXX 0x01 initial frame without data,
4072 * 0x00 standard frame with image
4073 * 14 Lo in EOF: length of image data / 8
4074 * 15 Hi
4075 */
4076
4077 if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) {
4078 switch (data[3]) {
4079 case 0x50: /* start of frame */
4080 /* Don't check the button state here, as the state
4081 usually (always ?) changes at EOF and checking it
4082 here leads to unnecessary snapshot state resets. */
4083 #define HDRSZ 16
4084 data += HDRSZ;
4085 len -= HDRSZ;
4086 #undef HDRSZ
4087 if (data[0] == 0xff || data[1] == 0xd8)
4088 gspca_frame_add(gspca_dev, FIRST_PACKET,
4089 data, len);
4090 else
4091 gspca_dev->last_packet_type = DISCARD_PACKET;
4092 return;
4093 case 0x51: /* end of frame */
4094 ov51x_handle_button(gspca_dev, data[11] & 1);
4095 if (data[9] != 0)
4096 gspca_dev->last_packet_type = DISCARD_PACKET;
4097 gspca_frame_add(gspca_dev, LAST_PACKET,
4098 NULL, 0);
4099 return;
4100 }
4101 }
4102
4103 /* intermediate packet */
4104 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4105 }
4106
4107 static void ovfx2_pkt_scan(struct gspca_dev *gspca_dev,
4108 u8 *data, /* isoc packet */
4109 int len) /* iso packet length */
4110 {
4111 struct sd *sd = (struct sd *) gspca_dev;
4112
4113 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4114
4115 /* A short read signals EOF */
4116 if (len < OVFX2_BULK_SIZE) {
4117 /* If the frame is short, and it is one of the first ones
4118 the sensor and bridge are still syncing, so drop it. */
4119 if (sd->first_frame) {
4120 sd->first_frame--;
4121 if (gspca_dev->image_len <
4122 sd->gspca_dev.width * sd->gspca_dev.height)
4123 gspca_dev->last_packet_type = DISCARD_PACKET;
4124 }
4125 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
4126 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4127 }
4128 }
4129
4130 static void sd_pkt_scan(struct gspca_dev *gspca_dev,
4131 u8 *data, /* isoc packet */
4132 int len) /* iso packet length */
4133 {
4134 struct sd *sd = (struct sd *) gspca_dev;
4135
4136 switch (sd->bridge) {
4137 case BRIDGE_OV511:
4138 case BRIDGE_OV511PLUS:
4139 ov511_pkt_scan(gspca_dev, data, len);
4140 break;
4141 case BRIDGE_OV518:
4142 case BRIDGE_OV518PLUS:
4143 ov518_pkt_scan(gspca_dev, data, len);
4144 break;
4145 case BRIDGE_OV519:
4146 ov519_pkt_scan(gspca_dev, data, len);
4147 break;
4148 case BRIDGE_OVFX2:
4149 ovfx2_pkt_scan(gspca_dev, data, len);
4150 break;
4151 case BRIDGE_W9968CF:
4152 w9968cf_pkt_scan(gspca_dev, data, len);
4153 break;
4154 }
4155 }
4156
4157 /* -- management routines -- */
4158
4159 static void setbrightness(struct gspca_dev *gspca_dev)
4160 {
4161 struct sd *sd = (struct sd *) gspca_dev;
4162 int val;
4163
4164 val = sd->ctrls[BRIGHTNESS].val;
4165 switch (sd->sensor) {
4166 case SEN_OV8610:
4167 case SEN_OV7610:
4168 case SEN_OV76BE:
4169 case SEN_OV6620:
4170 case SEN_OV6630:
4171 case SEN_OV66308AF:
4172 case SEN_OV7640:
4173 case SEN_OV7648:
4174 i2c_w(sd, OV7610_REG_BRT, val);
4175 break;
4176 case SEN_OV7620:
4177 case SEN_OV7620AE:
4178 /* 7620 doesn't like manual changes when in auto mode */
4179 if (!sd->ctrls[AUTOBRIGHT].val)
4180 i2c_w(sd, OV7610_REG_BRT, val);
4181 break;
4182 case SEN_OV7670:
4183 /*win trace
4184 * i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_AEC); */
4185 i2c_w(sd, OV7670_REG_BRIGHT, ov7670_abs_to_sm(val));
4186 break;
4187 }
4188 }
4189
4190 static void setcontrast(struct gspca_dev *gspca_dev)
4191 {
4192 struct sd *sd = (struct sd *) gspca_dev;
4193 int val;
4194
4195 val = sd->ctrls[CONTRAST].val;
4196 switch (sd->sensor) {
4197 case SEN_OV7610:
4198 case SEN_OV6620:
4199 i2c_w(sd, OV7610_REG_CNT, val);
4200 break;
4201 case SEN_OV6630:
4202 case SEN_OV66308AF:
4203 i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f);
4204 break;
4205 case SEN_OV8610: {
4206 static const __u8 ctab[] = {
4207 0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f
4208 };
4209
4210 /* Use Y gamma control instead. Bit 0 enables it. */
4211 i2c_w(sd, 0x64, ctab[val >> 5]);
4212 break;
4213 }
4214 case SEN_OV7620:
4215 case SEN_OV7620AE: {
4216 static const __u8 ctab[] = {
4217 0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57,
4218 0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff
4219 };
4220
4221 /* Use Y gamma control instead. Bit 0 enables it. */
4222 i2c_w(sd, 0x64, ctab[val >> 4]);
4223 break;
4224 }
4225 case SEN_OV7670:
4226 /* check that this isn't just the same as ov7610 */
4227 i2c_w(sd, OV7670_REG_CONTRAS, val >> 1);
4228 break;
4229 }
4230 }
4231
4232 static void setcolors(struct gspca_dev *gspca_dev)
4233 {
4234 struct sd *sd = (struct sd *) gspca_dev;
4235 int val;
4236
4237 val = sd->ctrls[COLORS].val;
4238 switch (sd->sensor) {
4239 case SEN_OV8610:
4240 case SEN_OV7610:
4241 case SEN_OV76BE:
4242 case SEN_OV6620:
4243 case SEN_OV6630:
4244 case SEN_OV66308AF:
4245 i2c_w(sd, OV7610_REG_SAT, val);
4246 break;
4247 case SEN_OV7620:
4248 case SEN_OV7620AE:
4249 /* Use UV gamma control instead. Bits 0 & 7 are reserved. */
4250 /* rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e);
4251 if (rc < 0)
4252 goto out; */
4253 i2c_w(sd, OV7610_REG_SAT, val);
4254 break;
4255 case SEN_OV7640:
4256 case SEN_OV7648:
4257 i2c_w(sd, OV7610_REG_SAT, val & 0xf0);
4258 break;
4259 case SEN_OV7670:
4260 /* supported later once I work out how to do it
4261 * transparently fail now! */
4262 /* set REG_COM13 values for UV sat auto mode */
4263 break;
4264 }
4265 }
4266
4267 static void setautobright(struct gspca_dev *gspca_dev)
4268 {
4269 struct sd *sd = (struct sd *) gspca_dev;
4270
4271 if (sd->sensor == SEN_OV7640 || sd->sensor == SEN_OV7648 ||
4272 sd->sensor == SEN_OV7670 ||
4273 sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610)
4274 return;
4275
4276 i2c_w_mask(sd, 0x2d, sd->ctrls[AUTOBRIGHT].val ? 0x10 : 0x00, 0x10);
4277 }
4278
4279 static void setfreq_i(struct sd *sd)
4280 {
4281 if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610)
4282 return;
4283
4284 if (sd->sensor == SEN_OV7670) {
4285 switch (sd->ctrls[FREQ].val) {
4286 case 0: /* Banding filter disabled */
4287 i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_BFILT);
4288 break;
4289 case 1: /* 50 hz */
4290 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
4291 OV7670_COM8_BFILT);
4292 i2c_w_mask(sd, OV7670_REG_COM11, 0x08, 0x18);
4293 break;
4294 case 2: /* 60 hz */
4295 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
4296 OV7670_COM8_BFILT);
4297 i2c_w_mask(sd, OV7670_REG_COM11, 0x00, 0x18);
4298 break;
4299 case 3: /* Auto hz */
4300 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
4301 OV7670_COM8_BFILT);
4302 i2c_w_mask(sd, OV7670_REG_COM11, OV7670_COM11_HZAUTO,
4303 0x18);
4304 break;
4305 }
4306 } else {
4307 switch (sd->ctrls[FREQ].val) {
4308 case 0: /* Banding filter disabled */
4309 i2c_w_mask(sd, 0x2d, 0x00, 0x04);
4310 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4311 break;
4312 case 1: /* 50 hz (filter on and framerate adj) */
4313 i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4314 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4315 /* 20 fps -> 16.667 fps */
4316 if (sd->sensor == SEN_OV6620 ||
4317 sd->sensor == SEN_OV6630 ||
4318 sd->sensor == SEN_OV66308AF)
4319 i2c_w(sd, 0x2b, 0x5e);
4320 else
4321 i2c_w(sd, 0x2b, 0xac);
4322 break;
4323 case 2: /* 60 hz (filter on, ...) */
4324 i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4325 if (sd->sensor == SEN_OV6620 ||
4326 sd->sensor == SEN_OV6630 ||
4327 sd->sensor == SEN_OV66308AF) {
4328 /* 20 fps -> 15 fps */
4329 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4330 i2c_w(sd, 0x2b, 0xa8);
4331 } else {
4332 /* no framerate adj. */
4333 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4334 }
4335 break;
4336 }
4337 }
4338 }
4339 static void setfreq(struct gspca_dev *gspca_dev)
4340 {
4341 struct sd *sd = (struct sd *) gspca_dev;
4342
4343 setfreq_i(sd);
4344
4345 /* Ugly but necessary */
4346 if (sd->bridge == BRIDGE_W9968CF)
4347 w9968cf_set_crop_window(sd);
4348 }
4349
4350 static int sd_querymenu(struct gspca_dev *gspca_dev,
4351 struct v4l2_querymenu *menu)
4352 {
4353 struct sd *sd = (struct sd *) gspca_dev;
4354
4355 switch (menu->id) {
4356 case V4L2_CID_POWER_LINE_FREQUENCY:
4357 switch (menu->index) {
4358 case 0: /* V4L2_CID_POWER_LINE_FREQUENCY_DISABLED */
4359 strcpy((char *) menu->name, "NoFliker");
4360 return 0;
4361 case 1: /* V4L2_CID_POWER_LINE_FREQUENCY_50HZ */
4362 strcpy((char *) menu->name, "50 Hz");
4363 return 0;
4364 case 2: /* V4L2_CID_POWER_LINE_FREQUENCY_60HZ */
4365 strcpy((char *) menu->name, "60 Hz");
4366 return 0;
4367 case 3:
4368 if (sd->sensor != SEN_OV7670)
4369 return -EINVAL;
4370
4371 strcpy((char *) menu->name, "Automatic");
4372 return 0;
4373 }
4374 break;
4375 }
4376 return -EINVAL;
4377 }
4378
4379 static int sd_get_jcomp(struct gspca_dev *gspca_dev,
4380 struct v4l2_jpegcompression *jcomp)
4381 {
4382 struct sd *sd = (struct sd *) gspca_dev;
4383
4384 if (sd->bridge != BRIDGE_W9968CF)
4385 return -EINVAL;
4386
4387 memset(jcomp, 0, sizeof *jcomp);
4388 jcomp->quality = sd->quality;
4389 jcomp->jpeg_markers = V4L2_JPEG_MARKER_DHT | V4L2_JPEG_MARKER_DQT |
4390 V4L2_JPEG_MARKER_DRI;
4391 return 0;
4392 }
4393
4394 static int sd_set_jcomp(struct gspca_dev *gspca_dev,
4395 struct v4l2_jpegcompression *jcomp)
4396 {
4397 struct sd *sd = (struct sd *) gspca_dev;
4398
4399 if (sd->bridge != BRIDGE_W9968CF)
4400 return -EINVAL;
4401
4402 if (gspca_dev->streaming)
4403 return -EBUSY;
4404
4405 if (jcomp->quality < QUALITY_MIN)
4406 sd->quality = QUALITY_MIN;
4407 else if (jcomp->quality > QUALITY_MAX)
4408 sd->quality = QUALITY_MAX;
4409 else
4410 sd->quality = jcomp->quality;
4411
4412 /* Return resulting jcomp params to app */
4413 sd_get_jcomp(gspca_dev, jcomp);
4414
4415 return 0;
4416 }
4417
4418 /* sub-driver description */
4419 static const struct sd_desc sd_desc = {
4420 .name = MODULE_NAME,
4421 .ctrls = sd_ctrls,
4422 .nctrls = ARRAY_SIZE(sd_ctrls),
4423 .config = sd_config,
4424 .init = sd_init,
4425 .start = sd_start,
4426 .stopN = sd_stopN,
4427 .stop0 = sd_stop0,
4428 .pkt_scan = sd_pkt_scan,
4429 .dq_callback = sd_reset_snapshot,
4430 .querymenu = sd_querymenu,
4431 .get_jcomp = sd_get_jcomp,
4432 .set_jcomp = sd_set_jcomp,
4433 #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
4434 .other_input = 1,
4435 #endif
4436 };
4437
4438 /* -- module initialisation -- */
4439 static const __devinitdata struct usb_device_id device_table[] = {
4440 {USB_DEVICE(0x041e, 0x4003), .driver_info = BRIDGE_W9968CF },
4441 {USB_DEVICE(0x041e, 0x4052), .driver_info = BRIDGE_OV519 },
4442 {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 },
4443 {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 },
4444 {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 },
4445 {USB_DEVICE(0x041e, 0x4064),
4446 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4447 {USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 },
4448 {USB_DEVICE(0x041e, 0x4068),
4449 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4450 {USB_DEVICE(0x045e, 0x028c), .driver_info = BRIDGE_OV519 },
4451 {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 },
4452 {USB_DEVICE(0x054c, 0x0155),
4453 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4454 {USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 },
4455 {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 },
4456 {USB_DEVICE(0x05a9, 0x0519), .driver_info = BRIDGE_OV519 },
4457 {USB_DEVICE(0x05a9, 0x0530), .driver_info = BRIDGE_OV519 },
4458 {USB_DEVICE(0x05a9, 0x2800), .driver_info = BRIDGE_OVFX2 },
4459 {USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 },
4460 {USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 },
4461 {USB_DEVICE(0x05a9, 0xa511), .driver_info = BRIDGE_OV511PLUS },
4462 {USB_DEVICE(0x05a9, 0xa518), .driver_info = BRIDGE_OV518PLUS },
4463 {USB_DEVICE(0x0813, 0x0002), .driver_info = BRIDGE_OV511PLUS },
4464 {USB_DEVICE(0x0b62, 0x0059), .driver_info = BRIDGE_OVFX2 },
4465 {USB_DEVICE(0x0e96, 0xc001), .driver_info = BRIDGE_OVFX2 },
4466 {USB_DEVICE(0x1046, 0x9967), .driver_info = BRIDGE_W9968CF },
4467 {USB_DEVICE(0x8020, 0xEF04), .driver_info = BRIDGE_OVFX2 },
4468 {}
4469 };
4470
4471 MODULE_DEVICE_TABLE(usb, device_table);
4472
4473 /* -- device connect -- */
4474 static int sd_probe(struct usb_interface *intf,
4475 const struct usb_device_id *id)
4476 {
4477 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
4478 THIS_MODULE);
4479 }
4480
4481 static struct usb_driver sd_driver = {
4482 .name = MODULE_NAME,
4483 .id_table = device_table,
4484 .probe = sd_probe,
4485 .disconnect = gspca_disconnect,
4486 #ifdef CONFIG_PM
4487 .suspend = gspca_suspend,
4488 .resume = gspca_resume,
4489 #endif
4490 };
4491
4492 /* -- module insert / remove -- */
4493 static int __init sd_mod_init(void)
4494 {
4495 return usb_register(&sd_driver);
4496 }
4497 static void __exit sd_mod_exit(void)
4498 {
4499 usb_deregister(&sd_driver);
4500 }
4501
4502 module_init(sd_mod_init);
4503 module_exit(sd_mod_exit);
4504
4505 module_param(frame_rate, int, 0644);
4506 MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)");
Linux kernel - Deliverables
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