2 * Video Capture Driver (Video for Linux 1/2)
3 * for the Matrox Marvel G200,G400 and Rainbow Runner-G series
5 * This module is an interface to the KS0127 video decoder chip.
7 * Copyright (C) 1999 Ryan Drake <stiletto@mediaone.net>
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version 2
12 * of the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
23 *****************************************************************************
25 * Modified and extended by
26 * Mike Bernson <mike@mlb.org>
28 * Leon van Stuivenberg <l.vanstuivenberg@chello.nl>
29 * Gernot Ziegler <gz@lysator.liu.se>
32 * V1.0 Ryan Drake Initial version by Ryan Drake
33 * V1.1 Gerard v.d. Horst Added some debugoutput, reset the video-standard
36 #include <linux/init.h>
37 #include <linux/module.h>
38 #include <linux/delay.h>
39 #include <linux/errno.h>
40 #include <linux/kernel.h>
41 #include <linux/i2c.h>
42 #include <linux/videodev2.h>
43 #include <media/v4l2-device.h>
44 #include <media/v4l2-chip-ident.h>
45 #include <media/v4l2-i2c-drv-legacy.h>
48 MODULE_DESCRIPTION("KS0127 video decoder driver");
49 MODULE_AUTHOR("Ryan Drake");
50 MODULE_LICENSE("GPL");
52 /* Addresses to scan */
53 #define I2C_KS0127_ADDON 0xD8
54 #define I2C_KS0127_ONBOARD 0xDA
56 static unsigned short normal_i2c
[] = {
57 I2C_KS0127_ADDON
>> 1,
58 I2C_KS0127_ONBOARD
>> 1,
64 /* ks0127 control registers */
79 #define KS_PORTAB 0x0e
83 #define KS_CHROMA 0x12
84 #define KS_CHROMB 0x13
88 #define KS_VERTIA 0x17
89 #define KS_VERTIB 0x18
90 #define KS_VERTIC 0x19
97 #define KS_VBICTL 0x20
98 #define KS_CCDAT2 0x21
99 #define KS_CCDAT1 0x22
100 #define KS_VBIL30 0x23
101 #define KS_VBIL74 0x24
102 #define KS_VBIL118 0x25
103 #define KS_VBIL1512 0x26
104 #define KS_TTFRAM 0x27
105 #define KS_TESTA 0x28
106 #define KS_UVOFFH 0x29
107 #define KS_UVOFFL 0x2a
108 #define KS_UGAIN 0x2b
109 #define KS_VGAIN 0x2c
112 #define KS_CTRACK 0x2f
113 #define KS_POLCTL 0x30
114 #define KS_REFCOD 0x31
115 #define KS_INVALY 0x32
116 #define KS_INVALU 0x33
117 #define KS_INVALV 0x34
118 #define KS_UNUSEY 0x35
119 #define KS_UNUSEU 0x36
120 #define KS_UNUSEV 0x37
121 #define KS_USRSAV 0x38
122 #define KS_USREAV 0x39
123 #define KS_SHS1A 0x3a
124 #define KS_SHS1B 0x3b
125 #define KS_SHS1C 0x3c
127 #define KS_VSDEL 0x3e
129 #define KS_GAMMA0 0x40
130 #define KS_GAMMA1 0x41
131 #define KS_GAMMA2 0x42
132 #define KS_GAMMA3 0x43
133 #define KS_GAMMA4 0x44
134 #define KS_GAMMA5 0x45
135 #define KS_GAMMA6 0x46
136 #define KS_GAMMA7 0x47
137 #define KS_GAMMA8 0x48
138 #define KS_GAMMA9 0x49
139 #define KS_GAMMA10 0x4a
140 #define KS_GAMMA11 0x4b
141 #define KS_GAMMA12 0x4c
142 #define KS_GAMMA13 0x4d
143 #define KS_GAMMA14 0x4e
144 #define KS_GAMMA15 0x4f
145 #define KS_GAMMA16 0x50
146 #define KS_GAMMA17 0x51
147 #define KS_GAMMA18 0x52
148 #define KS_GAMMA19 0x53
149 #define KS_GAMMA20 0x54
150 #define KS_GAMMA21 0x55
151 #define KS_GAMMA22 0x56
152 #define KS_GAMMA23 0x57
153 #define KS_GAMMA24 0x58
154 #define KS_GAMMA25 0x59
155 #define KS_GAMMA26 0x5a
156 #define KS_GAMMA27 0x5b
157 #define KS_GAMMA28 0x5c
158 #define KS_GAMMA29 0x5d
159 #define KS_GAMMA30 0x5e
160 #define KS_GAMMA31 0x5f
161 #define KS_GAMMAD0 0x60
162 #define KS_GAMMAD1 0x61
163 #define KS_GAMMAD2 0x62
164 #define KS_GAMMAD3 0x63
165 #define KS_GAMMAD4 0x64
166 #define KS_GAMMAD5 0x65
167 #define KS_GAMMAD6 0x66
168 #define KS_GAMMAD7 0x67
169 #define KS_GAMMAD8 0x68
170 #define KS_GAMMAD9 0x69
171 #define KS_GAMMAD10 0x6a
172 #define KS_GAMMAD11 0x6b
173 #define KS_GAMMAD12 0x6c
174 #define KS_GAMMAD13 0x6d
175 #define KS_GAMMAD14 0x6e
176 #define KS_GAMMAD15 0x6f
177 #define KS_GAMMAD16 0x70
178 #define KS_GAMMAD17 0x71
179 #define KS_GAMMAD18 0x72
180 #define KS_GAMMAD19 0x73
181 #define KS_GAMMAD20 0x74
182 #define KS_GAMMAD21 0x75
183 #define KS_GAMMAD22 0x76
184 #define KS_GAMMAD23 0x77
185 #define KS_GAMMAD24 0x78
186 #define KS_GAMMAD25 0x79
187 #define KS_GAMMAD26 0x7a
188 #define KS_GAMMAD27 0x7b
189 #define KS_GAMMAD28 0x7c
190 #define KS_GAMMAD29 0x7d
191 #define KS_GAMMAD30 0x7e
192 #define KS_GAMMAD31 0x7f
195 /****************************************************************************
196 * mga_dev : represents one ks0127 chip.
197 ****************************************************************************/
208 struct v4l2_subdev sd
;
214 static inline struct ks0127
*to_ks0127(struct v4l2_subdev
*sd
)
216 return container_of(sd
, struct ks0127
, sd
);
220 static int debug
; /* insmod parameter */
222 module_param(debug
, int, 0);
223 MODULE_PARM_DESC(debug
, "Debug output");
225 static u8 reg_defaults
[64];
227 static void init_reg_defaults(void)
229 static int initialized
;
230 u8
*table
= reg_defaults
;
236 table
[KS_CMDA
] = 0x2c; /* VSE=0, CCIR 601, autodetect standard */
237 table
[KS_CMDB
] = 0x12; /* VALIGN=0, AGC control and input */
238 table
[KS_CMDC
] = 0x00; /* Test options */
239 /* clock & input select, write 1 to PORTA */
240 table
[KS_CMDD
] = 0x01;
241 table
[KS_HAVB
] = 0x00; /* HAV Start Control */
242 table
[KS_HAVE
] = 0x00; /* HAV End Control */
243 table
[KS_HS1B
] = 0x10; /* HS1 Start Control */
244 table
[KS_HS1E
] = 0x00; /* HS1 End Control */
245 table
[KS_HS2B
] = 0x00; /* HS2 Start Control */
246 table
[KS_HS2E
] = 0x00; /* HS2 End Control */
247 table
[KS_AGC
] = 0x53; /* Manual setting for AGC */
248 table
[KS_HXTRA
] = 0x00; /* Extra Bits for HAV and HS1/2 */
249 table
[KS_CDEM
] = 0x00; /* Chroma Demodulation Control */
250 table
[KS_PORTAB
] = 0x0f; /* port B is input, port A output GPPORT */
251 table
[KS_LUMA
] = 0x01; /* Luma control */
252 table
[KS_CON
] = 0x00; /* Contrast Control */
253 table
[KS_BRT
] = 0x00; /* Brightness Control */
254 table
[KS_CHROMA
] = 0x2a; /* Chroma control A */
255 table
[KS_CHROMB
] = 0x90; /* Chroma control B */
256 table
[KS_DEMOD
] = 0x00; /* Chroma Demodulation Control & Status */
257 table
[KS_SAT
] = 0x00; /* Color Saturation Control*/
258 table
[KS_HUE
] = 0x00; /* Hue Control */
259 table
[KS_VERTIA
] = 0x00; /* Vertical Processing Control A */
260 /* Vertical Processing Control B, luma 1 line delayed */
261 table
[KS_VERTIB
] = 0x12;
262 table
[KS_VERTIC
] = 0x0b; /* Vertical Processing Control C */
263 table
[KS_HSCLL
] = 0x00; /* Horizontal Scaling Ratio Low */
264 table
[KS_HSCLH
] = 0x00; /* Horizontal Scaling Ratio High */
265 table
[KS_VSCLL
] = 0x00; /* Vertical Scaling Ratio Low */
266 table
[KS_VSCLH
] = 0x00; /* Vertical Scaling Ratio High */
267 /* 16 bit YCbCr 4:2:2 output; I can't make the bt866 like 8 bit /Sam */
268 table
[KS_OFMTA
] = 0x30;
269 table
[KS_OFMTB
] = 0x00; /* Output Control B */
270 /* VBI Decoder Control; 4bit fmt: avoid Y overflow */
271 table
[KS_VBICTL
] = 0x5d;
272 table
[KS_CCDAT2
] = 0x00; /* Read Only register */
273 table
[KS_CCDAT1
] = 0x00; /* Read Only register */
274 table
[KS_VBIL30
] = 0xa8; /* VBI data decoding options */
275 table
[KS_VBIL74
] = 0xaa; /* VBI data decoding options */
276 table
[KS_VBIL118
] = 0x2a; /* VBI data decoding options */
277 table
[KS_VBIL1512
] = 0x00; /* VBI data decoding options */
278 table
[KS_TTFRAM
] = 0x00; /* Teletext frame alignment pattern */
279 table
[KS_TESTA
] = 0x00; /* test register, shouldn't be written */
280 table
[KS_UVOFFH
] = 0x00; /* UV Offset Adjustment High */
281 table
[KS_UVOFFL
] = 0x00; /* UV Offset Adjustment Low */
282 table
[KS_UGAIN
] = 0x00; /* U Component Gain Adjustment */
283 table
[KS_VGAIN
] = 0x00; /* V Component Gain Adjustment */
284 table
[KS_VAVB
] = 0x07; /* VAV Begin */
285 table
[KS_VAVE
] = 0x00; /* VAV End */
286 table
[KS_CTRACK
] = 0x00; /* Chroma Tracking Control */
287 table
[KS_POLCTL
] = 0x41; /* Timing Signal Polarity Control */
288 table
[KS_REFCOD
] = 0x80; /* Reference Code Insertion Control */
289 table
[KS_INVALY
] = 0x10; /* Invalid Y Code */
290 table
[KS_INVALU
] = 0x80; /* Invalid U Code */
291 table
[KS_INVALV
] = 0x80; /* Invalid V Code */
292 table
[KS_UNUSEY
] = 0x10; /* Unused Y Code */
293 table
[KS_UNUSEU
] = 0x80; /* Unused U Code */
294 table
[KS_UNUSEV
] = 0x80; /* Unused V Code */
295 table
[KS_USRSAV
] = 0x00; /* reserved */
296 table
[KS_USREAV
] = 0x00; /* reserved */
297 table
[KS_SHS1A
] = 0x00; /* User Defined SHS1 A */
298 /* User Defined SHS1 B, ALT656=1 on 0127B */
299 table
[KS_SHS1B
] = 0x80;
300 table
[KS_SHS1C
] = 0x00; /* User Defined SHS1 C */
301 table
[KS_CMDE
] = 0x00; /* Command Register E */
302 table
[KS_VSDEL
] = 0x00; /* VS Delay Control */
303 /* Command Register F, update -immediately- */
304 /* (there might come no vsync)*/
305 table
[KS_CMDF
] = 0x02;
309 /* We need to manually read because of a bug in the KS0127 chip.
311 * An explanation from kayork@mail.utexas.edu:
313 * During I2C reads, the KS0127 only samples for a stop condition
314 * during the place where the acknowledge bit should be. Any standard
315 * I2C implementation (correctly) throws in another clock transition
316 * at the 9th bit, and the KS0127 will not recognize the stop condition
317 * and will continue to clock out data.
319 * So we have to do the read ourself. Big deal.
320 * workaround in i2c-algo-bit
324 static u8
ks0127_read(struct v4l2_subdev
*sd
, u8 reg
)
326 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
328 struct i2c_msg msgs
[] = {
329 { client
->addr
, 0, sizeof(reg
), ®
},
330 { client
->addr
, I2C_M_RD
| I2C_M_NO_RD_ACK
, sizeof(val
), &val
}
334 ret
= i2c_transfer(client
->adapter
, msgs
, ARRAY_SIZE(msgs
));
335 if (ret
!= ARRAY_SIZE(msgs
))
336 v4l2_dbg(1, debug
, sd
, "read error\n");
342 static void ks0127_write(struct v4l2_subdev
*sd
, u8 reg
, u8 val
)
344 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
345 struct ks0127
*ks
= to_ks0127(sd
);
346 char msg
[] = { reg
, val
};
348 if (i2c_master_send(client
, msg
, sizeof(msg
)) != sizeof(msg
))
349 v4l2_dbg(1, debug
, sd
, "write error\n");
355 /* generic bit-twiddling */
356 static void ks0127_and_or(struct v4l2_subdev
*sd
, u8 reg
, u8 and_v
, u8 or_v
)
358 struct ks0127
*ks
= to_ks0127(sd
);
360 u8 val
= ks
->regs
[reg
];
361 val
= (val
& and_v
) | or_v
;
362 ks0127_write(sd
, reg
, val
);
367 /****************************************************************************
369 ****************************************************************************/
370 static void ks0127_init(struct v4l2_subdev
*sd
)
372 struct ks0127
*ks
= to_ks0127(sd
);
373 u8
*table
= reg_defaults
;
376 ks
->ident
= V4L2_IDENT_KS0127
;
378 v4l2_dbg(1, debug
, sd
, "reset\n");
381 /* initialize all registers to known values */
382 /* (except STAT, 0x21, 0x22, TEST and 0x38,0x39) */
384 for (i
= 1; i
< 33; i
++)
385 ks0127_write(sd
, i
, table
[i
]);
387 for (i
= 35; i
< 40; i
++)
388 ks0127_write(sd
, i
, table
[i
]);
390 for (i
= 41; i
< 56; i
++)
391 ks0127_write(sd
, i
, table
[i
]);
393 for (i
= 58; i
< 64; i
++)
394 ks0127_write(sd
, i
, table
[i
]);
397 if ((ks0127_read(sd
, KS_STAT
) & 0x80) == 0) {
398 ks
->ident
= V4L2_IDENT_KS0122S
;
399 v4l2_dbg(1, debug
, sd
, "ks0122s found\n");
403 switch (ks0127_read(sd
, KS_CMDE
) & 0x0f) {
405 v4l2_dbg(1, debug
, sd
, "ks0127 found\n");
409 ks
->ident
= V4L2_IDENT_KS0127B
;
410 v4l2_dbg(1, debug
, sd
, "ks0127B Revision A found\n");
414 v4l2_dbg(1, debug
, sd
, "unknown revision\n");
419 static int ks0127_s_routing(struct v4l2_subdev
*sd
, const struct v4l2_routing
*route
)
421 struct ks0127
*ks
= to_ks0127(sd
);
423 switch (route
->input
) {
424 case KS_INPUT_COMPOSITE_1
:
425 case KS_INPUT_COMPOSITE_2
:
426 case KS_INPUT_COMPOSITE_3
:
427 case KS_INPUT_COMPOSITE_4
:
428 case KS_INPUT_COMPOSITE_5
:
429 case KS_INPUT_COMPOSITE_6
:
430 v4l2_dbg(1, debug
, sd
,
431 "VIDIOC_S_INPUT %d: Composite\n", route
->input
);
432 /* autodetect 50/60 Hz */
433 ks0127_and_or(sd
, KS_CMDA
, 0xfc, 0x00);
435 ks0127_and_or(sd
, KS_CMDA
, ~0x40, 0x00);
437 ks0127_and_or(sd
, KS_CMDB
, 0xb0, route
->input
);
438 /* non-freerunning mode */
439 ks0127_and_or(sd
, KS_CMDC
, 0x70, 0x0a);
441 ks0127_and_or(sd
, KS_CMDD
, 0x03, 0x00);
442 /* enable chroma demodulation */
443 ks0127_and_or(sd
, KS_CTRACK
, 0xcf, 0x00);
444 /* chroma trap, HYBWR=1 */
445 ks0127_and_or(sd
, KS_LUMA
, 0x00,
446 (reg_defaults
[KS_LUMA
])|0x0c);
447 /* scaler fullbw, luma comb off */
448 ks0127_and_or(sd
, KS_VERTIA
, 0x08, 0x81);
449 /* manual chroma comb .25 .5 .25 */
450 ks0127_and_or(sd
, KS_VERTIC
, 0x0f, 0x90);
452 /* chroma path delay */
453 ks0127_and_or(sd
, KS_CHROMB
, 0x0f, 0x90);
455 ks0127_write(sd
, KS_UGAIN
, reg_defaults
[KS_UGAIN
]);
456 ks0127_write(sd
, KS_VGAIN
, reg_defaults
[KS_VGAIN
]);
457 ks0127_write(sd
, KS_UVOFFH
, reg_defaults
[KS_UVOFFH
]);
458 ks0127_write(sd
, KS_UVOFFL
, reg_defaults
[KS_UVOFFL
]);
461 case KS_INPUT_SVIDEO_1
:
462 case KS_INPUT_SVIDEO_2
:
463 case KS_INPUT_SVIDEO_3
:
464 v4l2_dbg(1, debug
, sd
,
465 "VIDIOC_S_INPUT %d: S-Video\n", route
->input
);
466 /* autodetect 50/60 Hz */
467 ks0127_and_or(sd
, KS_CMDA
, 0xfc, 0x00);
469 ks0127_and_or(sd
, KS_CMDA
, ~0x40, 0x00);
471 ks0127_and_or(sd
, KS_CMDB
, 0xb0, route
->input
);
472 /* non-freerunning mode */
473 ks0127_and_or(sd
, KS_CMDC
, 0x70, 0x0a);
475 ks0127_and_or(sd
, KS_CMDD
, 0x03, 0x00);
476 /* enable chroma demodulation */
477 ks0127_and_or(sd
, KS_CTRACK
, 0xcf, 0x00);
478 ks0127_and_or(sd
, KS_LUMA
, 0x00,
479 reg_defaults
[KS_LUMA
]);
480 /* disable luma comb */
481 ks0127_and_or(sd
, KS_VERTIA
, 0x08,
482 (reg_defaults
[KS_VERTIA
]&0xf0)|0x01);
483 ks0127_and_or(sd
, KS_VERTIC
, 0x0f,
484 reg_defaults
[KS_VERTIC
]&0xf0);
486 ks0127_and_or(sd
, KS_CHROMB
, 0x0f,
487 reg_defaults
[KS_CHROMB
]&0xf0);
489 ks0127_write(sd
, KS_UGAIN
, reg_defaults
[KS_UGAIN
]);
490 ks0127_write(sd
, KS_VGAIN
, reg_defaults
[KS_VGAIN
]);
491 ks0127_write(sd
, KS_UVOFFH
, reg_defaults
[KS_UVOFFH
]);
492 ks0127_write(sd
, KS_UVOFFL
, reg_defaults
[KS_UVOFFL
]);
495 case KS_INPUT_YUV656
:
496 v4l2_dbg(1, debug
, sd
, "VIDIOC_S_INPUT 15: YUV656\n");
497 if (ks
->norm
& V4L2_STD_525_60
)
499 ks0127_and_or(sd
, KS_CMDA
, 0xfc, 0x03);
502 ks0127_and_or(sd
, KS_CMDA
, 0xfc, 0x02);
504 ks0127_and_or(sd
, KS_CMDA
, 0xff, 0x40); /* VSE=1 */
505 /* set input line and VALIGN */
506 ks0127_and_or(sd
, KS_CMDB
, 0xb0, (route
->input
| 0x40));
507 /* freerunning mode, */
508 /* TSTGEN = 1 TSTGFR=11 TSTGPH=0 TSTGPK=0 VMEM=1*/
509 ks0127_and_or(sd
, KS_CMDC
, 0x70, 0x87);
510 /* digital input, SYNDIR = 0 INPSL=01 CLKDIR=0 EAV=0 */
511 ks0127_and_or(sd
, KS_CMDD
, 0x03, 0x08);
512 /* disable chroma demodulation */
513 ks0127_and_or(sd
, KS_CTRACK
, 0xcf, 0x30);
514 /* HYPK =01 CTRAP = 0 HYBWR=0 PED=1 RGBH=1 UNIT=1 */
515 ks0127_and_or(sd
, KS_LUMA
, 0x00, 0x71);
516 ks0127_and_or(sd
, KS_VERTIC
, 0x0f,
517 reg_defaults
[KS_VERTIC
]&0xf0);
519 /* scaler fullbw, luma comb off */
520 ks0127_and_or(sd
, KS_VERTIA
, 0x08, 0x81);
522 ks0127_and_or(sd
, KS_CHROMB
, 0x0f,
523 reg_defaults
[KS_CHROMB
]&0xf0);
525 ks0127_and_or(sd
, KS_CON
, 0x00, 0x00);
526 ks0127_and_or(sd
, KS_BRT
, 0x00, 32); /* spec: 34 */
528 ks0127_and_or(sd
, KS_SAT
, 0x00, 0xe8);
529 ks0127_and_or(sd
, KS_HUE
, 0x00, 0);
531 ks0127_and_or(sd
, KS_UGAIN
, 0x00, 238);
532 ks0127_and_or(sd
, KS_VGAIN
, 0x00, 0x00);
534 /*UOFF:0x30, VOFF:0x30, TSTCGN=1 */
535 ks0127_and_or(sd
, KS_UVOFFH
, 0x00, 0x4f);
536 ks0127_and_or(sd
, KS_UVOFFL
, 0x00, 0x00);
540 v4l2_dbg(1, debug
, sd
,
541 "VIDIOC_INT_S_VIDEO_ROUTING: Unknown input %d\n", route
->input
);
545 /* hack: CDMLPF sometimes spontaneously switches on; */
547 ks0127_write(sd
, KS_DEMOD
, reg_defaults
[KS_DEMOD
]);
551 static int ks0127_s_std(struct v4l2_subdev
*sd
, v4l2_std_id std
)
553 struct ks0127
*ks
= to_ks0127(sd
);
555 /* Set to automatic SECAM/Fsc mode */
556 ks0127_and_or(sd
, KS_DEMOD
, 0xf0, 0x00);
559 if (std
& V4L2_STD_NTSC
) {
560 v4l2_dbg(1, debug
, sd
,
561 "VIDIOC_S_STD: NTSC_M\n");
562 ks0127_and_or(sd
, KS_CHROMA
, 0x9f, 0x20);
563 } else if (std
& V4L2_STD_PAL_N
) {
564 v4l2_dbg(1, debug
, sd
,
565 "KS0127_SET_NORM: NTSC_N (fixme)\n");
566 ks0127_and_or(sd
, KS_CHROMA
, 0x9f, 0x40);
567 } else if (std
& V4L2_STD_PAL
) {
568 v4l2_dbg(1, debug
, sd
,
569 "VIDIOC_S_STD: PAL_N\n");
570 ks0127_and_or(sd
, KS_CHROMA
, 0x9f, 0x20);
571 } else if (std
& V4L2_STD_PAL_M
) {
572 v4l2_dbg(1, debug
, sd
,
573 "KS0127_SET_NORM: PAL_M (fixme)\n");
574 ks0127_and_or(sd
, KS_CHROMA
, 0x9f, 0x40);
575 } else if (std
& V4L2_STD_SECAM
) {
576 v4l2_dbg(1, debug
, sd
,
577 "KS0127_SET_NORM: SECAM\n");
579 /* set to secam autodetection */
580 ks0127_and_or(sd
, KS_CHROMA
, 0xdf, 0x20);
581 ks0127_and_or(sd
, KS_DEMOD
, 0xf0, 0x00);
582 schedule_timeout_interruptible(HZ
/10+1);
584 /* did it autodetect? */
585 if (!(ks0127_read(sd
, KS_DEMOD
) & 0x40))
586 /* force to secam mode */
587 ks0127_and_or(sd
, KS_DEMOD
, 0xf0, 0x0f);
589 v4l2_dbg(1, debug
, sd
,
590 "VIDIOC_S_STD: Unknown norm %llx\n", std
);
595 static int ks0127_s_stream(struct v4l2_subdev
*sd
, int enable
)
597 v4l2_dbg(1, debug
, sd
, "s_stream(%d)\n", enable
);
599 /* All output pins on */
600 ks0127_and_or(sd
, KS_OFMTA
, 0xcf, 0x30);
601 /* Obey the OEN pin */
602 ks0127_and_or(sd
, KS_CDEM
, 0x7f, 0x00);
604 /* Video output pins off */
605 ks0127_and_or(sd
, KS_OFMTA
, 0xcf, 0x00);
606 /* Ignore the OEN pin */
607 ks0127_and_or(sd
, KS_CDEM
, 0x7f, 0x80);
612 static int ks0127_status(struct v4l2_subdev
*sd
, u32
*pstatus
, v4l2_std_id
*pstd
)
614 int stat
= V4L2_IN_ST_NO_SIGNAL
;
616 v4l2_std_id std
= V4L2_STD_ALL
;
618 v4l2_dbg(1, debug
, sd
, "VIDIOC_QUERYSTD/VIDIOC_INT_G_INPUT_STATUS\n");
619 status
= ks0127_read(sd
, KS_STAT
);
620 if (!(status
& 0x20)) /* NOVID not set */
622 if (!(status
& 0x01)) /* CLOCK set */
623 stat
|= V4L2_IN_ST_NO_COLOR
;
624 if ((status
& 0x08)) /* PALDET set */
635 static int ks0127_querystd(struct v4l2_subdev
*sd
, v4l2_std_id
*std
)
637 return ks0127_status(sd
, NULL
, std
);
640 static int ks0127_g_input_status(struct v4l2_subdev
*sd
, u32
*status
)
642 return ks0127_status(sd
, status
, NULL
);
645 static int ks0127_g_chip_ident(struct v4l2_subdev
*sd
, struct v4l2_dbg_chip_ident
*chip
)
647 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
648 struct ks0127
*ks
= to_ks0127(sd
);
650 return v4l2_chip_ident_i2c_client(client
, chip
, ks
->ident
, 0);
653 static int ks0127_command(struct i2c_client
*client
, unsigned cmd
, void *arg
)
655 return v4l2_subdev_command(i2c_get_clientdata(client
), cmd
, arg
);
658 /* ----------------------------------------------------------------------- */
660 static const struct v4l2_subdev_core_ops ks0127_core_ops
= {
661 .g_chip_ident
= ks0127_g_chip_ident
,
664 static const struct v4l2_subdev_tuner_ops ks0127_tuner_ops
= {
665 .s_std
= ks0127_s_std
,
668 static const struct v4l2_subdev_video_ops ks0127_video_ops
= {
669 .s_routing
= ks0127_s_routing
,
670 .s_stream
= ks0127_s_stream
,
671 .querystd
= ks0127_querystd
,
672 .g_input_status
= ks0127_g_input_status
,
675 static const struct v4l2_subdev_ops ks0127_ops
= {
676 .core
= &ks0127_core_ops
,
677 .tuner
= &ks0127_tuner_ops
,
678 .video
= &ks0127_video_ops
,
681 /* ----------------------------------------------------------------------- */
684 static int ks0127_probe(struct i2c_client
*client
, const struct i2c_device_id
*id
)
687 struct v4l2_subdev
*sd
;
689 v4l_info(client
, "%s chip found @ 0x%x (%s)\n",
690 client
->addr
== (I2C_KS0127_ADDON
>> 1) ? "addon" : "on-board",
691 client
->addr
<< 1, client
->adapter
->name
);
693 ks
= kzalloc(sizeof(*ks
), GFP_KERNEL
);
697 v4l2_i2c_subdev_init(sd
, client
, &ks0127_ops
);
701 ks0127_write(sd
, KS_CMDA
, 0x2c);
704 /* reset the device */
709 static int ks0127_remove(struct i2c_client
*client
)
711 struct v4l2_subdev
*sd
= i2c_get_clientdata(client
);
713 v4l2_device_unregister_subdev(sd
);
714 ks0127_write(sd
, KS_OFMTA
, 0x20); /* tristate */
715 ks0127_write(sd
, KS_CMDA
, 0x2c | 0x80); /* power down */
716 kfree(to_ks0127(sd
));
720 static int ks0127_legacy_probe(struct i2c_adapter
*adapter
)
722 return adapter
->id
== I2C_HW_B_ZR36067
;
725 static const struct i2c_device_id ks0127_id
[] = {
729 MODULE_DEVICE_TABLE(i2c
, ks0127_id
);
731 static struct v4l2_i2c_driver_data v4l2_i2c_data
= {
733 .driverid
= I2C_DRIVERID_KS0127
,
734 .command
= ks0127_command
,
735 .probe
= ks0127_probe
,
736 .remove
= ks0127_remove
,
737 .legacy_probe
= ks0127_legacy_probe
,
738 .id_table
= ks0127_id
,