cfq-iosched: fix use-after-free of cfqq
[deliverable/linux.git] / drivers / media / video / mt9m111.c
1 /*
2 * Driver for MT9M111/MT9M112/MT9M131 CMOS Image Sensor from Micron/Aptina
3 *
4 * Copyright (C) 2008, Robert Jarzmik <robert.jarzmik@free.fr>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10 #include <linux/videodev2.h>
11 #include <linux/slab.h>
12 #include <linux/i2c.h>
13 #include <linux/log2.h>
14 #include <linux/gpio.h>
15 #include <linux/delay.h>
16 #include <linux/v4l2-mediabus.h>
17 #include <linux/module.h>
18
19 #include <media/soc_camera.h>
20 #include <media/v4l2-common.h>
21 #include <media/v4l2-ctrls.h>
22 #include <media/v4l2-chip-ident.h>
23
24 /*
25 * MT9M111, MT9M112 and MT9M131:
26 * i2c address is 0x48 or 0x5d (depending on SADDR pin)
27 * The platform has to define i2c_board_info and call i2c_register_board_info()
28 */
29
30 /*
31 * Sensor core register addresses (0x000..0x0ff)
32 */
33 #define MT9M111_CHIP_VERSION 0x000
34 #define MT9M111_ROW_START 0x001
35 #define MT9M111_COLUMN_START 0x002
36 #define MT9M111_WINDOW_HEIGHT 0x003
37 #define MT9M111_WINDOW_WIDTH 0x004
38 #define MT9M111_HORIZONTAL_BLANKING_B 0x005
39 #define MT9M111_VERTICAL_BLANKING_B 0x006
40 #define MT9M111_HORIZONTAL_BLANKING_A 0x007
41 #define MT9M111_VERTICAL_BLANKING_A 0x008
42 #define MT9M111_SHUTTER_WIDTH 0x009
43 #define MT9M111_ROW_SPEED 0x00a
44 #define MT9M111_EXTRA_DELAY 0x00b
45 #define MT9M111_SHUTTER_DELAY 0x00c
46 #define MT9M111_RESET 0x00d
47 #define MT9M111_READ_MODE_B 0x020
48 #define MT9M111_READ_MODE_A 0x021
49 #define MT9M111_FLASH_CONTROL 0x023
50 #define MT9M111_GREEN1_GAIN 0x02b
51 #define MT9M111_BLUE_GAIN 0x02c
52 #define MT9M111_RED_GAIN 0x02d
53 #define MT9M111_GREEN2_GAIN 0x02e
54 #define MT9M111_GLOBAL_GAIN 0x02f
55 #define MT9M111_CONTEXT_CONTROL 0x0c8
56 #define MT9M111_PAGE_MAP 0x0f0
57 #define MT9M111_BYTE_WISE_ADDR 0x0f1
58
59 #define MT9M111_RESET_SYNC_CHANGES (1 << 15)
60 #define MT9M111_RESET_RESTART_BAD_FRAME (1 << 9)
61 #define MT9M111_RESET_SHOW_BAD_FRAMES (1 << 8)
62 #define MT9M111_RESET_RESET_SOC (1 << 5)
63 #define MT9M111_RESET_OUTPUT_DISABLE (1 << 4)
64 #define MT9M111_RESET_CHIP_ENABLE (1 << 3)
65 #define MT9M111_RESET_ANALOG_STANDBY (1 << 2)
66 #define MT9M111_RESET_RESTART_FRAME (1 << 1)
67 #define MT9M111_RESET_RESET_MODE (1 << 0)
68
69 #define MT9M111_RM_FULL_POWER_RD (0 << 10)
70 #define MT9M111_RM_LOW_POWER_RD (1 << 10)
71 #define MT9M111_RM_COL_SKIP_4X (1 << 5)
72 #define MT9M111_RM_ROW_SKIP_4X (1 << 4)
73 #define MT9M111_RM_COL_SKIP_2X (1 << 3)
74 #define MT9M111_RM_ROW_SKIP_2X (1 << 2)
75 #define MT9M111_RMB_MIRROR_COLS (1 << 1)
76 #define MT9M111_RMB_MIRROR_ROWS (1 << 0)
77 #define MT9M111_CTXT_CTRL_RESTART (1 << 15)
78 #define MT9M111_CTXT_CTRL_DEFECTCOR_B (1 << 12)
79 #define MT9M111_CTXT_CTRL_RESIZE_B (1 << 10)
80 #define MT9M111_CTXT_CTRL_CTRL2_B (1 << 9)
81 #define MT9M111_CTXT_CTRL_GAMMA_B (1 << 8)
82 #define MT9M111_CTXT_CTRL_XENON_EN (1 << 7)
83 #define MT9M111_CTXT_CTRL_READ_MODE_B (1 << 3)
84 #define MT9M111_CTXT_CTRL_LED_FLASH_EN (1 << 2)
85 #define MT9M111_CTXT_CTRL_VBLANK_SEL_B (1 << 1)
86 #define MT9M111_CTXT_CTRL_HBLANK_SEL_B (1 << 0)
87
88 /*
89 * Colorpipe register addresses (0x100..0x1ff)
90 */
91 #define MT9M111_OPER_MODE_CTRL 0x106
92 #define MT9M111_OUTPUT_FORMAT_CTRL 0x108
93 #define MT9M111_REDUCER_XZOOM_B 0x1a0
94 #define MT9M111_REDUCER_XSIZE_B 0x1a1
95 #define MT9M111_REDUCER_YZOOM_B 0x1a3
96 #define MT9M111_REDUCER_YSIZE_B 0x1a4
97 #define MT9M111_REDUCER_XZOOM_A 0x1a6
98 #define MT9M111_REDUCER_XSIZE_A 0x1a7
99 #define MT9M111_REDUCER_YZOOM_A 0x1a9
100 #define MT9M111_REDUCER_YSIZE_A 0x1aa
101
102 #define MT9M111_OUTPUT_FORMAT_CTRL2_A 0x13a
103 #define MT9M111_OUTPUT_FORMAT_CTRL2_B 0x19b
104
105 #define MT9M111_OPMODE_AUTOEXPO_EN (1 << 14)
106 #define MT9M111_OPMODE_AUTOWHITEBAL_EN (1 << 1)
107 #define MT9M111_OUTFMT_FLIP_BAYER_COL (1 << 9)
108 #define MT9M111_OUTFMT_FLIP_BAYER_ROW (1 << 8)
109 #define MT9M111_OUTFMT_PROCESSED_BAYER (1 << 14)
110 #define MT9M111_OUTFMT_BYPASS_IFP (1 << 10)
111 #define MT9M111_OUTFMT_INV_PIX_CLOCK (1 << 9)
112 #define MT9M111_OUTFMT_RGB (1 << 8)
113 #define MT9M111_OUTFMT_RGB565 (0 << 6)
114 #define MT9M111_OUTFMT_RGB555 (1 << 6)
115 #define MT9M111_OUTFMT_RGB444x (2 << 6)
116 #define MT9M111_OUTFMT_RGBx444 (3 << 6)
117 #define MT9M111_OUTFMT_TST_RAMP_OFF (0 << 4)
118 #define MT9M111_OUTFMT_TST_RAMP_COL (1 << 4)
119 #define MT9M111_OUTFMT_TST_RAMP_ROW (2 << 4)
120 #define MT9M111_OUTFMT_TST_RAMP_FRAME (3 << 4)
121 #define MT9M111_OUTFMT_SHIFT_3_UP (1 << 3)
122 #define MT9M111_OUTFMT_AVG_CHROMA (1 << 2)
123 #define MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN (1 << 1)
124 #define MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B (1 << 0)
125
126 /*
127 * Camera control register addresses (0x200..0x2ff not implemented)
128 */
129
130 #define reg_read(reg) mt9m111_reg_read(client, MT9M111_##reg)
131 #define reg_write(reg, val) mt9m111_reg_write(client, MT9M111_##reg, (val))
132 #define reg_set(reg, val) mt9m111_reg_set(client, MT9M111_##reg, (val))
133 #define reg_clear(reg, val) mt9m111_reg_clear(client, MT9M111_##reg, (val))
134 #define reg_mask(reg, val, mask) mt9m111_reg_mask(client, MT9M111_##reg, \
135 (val), (mask))
136
137 #define MT9M111_MIN_DARK_ROWS 8
138 #define MT9M111_MIN_DARK_COLS 26
139 #define MT9M111_MAX_HEIGHT 1024
140 #define MT9M111_MAX_WIDTH 1280
141
142 /* MT9M111 has only one fixed colorspace per pixelcode */
143 struct mt9m111_datafmt {
144 enum v4l2_mbus_pixelcode code;
145 enum v4l2_colorspace colorspace;
146 };
147
148 /* Find a data format by a pixel code in an array */
149 static const struct mt9m111_datafmt *mt9m111_find_datafmt(
150 enum v4l2_mbus_pixelcode code, const struct mt9m111_datafmt *fmt,
151 int n)
152 {
153 int i;
154 for (i = 0; i < n; i++)
155 if (fmt[i].code == code)
156 return fmt + i;
157
158 return NULL;
159 }
160
161 static const struct mt9m111_datafmt mt9m111_colour_fmts[] = {
162 {V4L2_MBUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_JPEG},
163 {V4L2_MBUS_FMT_YVYU8_2X8, V4L2_COLORSPACE_JPEG},
164 {V4L2_MBUS_FMT_UYVY8_2X8, V4L2_COLORSPACE_JPEG},
165 {V4L2_MBUS_FMT_VYUY8_2X8, V4L2_COLORSPACE_JPEG},
166 {V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB},
167 {V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE, V4L2_COLORSPACE_SRGB},
168 {V4L2_MBUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB},
169 {V4L2_MBUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB},
170 {V4L2_MBUS_FMT_BGR565_2X8_LE, V4L2_COLORSPACE_SRGB},
171 {V4L2_MBUS_FMT_BGR565_2X8_BE, V4L2_COLORSPACE_SRGB},
172 {V4L2_MBUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB},
173 {V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB},
174 };
175
176 enum mt9m111_context {
177 HIGHPOWER = 0,
178 LOWPOWER,
179 };
180
181 struct mt9m111 {
182 struct v4l2_subdev subdev;
183 struct v4l2_ctrl_handler hdl;
184 struct v4l2_ctrl *gain;
185 int model; /* V4L2_IDENT_MT9M111 or V4L2_IDENT_MT9M112 code
186 * from v4l2-chip-ident.h */
187 enum mt9m111_context context;
188 struct v4l2_rect rect;
189 struct mutex power_lock; /* lock to protect power_count */
190 int power_count;
191 const struct mt9m111_datafmt *fmt;
192 int lastpage; /* PageMap cache value */
193 unsigned char datawidth;
194 unsigned int powered:1;
195 };
196
197 static struct mt9m111 *to_mt9m111(const struct i2c_client *client)
198 {
199 return container_of(i2c_get_clientdata(client), struct mt9m111, subdev);
200 }
201
202 static int reg_page_map_set(struct i2c_client *client, const u16 reg)
203 {
204 int ret;
205 u16 page;
206 struct mt9m111 *mt9m111 = to_mt9m111(client);
207
208 page = (reg >> 8);
209 if (page == mt9m111->lastpage)
210 return 0;
211 if (page > 2)
212 return -EINVAL;
213
214 ret = i2c_smbus_write_word_data(client, MT9M111_PAGE_MAP, swab16(page));
215 if (!ret)
216 mt9m111->lastpage = page;
217 return ret;
218 }
219
220 static int mt9m111_reg_read(struct i2c_client *client, const u16 reg)
221 {
222 int ret;
223
224 ret = reg_page_map_set(client, reg);
225 if (!ret)
226 ret = swab16(i2c_smbus_read_word_data(client, reg & 0xff));
227
228 dev_dbg(&client->dev, "read reg.%03x -> %04x\n", reg, ret);
229 return ret;
230 }
231
232 static int mt9m111_reg_write(struct i2c_client *client, const u16 reg,
233 const u16 data)
234 {
235 int ret;
236
237 ret = reg_page_map_set(client, reg);
238 if (!ret)
239 ret = i2c_smbus_write_word_data(client, reg & 0xff,
240 swab16(data));
241 dev_dbg(&client->dev, "write reg.%03x = %04x -> %d\n", reg, data, ret);
242 return ret;
243 }
244
245 static int mt9m111_reg_set(struct i2c_client *client, const u16 reg,
246 const u16 data)
247 {
248 int ret;
249
250 ret = mt9m111_reg_read(client, reg);
251 if (ret >= 0)
252 ret = mt9m111_reg_write(client, reg, ret | data);
253 return ret;
254 }
255
256 static int mt9m111_reg_clear(struct i2c_client *client, const u16 reg,
257 const u16 data)
258 {
259 int ret;
260
261 ret = mt9m111_reg_read(client, reg);
262 if (ret >= 0)
263 ret = mt9m111_reg_write(client, reg, ret & ~data);
264 return ret;
265 }
266
267 static int mt9m111_reg_mask(struct i2c_client *client, const u16 reg,
268 const u16 data, const u16 mask)
269 {
270 int ret;
271
272 ret = mt9m111_reg_read(client, reg);
273 if (ret >= 0)
274 ret = mt9m111_reg_write(client, reg, (ret & ~mask) | data);
275 return ret;
276 }
277
278 static int mt9m111_set_context(struct mt9m111 *mt9m111,
279 enum mt9m111_context ctxt)
280 {
281 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
282 int valB = MT9M111_CTXT_CTRL_RESTART | MT9M111_CTXT_CTRL_DEFECTCOR_B
283 | MT9M111_CTXT_CTRL_RESIZE_B | MT9M111_CTXT_CTRL_CTRL2_B
284 | MT9M111_CTXT_CTRL_GAMMA_B | MT9M111_CTXT_CTRL_READ_MODE_B
285 | MT9M111_CTXT_CTRL_VBLANK_SEL_B
286 | MT9M111_CTXT_CTRL_HBLANK_SEL_B;
287 int valA = MT9M111_CTXT_CTRL_RESTART;
288
289 if (ctxt == HIGHPOWER)
290 return reg_write(CONTEXT_CONTROL, valB);
291 else
292 return reg_write(CONTEXT_CONTROL, valA);
293 }
294
295 static int mt9m111_setup_rect(struct mt9m111 *mt9m111,
296 struct v4l2_rect *rect)
297 {
298 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
299 int ret, is_raw_format;
300 int width = rect->width;
301 int height = rect->height;
302
303 if (mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
304 mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE)
305 is_raw_format = 1;
306 else
307 is_raw_format = 0;
308
309 ret = reg_write(COLUMN_START, rect->left);
310 if (!ret)
311 ret = reg_write(ROW_START, rect->top);
312
313 if (is_raw_format) {
314 if (!ret)
315 ret = reg_write(WINDOW_WIDTH, width);
316 if (!ret)
317 ret = reg_write(WINDOW_HEIGHT, height);
318 } else {
319 if (!ret)
320 ret = reg_write(REDUCER_XZOOM_B, MT9M111_MAX_WIDTH);
321 if (!ret)
322 ret = reg_write(REDUCER_YZOOM_B, MT9M111_MAX_HEIGHT);
323 if (!ret)
324 ret = reg_write(REDUCER_XSIZE_B, width);
325 if (!ret)
326 ret = reg_write(REDUCER_YSIZE_B, height);
327 if (!ret)
328 ret = reg_write(REDUCER_XZOOM_A, MT9M111_MAX_WIDTH);
329 if (!ret)
330 ret = reg_write(REDUCER_YZOOM_A, MT9M111_MAX_HEIGHT);
331 if (!ret)
332 ret = reg_write(REDUCER_XSIZE_A, width);
333 if (!ret)
334 ret = reg_write(REDUCER_YSIZE_A, height);
335 }
336
337 return ret;
338 }
339
340 static int mt9m111_enable(struct mt9m111 *mt9m111)
341 {
342 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
343 int ret;
344
345 ret = reg_set(RESET, MT9M111_RESET_CHIP_ENABLE);
346 if (!ret)
347 mt9m111->powered = 1;
348 return ret;
349 }
350
351 static int mt9m111_reset(struct mt9m111 *mt9m111)
352 {
353 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
354 int ret;
355
356 ret = reg_set(RESET, MT9M111_RESET_RESET_MODE);
357 if (!ret)
358 ret = reg_set(RESET, MT9M111_RESET_RESET_SOC);
359 if (!ret)
360 ret = reg_clear(RESET, MT9M111_RESET_RESET_MODE
361 | MT9M111_RESET_RESET_SOC);
362
363 return ret;
364 }
365
366 static int mt9m111_make_rect(struct mt9m111 *mt9m111,
367 struct v4l2_rect *rect)
368 {
369 if (mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
370 mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE) {
371 /* Bayer format - even size lengths */
372 rect->width = ALIGN(rect->width, 2);
373 rect->height = ALIGN(rect->height, 2);
374 /* Let the user play with the starting pixel */
375 }
376
377 /* FIXME: the datasheet doesn't specify minimum sizes */
378 soc_camera_limit_side(&rect->left, &rect->width,
379 MT9M111_MIN_DARK_COLS, 2, MT9M111_MAX_WIDTH);
380
381 soc_camera_limit_side(&rect->top, &rect->height,
382 MT9M111_MIN_DARK_ROWS, 2, MT9M111_MAX_HEIGHT);
383
384 return mt9m111_setup_rect(mt9m111, rect);
385 }
386
387 static int mt9m111_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
388 {
389 struct v4l2_rect rect = a->c;
390 struct i2c_client *client = v4l2_get_subdevdata(sd);
391 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
392 int ret;
393
394 dev_dbg(&client->dev, "%s left=%d, top=%d, width=%d, height=%d\n",
395 __func__, rect.left, rect.top, rect.width, rect.height);
396
397 if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
398 return -EINVAL;
399
400 ret = mt9m111_make_rect(mt9m111, &rect);
401 if (!ret)
402 mt9m111->rect = rect;
403 return ret;
404 }
405
406 static int mt9m111_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
407 {
408 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
409
410 a->c = mt9m111->rect;
411 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
412
413 return 0;
414 }
415
416 static int mt9m111_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
417 {
418 if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
419 return -EINVAL;
420
421 a->bounds.left = MT9M111_MIN_DARK_COLS;
422 a->bounds.top = MT9M111_MIN_DARK_ROWS;
423 a->bounds.width = MT9M111_MAX_WIDTH;
424 a->bounds.height = MT9M111_MAX_HEIGHT;
425 a->defrect = a->bounds;
426 a->pixelaspect.numerator = 1;
427 a->pixelaspect.denominator = 1;
428
429 return 0;
430 }
431
432 static int mt9m111_g_fmt(struct v4l2_subdev *sd,
433 struct v4l2_mbus_framefmt *mf)
434 {
435 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
436
437 mf->width = mt9m111->rect.width;
438 mf->height = mt9m111->rect.height;
439 mf->code = mt9m111->fmt->code;
440 mf->colorspace = mt9m111->fmt->colorspace;
441 mf->field = V4L2_FIELD_NONE;
442
443 return 0;
444 }
445
446 static int mt9m111_set_pixfmt(struct mt9m111 *mt9m111,
447 enum v4l2_mbus_pixelcode code)
448 {
449 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
450 u16 data_outfmt2, mask_outfmt2 = MT9M111_OUTFMT_PROCESSED_BAYER |
451 MT9M111_OUTFMT_BYPASS_IFP | MT9M111_OUTFMT_RGB |
452 MT9M111_OUTFMT_RGB565 | MT9M111_OUTFMT_RGB555 |
453 MT9M111_OUTFMT_RGB444x | MT9M111_OUTFMT_RGBx444 |
454 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN |
455 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
456 int ret;
457
458 switch (code) {
459 case V4L2_MBUS_FMT_SBGGR8_1X8:
460 data_outfmt2 = MT9M111_OUTFMT_PROCESSED_BAYER |
461 MT9M111_OUTFMT_RGB;
462 break;
463 case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE:
464 data_outfmt2 = MT9M111_OUTFMT_BYPASS_IFP | MT9M111_OUTFMT_RGB;
465 break;
466 case V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE:
467 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB555 |
468 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN;
469 break;
470 case V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE:
471 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB555;
472 break;
473 case V4L2_MBUS_FMT_RGB565_2X8_LE:
474 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 |
475 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN;
476 break;
477 case V4L2_MBUS_FMT_RGB565_2X8_BE:
478 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565;
479 break;
480 case V4L2_MBUS_FMT_BGR565_2X8_BE:
481 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 |
482 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
483 break;
484 case V4L2_MBUS_FMT_BGR565_2X8_LE:
485 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 |
486 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN |
487 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
488 break;
489 case V4L2_MBUS_FMT_UYVY8_2X8:
490 data_outfmt2 = 0;
491 break;
492 case V4L2_MBUS_FMT_VYUY8_2X8:
493 data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
494 break;
495 case V4L2_MBUS_FMT_YUYV8_2X8:
496 data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN;
497 break;
498 case V4L2_MBUS_FMT_YVYU8_2X8:
499 data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN |
500 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
501 break;
502 default:
503 dev_err(&client->dev, "Pixel format not handled: %x\n", code);
504 return -EINVAL;
505 }
506
507 ret = reg_mask(OUTPUT_FORMAT_CTRL2_A, data_outfmt2,
508 mask_outfmt2);
509 if (!ret)
510 ret = reg_mask(OUTPUT_FORMAT_CTRL2_B, data_outfmt2,
511 mask_outfmt2);
512
513 return ret;
514 }
515
516 static int mt9m111_s_fmt(struct v4l2_subdev *sd,
517 struct v4l2_mbus_framefmt *mf)
518 {
519 struct i2c_client *client = v4l2_get_subdevdata(sd);
520 const struct mt9m111_datafmt *fmt;
521 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
522 struct v4l2_rect rect = {
523 .left = mt9m111->rect.left,
524 .top = mt9m111->rect.top,
525 .width = mf->width,
526 .height = mf->height,
527 };
528 int ret;
529
530 fmt = mt9m111_find_datafmt(mf->code, mt9m111_colour_fmts,
531 ARRAY_SIZE(mt9m111_colour_fmts));
532 if (!fmt)
533 return -EINVAL;
534
535 dev_dbg(&client->dev,
536 "%s code=%x left=%d, top=%d, width=%d, height=%d\n", __func__,
537 mf->code, rect.left, rect.top, rect.width, rect.height);
538
539 ret = mt9m111_make_rect(mt9m111, &rect);
540 if (!ret)
541 ret = mt9m111_set_pixfmt(mt9m111, mf->code);
542 if (!ret) {
543 mt9m111->rect = rect;
544 mt9m111->fmt = fmt;
545 mf->colorspace = fmt->colorspace;
546 }
547
548 return ret;
549 }
550
551 static int mt9m111_try_fmt(struct v4l2_subdev *sd,
552 struct v4l2_mbus_framefmt *mf)
553 {
554 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
555 const struct mt9m111_datafmt *fmt;
556 bool bayer = mf->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
557 mf->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE;
558
559 fmt = mt9m111_find_datafmt(mf->code, mt9m111_colour_fmts,
560 ARRAY_SIZE(mt9m111_colour_fmts));
561 if (!fmt) {
562 fmt = mt9m111->fmt;
563 mf->code = fmt->code;
564 }
565
566 /*
567 * With Bayer format enforce even side lengths, but let the user play
568 * with the starting pixel
569 */
570
571 if (mf->height > MT9M111_MAX_HEIGHT)
572 mf->height = MT9M111_MAX_HEIGHT;
573 else if (mf->height < 2)
574 mf->height = 2;
575 else if (bayer)
576 mf->height = ALIGN(mf->height, 2);
577
578 if (mf->width > MT9M111_MAX_WIDTH)
579 mf->width = MT9M111_MAX_WIDTH;
580 else if (mf->width < 2)
581 mf->width = 2;
582 else if (bayer)
583 mf->width = ALIGN(mf->width, 2);
584
585 mf->colorspace = fmt->colorspace;
586
587 return 0;
588 }
589
590 static int mt9m111_g_chip_ident(struct v4l2_subdev *sd,
591 struct v4l2_dbg_chip_ident *id)
592 {
593 struct i2c_client *client = v4l2_get_subdevdata(sd);
594 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
595
596 if (id->match.type != V4L2_CHIP_MATCH_I2C_ADDR)
597 return -EINVAL;
598
599 if (id->match.addr != client->addr)
600 return -ENODEV;
601
602 id->ident = mt9m111->model;
603 id->revision = 0;
604
605 return 0;
606 }
607
608 #ifdef CONFIG_VIDEO_ADV_DEBUG
609 static int mt9m111_g_register(struct v4l2_subdev *sd,
610 struct v4l2_dbg_register *reg)
611 {
612 struct i2c_client *client = v4l2_get_subdevdata(sd);
613 int val;
614
615 if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR || reg->reg > 0x2ff)
616 return -EINVAL;
617 if (reg->match.addr != client->addr)
618 return -ENODEV;
619
620 val = mt9m111_reg_read(client, reg->reg);
621 reg->size = 2;
622 reg->val = (u64)val;
623
624 if (reg->val > 0xffff)
625 return -EIO;
626
627 return 0;
628 }
629
630 static int mt9m111_s_register(struct v4l2_subdev *sd,
631 struct v4l2_dbg_register *reg)
632 {
633 struct i2c_client *client = v4l2_get_subdevdata(sd);
634
635 if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR || reg->reg > 0x2ff)
636 return -EINVAL;
637
638 if (reg->match.addr != client->addr)
639 return -ENODEV;
640
641 if (mt9m111_reg_write(client, reg->reg, reg->val) < 0)
642 return -EIO;
643
644 return 0;
645 }
646 #endif
647
648 static int mt9m111_set_flip(struct mt9m111 *mt9m111, int flip, int mask)
649 {
650 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
651 int ret;
652
653 if (mt9m111->context == HIGHPOWER) {
654 if (flip)
655 ret = reg_set(READ_MODE_B, mask);
656 else
657 ret = reg_clear(READ_MODE_B, mask);
658 } else {
659 if (flip)
660 ret = reg_set(READ_MODE_A, mask);
661 else
662 ret = reg_clear(READ_MODE_A, mask);
663 }
664
665 return ret;
666 }
667
668 static int mt9m111_get_global_gain(struct mt9m111 *mt9m111)
669 {
670 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
671 int data;
672
673 data = reg_read(GLOBAL_GAIN);
674 if (data >= 0)
675 return (data & 0x2f) * (1 << ((data >> 10) & 1)) *
676 (1 << ((data >> 9) & 1));
677 return data;
678 }
679
680 static int mt9m111_set_global_gain(struct mt9m111 *mt9m111, int gain)
681 {
682 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
683 u16 val;
684
685 if (gain > 63 * 2 * 2)
686 return -EINVAL;
687
688 if ((gain >= 64 * 2) && (gain < 63 * 2 * 2))
689 val = (1 << 10) | (1 << 9) | (gain / 4);
690 else if ((gain >= 64) && (gain < 64 * 2))
691 val = (1 << 9) | (gain / 2);
692 else
693 val = gain;
694
695 return reg_write(GLOBAL_GAIN, val);
696 }
697
698 static int mt9m111_set_autoexposure(struct mt9m111 *mt9m111, int on)
699 {
700 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
701
702 if (on)
703 return reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN);
704 return reg_clear(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN);
705 }
706
707 static int mt9m111_set_autowhitebalance(struct mt9m111 *mt9m111, int on)
708 {
709 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
710
711 if (on)
712 return reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN);
713 return reg_clear(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN);
714 }
715
716 static int mt9m111_s_ctrl(struct v4l2_ctrl *ctrl)
717 {
718 struct mt9m111 *mt9m111 = container_of(ctrl->handler,
719 struct mt9m111, hdl);
720
721 switch (ctrl->id) {
722 case V4L2_CID_VFLIP:
723 return mt9m111_set_flip(mt9m111, ctrl->val,
724 MT9M111_RMB_MIRROR_ROWS);
725 case V4L2_CID_HFLIP:
726 return mt9m111_set_flip(mt9m111, ctrl->val,
727 MT9M111_RMB_MIRROR_COLS);
728 case V4L2_CID_GAIN:
729 return mt9m111_set_global_gain(mt9m111, ctrl->val);
730 case V4L2_CID_EXPOSURE_AUTO:
731 return mt9m111_set_autoexposure(mt9m111, ctrl->val);
732 case V4L2_CID_AUTO_WHITE_BALANCE:
733 return mt9m111_set_autowhitebalance(mt9m111, ctrl->val);
734 }
735
736 return -EINVAL;
737 }
738
739 static int mt9m111_suspend(struct mt9m111 *mt9m111)
740 {
741 v4l2_ctrl_s_ctrl(mt9m111->gain, mt9m111_get_global_gain(mt9m111));
742
743 return 0;
744 }
745
746 static void mt9m111_restore_state(struct mt9m111 *mt9m111)
747 {
748 mt9m111_set_context(mt9m111, mt9m111->context);
749 mt9m111_set_pixfmt(mt9m111, mt9m111->fmt->code);
750 mt9m111_setup_rect(mt9m111, &mt9m111->rect);
751 v4l2_ctrl_handler_setup(&mt9m111->hdl);
752 }
753
754 static int mt9m111_resume(struct mt9m111 *mt9m111)
755 {
756 int ret = 0;
757
758 if (mt9m111->powered) {
759 ret = mt9m111_enable(mt9m111);
760 if (!ret)
761 ret = mt9m111_reset(mt9m111);
762 if (!ret)
763 mt9m111_restore_state(mt9m111);
764 }
765 return ret;
766 }
767
768 static int mt9m111_init(struct mt9m111 *mt9m111)
769 {
770 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
771 int ret;
772
773 mt9m111->context = HIGHPOWER;
774 ret = mt9m111_enable(mt9m111);
775 if (!ret)
776 ret = mt9m111_reset(mt9m111);
777 if (!ret)
778 ret = mt9m111_set_context(mt9m111, mt9m111->context);
779 if (ret)
780 dev_err(&client->dev, "mt9m111 init failed: %d\n", ret);
781 return ret;
782 }
783
784 /*
785 * Interface active, can use i2c. If it fails, it can indeed mean, that
786 * this wasn't our capture interface, so, we wait for the right one
787 */
788 static int mt9m111_video_probe(struct i2c_client *client)
789 {
790 struct mt9m111 *mt9m111 = to_mt9m111(client);
791 s32 data;
792 int ret;
793
794 data = reg_read(CHIP_VERSION);
795
796 switch (data) {
797 case 0x143a: /* MT9M111 or MT9M131 */
798 mt9m111->model = V4L2_IDENT_MT9M111;
799 dev_info(&client->dev,
800 "Detected a MT9M111/MT9M131 chip ID %x\n", data);
801 break;
802 case 0x148c: /* MT9M112 */
803 mt9m111->model = V4L2_IDENT_MT9M112;
804 dev_info(&client->dev, "Detected a MT9M112 chip ID %x\n", data);
805 break;
806 default:
807 dev_err(&client->dev,
808 "No MT9M111/MT9M112/MT9M131 chip detected register read %x\n",
809 data);
810 return -ENODEV;
811 }
812
813 ret = mt9m111_init(mt9m111);
814 if (ret)
815 return ret;
816 return v4l2_ctrl_handler_setup(&mt9m111->hdl);
817 }
818
819 static int mt9m111_s_power(struct v4l2_subdev *sd, int on)
820 {
821 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
822 struct i2c_client *client = v4l2_get_subdevdata(sd);
823 int ret = 0;
824
825 mutex_lock(&mt9m111->power_lock);
826
827 /*
828 * If the power count is modified from 0 to != 0 or from != 0 to 0,
829 * update the power state.
830 */
831 if (mt9m111->power_count == !on) {
832 if (on) {
833 ret = mt9m111_resume(mt9m111);
834 if (ret) {
835 dev_err(&client->dev,
836 "Failed to resume the sensor: %d\n", ret);
837 goto out;
838 }
839 } else {
840 mt9m111_suspend(mt9m111);
841 }
842 }
843
844 /* Update the power count. */
845 mt9m111->power_count += on ? 1 : -1;
846 WARN_ON(mt9m111->power_count < 0);
847
848 out:
849 mutex_unlock(&mt9m111->power_lock);
850 return ret;
851 }
852
853 static const struct v4l2_ctrl_ops mt9m111_ctrl_ops = {
854 .s_ctrl = mt9m111_s_ctrl,
855 };
856
857 static struct v4l2_subdev_core_ops mt9m111_subdev_core_ops = {
858 .g_chip_ident = mt9m111_g_chip_ident,
859 .s_power = mt9m111_s_power,
860 #ifdef CONFIG_VIDEO_ADV_DEBUG
861 .g_register = mt9m111_g_register,
862 .s_register = mt9m111_s_register,
863 #endif
864 };
865
866 static int mt9m111_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
867 enum v4l2_mbus_pixelcode *code)
868 {
869 if (index >= ARRAY_SIZE(mt9m111_colour_fmts))
870 return -EINVAL;
871
872 *code = mt9m111_colour_fmts[index].code;
873 return 0;
874 }
875
876 static int mt9m111_g_mbus_config(struct v4l2_subdev *sd,
877 struct v4l2_mbus_config *cfg)
878 {
879 struct i2c_client *client = v4l2_get_subdevdata(sd);
880 struct soc_camera_link *icl = soc_camera_i2c_to_link(client);
881
882 cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_PCLK_SAMPLE_RISING |
883 V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_HIGH |
884 V4L2_MBUS_DATA_ACTIVE_HIGH;
885 cfg->type = V4L2_MBUS_PARALLEL;
886 cfg->flags = soc_camera_apply_board_flags(icl, cfg);
887
888 return 0;
889 }
890
891 static struct v4l2_subdev_video_ops mt9m111_subdev_video_ops = {
892 .s_mbus_fmt = mt9m111_s_fmt,
893 .g_mbus_fmt = mt9m111_g_fmt,
894 .try_mbus_fmt = mt9m111_try_fmt,
895 .s_crop = mt9m111_s_crop,
896 .g_crop = mt9m111_g_crop,
897 .cropcap = mt9m111_cropcap,
898 .enum_mbus_fmt = mt9m111_enum_fmt,
899 .g_mbus_config = mt9m111_g_mbus_config,
900 };
901
902 static struct v4l2_subdev_ops mt9m111_subdev_ops = {
903 .core = &mt9m111_subdev_core_ops,
904 .video = &mt9m111_subdev_video_ops,
905 };
906
907 static int mt9m111_probe(struct i2c_client *client,
908 const struct i2c_device_id *did)
909 {
910 struct mt9m111 *mt9m111;
911 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
912 struct soc_camera_link *icl = soc_camera_i2c_to_link(client);
913 int ret;
914
915 if (!icl) {
916 dev_err(&client->dev, "mt9m111: driver needs platform data\n");
917 return -EINVAL;
918 }
919
920 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA)) {
921 dev_warn(&adapter->dev,
922 "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n");
923 return -EIO;
924 }
925
926 mt9m111 = kzalloc(sizeof(struct mt9m111), GFP_KERNEL);
927 if (!mt9m111)
928 return -ENOMEM;
929
930 v4l2_i2c_subdev_init(&mt9m111->subdev, client, &mt9m111_subdev_ops);
931 v4l2_ctrl_handler_init(&mt9m111->hdl, 5);
932 v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops,
933 V4L2_CID_VFLIP, 0, 1, 1, 0);
934 v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops,
935 V4L2_CID_HFLIP, 0, 1, 1, 0);
936 v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops,
937 V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1);
938 mt9m111->gain = v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops,
939 V4L2_CID_GAIN, 0, 63 * 2 * 2, 1, 32);
940 v4l2_ctrl_new_std_menu(&mt9m111->hdl,
941 &mt9m111_ctrl_ops, V4L2_CID_EXPOSURE_AUTO, 1, 0,
942 V4L2_EXPOSURE_AUTO);
943 mt9m111->subdev.ctrl_handler = &mt9m111->hdl;
944 if (mt9m111->hdl.error) {
945 int err = mt9m111->hdl.error;
946
947 kfree(mt9m111);
948 return err;
949 }
950
951 /* Second stage probe - when a capture adapter is there */
952 mt9m111->rect.left = MT9M111_MIN_DARK_COLS;
953 mt9m111->rect.top = MT9M111_MIN_DARK_ROWS;
954 mt9m111->rect.width = MT9M111_MAX_WIDTH;
955 mt9m111->rect.height = MT9M111_MAX_HEIGHT;
956 mt9m111->fmt = &mt9m111_colour_fmts[0];
957 mt9m111->lastpage = -1;
958 mutex_init(&mt9m111->power_lock);
959
960 ret = mt9m111_video_probe(client);
961 if (ret) {
962 v4l2_ctrl_handler_free(&mt9m111->hdl);
963 kfree(mt9m111);
964 }
965
966 return ret;
967 }
968
969 static int mt9m111_remove(struct i2c_client *client)
970 {
971 struct mt9m111 *mt9m111 = to_mt9m111(client);
972
973 v4l2_device_unregister_subdev(&mt9m111->subdev);
974 v4l2_ctrl_handler_free(&mt9m111->hdl);
975 kfree(mt9m111);
976
977 return 0;
978 }
979
980 static const struct i2c_device_id mt9m111_id[] = {
981 { "mt9m111", 0 },
982 { }
983 };
984 MODULE_DEVICE_TABLE(i2c, mt9m111_id);
985
986 static struct i2c_driver mt9m111_i2c_driver = {
987 .driver = {
988 .name = "mt9m111",
989 },
990 .probe = mt9m111_probe,
991 .remove = mt9m111_remove,
992 .id_table = mt9m111_id,
993 };
994
995 static int __init mt9m111_mod_init(void)
996 {
997 return i2c_add_driver(&mt9m111_i2c_driver);
998 }
999
1000 static void __exit mt9m111_mod_exit(void)
1001 {
1002 i2c_del_driver(&mt9m111_i2c_driver);
1003 }
1004
1005 module_init(mt9m111_mod_init);
1006 module_exit(mt9m111_mod_exit);
1007
1008 MODULE_DESCRIPTION("Micron/Aptina MT9M111/MT9M112/MT9M131 Camera driver");
1009 MODULE_AUTHOR("Robert Jarzmik");
1010 MODULE_LICENSE("GPL");
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