2 * Driver for MT9M111/MT9M112/MT9M131 CMOS Image Sensor from Micron/Aptina
4 * Copyright (C) 2008, Robert Jarzmik <robert.jarzmik@free.fr>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 #include <linux/videodev2.h>
11 #include <linux/slab.h>
12 #include <linux/i2c.h>
13 #include <linux/log2.h>
14 #include <linux/gpio.h>
15 #include <linux/delay.h>
16 #include <linux/v4l2-mediabus.h>
17 #include <linux/module.h>
19 #include <media/soc_camera.h>
20 #include <media/v4l2-common.h>
21 #include <media/v4l2-ctrls.h>
22 #include <media/v4l2-chip-ident.h>
25 * MT9M111, MT9M112 and MT9M131:
26 * i2c address is 0x48 or 0x5d (depending on SADDR pin)
27 * The platform has to define i2c_board_info and call i2c_register_board_info()
31 * Sensor core register addresses (0x000..0x0ff)
33 #define MT9M111_CHIP_VERSION 0x000
34 #define MT9M111_ROW_START 0x001
35 #define MT9M111_COLUMN_START 0x002
36 #define MT9M111_WINDOW_HEIGHT 0x003
37 #define MT9M111_WINDOW_WIDTH 0x004
38 #define MT9M111_HORIZONTAL_BLANKING_B 0x005
39 #define MT9M111_VERTICAL_BLANKING_B 0x006
40 #define MT9M111_HORIZONTAL_BLANKING_A 0x007
41 #define MT9M111_VERTICAL_BLANKING_A 0x008
42 #define MT9M111_SHUTTER_WIDTH 0x009
43 #define MT9M111_ROW_SPEED 0x00a
44 #define MT9M111_EXTRA_DELAY 0x00b
45 #define MT9M111_SHUTTER_DELAY 0x00c
46 #define MT9M111_RESET 0x00d
47 #define MT9M111_READ_MODE_B 0x020
48 #define MT9M111_READ_MODE_A 0x021
49 #define MT9M111_FLASH_CONTROL 0x023
50 #define MT9M111_GREEN1_GAIN 0x02b
51 #define MT9M111_BLUE_GAIN 0x02c
52 #define MT9M111_RED_GAIN 0x02d
53 #define MT9M111_GREEN2_GAIN 0x02e
54 #define MT9M111_GLOBAL_GAIN 0x02f
55 #define MT9M111_CONTEXT_CONTROL 0x0c8
56 #define MT9M111_PAGE_MAP 0x0f0
57 #define MT9M111_BYTE_WISE_ADDR 0x0f1
59 #define MT9M111_RESET_SYNC_CHANGES (1 << 15)
60 #define MT9M111_RESET_RESTART_BAD_FRAME (1 << 9)
61 #define MT9M111_RESET_SHOW_BAD_FRAMES (1 << 8)
62 #define MT9M111_RESET_RESET_SOC (1 << 5)
63 #define MT9M111_RESET_OUTPUT_DISABLE (1 << 4)
64 #define MT9M111_RESET_CHIP_ENABLE (1 << 3)
65 #define MT9M111_RESET_ANALOG_STANDBY (1 << 2)
66 #define MT9M111_RESET_RESTART_FRAME (1 << 1)
67 #define MT9M111_RESET_RESET_MODE (1 << 0)
69 #define MT9M111_RM_FULL_POWER_RD (0 << 10)
70 #define MT9M111_RM_LOW_POWER_RD (1 << 10)
71 #define MT9M111_RM_COL_SKIP_4X (1 << 5)
72 #define MT9M111_RM_ROW_SKIP_4X (1 << 4)
73 #define MT9M111_RM_COL_SKIP_2X (1 << 3)
74 #define MT9M111_RM_ROW_SKIP_2X (1 << 2)
75 #define MT9M111_RMB_MIRROR_COLS (1 << 1)
76 #define MT9M111_RMB_MIRROR_ROWS (1 << 0)
77 #define MT9M111_CTXT_CTRL_RESTART (1 << 15)
78 #define MT9M111_CTXT_CTRL_DEFECTCOR_B (1 << 12)
79 #define MT9M111_CTXT_CTRL_RESIZE_B (1 << 10)
80 #define MT9M111_CTXT_CTRL_CTRL2_B (1 << 9)
81 #define MT9M111_CTXT_CTRL_GAMMA_B (1 << 8)
82 #define MT9M111_CTXT_CTRL_XENON_EN (1 << 7)
83 #define MT9M111_CTXT_CTRL_READ_MODE_B (1 << 3)
84 #define MT9M111_CTXT_CTRL_LED_FLASH_EN (1 << 2)
85 #define MT9M111_CTXT_CTRL_VBLANK_SEL_B (1 << 1)
86 #define MT9M111_CTXT_CTRL_HBLANK_SEL_B (1 << 0)
89 * Colorpipe register addresses (0x100..0x1ff)
91 #define MT9M111_OPER_MODE_CTRL 0x106
92 #define MT9M111_OUTPUT_FORMAT_CTRL 0x108
93 #define MT9M111_REDUCER_XZOOM_B 0x1a0
94 #define MT9M111_REDUCER_XSIZE_B 0x1a1
95 #define MT9M111_REDUCER_YZOOM_B 0x1a3
96 #define MT9M111_REDUCER_YSIZE_B 0x1a4
97 #define MT9M111_REDUCER_XZOOM_A 0x1a6
98 #define MT9M111_REDUCER_XSIZE_A 0x1a7
99 #define MT9M111_REDUCER_YZOOM_A 0x1a9
100 #define MT9M111_REDUCER_YSIZE_A 0x1aa
102 #define MT9M111_OUTPUT_FORMAT_CTRL2_A 0x13a
103 #define MT9M111_OUTPUT_FORMAT_CTRL2_B 0x19b
105 #define MT9M111_OPMODE_AUTOEXPO_EN (1 << 14)
106 #define MT9M111_OPMODE_AUTOWHITEBAL_EN (1 << 1)
107 #define MT9M111_OUTFMT_FLIP_BAYER_COL (1 << 9)
108 #define MT9M111_OUTFMT_FLIP_BAYER_ROW (1 << 8)
109 #define MT9M111_OUTFMT_PROCESSED_BAYER (1 << 14)
110 #define MT9M111_OUTFMT_BYPASS_IFP (1 << 10)
111 #define MT9M111_OUTFMT_INV_PIX_CLOCK (1 << 9)
112 #define MT9M111_OUTFMT_RGB (1 << 8)
113 #define MT9M111_OUTFMT_RGB565 (0 << 6)
114 #define MT9M111_OUTFMT_RGB555 (1 << 6)
115 #define MT9M111_OUTFMT_RGB444x (2 << 6)
116 #define MT9M111_OUTFMT_RGBx444 (3 << 6)
117 #define MT9M111_OUTFMT_TST_RAMP_OFF (0 << 4)
118 #define MT9M111_OUTFMT_TST_RAMP_COL (1 << 4)
119 #define MT9M111_OUTFMT_TST_RAMP_ROW (2 << 4)
120 #define MT9M111_OUTFMT_TST_RAMP_FRAME (3 << 4)
121 #define MT9M111_OUTFMT_SHIFT_3_UP (1 << 3)
122 #define MT9M111_OUTFMT_AVG_CHROMA (1 << 2)
123 #define MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN (1 << 1)
124 #define MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B (1 << 0)
127 * Camera control register addresses (0x200..0x2ff not implemented)
130 #define reg_read(reg) mt9m111_reg_read(client, MT9M111_##reg)
131 #define reg_write(reg, val) mt9m111_reg_write(client, MT9M111_##reg, (val))
132 #define reg_set(reg, val) mt9m111_reg_set(client, MT9M111_##reg, (val))
133 #define reg_clear(reg, val) mt9m111_reg_clear(client, MT9M111_##reg, (val))
134 #define reg_mask(reg, val, mask) mt9m111_reg_mask(client, MT9M111_##reg, \
137 #define MT9M111_MIN_DARK_ROWS 8
138 #define MT9M111_MIN_DARK_COLS 26
139 #define MT9M111_MAX_HEIGHT 1024
140 #define MT9M111_MAX_WIDTH 1280
142 /* MT9M111 has only one fixed colorspace per pixelcode */
143 struct mt9m111_datafmt
{
144 enum v4l2_mbus_pixelcode code
;
145 enum v4l2_colorspace colorspace
;
148 /* Find a data format by a pixel code in an array */
149 static const struct mt9m111_datafmt
*mt9m111_find_datafmt(
150 enum v4l2_mbus_pixelcode code
, const struct mt9m111_datafmt
*fmt
,
154 for (i
= 0; i
< n
; i
++)
155 if (fmt
[i
].code
== code
)
161 static const struct mt9m111_datafmt mt9m111_colour_fmts
[] = {
162 {V4L2_MBUS_FMT_YUYV8_2X8
, V4L2_COLORSPACE_JPEG
},
163 {V4L2_MBUS_FMT_YVYU8_2X8
, V4L2_COLORSPACE_JPEG
},
164 {V4L2_MBUS_FMT_UYVY8_2X8
, V4L2_COLORSPACE_JPEG
},
165 {V4L2_MBUS_FMT_VYUY8_2X8
, V4L2_COLORSPACE_JPEG
},
166 {V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE
, V4L2_COLORSPACE_SRGB
},
167 {V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE
, V4L2_COLORSPACE_SRGB
},
168 {V4L2_MBUS_FMT_RGB565_2X8_LE
, V4L2_COLORSPACE_SRGB
},
169 {V4L2_MBUS_FMT_RGB565_2X8_BE
, V4L2_COLORSPACE_SRGB
},
170 {V4L2_MBUS_FMT_BGR565_2X8_LE
, V4L2_COLORSPACE_SRGB
},
171 {V4L2_MBUS_FMT_BGR565_2X8_BE
, V4L2_COLORSPACE_SRGB
},
172 {V4L2_MBUS_FMT_SBGGR8_1X8
, V4L2_COLORSPACE_SRGB
},
173 {V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE
, V4L2_COLORSPACE_SRGB
},
176 enum mt9m111_context
{
182 struct v4l2_subdev subdev
;
183 struct v4l2_ctrl_handler hdl
;
184 struct v4l2_ctrl
*gain
;
185 int model
; /* V4L2_IDENT_MT9M111 or V4L2_IDENT_MT9M112 code
186 * from v4l2-chip-ident.h */
187 enum mt9m111_context context
;
188 struct v4l2_rect rect
;
189 struct mutex power_lock
; /* lock to protect power_count */
191 const struct mt9m111_datafmt
*fmt
;
192 int lastpage
; /* PageMap cache value */
193 unsigned char datawidth
;
194 unsigned int powered
:1;
197 static struct mt9m111
*to_mt9m111(const struct i2c_client
*client
)
199 return container_of(i2c_get_clientdata(client
), struct mt9m111
, subdev
);
202 static int reg_page_map_set(struct i2c_client
*client
, const u16 reg
)
206 struct mt9m111
*mt9m111
= to_mt9m111(client
);
209 if (page
== mt9m111
->lastpage
)
214 ret
= i2c_smbus_write_word_data(client
, MT9M111_PAGE_MAP
, swab16(page
));
216 mt9m111
->lastpage
= page
;
220 static int mt9m111_reg_read(struct i2c_client
*client
, const u16 reg
)
224 ret
= reg_page_map_set(client
, reg
);
226 ret
= swab16(i2c_smbus_read_word_data(client
, reg
& 0xff));
228 dev_dbg(&client
->dev
, "read reg.%03x -> %04x\n", reg
, ret
);
232 static int mt9m111_reg_write(struct i2c_client
*client
, const u16 reg
,
237 ret
= reg_page_map_set(client
, reg
);
239 ret
= i2c_smbus_write_word_data(client
, reg
& 0xff,
241 dev_dbg(&client
->dev
, "write reg.%03x = %04x -> %d\n", reg
, data
, ret
);
245 static int mt9m111_reg_set(struct i2c_client
*client
, const u16 reg
,
250 ret
= mt9m111_reg_read(client
, reg
);
252 ret
= mt9m111_reg_write(client
, reg
, ret
| data
);
256 static int mt9m111_reg_clear(struct i2c_client
*client
, const u16 reg
,
261 ret
= mt9m111_reg_read(client
, reg
);
263 ret
= mt9m111_reg_write(client
, reg
, ret
& ~data
);
267 static int mt9m111_reg_mask(struct i2c_client
*client
, const u16 reg
,
268 const u16 data
, const u16 mask
)
272 ret
= mt9m111_reg_read(client
, reg
);
274 ret
= mt9m111_reg_write(client
, reg
, (ret
& ~mask
) | data
);
278 static int mt9m111_set_context(struct mt9m111
*mt9m111
,
279 enum mt9m111_context ctxt
)
281 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9m111
->subdev
);
282 int valB
= MT9M111_CTXT_CTRL_RESTART
| MT9M111_CTXT_CTRL_DEFECTCOR_B
283 | MT9M111_CTXT_CTRL_RESIZE_B
| MT9M111_CTXT_CTRL_CTRL2_B
284 | MT9M111_CTXT_CTRL_GAMMA_B
| MT9M111_CTXT_CTRL_READ_MODE_B
285 | MT9M111_CTXT_CTRL_VBLANK_SEL_B
286 | MT9M111_CTXT_CTRL_HBLANK_SEL_B
;
287 int valA
= MT9M111_CTXT_CTRL_RESTART
;
289 if (ctxt
== HIGHPOWER
)
290 return reg_write(CONTEXT_CONTROL
, valB
);
292 return reg_write(CONTEXT_CONTROL
, valA
);
295 static int mt9m111_setup_rect(struct mt9m111
*mt9m111
,
296 struct v4l2_rect
*rect
)
298 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9m111
->subdev
);
299 int ret
, is_raw_format
;
300 int width
= rect
->width
;
301 int height
= rect
->height
;
303 if (mt9m111
->fmt
->code
== V4L2_MBUS_FMT_SBGGR8_1X8
||
304 mt9m111
->fmt
->code
== V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE
)
309 ret
= reg_write(COLUMN_START
, rect
->left
);
311 ret
= reg_write(ROW_START
, rect
->top
);
315 ret
= reg_write(WINDOW_WIDTH
, width
);
317 ret
= reg_write(WINDOW_HEIGHT
, height
);
320 ret
= reg_write(REDUCER_XZOOM_B
, MT9M111_MAX_WIDTH
);
322 ret
= reg_write(REDUCER_YZOOM_B
, MT9M111_MAX_HEIGHT
);
324 ret
= reg_write(REDUCER_XSIZE_B
, width
);
326 ret
= reg_write(REDUCER_YSIZE_B
, height
);
328 ret
= reg_write(REDUCER_XZOOM_A
, MT9M111_MAX_WIDTH
);
330 ret
= reg_write(REDUCER_YZOOM_A
, MT9M111_MAX_HEIGHT
);
332 ret
= reg_write(REDUCER_XSIZE_A
, width
);
334 ret
= reg_write(REDUCER_YSIZE_A
, height
);
340 static int mt9m111_enable(struct mt9m111
*mt9m111
)
342 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9m111
->subdev
);
345 ret
= reg_set(RESET
, MT9M111_RESET_CHIP_ENABLE
);
347 mt9m111
->powered
= 1;
351 static int mt9m111_reset(struct mt9m111
*mt9m111
)
353 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9m111
->subdev
);
356 ret
= reg_set(RESET
, MT9M111_RESET_RESET_MODE
);
358 ret
= reg_set(RESET
, MT9M111_RESET_RESET_SOC
);
360 ret
= reg_clear(RESET
, MT9M111_RESET_RESET_MODE
361 | MT9M111_RESET_RESET_SOC
);
366 static int mt9m111_make_rect(struct mt9m111
*mt9m111
,
367 struct v4l2_rect
*rect
)
369 if (mt9m111
->fmt
->code
== V4L2_MBUS_FMT_SBGGR8_1X8
||
370 mt9m111
->fmt
->code
== V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE
) {
371 /* Bayer format - even size lengths */
372 rect
->width
= ALIGN(rect
->width
, 2);
373 rect
->height
= ALIGN(rect
->height
, 2);
374 /* Let the user play with the starting pixel */
377 /* FIXME: the datasheet doesn't specify minimum sizes */
378 soc_camera_limit_side(&rect
->left
, &rect
->width
,
379 MT9M111_MIN_DARK_COLS
, 2, MT9M111_MAX_WIDTH
);
381 soc_camera_limit_side(&rect
->top
, &rect
->height
,
382 MT9M111_MIN_DARK_ROWS
, 2, MT9M111_MAX_HEIGHT
);
384 return mt9m111_setup_rect(mt9m111
, rect
);
387 static int mt9m111_s_crop(struct v4l2_subdev
*sd
, struct v4l2_crop
*a
)
389 struct v4l2_rect rect
= a
->c
;
390 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
391 struct mt9m111
*mt9m111
= container_of(sd
, struct mt9m111
, subdev
);
394 dev_dbg(&client
->dev
, "%s left=%d, top=%d, width=%d, height=%d\n",
395 __func__
, rect
.left
, rect
.top
, rect
.width
, rect
.height
);
397 if (a
->type
!= V4L2_BUF_TYPE_VIDEO_CAPTURE
)
400 ret
= mt9m111_make_rect(mt9m111
, &rect
);
402 mt9m111
->rect
= rect
;
406 static int mt9m111_g_crop(struct v4l2_subdev
*sd
, struct v4l2_crop
*a
)
408 struct mt9m111
*mt9m111
= container_of(sd
, struct mt9m111
, subdev
);
410 a
->c
= mt9m111
->rect
;
411 a
->type
= V4L2_BUF_TYPE_VIDEO_CAPTURE
;
416 static int mt9m111_cropcap(struct v4l2_subdev
*sd
, struct v4l2_cropcap
*a
)
418 if (a
->type
!= V4L2_BUF_TYPE_VIDEO_CAPTURE
)
421 a
->bounds
.left
= MT9M111_MIN_DARK_COLS
;
422 a
->bounds
.top
= MT9M111_MIN_DARK_ROWS
;
423 a
->bounds
.width
= MT9M111_MAX_WIDTH
;
424 a
->bounds
.height
= MT9M111_MAX_HEIGHT
;
425 a
->defrect
= a
->bounds
;
426 a
->pixelaspect
.numerator
= 1;
427 a
->pixelaspect
.denominator
= 1;
432 static int mt9m111_g_fmt(struct v4l2_subdev
*sd
,
433 struct v4l2_mbus_framefmt
*mf
)
435 struct mt9m111
*mt9m111
= container_of(sd
, struct mt9m111
, subdev
);
437 mf
->width
= mt9m111
->rect
.width
;
438 mf
->height
= mt9m111
->rect
.height
;
439 mf
->code
= mt9m111
->fmt
->code
;
440 mf
->colorspace
= mt9m111
->fmt
->colorspace
;
441 mf
->field
= V4L2_FIELD_NONE
;
446 static int mt9m111_set_pixfmt(struct mt9m111
*mt9m111
,
447 enum v4l2_mbus_pixelcode code
)
449 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9m111
->subdev
);
450 u16 data_outfmt2
, mask_outfmt2
= MT9M111_OUTFMT_PROCESSED_BAYER
|
451 MT9M111_OUTFMT_BYPASS_IFP
| MT9M111_OUTFMT_RGB
|
452 MT9M111_OUTFMT_RGB565
| MT9M111_OUTFMT_RGB555
|
453 MT9M111_OUTFMT_RGB444x
| MT9M111_OUTFMT_RGBx444
|
454 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN
|
455 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B
;
459 case V4L2_MBUS_FMT_SBGGR8_1X8
:
460 data_outfmt2
= MT9M111_OUTFMT_PROCESSED_BAYER
|
463 case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE
:
464 data_outfmt2
= MT9M111_OUTFMT_BYPASS_IFP
| MT9M111_OUTFMT_RGB
;
466 case V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE
:
467 data_outfmt2
= MT9M111_OUTFMT_RGB
| MT9M111_OUTFMT_RGB555
|
468 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN
;
470 case V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE
:
471 data_outfmt2
= MT9M111_OUTFMT_RGB
| MT9M111_OUTFMT_RGB555
;
473 case V4L2_MBUS_FMT_RGB565_2X8_LE
:
474 data_outfmt2
= MT9M111_OUTFMT_RGB
| MT9M111_OUTFMT_RGB565
|
475 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN
;
477 case V4L2_MBUS_FMT_RGB565_2X8_BE
:
478 data_outfmt2
= MT9M111_OUTFMT_RGB
| MT9M111_OUTFMT_RGB565
;
480 case V4L2_MBUS_FMT_BGR565_2X8_BE
:
481 data_outfmt2
= MT9M111_OUTFMT_RGB
| MT9M111_OUTFMT_RGB565
|
482 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B
;
484 case V4L2_MBUS_FMT_BGR565_2X8_LE
:
485 data_outfmt2
= MT9M111_OUTFMT_RGB
| MT9M111_OUTFMT_RGB565
|
486 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN
|
487 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B
;
489 case V4L2_MBUS_FMT_UYVY8_2X8
:
492 case V4L2_MBUS_FMT_VYUY8_2X8
:
493 data_outfmt2
= MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B
;
495 case V4L2_MBUS_FMT_YUYV8_2X8
:
496 data_outfmt2
= MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN
;
498 case V4L2_MBUS_FMT_YVYU8_2X8
:
499 data_outfmt2
= MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN
|
500 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B
;
503 dev_err(&client
->dev
, "Pixel format not handled: %x\n", code
);
507 ret
= reg_mask(OUTPUT_FORMAT_CTRL2_A
, data_outfmt2
,
510 ret
= reg_mask(OUTPUT_FORMAT_CTRL2_B
, data_outfmt2
,
516 static int mt9m111_s_fmt(struct v4l2_subdev
*sd
,
517 struct v4l2_mbus_framefmt
*mf
)
519 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
520 const struct mt9m111_datafmt
*fmt
;
521 struct mt9m111
*mt9m111
= container_of(sd
, struct mt9m111
, subdev
);
522 struct v4l2_rect rect
= {
523 .left
= mt9m111
->rect
.left
,
524 .top
= mt9m111
->rect
.top
,
526 .height
= mf
->height
,
530 fmt
= mt9m111_find_datafmt(mf
->code
, mt9m111_colour_fmts
,
531 ARRAY_SIZE(mt9m111_colour_fmts
));
535 dev_dbg(&client
->dev
,
536 "%s code=%x left=%d, top=%d, width=%d, height=%d\n", __func__
,
537 mf
->code
, rect
.left
, rect
.top
, rect
.width
, rect
.height
);
539 ret
= mt9m111_make_rect(mt9m111
, &rect
);
541 ret
= mt9m111_set_pixfmt(mt9m111
, mf
->code
);
543 mt9m111
->rect
= rect
;
545 mf
->colorspace
= fmt
->colorspace
;
551 static int mt9m111_try_fmt(struct v4l2_subdev
*sd
,
552 struct v4l2_mbus_framefmt
*mf
)
554 struct mt9m111
*mt9m111
= container_of(sd
, struct mt9m111
, subdev
);
555 const struct mt9m111_datafmt
*fmt
;
556 bool bayer
= mf
->code
== V4L2_MBUS_FMT_SBGGR8_1X8
||
557 mf
->code
== V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE
;
559 fmt
= mt9m111_find_datafmt(mf
->code
, mt9m111_colour_fmts
,
560 ARRAY_SIZE(mt9m111_colour_fmts
));
563 mf
->code
= fmt
->code
;
567 * With Bayer format enforce even side lengths, but let the user play
568 * with the starting pixel
571 if (mf
->height
> MT9M111_MAX_HEIGHT
)
572 mf
->height
= MT9M111_MAX_HEIGHT
;
573 else if (mf
->height
< 2)
576 mf
->height
= ALIGN(mf
->height
, 2);
578 if (mf
->width
> MT9M111_MAX_WIDTH
)
579 mf
->width
= MT9M111_MAX_WIDTH
;
580 else if (mf
->width
< 2)
583 mf
->width
= ALIGN(mf
->width
, 2);
585 mf
->colorspace
= fmt
->colorspace
;
590 static int mt9m111_g_chip_ident(struct v4l2_subdev
*sd
,
591 struct v4l2_dbg_chip_ident
*id
)
593 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
594 struct mt9m111
*mt9m111
= container_of(sd
, struct mt9m111
, subdev
);
596 if (id
->match
.type
!= V4L2_CHIP_MATCH_I2C_ADDR
)
599 if (id
->match
.addr
!= client
->addr
)
602 id
->ident
= mt9m111
->model
;
608 #ifdef CONFIG_VIDEO_ADV_DEBUG
609 static int mt9m111_g_register(struct v4l2_subdev
*sd
,
610 struct v4l2_dbg_register
*reg
)
612 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
615 if (reg
->match
.type
!= V4L2_CHIP_MATCH_I2C_ADDR
|| reg
->reg
> 0x2ff)
617 if (reg
->match
.addr
!= client
->addr
)
620 val
= mt9m111_reg_read(client
, reg
->reg
);
624 if (reg
->val
> 0xffff)
630 static int mt9m111_s_register(struct v4l2_subdev
*sd
,
631 struct v4l2_dbg_register
*reg
)
633 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
635 if (reg
->match
.type
!= V4L2_CHIP_MATCH_I2C_ADDR
|| reg
->reg
> 0x2ff)
638 if (reg
->match
.addr
!= client
->addr
)
641 if (mt9m111_reg_write(client
, reg
->reg
, reg
->val
) < 0)
648 static int mt9m111_set_flip(struct mt9m111
*mt9m111
, int flip
, int mask
)
650 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9m111
->subdev
);
653 if (mt9m111
->context
== HIGHPOWER
) {
655 ret
= reg_set(READ_MODE_B
, mask
);
657 ret
= reg_clear(READ_MODE_B
, mask
);
660 ret
= reg_set(READ_MODE_A
, mask
);
662 ret
= reg_clear(READ_MODE_A
, mask
);
668 static int mt9m111_get_global_gain(struct mt9m111
*mt9m111
)
670 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9m111
->subdev
);
673 data
= reg_read(GLOBAL_GAIN
);
675 return (data
& 0x2f) * (1 << ((data
>> 10) & 1)) *
676 (1 << ((data
>> 9) & 1));
680 static int mt9m111_set_global_gain(struct mt9m111
*mt9m111
, int gain
)
682 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9m111
->subdev
);
685 if (gain
> 63 * 2 * 2)
688 if ((gain
>= 64 * 2) && (gain
< 63 * 2 * 2))
689 val
= (1 << 10) | (1 << 9) | (gain
/ 4);
690 else if ((gain
>= 64) && (gain
< 64 * 2))
691 val
= (1 << 9) | (gain
/ 2);
695 return reg_write(GLOBAL_GAIN
, val
);
698 static int mt9m111_set_autoexposure(struct mt9m111
*mt9m111
, int on
)
700 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9m111
->subdev
);
703 return reg_set(OPER_MODE_CTRL
, MT9M111_OPMODE_AUTOEXPO_EN
);
704 return reg_clear(OPER_MODE_CTRL
, MT9M111_OPMODE_AUTOEXPO_EN
);
707 static int mt9m111_set_autowhitebalance(struct mt9m111
*mt9m111
, int on
)
709 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9m111
->subdev
);
712 return reg_set(OPER_MODE_CTRL
, MT9M111_OPMODE_AUTOWHITEBAL_EN
);
713 return reg_clear(OPER_MODE_CTRL
, MT9M111_OPMODE_AUTOWHITEBAL_EN
);
716 static int mt9m111_s_ctrl(struct v4l2_ctrl
*ctrl
)
718 struct mt9m111
*mt9m111
= container_of(ctrl
->handler
,
719 struct mt9m111
, hdl
);
723 return mt9m111_set_flip(mt9m111
, ctrl
->val
,
724 MT9M111_RMB_MIRROR_ROWS
);
726 return mt9m111_set_flip(mt9m111
, ctrl
->val
,
727 MT9M111_RMB_MIRROR_COLS
);
729 return mt9m111_set_global_gain(mt9m111
, ctrl
->val
);
730 case V4L2_CID_EXPOSURE_AUTO
:
731 return mt9m111_set_autoexposure(mt9m111
, ctrl
->val
);
732 case V4L2_CID_AUTO_WHITE_BALANCE
:
733 return mt9m111_set_autowhitebalance(mt9m111
, ctrl
->val
);
739 static int mt9m111_suspend(struct mt9m111
*mt9m111
)
741 v4l2_ctrl_s_ctrl(mt9m111
->gain
, mt9m111_get_global_gain(mt9m111
));
746 static void mt9m111_restore_state(struct mt9m111
*mt9m111
)
748 mt9m111_set_context(mt9m111
, mt9m111
->context
);
749 mt9m111_set_pixfmt(mt9m111
, mt9m111
->fmt
->code
);
750 mt9m111_setup_rect(mt9m111
, &mt9m111
->rect
);
751 v4l2_ctrl_handler_setup(&mt9m111
->hdl
);
754 static int mt9m111_resume(struct mt9m111
*mt9m111
)
758 if (mt9m111
->powered
) {
759 ret
= mt9m111_enable(mt9m111
);
761 ret
= mt9m111_reset(mt9m111
);
763 mt9m111_restore_state(mt9m111
);
768 static int mt9m111_init(struct mt9m111
*mt9m111
)
770 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9m111
->subdev
);
773 mt9m111
->context
= HIGHPOWER
;
774 ret
= mt9m111_enable(mt9m111
);
776 ret
= mt9m111_reset(mt9m111
);
778 ret
= mt9m111_set_context(mt9m111
, mt9m111
->context
);
780 dev_err(&client
->dev
, "mt9m111 init failed: %d\n", ret
);
785 * Interface active, can use i2c. If it fails, it can indeed mean, that
786 * this wasn't our capture interface, so, we wait for the right one
788 static int mt9m111_video_probe(struct i2c_client
*client
)
790 struct mt9m111
*mt9m111
= to_mt9m111(client
);
794 data
= reg_read(CHIP_VERSION
);
797 case 0x143a: /* MT9M111 or MT9M131 */
798 mt9m111
->model
= V4L2_IDENT_MT9M111
;
799 dev_info(&client
->dev
,
800 "Detected a MT9M111/MT9M131 chip ID %x\n", data
);
802 case 0x148c: /* MT9M112 */
803 mt9m111
->model
= V4L2_IDENT_MT9M112
;
804 dev_info(&client
->dev
, "Detected a MT9M112 chip ID %x\n", data
);
807 dev_err(&client
->dev
,
808 "No MT9M111/MT9M112/MT9M131 chip detected register read %x\n",
813 ret
= mt9m111_init(mt9m111
);
816 return v4l2_ctrl_handler_setup(&mt9m111
->hdl
);
819 static int mt9m111_s_power(struct v4l2_subdev
*sd
, int on
)
821 struct mt9m111
*mt9m111
= container_of(sd
, struct mt9m111
, subdev
);
822 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
825 mutex_lock(&mt9m111
->power_lock
);
828 * If the power count is modified from 0 to != 0 or from != 0 to 0,
829 * update the power state.
831 if (mt9m111
->power_count
== !on
) {
833 ret
= mt9m111_resume(mt9m111
);
835 dev_err(&client
->dev
,
836 "Failed to resume the sensor: %d\n", ret
);
840 mt9m111_suspend(mt9m111
);
844 /* Update the power count. */
845 mt9m111
->power_count
+= on
? 1 : -1;
846 WARN_ON(mt9m111
->power_count
< 0);
849 mutex_unlock(&mt9m111
->power_lock
);
853 static const struct v4l2_ctrl_ops mt9m111_ctrl_ops
= {
854 .s_ctrl
= mt9m111_s_ctrl
,
857 static struct v4l2_subdev_core_ops mt9m111_subdev_core_ops
= {
858 .g_chip_ident
= mt9m111_g_chip_ident
,
859 .s_power
= mt9m111_s_power
,
860 #ifdef CONFIG_VIDEO_ADV_DEBUG
861 .g_register
= mt9m111_g_register
,
862 .s_register
= mt9m111_s_register
,
866 static int mt9m111_enum_fmt(struct v4l2_subdev
*sd
, unsigned int index
,
867 enum v4l2_mbus_pixelcode
*code
)
869 if (index
>= ARRAY_SIZE(mt9m111_colour_fmts
))
872 *code
= mt9m111_colour_fmts
[index
].code
;
876 static int mt9m111_g_mbus_config(struct v4l2_subdev
*sd
,
877 struct v4l2_mbus_config
*cfg
)
879 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
880 struct soc_camera_link
*icl
= soc_camera_i2c_to_link(client
);
882 cfg
->flags
= V4L2_MBUS_MASTER
| V4L2_MBUS_PCLK_SAMPLE_RISING
|
883 V4L2_MBUS_HSYNC_ACTIVE_HIGH
| V4L2_MBUS_VSYNC_ACTIVE_HIGH
|
884 V4L2_MBUS_DATA_ACTIVE_HIGH
;
885 cfg
->type
= V4L2_MBUS_PARALLEL
;
886 cfg
->flags
= soc_camera_apply_board_flags(icl
, cfg
);
891 static struct v4l2_subdev_video_ops mt9m111_subdev_video_ops
= {
892 .s_mbus_fmt
= mt9m111_s_fmt
,
893 .g_mbus_fmt
= mt9m111_g_fmt
,
894 .try_mbus_fmt
= mt9m111_try_fmt
,
895 .s_crop
= mt9m111_s_crop
,
896 .g_crop
= mt9m111_g_crop
,
897 .cropcap
= mt9m111_cropcap
,
898 .enum_mbus_fmt
= mt9m111_enum_fmt
,
899 .g_mbus_config
= mt9m111_g_mbus_config
,
902 static struct v4l2_subdev_ops mt9m111_subdev_ops
= {
903 .core
= &mt9m111_subdev_core_ops
,
904 .video
= &mt9m111_subdev_video_ops
,
907 static int mt9m111_probe(struct i2c_client
*client
,
908 const struct i2c_device_id
*did
)
910 struct mt9m111
*mt9m111
;
911 struct i2c_adapter
*adapter
= to_i2c_adapter(client
->dev
.parent
);
912 struct soc_camera_link
*icl
= soc_camera_i2c_to_link(client
);
916 dev_err(&client
->dev
, "mt9m111: driver needs platform data\n");
920 if (!i2c_check_functionality(adapter
, I2C_FUNC_SMBUS_WORD_DATA
)) {
921 dev_warn(&adapter
->dev
,
922 "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n");
926 mt9m111
= kzalloc(sizeof(struct mt9m111
), GFP_KERNEL
);
930 v4l2_i2c_subdev_init(&mt9m111
->subdev
, client
, &mt9m111_subdev_ops
);
931 v4l2_ctrl_handler_init(&mt9m111
->hdl
, 5);
932 v4l2_ctrl_new_std(&mt9m111
->hdl
, &mt9m111_ctrl_ops
,
933 V4L2_CID_VFLIP
, 0, 1, 1, 0);
934 v4l2_ctrl_new_std(&mt9m111
->hdl
, &mt9m111_ctrl_ops
,
935 V4L2_CID_HFLIP
, 0, 1, 1, 0);
936 v4l2_ctrl_new_std(&mt9m111
->hdl
, &mt9m111_ctrl_ops
,
937 V4L2_CID_AUTO_WHITE_BALANCE
, 0, 1, 1, 1);
938 mt9m111
->gain
= v4l2_ctrl_new_std(&mt9m111
->hdl
, &mt9m111_ctrl_ops
,
939 V4L2_CID_GAIN
, 0, 63 * 2 * 2, 1, 32);
940 v4l2_ctrl_new_std_menu(&mt9m111
->hdl
,
941 &mt9m111_ctrl_ops
, V4L2_CID_EXPOSURE_AUTO
, 1, 0,
943 mt9m111
->subdev
.ctrl_handler
= &mt9m111
->hdl
;
944 if (mt9m111
->hdl
.error
) {
945 int err
= mt9m111
->hdl
.error
;
951 /* Second stage probe - when a capture adapter is there */
952 mt9m111
->rect
.left
= MT9M111_MIN_DARK_COLS
;
953 mt9m111
->rect
.top
= MT9M111_MIN_DARK_ROWS
;
954 mt9m111
->rect
.width
= MT9M111_MAX_WIDTH
;
955 mt9m111
->rect
.height
= MT9M111_MAX_HEIGHT
;
956 mt9m111
->fmt
= &mt9m111_colour_fmts
[0];
957 mt9m111
->lastpage
= -1;
958 mutex_init(&mt9m111
->power_lock
);
960 ret
= mt9m111_video_probe(client
);
962 v4l2_ctrl_handler_free(&mt9m111
->hdl
);
969 static int mt9m111_remove(struct i2c_client
*client
)
971 struct mt9m111
*mt9m111
= to_mt9m111(client
);
973 v4l2_device_unregister_subdev(&mt9m111
->subdev
);
974 v4l2_ctrl_handler_free(&mt9m111
->hdl
);
980 static const struct i2c_device_id mt9m111_id
[] = {
984 MODULE_DEVICE_TABLE(i2c
, mt9m111_id
);
986 static struct i2c_driver mt9m111_i2c_driver
= {
990 .probe
= mt9m111_probe
,
991 .remove
= mt9m111_remove
,
992 .id_table
= mt9m111_id
,
995 static int __init
mt9m111_mod_init(void)
997 return i2c_add_driver(&mt9m111_i2c_driver
);
1000 static void __exit
mt9m111_mod_exit(void)
1002 i2c_del_driver(&mt9m111_i2c_driver
);
1005 module_init(mt9m111_mod_init
);
1006 module_exit(mt9m111_mod_exit
);
1008 MODULE_DESCRIPTION("Micron/Aptina MT9M111/MT9M112/MT9M131 Camera driver");
1009 MODULE_AUTHOR("Robert Jarzmik");
1010 MODULE_LICENSE("GPL");