2 * Driver for MT9M111/MT9M112/MT9M131 CMOS Image Sensor from Micron/Aptina
4 * Copyright (C) 2008, Robert Jarzmik <robert.jarzmik@free.fr>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 #include <linux/videodev2.h>
11 #include <linux/slab.h>
12 #include <linux/i2c.h>
13 #include <linux/log2.h>
14 #include <linux/gpio.h>
15 #include <linux/delay.h>
16 #include <linux/v4l2-mediabus.h>
17 #include <linux/module.h>
19 #include <media/soc_camera.h>
20 #include <media/v4l2-common.h>
21 #include <media/v4l2-ctrls.h>
22 #include <media/v4l2-chip-ident.h>
25 * MT9M111, MT9M112 and MT9M131:
26 * i2c address is 0x48 or 0x5d (depending on SADDR pin)
27 * The platform has to define i2c_board_info and call i2c_register_board_info()
31 * Sensor core register addresses (0x000..0x0ff)
33 #define MT9M111_CHIP_VERSION 0x000
34 #define MT9M111_ROW_START 0x001
35 #define MT9M111_COLUMN_START 0x002
36 #define MT9M111_WINDOW_HEIGHT 0x003
37 #define MT9M111_WINDOW_WIDTH 0x004
38 #define MT9M111_HORIZONTAL_BLANKING_B 0x005
39 #define MT9M111_VERTICAL_BLANKING_B 0x006
40 #define MT9M111_HORIZONTAL_BLANKING_A 0x007
41 #define MT9M111_VERTICAL_BLANKING_A 0x008
42 #define MT9M111_SHUTTER_WIDTH 0x009
43 #define MT9M111_ROW_SPEED 0x00a
44 #define MT9M111_EXTRA_DELAY 0x00b
45 #define MT9M111_SHUTTER_DELAY 0x00c
46 #define MT9M111_RESET 0x00d
47 #define MT9M111_READ_MODE_B 0x020
48 #define MT9M111_READ_MODE_A 0x021
49 #define MT9M111_FLASH_CONTROL 0x023
50 #define MT9M111_GREEN1_GAIN 0x02b
51 #define MT9M111_BLUE_GAIN 0x02c
52 #define MT9M111_RED_GAIN 0x02d
53 #define MT9M111_GREEN2_GAIN 0x02e
54 #define MT9M111_GLOBAL_GAIN 0x02f
55 #define MT9M111_CONTEXT_CONTROL 0x0c8
56 #define MT9M111_PAGE_MAP 0x0f0
57 #define MT9M111_BYTE_WISE_ADDR 0x0f1
59 #define MT9M111_RESET_SYNC_CHANGES (1 << 15)
60 #define MT9M111_RESET_RESTART_BAD_FRAME (1 << 9)
61 #define MT9M111_RESET_SHOW_BAD_FRAMES (1 << 8)
62 #define MT9M111_RESET_RESET_SOC (1 << 5)
63 #define MT9M111_RESET_OUTPUT_DISABLE (1 << 4)
64 #define MT9M111_RESET_CHIP_ENABLE (1 << 3)
65 #define MT9M111_RESET_ANALOG_STANDBY (1 << 2)
66 #define MT9M111_RESET_RESTART_FRAME (1 << 1)
67 #define MT9M111_RESET_RESET_MODE (1 << 0)
69 #define MT9M111_RM_FULL_POWER_RD (0 << 10)
70 #define MT9M111_RM_LOW_POWER_RD (1 << 10)
71 #define MT9M111_RM_COL_SKIP_4X (1 << 5)
72 #define MT9M111_RM_ROW_SKIP_4X (1 << 4)
73 #define MT9M111_RM_COL_SKIP_2X (1 << 3)
74 #define MT9M111_RM_ROW_SKIP_2X (1 << 2)
75 #define MT9M111_RMB_MIRROR_COLS (1 << 1)
76 #define MT9M111_RMB_MIRROR_ROWS (1 << 0)
77 #define MT9M111_CTXT_CTRL_RESTART (1 << 15)
78 #define MT9M111_CTXT_CTRL_DEFECTCOR_B (1 << 12)
79 #define MT9M111_CTXT_CTRL_RESIZE_B (1 << 10)
80 #define MT9M111_CTXT_CTRL_CTRL2_B (1 << 9)
81 #define MT9M111_CTXT_CTRL_GAMMA_B (1 << 8)
82 #define MT9M111_CTXT_CTRL_XENON_EN (1 << 7)
83 #define MT9M111_CTXT_CTRL_READ_MODE_B (1 << 3)
84 #define MT9M111_CTXT_CTRL_LED_FLASH_EN (1 << 2)
85 #define MT9M111_CTXT_CTRL_VBLANK_SEL_B (1 << 1)
86 #define MT9M111_CTXT_CTRL_HBLANK_SEL_B (1 << 0)
89 * Colorpipe register addresses (0x100..0x1ff)
91 #define MT9M111_OPER_MODE_CTRL 0x106
92 #define MT9M111_OUTPUT_FORMAT_CTRL 0x108
93 #define MT9M111_REDUCER_XZOOM_B 0x1a0
94 #define MT9M111_REDUCER_XSIZE_B 0x1a1
95 #define MT9M111_REDUCER_YZOOM_B 0x1a3
96 #define MT9M111_REDUCER_YSIZE_B 0x1a4
97 #define MT9M111_REDUCER_XZOOM_A 0x1a6
98 #define MT9M111_REDUCER_XSIZE_A 0x1a7
99 #define MT9M111_REDUCER_YZOOM_A 0x1a9
100 #define MT9M111_REDUCER_YSIZE_A 0x1aa
102 #define MT9M111_OUTPUT_FORMAT_CTRL2_A 0x13a
103 #define MT9M111_OUTPUT_FORMAT_CTRL2_B 0x19b
105 #define MT9M111_OPMODE_AUTOEXPO_EN (1 << 14)
106 #define MT9M111_OPMODE_AUTOWHITEBAL_EN (1 << 1)
107 #define MT9M111_OUTFMT_FLIP_BAYER_COL (1 << 9)
108 #define MT9M111_OUTFMT_FLIP_BAYER_ROW (1 << 8)
109 #define MT9M111_OUTFMT_PROCESSED_BAYER (1 << 14)
110 #define MT9M111_OUTFMT_BYPASS_IFP (1 << 10)
111 #define MT9M111_OUTFMT_INV_PIX_CLOCK (1 << 9)
112 #define MT9M111_OUTFMT_RGB (1 << 8)
113 #define MT9M111_OUTFMT_RGB565 (0 << 6)
114 #define MT9M111_OUTFMT_RGB555 (1 << 6)
115 #define MT9M111_OUTFMT_RGB444x (2 << 6)
116 #define MT9M111_OUTFMT_RGBx444 (3 << 6)
117 #define MT9M111_OUTFMT_TST_RAMP_OFF (0 << 4)
118 #define MT9M111_OUTFMT_TST_RAMP_COL (1 << 4)
119 #define MT9M111_OUTFMT_TST_RAMP_ROW (2 << 4)
120 #define MT9M111_OUTFMT_TST_RAMP_FRAME (3 << 4)
121 #define MT9M111_OUTFMT_SHIFT_3_UP (1 << 3)
122 #define MT9M111_OUTFMT_AVG_CHROMA (1 << 2)
123 #define MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN (1 << 1)
124 #define MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B (1 << 0)
127 * Camera control register addresses (0x200..0x2ff not implemented)
130 #define reg_read(reg) mt9m111_reg_read(client, MT9M111_##reg)
131 #define reg_write(reg, val) mt9m111_reg_write(client, MT9M111_##reg, (val))
132 #define reg_set(reg, val) mt9m111_reg_set(client, MT9M111_##reg, (val))
133 #define reg_clear(reg, val) mt9m111_reg_clear(client, MT9M111_##reg, (val))
134 #define reg_mask(reg, val, mask) mt9m111_reg_mask(client, MT9M111_##reg, \
137 #define MT9M111_MIN_DARK_ROWS 8
138 #define MT9M111_MIN_DARK_COLS 26
139 #define MT9M111_MAX_HEIGHT 1024
140 #define MT9M111_MAX_WIDTH 1280
142 struct mt9m111_context
{
150 u16 output_fmt_ctrl2
;
154 static struct mt9m111_context context_a
= {
155 .read_mode
= MT9M111_READ_MODE_A
,
156 .blanking_h
= MT9M111_HORIZONTAL_BLANKING_A
,
157 .blanking_v
= MT9M111_VERTICAL_BLANKING_A
,
158 .reducer_xzoom
= MT9M111_REDUCER_XZOOM_A
,
159 .reducer_yzoom
= MT9M111_REDUCER_YZOOM_A
,
160 .reducer_xsize
= MT9M111_REDUCER_XSIZE_A
,
161 .reducer_ysize
= MT9M111_REDUCER_YSIZE_A
,
162 .output_fmt_ctrl2
= MT9M111_OUTPUT_FORMAT_CTRL2_A
,
163 .control
= MT9M111_CTXT_CTRL_RESTART
,
166 static struct mt9m111_context context_b
= {
167 .read_mode
= MT9M111_READ_MODE_B
,
168 .blanking_h
= MT9M111_HORIZONTAL_BLANKING_B
,
169 .blanking_v
= MT9M111_VERTICAL_BLANKING_B
,
170 .reducer_xzoom
= MT9M111_REDUCER_XZOOM_B
,
171 .reducer_yzoom
= MT9M111_REDUCER_YZOOM_B
,
172 .reducer_xsize
= MT9M111_REDUCER_XSIZE_B
,
173 .reducer_ysize
= MT9M111_REDUCER_YSIZE_B
,
174 .output_fmt_ctrl2
= MT9M111_OUTPUT_FORMAT_CTRL2_B
,
175 .control
= MT9M111_CTXT_CTRL_RESTART
|
176 MT9M111_CTXT_CTRL_DEFECTCOR_B
| MT9M111_CTXT_CTRL_RESIZE_B
|
177 MT9M111_CTXT_CTRL_CTRL2_B
| MT9M111_CTXT_CTRL_GAMMA_B
|
178 MT9M111_CTXT_CTRL_READ_MODE_B
| MT9M111_CTXT_CTRL_VBLANK_SEL_B
|
179 MT9M111_CTXT_CTRL_HBLANK_SEL_B
,
182 /* MT9M111 has only one fixed colorspace per pixelcode */
183 struct mt9m111_datafmt
{
184 enum v4l2_mbus_pixelcode code
;
185 enum v4l2_colorspace colorspace
;
188 static const struct mt9m111_datafmt mt9m111_colour_fmts
[] = {
189 {V4L2_MBUS_FMT_YUYV8_2X8
, V4L2_COLORSPACE_JPEG
},
190 {V4L2_MBUS_FMT_YVYU8_2X8
, V4L2_COLORSPACE_JPEG
},
191 {V4L2_MBUS_FMT_UYVY8_2X8
, V4L2_COLORSPACE_JPEG
},
192 {V4L2_MBUS_FMT_VYUY8_2X8
, V4L2_COLORSPACE_JPEG
},
193 {V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE
, V4L2_COLORSPACE_SRGB
},
194 {V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE
, V4L2_COLORSPACE_SRGB
},
195 {V4L2_MBUS_FMT_RGB565_2X8_LE
, V4L2_COLORSPACE_SRGB
},
196 {V4L2_MBUS_FMT_RGB565_2X8_BE
, V4L2_COLORSPACE_SRGB
},
197 {V4L2_MBUS_FMT_BGR565_2X8_LE
, V4L2_COLORSPACE_SRGB
},
198 {V4L2_MBUS_FMT_BGR565_2X8_BE
, V4L2_COLORSPACE_SRGB
},
199 {V4L2_MBUS_FMT_SBGGR8_1X8
, V4L2_COLORSPACE_SRGB
},
200 {V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE
, V4L2_COLORSPACE_SRGB
},
204 struct v4l2_subdev subdev
;
205 struct v4l2_ctrl_handler hdl
;
206 struct v4l2_ctrl
*gain
;
207 int model
; /* V4L2_IDENT_MT9M111 or V4L2_IDENT_MT9M112 code
208 * from v4l2-chip-ident.h */
209 struct mt9m111_context
*ctx
;
210 struct v4l2_rect rect
; /* cropping rectangle */
211 int width
; /* output */
212 int height
; /* sizes */
213 struct mutex power_lock
; /* lock to protect power_count */
215 const struct mt9m111_datafmt
*fmt
;
216 int lastpage
; /* PageMap cache value */
219 /* Find a data format by a pixel code */
220 static const struct mt9m111_datafmt
*mt9m111_find_datafmt(struct mt9m111
*mt9m111
,
221 enum v4l2_mbus_pixelcode code
)
224 for (i
= 0; i
< ARRAY_SIZE(mt9m111_colour_fmts
); i
++)
225 if (mt9m111_colour_fmts
[i
].code
== code
)
226 return mt9m111_colour_fmts
+ i
;
231 static struct mt9m111
*to_mt9m111(const struct i2c_client
*client
)
233 return container_of(i2c_get_clientdata(client
), struct mt9m111
, subdev
);
236 static int reg_page_map_set(struct i2c_client
*client
, const u16 reg
)
240 struct mt9m111
*mt9m111
= to_mt9m111(client
);
243 if (page
== mt9m111
->lastpage
)
248 ret
= i2c_smbus_write_word_swapped(client
, MT9M111_PAGE_MAP
, page
);
250 mt9m111
->lastpage
= page
;
254 static int mt9m111_reg_read(struct i2c_client
*client
, const u16 reg
)
258 ret
= reg_page_map_set(client
, reg
);
260 ret
= i2c_smbus_read_word_swapped(client
, reg
& 0xff);
262 dev_dbg(&client
->dev
, "read reg.%03x -> %04x\n", reg
, ret
);
266 static int mt9m111_reg_write(struct i2c_client
*client
, const u16 reg
,
271 ret
= reg_page_map_set(client
, reg
);
273 ret
= i2c_smbus_write_word_swapped(client
, reg
& 0xff, data
);
274 dev_dbg(&client
->dev
, "write reg.%03x = %04x -> %d\n", reg
, data
, ret
);
278 static int mt9m111_reg_set(struct i2c_client
*client
, const u16 reg
,
283 ret
= mt9m111_reg_read(client
, reg
);
285 ret
= mt9m111_reg_write(client
, reg
, ret
| data
);
289 static int mt9m111_reg_clear(struct i2c_client
*client
, const u16 reg
,
294 ret
= mt9m111_reg_read(client
, reg
);
296 ret
= mt9m111_reg_write(client
, reg
, ret
& ~data
);
300 static int mt9m111_reg_mask(struct i2c_client
*client
, const u16 reg
,
301 const u16 data
, const u16 mask
)
305 ret
= mt9m111_reg_read(client
, reg
);
307 ret
= mt9m111_reg_write(client
, reg
, (ret
& ~mask
) | data
);
311 static int mt9m111_set_context(struct mt9m111
*mt9m111
,
312 struct mt9m111_context
*ctx
)
314 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9m111
->subdev
);
315 return reg_write(CONTEXT_CONTROL
, ctx
->control
);
318 static int mt9m111_setup_rect_ctx(struct mt9m111
*mt9m111
,
319 struct mt9m111_context
*ctx
, struct v4l2_rect
*rect
,
320 unsigned int width
, unsigned int height
)
322 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9m111
->subdev
);
323 int ret
= mt9m111_reg_write(client
, ctx
->reducer_xzoom
, rect
->width
);
325 ret
= mt9m111_reg_write(client
, ctx
->reducer_yzoom
, rect
->height
);
327 ret
= mt9m111_reg_write(client
, ctx
->reducer_xsize
, width
);
329 ret
= mt9m111_reg_write(client
, ctx
->reducer_ysize
, height
);
333 static int mt9m111_setup_geometry(struct mt9m111
*mt9m111
, struct v4l2_rect
*rect
,
334 int width
, int height
, enum v4l2_mbus_pixelcode code
)
336 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9m111
->subdev
);
339 ret
= reg_write(COLUMN_START
, rect
->left
);
341 ret
= reg_write(ROW_START
, rect
->top
);
344 ret
= reg_write(WINDOW_WIDTH
, rect
->width
);
346 ret
= reg_write(WINDOW_HEIGHT
, rect
->height
);
348 if (code
!= V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE
) {
349 /* IFP in use, down-scaling possible */
351 ret
= mt9m111_setup_rect_ctx(mt9m111
, &context_b
,
352 rect
, width
, height
);
354 ret
= mt9m111_setup_rect_ctx(mt9m111
, &context_a
,
355 rect
, width
, height
);
358 dev_dbg(&client
->dev
, "%s(%x): %ux%u@%u:%u -> %ux%u = %d\n",
359 __func__
, code
, rect
->width
, rect
->height
, rect
->left
, rect
->top
,
365 static int mt9m111_enable(struct mt9m111
*mt9m111
)
367 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9m111
->subdev
);
368 return reg_write(RESET
, MT9M111_RESET_CHIP_ENABLE
);
371 static int mt9m111_reset(struct mt9m111
*mt9m111
)
373 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9m111
->subdev
);
376 ret
= reg_set(RESET
, MT9M111_RESET_RESET_MODE
);
378 ret
= reg_set(RESET
, MT9M111_RESET_RESET_SOC
);
380 ret
= reg_clear(RESET
, MT9M111_RESET_RESET_MODE
381 | MT9M111_RESET_RESET_SOC
);
386 static int mt9m111_s_crop(struct v4l2_subdev
*sd
, struct v4l2_crop
*a
)
388 struct v4l2_rect rect
= a
->c
;
389 struct mt9m111
*mt9m111
= container_of(sd
, struct mt9m111
, subdev
);
393 if (a
->type
!= V4L2_BUF_TYPE_VIDEO_CAPTURE
)
396 if (mt9m111
->fmt
->code
== V4L2_MBUS_FMT_SBGGR8_1X8
||
397 mt9m111
->fmt
->code
== V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE
) {
398 /* Bayer format - even size lengths */
399 rect
.width
= ALIGN(rect
.width
, 2);
400 rect
.height
= ALIGN(rect
.height
, 2);
401 /* Let the user play with the starting pixel */
404 /* FIXME: the datasheet doesn't specify minimum sizes */
405 soc_camera_limit_side(&rect
.left
, &rect
.width
,
406 MT9M111_MIN_DARK_COLS
, 2, MT9M111_MAX_WIDTH
);
408 soc_camera_limit_side(&rect
.top
, &rect
.height
,
409 MT9M111_MIN_DARK_ROWS
, 2, MT9M111_MAX_HEIGHT
);
411 width
= min(mt9m111
->width
, rect
.width
);
412 height
= min(mt9m111
->height
, rect
.height
);
414 ret
= mt9m111_setup_geometry(mt9m111
, &rect
, width
, height
, mt9m111
->fmt
->code
);
416 mt9m111
->rect
= rect
;
417 mt9m111
->width
= width
;
418 mt9m111
->height
= height
;
424 static int mt9m111_g_crop(struct v4l2_subdev
*sd
, struct v4l2_crop
*a
)
426 struct mt9m111
*mt9m111
= container_of(sd
, struct mt9m111
, subdev
);
428 a
->c
= mt9m111
->rect
;
429 a
->type
= V4L2_BUF_TYPE_VIDEO_CAPTURE
;
434 static int mt9m111_cropcap(struct v4l2_subdev
*sd
, struct v4l2_cropcap
*a
)
436 if (a
->type
!= V4L2_BUF_TYPE_VIDEO_CAPTURE
)
439 a
->bounds
.left
= MT9M111_MIN_DARK_COLS
;
440 a
->bounds
.top
= MT9M111_MIN_DARK_ROWS
;
441 a
->bounds
.width
= MT9M111_MAX_WIDTH
;
442 a
->bounds
.height
= MT9M111_MAX_HEIGHT
;
443 a
->defrect
= a
->bounds
;
444 a
->pixelaspect
.numerator
= 1;
445 a
->pixelaspect
.denominator
= 1;
450 static int mt9m111_g_fmt(struct v4l2_subdev
*sd
,
451 struct v4l2_mbus_framefmt
*mf
)
453 struct mt9m111
*mt9m111
= container_of(sd
, struct mt9m111
, subdev
);
455 mf
->width
= mt9m111
->width
;
456 mf
->height
= mt9m111
->height
;
457 mf
->code
= mt9m111
->fmt
->code
;
458 mf
->colorspace
= mt9m111
->fmt
->colorspace
;
459 mf
->field
= V4L2_FIELD_NONE
;
464 static int mt9m111_set_pixfmt(struct mt9m111
*mt9m111
,
465 enum v4l2_mbus_pixelcode code
)
467 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9m111
->subdev
);
468 u16 data_outfmt2
, mask_outfmt2
= MT9M111_OUTFMT_PROCESSED_BAYER
|
469 MT9M111_OUTFMT_BYPASS_IFP
| MT9M111_OUTFMT_RGB
|
470 MT9M111_OUTFMT_RGB565
| MT9M111_OUTFMT_RGB555
|
471 MT9M111_OUTFMT_RGB444x
| MT9M111_OUTFMT_RGBx444
|
472 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN
|
473 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B
;
477 case V4L2_MBUS_FMT_SBGGR8_1X8
:
478 data_outfmt2
= MT9M111_OUTFMT_PROCESSED_BAYER
|
481 case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE
:
482 data_outfmt2
= MT9M111_OUTFMT_BYPASS_IFP
| MT9M111_OUTFMT_RGB
;
484 case V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE
:
485 data_outfmt2
= MT9M111_OUTFMT_RGB
| MT9M111_OUTFMT_RGB555
|
486 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN
;
488 case V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE
:
489 data_outfmt2
= MT9M111_OUTFMT_RGB
| MT9M111_OUTFMT_RGB555
;
491 case V4L2_MBUS_FMT_RGB565_2X8_LE
:
492 data_outfmt2
= MT9M111_OUTFMT_RGB
| MT9M111_OUTFMT_RGB565
|
493 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN
;
495 case V4L2_MBUS_FMT_RGB565_2X8_BE
:
496 data_outfmt2
= MT9M111_OUTFMT_RGB
| MT9M111_OUTFMT_RGB565
;
498 case V4L2_MBUS_FMT_BGR565_2X8_BE
:
499 data_outfmt2
= MT9M111_OUTFMT_RGB
| MT9M111_OUTFMT_RGB565
|
500 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B
;
502 case V4L2_MBUS_FMT_BGR565_2X8_LE
:
503 data_outfmt2
= MT9M111_OUTFMT_RGB
| MT9M111_OUTFMT_RGB565
|
504 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN
|
505 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B
;
507 case V4L2_MBUS_FMT_UYVY8_2X8
:
510 case V4L2_MBUS_FMT_VYUY8_2X8
:
511 data_outfmt2
= MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B
;
513 case V4L2_MBUS_FMT_YUYV8_2X8
:
514 data_outfmt2
= MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN
;
516 case V4L2_MBUS_FMT_YVYU8_2X8
:
517 data_outfmt2
= MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN
|
518 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B
;
521 dev_err(&client
->dev
, "Pixel format not handled: %x\n", code
);
525 ret
= mt9m111_reg_mask(client
, context_a
.output_fmt_ctrl2
,
526 data_outfmt2
, mask_outfmt2
);
528 ret
= mt9m111_reg_mask(client
, context_b
.output_fmt_ctrl2
,
529 data_outfmt2
, mask_outfmt2
);
534 static int mt9m111_try_fmt(struct v4l2_subdev
*sd
,
535 struct v4l2_mbus_framefmt
*mf
)
537 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
538 struct mt9m111
*mt9m111
= container_of(sd
, struct mt9m111
, subdev
);
539 const struct mt9m111_datafmt
*fmt
;
540 struct v4l2_rect
*rect
= &mt9m111
->rect
;
543 fmt
= mt9m111_find_datafmt(mt9m111
, mf
->code
);
545 bayer
= fmt
->code
== V4L2_MBUS_FMT_SBGGR8_1X8
||
546 fmt
->code
== V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE
;
549 * With Bayer format enforce even side lengths, but let the user play
550 * with the starting pixel
553 rect
->width
= ALIGN(rect
->width
, 2);
554 rect
->height
= ALIGN(rect
->height
, 2);
557 if (fmt
->code
== V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE
) {
558 /* IFP bypass mode, no scaling */
559 mf
->width
= rect
->width
;
560 mf
->height
= rect
->height
;
563 if (mf
->width
> rect
->width
)
564 mf
->width
= rect
->width
;
565 if (mf
->height
> rect
->height
)
566 mf
->height
= rect
->height
;
569 dev_dbg(&client
->dev
, "%s(): %ux%u, code=%x\n", __func__
,
570 mf
->width
, mf
->height
, fmt
->code
);
572 mf
->code
= fmt
->code
;
573 mf
->colorspace
= fmt
->colorspace
;
578 static int mt9m111_s_fmt(struct v4l2_subdev
*sd
,
579 struct v4l2_mbus_framefmt
*mf
)
581 const struct mt9m111_datafmt
*fmt
;
582 struct mt9m111
*mt9m111
= container_of(sd
, struct mt9m111
, subdev
);
583 struct v4l2_rect
*rect
= &mt9m111
->rect
;
586 mt9m111_try_fmt(sd
, mf
);
587 fmt
= mt9m111_find_datafmt(mt9m111
, mf
->code
);
588 /* try_fmt() guarantees fmt != NULL && fmt->code == mf->code */
590 ret
= mt9m111_setup_geometry(mt9m111
, rect
, mf
->width
, mf
->height
, mf
->code
);
592 ret
= mt9m111_set_pixfmt(mt9m111
, mf
->code
);
594 mt9m111
->width
= mf
->width
;
595 mt9m111
->height
= mf
->height
;
602 static int mt9m111_g_chip_ident(struct v4l2_subdev
*sd
,
603 struct v4l2_dbg_chip_ident
*id
)
605 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
606 struct mt9m111
*mt9m111
= container_of(sd
, struct mt9m111
, subdev
);
608 if (id
->match
.type
!= V4L2_CHIP_MATCH_I2C_ADDR
)
611 if (id
->match
.addr
!= client
->addr
)
614 id
->ident
= mt9m111
->model
;
620 #ifdef CONFIG_VIDEO_ADV_DEBUG
621 static int mt9m111_g_register(struct v4l2_subdev
*sd
,
622 struct v4l2_dbg_register
*reg
)
624 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
627 if (reg
->match
.type
!= V4L2_CHIP_MATCH_I2C_ADDR
|| reg
->reg
> 0x2ff)
629 if (reg
->match
.addr
!= client
->addr
)
632 val
= mt9m111_reg_read(client
, reg
->reg
);
636 if (reg
->val
> 0xffff)
642 static int mt9m111_s_register(struct v4l2_subdev
*sd
,
643 struct v4l2_dbg_register
*reg
)
645 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
647 if (reg
->match
.type
!= V4L2_CHIP_MATCH_I2C_ADDR
|| reg
->reg
> 0x2ff)
650 if (reg
->match
.addr
!= client
->addr
)
653 if (mt9m111_reg_write(client
, reg
->reg
, reg
->val
) < 0)
660 static int mt9m111_set_flip(struct mt9m111
*mt9m111
, int flip
, int mask
)
662 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9m111
->subdev
);
666 ret
= mt9m111_reg_set(client
, mt9m111
->ctx
->read_mode
, mask
);
668 ret
= mt9m111_reg_clear(client
, mt9m111
->ctx
->read_mode
, mask
);
673 static int mt9m111_get_global_gain(struct mt9m111
*mt9m111
)
675 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9m111
->subdev
);
678 data
= reg_read(GLOBAL_GAIN
);
680 return (data
& 0x2f) * (1 << ((data
>> 10) & 1)) *
681 (1 << ((data
>> 9) & 1));
685 static int mt9m111_set_global_gain(struct mt9m111
*mt9m111
, int gain
)
687 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9m111
->subdev
);
690 if (gain
> 63 * 2 * 2)
693 if ((gain
>= 64 * 2) && (gain
< 63 * 2 * 2))
694 val
= (1 << 10) | (1 << 9) | (gain
/ 4);
695 else if ((gain
>= 64) && (gain
< 64 * 2))
696 val
= (1 << 9) | (gain
/ 2);
700 return reg_write(GLOBAL_GAIN
, val
);
703 static int mt9m111_set_autoexposure(struct mt9m111
*mt9m111
, int on
)
705 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9m111
->subdev
);
708 return reg_set(OPER_MODE_CTRL
, MT9M111_OPMODE_AUTOEXPO_EN
);
709 return reg_clear(OPER_MODE_CTRL
, MT9M111_OPMODE_AUTOEXPO_EN
);
712 static int mt9m111_set_autowhitebalance(struct mt9m111
*mt9m111
, int on
)
714 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9m111
->subdev
);
717 return reg_set(OPER_MODE_CTRL
, MT9M111_OPMODE_AUTOWHITEBAL_EN
);
718 return reg_clear(OPER_MODE_CTRL
, MT9M111_OPMODE_AUTOWHITEBAL_EN
);
721 static int mt9m111_s_ctrl(struct v4l2_ctrl
*ctrl
)
723 struct mt9m111
*mt9m111
= container_of(ctrl
->handler
,
724 struct mt9m111
, hdl
);
728 return mt9m111_set_flip(mt9m111
, ctrl
->val
,
729 MT9M111_RMB_MIRROR_ROWS
);
731 return mt9m111_set_flip(mt9m111
, ctrl
->val
,
732 MT9M111_RMB_MIRROR_COLS
);
734 return mt9m111_set_global_gain(mt9m111
, ctrl
->val
);
735 case V4L2_CID_EXPOSURE_AUTO
:
736 return mt9m111_set_autoexposure(mt9m111
, ctrl
->val
);
737 case V4L2_CID_AUTO_WHITE_BALANCE
:
738 return mt9m111_set_autowhitebalance(mt9m111
, ctrl
->val
);
744 static int mt9m111_suspend(struct mt9m111
*mt9m111
)
746 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9m111
->subdev
);
749 v4l2_ctrl_s_ctrl(mt9m111
->gain
, mt9m111_get_global_gain(mt9m111
));
751 ret
= reg_set(RESET
, MT9M111_RESET_RESET_MODE
);
753 ret
= reg_set(RESET
, MT9M111_RESET_RESET_SOC
|
754 MT9M111_RESET_OUTPUT_DISABLE
|
755 MT9M111_RESET_ANALOG_STANDBY
);
757 ret
= reg_clear(RESET
, MT9M111_RESET_CHIP_ENABLE
);
762 static void mt9m111_restore_state(struct mt9m111
*mt9m111
)
764 mt9m111_set_context(mt9m111
, mt9m111
->ctx
);
765 mt9m111_set_pixfmt(mt9m111
, mt9m111
->fmt
->code
);
766 mt9m111_setup_geometry(mt9m111
, &mt9m111
->rect
,
767 mt9m111
->width
, mt9m111
->height
, mt9m111
->fmt
->code
);
768 v4l2_ctrl_handler_setup(&mt9m111
->hdl
);
771 static int mt9m111_resume(struct mt9m111
*mt9m111
)
773 int ret
= mt9m111_enable(mt9m111
);
775 ret
= mt9m111_reset(mt9m111
);
777 mt9m111_restore_state(mt9m111
);
782 static int mt9m111_init(struct mt9m111
*mt9m111
)
784 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9m111
->subdev
);
787 /* Default HIGHPOWER context */
788 mt9m111
->ctx
= &context_b
;
789 ret
= mt9m111_enable(mt9m111
);
791 ret
= mt9m111_reset(mt9m111
);
793 ret
= mt9m111_set_context(mt9m111
, mt9m111
->ctx
);
795 dev_err(&client
->dev
, "mt9m111 init failed: %d\n", ret
);
800 * Interface active, can use i2c. If it fails, it can indeed mean, that
801 * this wasn't our capture interface, so, we wait for the right one
803 static int mt9m111_video_probe(struct i2c_client
*client
)
805 struct mt9m111
*mt9m111
= to_mt9m111(client
);
809 data
= reg_read(CHIP_VERSION
);
812 case 0x143a: /* MT9M111 or MT9M131 */
813 mt9m111
->model
= V4L2_IDENT_MT9M111
;
814 dev_info(&client
->dev
,
815 "Detected a MT9M111/MT9M131 chip ID %x\n", data
);
817 case 0x148c: /* MT9M112 */
818 mt9m111
->model
= V4L2_IDENT_MT9M112
;
819 dev_info(&client
->dev
, "Detected a MT9M112 chip ID %x\n", data
);
822 dev_err(&client
->dev
,
823 "No MT9M111/MT9M112/MT9M131 chip detected register read %x\n",
828 ret
= mt9m111_init(mt9m111
);
831 return v4l2_ctrl_handler_setup(&mt9m111
->hdl
);
834 static int mt9m111_s_power(struct v4l2_subdev
*sd
, int on
)
836 struct mt9m111
*mt9m111
= container_of(sd
, struct mt9m111
, subdev
);
837 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
840 mutex_lock(&mt9m111
->power_lock
);
843 * If the power count is modified from 0 to != 0 or from != 0 to 0,
844 * update the power state.
846 if (mt9m111
->power_count
== !on
) {
848 ret
= mt9m111_resume(mt9m111
);
850 dev_err(&client
->dev
,
851 "Failed to resume the sensor: %d\n", ret
);
855 mt9m111_suspend(mt9m111
);
859 /* Update the power count. */
860 mt9m111
->power_count
+= on
? 1 : -1;
861 WARN_ON(mt9m111
->power_count
< 0);
864 mutex_unlock(&mt9m111
->power_lock
);
868 static const struct v4l2_ctrl_ops mt9m111_ctrl_ops
= {
869 .s_ctrl
= mt9m111_s_ctrl
,
872 static struct v4l2_subdev_core_ops mt9m111_subdev_core_ops
= {
873 .g_chip_ident
= mt9m111_g_chip_ident
,
874 .s_power
= mt9m111_s_power
,
875 #ifdef CONFIG_VIDEO_ADV_DEBUG
876 .g_register
= mt9m111_g_register
,
877 .s_register
= mt9m111_s_register
,
881 static int mt9m111_enum_fmt(struct v4l2_subdev
*sd
, unsigned int index
,
882 enum v4l2_mbus_pixelcode
*code
)
884 if (index
>= ARRAY_SIZE(mt9m111_colour_fmts
))
887 *code
= mt9m111_colour_fmts
[index
].code
;
891 static int mt9m111_g_mbus_config(struct v4l2_subdev
*sd
,
892 struct v4l2_mbus_config
*cfg
)
894 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
895 struct soc_camera_link
*icl
= soc_camera_i2c_to_link(client
);
897 cfg
->flags
= V4L2_MBUS_MASTER
| V4L2_MBUS_PCLK_SAMPLE_RISING
|
898 V4L2_MBUS_HSYNC_ACTIVE_HIGH
| V4L2_MBUS_VSYNC_ACTIVE_HIGH
|
899 V4L2_MBUS_DATA_ACTIVE_HIGH
;
900 cfg
->type
= V4L2_MBUS_PARALLEL
;
901 cfg
->flags
= soc_camera_apply_board_flags(icl
, cfg
);
906 static struct v4l2_subdev_video_ops mt9m111_subdev_video_ops
= {
907 .s_mbus_fmt
= mt9m111_s_fmt
,
908 .g_mbus_fmt
= mt9m111_g_fmt
,
909 .try_mbus_fmt
= mt9m111_try_fmt
,
910 .s_crop
= mt9m111_s_crop
,
911 .g_crop
= mt9m111_g_crop
,
912 .cropcap
= mt9m111_cropcap
,
913 .enum_mbus_fmt
= mt9m111_enum_fmt
,
914 .g_mbus_config
= mt9m111_g_mbus_config
,
917 static struct v4l2_subdev_ops mt9m111_subdev_ops
= {
918 .core
= &mt9m111_subdev_core_ops
,
919 .video
= &mt9m111_subdev_video_ops
,
922 static int mt9m111_probe(struct i2c_client
*client
,
923 const struct i2c_device_id
*did
)
925 struct mt9m111
*mt9m111
;
926 struct i2c_adapter
*adapter
= to_i2c_adapter(client
->dev
.parent
);
927 struct soc_camera_link
*icl
= soc_camera_i2c_to_link(client
);
931 dev_err(&client
->dev
, "mt9m111: driver needs platform data\n");
935 if (!i2c_check_functionality(adapter
, I2C_FUNC_SMBUS_WORD_DATA
)) {
936 dev_warn(&adapter
->dev
,
937 "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n");
941 mt9m111
= kzalloc(sizeof(struct mt9m111
), GFP_KERNEL
);
945 v4l2_i2c_subdev_init(&mt9m111
->subdev
, client
, &mt9m111_subdev_ops
);
946 v4l2_ctrl_handler_init(&mt9m111
->hdl
, 5);
947 v4l2_ctrl_new_std(&mt9m111
->hdl
, &mt9m111_ctrl_ops
,
948 V4L2_CID_VFLIP
, 0, 1, 1, 0);
949 v4l2_ctrl_new_std(&mt9m111
->hdl
, &mt9m111_ctrl_ops
,
950 V4L2_CID_HFLIP
, 0, 1, 1, 0);
951 v4l2_ctrl_new_std(&mt9m111
->hdl
, &mt9m111_ctrl_ops
,
952 V4L2_CID_AUTO_WHITE_BALANCE
, 0, 1, 1, 1);
953 mt9m111
->gain
= v4l2_ctrl_new_std(&mt9m111
->hdl
, &mt9m111_ctrl_ops
,
954 V4L2_CID_GAIN
, 0, 63 * 2 * 2, 1, 32);
955 v4l2_ctrl_new_std_menu(&mt9m111
->hdl
,
956 &mt9m111_ctrl_ops
, V4L2_CID_EXPOSURE_AUTO
, 1, 0,
958 mt9m111
->subdev
.ctrl_handler
= &mt9m111
->hdl
;
959 if (mt9m111
->hdl
.error
) {
960 int err
= mt9m111
->hdl
.error
;
966 /* Second stage probe - when a capture adapter is there */
967 mt9m111
->rect
.left
= MT9M111_MIN_DARK_COLS
;
968 mt9m111
->rect
.top
= MT9M111_MIN_DARK_ROWS
;
969 mt9m111
->rect
.width
= MT9M111_MAX_WIDTH
;
970 mt9m111
->rect
.height
= MT9M111_MAX_HEIGHT
;
971 mt9m111
->fmt
= &mt9m111_colour_fmts
[0];
972 mt9m111
->lastpage
= -1;
973 mutex_init(&mt9m111
->power_lock
);
975 ret
= mt9m111_video_probe(client
);
977 v4l2_ctrl_handler_free(&mt9m111
->hdl
);
984 static int mt9m111_remove(struct i2c_client
*client
)
986 struct mt9m111
*mt9m111
= to_mt9m111(client
);
988 v4l2_device_unregister_subdev(&mt9m111
->subdev
);
989 v4l2_ctrl_handler_free(&mt9m111
->hdl
);
995 static const struct i2c_device_id mt9m111_id
[] = {
999 MODULE_DEVICE_TABLE(i2c
, mt9m111_id
);
1001 static struct i2c_driver mt9m111_i2c_driver
= {
1005 .probe
= mt9m111_probe
,
1006 .remove
= mt9m111_remove
,
1007 .id_table
= mt9m111_id
,
1010 module_i2c_driver(mt9m111_i2c_driver
);
1012 MODULE_DESCRIPTION("Micron/Aptina MT9M111/MT9M112/MT9M131 Camera driver");
1013 MODULE_AUTHOR("Robert Jarzmik");
1014 MODULE_LICENSE("GPL");