2 * Driver for MT9M111/MT9M112/MT9M131 CMOS Image Sensor from Micron/Aptina
4 * Copyright (C) 2008, Robert Jarzmik <robert.jarzmik@free.fr>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 #include <linux/videodev2.h>
11 #include <linux/slab.h>
12 #include <linux/i2c.h>
13 #include <linux/log2.h>
14 #include <linux/gpio.h>
15 #include <linux/delay.h>
17 #include <media/soc_camera.h>
18 #include <media/soc_mediabus.h>
19 #include <media/v4l2-common.h>
20 #include <media/v4l2-ctrls.h>
21 #include <media/v4l2-chip-ident.h>
24 * MT9M111, MT9M112 and MT9M131:
25 * i2c address is 0x48 or 0x5d (depending on SADDR pin)
26 * The platform has to define i2c_board_info and call i2c_register_board_info()
30 * Sensor core register addresses (0x000..0x0ff)
32 #define MT9M111_CHIP_VERSION 0x000
33 #define MT9M111_ROW_START 0x001
34 #define MT9M111_COLUMN_START 0x002
35 #define MT9M111_WINDOW_HEIGHT 0x003
36 #define MT9M111_WINDOW_WIDTH 0x004
37 #define MT9M111_HORIZONTAL_BLANKING_B 0x005
38 #define MT9M111_VERTICAL_BLANKING_B 0x006
39 #define MT9M111_HORIZONTAL_BLANKING_A 0x007
40 #define MT9M111_VERTICAL_BLANKING_A 0x008
41 #define MT9M111_SHUTTER_WIDTH 0x009
42 #define MT9M111_ROW_SPEED 0x00a
43 #define MT9M111_EXTRA_DELAY 0x00b
44 #define MT9M111_SHUTTER_DELAY 0x00c
45 #define MT9M111_RESET 0x00d
46 #define MT9M111_READ_MODE_B 0x020
47 #define MT9M111_READ_MODE_A 0x021
48 #define MT9M111_FLASH_CONTROL 0x023
49 #define MT9M111_GREEN1_GAIN 0x02b
50 #define MT9M111_BLUE_GAIN 0x02c
51 #define MT9M111_RED_GAIN 0x02d
52 #define MT9M111_GREEN2_GAIN 0x02e
53 #define MT9M111_GLOBAL_GAIN 0x02f
54 #define MT9M111_CONTEXT_CONTROL 0x0c8
55 #define MT9M111_PAGE_MAP 0x0f0
56 #define MT9M111_BYTE_WISE_ADDR 0x0f1
58 #define MT9M111_RESET_SYNC_CHANGES (1 << 15)
59 #define MT9M111_RESET_RESTART_BAD_FRAME (1 << 9)
60 #define MT9M111_RESET_SHOW_BAD_FRAMES (1 << 8)
61 #define MT9M111_RESET_RESET_SOC (1 << 5)
62 #define MT9M111_RESET_OUTPUT_DISABLE (1 << 4)
63 #define MT9M111_RESET_CHIP_ENABLE (1 << 3)
64 #define MT9M111_RESET_ANALOG_STANDBY (1 << 2)
65 #define MT9M111_RESET_RESTART_FRAME (1 << 1)
66 #define MT9M111_RESET_RESET_MODE (1 << 0)
68 #define MT9M111_RM_FULL_POWER_RD (0 << 10)
69 #define MT9M111_RM_LOW_POWER_RD (1 << 10)
70 #define MT9M111_RM_COL_SKIP_4X (1 << 5)
71 #define MT9M111_RM_ROW_SKIP_4X (1 << 4)
72 #define MT9M111_RM_COL_SKIP_2X (1 << 3)
73 #define MT9M111_RM_ROW_SKIP_2X (1 << 2)
74 #define MT9M111_RMB_MIRROR_COLS (1 << 1)
75 #define MT9M111_RMB_MIRROR_ROWS (1 << 0)
76 #define MT9M111_CTXT_CTRL_RESTART (1 << 15)
77 #define MT9M111_CTXT_CTRL_DEFECTCOR_B (1 << 12)
78 #define MT9M111_CTXT_CTRL_RESIZE_B (1 << 10)
79 #define MT9M111_CTXT_CTRL_CTRL2_B (1 << 9)
80 #define MT9M111_CTXT_CTRL_GAMMA_B (1 << 8)
81 #define MT9M111_CTXT_CTRL_XENON_EN (1 << 7)
82 #define MT9M111_CTXT_CTRL_READ_MODE_B (1 << 3)
83 #define MT9M111_CTXT_CTRL_LED_FLASH_EN (1 << 2)
84 #define MT9M111_CTXT_CTRL_VBLANK_SEL_B (1 << 1)
85 #define MT9M111_CTXT_CTRL_HBLANK_SEL_B (1 << 0)
88 * Colorpipe register addresses (0x100..0x1ff)
90 #define MT9M111_OPER_MODE_CTRL 0x106
91 #define MT9M111_OUTPUT_FORMAT_CTRL 0x108
92 #define MT9M111_REDUCER_XZOOM_B 0x1a0
93 #define MT9M111_REDUCER_XSIZE_B 0x1a1
94 #define MT9M111_REDUCER_YZOOM_B 0x1a3
95 #define MT9M111_REDUCER_YSIZE_B 0x1a4
96 #define MT9M111_REDUCER_XZOOM_A 0x1a6
97 #define MT9M111_REDUCER_XSIZE_A 0x1a7
98 #define MT9M111_REDUCER_YZOOM_A 0x1a9
99 #define MT9M111_REDUCER_YSIZE_A 0x1aa
101 #define MT9M111_OUTPUT_FORMAT_CTRL2_A 0x13a
102 #define MT9M111_OUTPUT_FORMAT_CTRL2_B 0x19b
104 #define MT9M111_OPMODE_AUTOEXPO_EN (1 << 14)
105 #define MT9M111_OPMODE_AUTOWHITEBAL_EN (1 << 1)
106 #define MT9M111_OUTFMT_FLIP_BAYER_COL (1 << 9)
107 #define MT9M111_OUTFMT_FLIP_BAYER_ROW (1 << 8)
108 #define MT9M111_OUTFMT_PROCESSED_BAYER (1 << 14)
109 #define MT9M111_OUTFMT_BYPASS_IFP (1 << 10)
110 #define MT9M111_OUTFMT_INV_PIX_CLOCK (1 << 9)
111 #define MT9M111_OUTFMT_RGB (1 << 8)
112 #define MT9M111_OUTFMT_RGB565 (0 << 6)
113 #define MT9M111_OUTFMT_RGB555 (1 << 6)
114 #define MT9M111_OUTFMT_RGB444x (2 << 6)
115 #define MT9M111_OUTFMT_RGBx444 (3 << 6)
116 #define MT9M111_OUTFMT_TST_RAMP_OFF (0 << 4)
117 #define MT9M111_OUTFMT_TST_RAMP_COL (1 << 4)
118 #define MT9M111_OUTFMT_TST_RAMP_ROW (2 << 4)
119 #define MT9M111_OUTFMT_TST_RAMP_FRAME (3 << 4)
120 #define MT9M111_OUTFMT_SHIFT_3_UP (1 << 3)
121 #define MT9M111_OUTFMT_AVG_CHROMA (1 << 2)
122 #define MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN (1 << 1)
123 #define MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B (1 << 0)
126 * Camera control register addresses (0x200..0x2ff not implemented)
129 #define reg_read(reg) mt9m111_reg_read(client, MT9M111_##reg)
130 #define reg_write(reg, val) mt9m111_reg_write(client, MT9M111_##reg, (val))
131 #define reg_set(reg, val) mt9m111_reg_set(client, MT9M111_##reg, (val))
132 #define reg_clear(reg, val) mt9m111_reg_clear(client, MT9M111_##reg, (val))
133 #define reg_mask(reg, val, mask) mt9m111_reg_mask(client, MT9M111_##reg, \
136 #define MT9M111_MIN_DARK_ROWS 8
137 #define MT9M111_MIN_DARK_COLS 26
138 #define MT9M111_MAX_HEIGHT 1024
139 #define MT9M111_MAX_WIDTH 1280
141 /* MT9M111 has only one fixed colorspace per pixelcode */
142 struct mt9m111_datafmt
{
143 enum v4l2_mbus_pixelcode code
;
144 enum v4l2_colorspace colorspace
;
147 /* Find a data format by a pixel code in an array */
148 static const struct mt9m111_datafmt
*mt9m111_find_datafmt(
149 enum v4l2_mbus_pixelcode code
, const struct mt9m111_datafmt
*fmt
,
153 for (i
= 0; i
< n
; i
++)
154 if (fmt
[i
].code
== code
)
160 static const struct mt9m111_datafmt mt9m111_colour_fmts
[] = {
161 {V4L2_MBUS_FMT_YUYV8_2X8
, V4L2_COLORSPACE_JPEG
},
162 {V4L2_MBUS_FMT_YVYU8_2X8
, V4L2_COLORSPACE_JPEG
},
163 {V4L2_MBUS_FMT_UYVY8_2X8
, V4L2_COLORSPACE_JPEG
},
164 {V4L2_MBUS_FMT_VYUY8_2X8
, V4L2_COLORSPACE_JPEG
},
165 {V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE
, V4L2_COLORSPACE_SRGB
},
166 {V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE
, V4L2_COLORSPACE_SRGB
},
167 {V4L2_MBUS_FMT_RGB565_2X8_LE
, V4L2_COLORSPACE_SRGB
},
168 {V4L2_MBUS_FMT_RGB565_2X8_BE
, V4L2_COLORSPACE_SRGB
},
169 {V4L2_MBUS_FMT_BGR565_2X8_LE
, V4L2_COLORSPACE_SRGB
},
170 {V4L2_MBUS_FMT_BGR565_2X8_BE
, V4L2_COLORSPACE_SRGB
},
171 {V4L2_MBUS_FMT_SBGGR8_1X8
, V4L2_COLORSPACE_SRGB
},
172 {V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE
, V4L2_COLORSPACE_SRGB
},
175 enum mt9m111_context
{
181 struct v4l2_subdev subdev
;
182 struct v4l2_ctrl_handler hdl
;
183 struct v4l2_ctrl
*gain
;
184 int model
; /* V4L2_IDENT_MT9M111 or V4L2_IDENT_MT9M112 code
185 * from v4l2-chip-ident.h */
186 enum mt9m111_context context
;
187 struct v4l2_rect rect
;
188 struct mutex power_lock
; /* lock to protect power_count */
190 const struct mt9m111_datafmt
*fmt
;
191 int lastpage
; /* PageMap cache value */
192 unsigned char datawidth
;
193 unsigned int powered
:1;
196 static struct mt9m111
*to_mt9m111(const struct i2c_client
*client
)
198 return container_of(i2c_get_clientdata(client
), struct mt9m111
, subdev
);
201 static int reg_page_map_set(struct i2c_client
*client
, const u16 reg
)
205 struct mt9m111
*mt9m111
= to_mt9m111(client
);
208 if (page
== mt9m111
->lastpage
)
213 ret
= i2c_smbus_write_word_data(client
, MT9M111_PAGE_MAP
, swab16(page
));
215 mt9m111
->lastpage
= page
;
219 static int mt9m111_reg_read(struct i2c_client
*client
, const u16 reg
)
223 ret
= reg_page_map_set(client
, reg
);
225 ret
= swab16(i2c_smbus_read_word_data(client
, reg
& 0xff));
227 dev_dbg(&client
->dev
, "read reg.%03x -> %04x\n", reg
, ret
);
231 static int mt9m111_reg_write(struct i2c_client
*client
, const u16 reg
,
236 ret
= reg_page_map_set(client
, reg
);
238 ret
= i2c_smbus_write_word_data(client
, reg
& 0xff,
240 dev_dbg(&client
->dev
, "write reg.%03x = %04x -> %d\n", reg
, data
, ret
);
244 static int mt9m111_reg_set(struct i2c_client
*client
, const u16 reg
,
249 ret
= mt9m111_reg_read(client
, reg
);
251 ret
= mt9m111_reg_write(client
, reg
, ret
| data
);
255 static int mt9m111_reg_clear(struct i2c_client
*client
, const u16 reg
,
260 ret
= mt9m111_reg_read(client
, reg
);
262 ret
= mt9m111_reg_write(client
, reg
, ret
& ~data
);
266 static int mt9m111_reg_mask(struct i2c_client
*client
, const u16 reg
,
267 const u16 data
, const u16 mask
)
271 ret
= mt9m111_reg_read(client
, reg
);
273 ret
= mt9m111_reg_write(client
, reg
, (ret
& ~mask
) | data
);
277 static int mt9m111_set_context(struct mt9m111
*mt9m111
,
278 enum mt9m111_context ctxt
)
280 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9m111
->subdev
);
281 int valB
= MT9M111_CTXT_CTRL_RESTART
| MT9M111_CTXT_CTRL_DEFECTCOR_B
282 | MT9M111_CTXT_CTRL_RESIZE_B
| MT9M111_CTXT_CTRL_CTRL2_B
283 | MT9M111_CTXT_CTRL_GAMMA_B
| MT9M111_CTXT_CTRL_READ_MODE_B
284 | MT9M111_CTXT_CTRL_VBLANK_SEL_B
285 | MT9M111_CTXT_CTRL_HBLANK_SEL_B
;
286 int valA
= MT9M111_CTXT_CTRL_RESTART
;
288 if (ctxt
== HIGHPOWER
)
289 return reg_write(CONTEXT_CONTROL
, valB
);
291 return reg_write(CONTEXT_CONTROL
, valA
);
294 static int mt9m111_setup_rect(struct mt9m111
*mt9m111
,
295 struct v4l2_rect
*rect
)
297 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9m111
->subdev
);
298 int ret
, is_raw_format
;
299 int width
= rect
->width
;
300 int height
= rect
->height
;
302 if (mt9m111
->fmt
->code
== V4L2_MBUS_FMT_SBGGR8_1X8
||
303 mt9m111
->fmt
->code
== V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE
)
308 ret
= reg_write(COLUMN_START
, rect
->left
);
310 ret
= reg_write(ROW_START
, rect
->top
);
314 ret
= reg_write(WINDOW_WIDTH
, width
);
316 ret
= reg_write(WINDOW_HEIGHT
, height
);
319 ret
= reg_write(REDUCER_XZOOM_B
, MT9M111_MAX_WIDTH
);
321 ret
= reg_write(REDUCER_YZOOM_B
, MT9M111_MAX_HEIGHT
);
323 ret
= reg_write(REDUCER_XSIZE_B
, width
);
325 ret
= reg_write(REDUCER_YSIZE_B
, height
);
327 ret
= reg_write(REDUCER_XZOOM_A
, MT9M111_MAX_WIDTH
);
329 ret
= reg_write(REDUCER_YZOOM_A
, MT9M111_MAX_HEIGHT
);
331 ret
= reg_write(REDUCER_XSIZE_A
, width
);
333 ret
= reg_write(REDUCER_YSIZE_A
, height
);
339 static int mt9m111_enable(struct mt9m111
*mt9m111
)
341 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9m111
->subdev
);
344 ret
= reg_set(RESET
, MT9M111_RESET_CHIP_ENABLE
);
346 mt9m111
->powered
= 1;
350 static int mt9m111_reset(struct mt9m111
*mt9m111
)
352 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9m111
->subdev
);
355 ret
= reg_set(RESET
, MT9M111_RESET_RESET_MODE
);
357 ret
= reg_set(RESET
, MT9M111_RESET_RESET_SOC
);
359 ret
= reg_clear(RESET
, MT9M111_RESET_RESET_MODE
360 | MT9M111_RESET_RESET_SOC
);
365 static int mt9m111_make_rect(struct mt9m111
*mt9m111
,
366 struct v4l2_rect
*rect
)
368 if (mt9m111
->fmt
->code
== V4L2_MBUS_FMT_SBGGR8_1X8
||
369 mt9m111
->fmt
->code
== V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE
) {
370 /* Bayer format - even size lengths */
371 rect
->width
= ALIGN(rect
->width
, 2);
372 rect
->height
= ALIGN(rect
->height
, 2);
373 /* Let the user play with the starting pixel */
376 /* FIXME: the datasheet doesn't specify minimum sizes */
377 soc_camera_limit_side(&rect
->left
, &rect
->width
,
378 MT9M111_MIN_DARK_COLS
, 2, MT9M111_MAX_WIDTH
);
380 soc_camera_limit_side(&rect
->top
, &rect
->height
,
381 MT9M111_MIN_DARK_ROWS
, 2, MT9M111_MAX_HEIGHT
);
383 return mt9m111_setup_rect(mt9m111
, rect
);
386 static int mt9m111_s_crop(struct v4l2_subdev
*sd
, struct v4l2_crop
*a
)
388 struct v4l2_rect rect
= a
->c
;
389 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
390 struct mt9m111
*mt9m111
= container_of(sd
, struct mt9m111
, subdev
);
393 dev_dbg(&client
->dev
, "%s left=%d, top=%d, width=%d, height=%d\n",
394 __func__
, rect
.left
, rect
.top
, rect
.width
, rect
.height
);
396 if (a
->type
!= V4L2_BUF_TYPE_VIDEO_CAPTURE
)
399 ret
= mt9m111_make_rect(mt9m111
, &rect
);
401 mt9m111
->rect
= rect
;
405 static int mt9m111_g_crop(struct v4l2_subdev
*sd
, struct v4l2_crop
*a
)
407 struct mt9m111
*mt9m111
= container_of(sd
, struct mt9m111
, subdev
);
409 a
->c
= mt9m111
->rect
;
410 a
->type
= V4L2_BUF_TYPE_VIDEO_CAPTURE
;
415 static int mt9m111_cropcap(struct v4l2_subdev
*sd
, struct v4l2_cropcap
*a
)
417 if (a
->type
!= V4L2_BUF_TYPE_VIDEO_CAPTURE
)
420 a
->bounds
.left
= MT9M111_MIN_DARK_COLS
;
421 a
->bounds
.top
= MT9M111_MIN_DARK_ROWS
;
422 a
->bounds
.width
= MT9M111_MAX_WIDTH
;
423 a
->bounds
.height
= MT9M111_MAX_HEIGHT
;
424 a
->defrect
= a
->bounds
;
425 a
->pixelaspect
.numerator
= 1;
426 a
->pixelaspect
.denominator
= 1;
431 static int mt9m111_g_fmt(struct v4l2_subdev
*sd
,
432 struct v4l2_mbus_framefmt
*mf
)
434 struct mt9m111
*mt9m111
= container_of(sd
, struct mt9m111
, subdev
);
436 mf
->width
= mt9m111
->rect
.width
;
437 mf
->height
= mt9m111
->rect
.height
;
438 mf
->code
= mt9m111
->fmt
->code
;
439 mf
->colorspace
= mt9m111
->fmt
->colorspace
;
440 mf
->field
= V4L2_FIELD_NONE
;
445 static int mt9m111_set_pixfmt(struct mt9m111
*mt9m111
,
446 enum v4l2_mbus_pixelcode code
)
448 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9m111
->subdev
);
449 u16 data_outfmt2
, mask_outfmt2
= MT9M111_OUTFMT_PROCESSED_BAYER
|
450 MT9M111_OUTFMT_BYPASS_IFP
| MT9M111_OUTFMT_RGB
|
451 MT9M111_OUTFMT_RGB565
| MT9M111_OUTFMT_RGB555
|
452 MT9M111_OUTFMT_RGB444x
| MT9M111_OUTFMT_RGBx444
|
453 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN
|
454 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B
;
458 case V4L2_MBUS_FMT_SBGGR8_1X8
:
459 data_outfmt2
= MT9M111_OUTFMT_PROCESSED_BAYER
|
462 case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE
:
463 data_outfmt2
= MT9M111_OUTFMT_BYPASS_IFP
| MT9M111_OUTFMT_RGB
;
465 case V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE
:
466 data_outfmt2
= MT9M111_OUTFMT_RGB
| MT9M111_OUTFMT_RGB555
|
467 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN
;
469 case V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE
:
470 data_outfmt2
= MT9M111_OUTFMT_RGB
| MT9M111_OUTFMT_RGB555
;
472 case V4L2_MBUS_FMT_RGB565_2X8_LE
:
473 data_outfmt2
= MT9M111_OUTFMT_RGB
| MT9M111_OUTFMT_RGB565
|
474 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN
;
476 case V4L2_MBUS_FMT_RGB565_2X8_BE
:
477 data_outfmt2
= MT9M111_OUTFMT_RGB
| MT9M111_OUTFMT_RGB565
;
479 case V4L2_MBUS_FMT_BGR565_2X8_BE
:
480 data_outfmt2
= MT9M111_OUTFMT_RGB
| MT9M111_OUTFMT_RGB565
|
481 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B
;
483 case V4L2_MBUS_FMT_BGR565_2X8_LE
:
484 data_outfmt2
= MT9M111_OUTFMT_RGB
| MT9M111_OUTFMT_RGB565
|
485 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN
|
486 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B
;
488 case V4L2_MBUS_FMT_UYVY8_2X8
:
491 case V4L2_MBUS_FMT_VYUY8_2X8
:
492 data_outfmt2
= MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B
;
494 case V4L2_MBUS_FMT_YUYV8_2X8
:
495 data_outfmt2
= MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN
;
497 case V4L2_MBUS_FMT_YVYU8_2X8
:
498 data_outfmt2
= MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN
|
499 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B
;
502 dev_err(&client
->dev
, "Pixel format not handled: %x\n", code
);
506 ret
= reg_mask(OUTPUT_FORMAT_CTRL2_A
, data_outfmt2
,
509 ret
= reg_mask(OUTPUT_FORMAT_CTRL2_B
, data_outfmt2
,
515 static int mt9m111_s_fmt(struct v4l2_subdev
*sd
,
516 struct v4l2_mbus_framefmt
*mf
)
518 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
519 const struct mt9m111_datafmt
*fmt
;
520 struct mt9m111
*mt9m111
= container_of(sd
, struct mt9m111
, subdev
);
521 struct v4l2_rect rect
= {
522 .left
= mt9m111
->rect
.left
,
523 .top
= mt9m111
->rect
.top
,
525 .height
= mf
->height
,
529 fmt
= mt9m111_find_datafmt(mf
->code
, mt9m111_colour_fmts
,
530 ARRAY_SIZE(mt9m111_colour_fmts
));
534 dev_dbg(&client
->dev
,
535 "%s code=%x left=%d, top=%d, width=%d, height=%d\n", __func__
,
536 mf
->code
, rect
.left
, rect
.top
, rect
.width
, rect
.height
);
538 ret
= mt9m111_make_rect(mt9m111
, &rect
);
540 ret
= mt9m111_set_pixfmt(mt9m111
, mf
->code
);
542 mt9m111
->rect
= rect
;
544 mf
->colorspace
= fmt
->colorspace
;
550 static int mt9m111_try_fmt(struct v4l2_subdev
*sd
,
551 struct v4l2_mbus_framefmt
*mf
)
553 struct mt9m111
*mt9m111
= container_of(sd
, struct mt9m111
, subdev
);
554 const struct mt9m111_datafmt
*fmt
;
555 bool bayer
= mf
->code
== V4L2_MBUS_FMT_SBGGR8_1X8
||
556 mf
->code
== V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE
;
558 fmt
= mt9m111_find_datafmt(mf
->code
, mt9m111_colour_fmts
,
559 ARRAY_SIZE(mt9m111_colour_fmts
));
562 mf
->code
= fmt
->code
;
566 * With Bayer format enforce even side lengths, but let the user play
567 * with the starting pixel
570 if (mf
->height
> MT9M111_MAX_HEIGHT
)
571 mf
->height
= MT9M111_MAX_HEIGHT
;
572 else if (mf
->height
< 2)
575 mf
->height
= ALIGN(mf
->height
, 2);
577 if (mf
->width
> MT9M111_MAX_WIDTH
)
578 mf
->width
= MT9M111_MAX_WIDTH
;
579 else if (mf
->width
< 2)
582 mf
->width
= ALIGN(mf
->width
, 2);
584 mf
->colorspace
= fmt
->colorspace
;
589 static int mt9m111_g_chip_ident(struct v4l2_subdev
*sd
,
590 struct v4l2_dbg_chip_ident
*id
)
592 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
593 struct mt9m111
*mt9m111
= container_of(sd
, struct mt9m111
, subdev
);
595 if (id
->match
.type
!= V4L2_CHIP_MATCH_I2C_ADDR
)
598 if (id
->match
.addr
!= client
->addr
)
601 id
->ident
= mt9m111
->model
;
607 #ifdef CONFIG_VIDEO_ADV_DEBUG
608 static int mt9m111_g_register(struct v4l2_subdev
*sd
,
609 struct v4l2_dbg_register
*reg
)
611 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
614 if (reg
->match
.type
!= V4L2_CHIP_MATCH_I2C_ADDR
|| reg
->reg
> 0x2ff)
616 if (reg
->match
.addr
!= client
->addr
)
619 val
= mt9m111_reg_read(client
, reg
->reg
);
623 if (reg
->val
> 0xffff)
629 static int mt9m111_s_register(struct v4l2_subdev
*sd
,
630 struct v4l2_dbg_register
*reg
)
632 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
634 if (reg
->match
.type
!= V4L2_CHIP_MATCH_I2C_ADDR
|| reg
->reg
> 0x2ff)
637 if (reg
->match
.addr
!= client
->addr
)
640 if (mt9m111_reg_write(client
, reg
->reg
, reg
->val
) < 0)
647 static int mt9m111_set_flip(struct mt9m111
*mt9m111
, int flip
, int mask
)
649 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9m111
->subdev
);
652 if (mt9m111
->context
== HIGHPOWER
) {
654 ret
= reg_set(READ_MODE_B
, mask
);
656 ret
= reg_clear(READ_MODE_B
, mask
);
659 ret
= reg_set(READ_MODE_A
, mask
);
661 ret
= reg_clear(READ_MODE_A
, mask
);
667 static int mt9m111_get_global_gain(struct mt9m111
*mt9m111
)
669 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9m111
->subdev
);
672 data
= reg_read(GLOBAL_GAIN
);
674 return (data
& 0x2f) * (1 << ((data
>> 10) & 1)) *
675 (1 << ((data
>> 9) & 1));
679 static int mt9m111_set_global_gain(struct mt9m111
*mt9m111
, int gain
)
681 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9m111
->subdev
);
684 if (gain
> 63 * 2 * 2)
687 if ((gain
>= 64 * 2) && (gain
< 63 * 2 * 2))
688 val
= (1 << 10) | (1 << 9) | (gain
/ 4);
689 else if ((gain
>= 64) && (gain
< 64 * 2))
690 val
= (1 << 9) | (gain
/ 2);
694 return reg_write(GLOBAL_GAIN
, val
);
697 static int mt9m111_set_autoexposure(struct mt9m111
*mt9m111
, int on
)
699 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9m111
->subdev
);
702 return reg_set(OPER_MODE_CTRL
, MT9M111_OPMODE_AUTOEXPO_EN
);
703 return reg_clear(OPER_MODE_CTRL
, MT9M111_OPMODE_AUTOEXPO_EN
);
706 static int mt9m111_set_autowhitebalance(struct mt9m111
*mt9m111
, int on
)
708 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9m111
->subdev
);
711 return reg_set(OPER_MODE_CTRL
, MT9M111_OPMODE_AUTOWHITEBAL_EN
);
712 return reg_clear(OPER_MODE_CTRL
, MT9M111_OPMODE_AUTOWHITEBAL_EN
);
715 static int mt9m111_s_ctrl(struct v4l2_ctrl
*ctrl
)
717 struct mt9m111
*mt9m111
= container_of(ctrl
->handler
,
718 struct mt9m111
, hdl
);
722 return mt9m111_set_flip(mt9m111
, ctrl
->val
,
723 MT9M111_RMB_MIRROR_ROWS
);
725 return mt9m111_set_flip(mt9m111
, ctrl
->val
,
726 MT9M111_RMB_MIRROR_COLS
);
728 return mt9m111_set_global_gain(mt9m111
, ctrl
->val
);
729 case V4L2_CID_EXPOSURE_AUTO
:
730 return mt9m111_set_autoexposure(mt9m111
, ctrl
->val
);
731 case V4L2_CID_AUTO_WHITE_BALANCE
:
732 return mt9m111_set_autowhitebalance(mt9m111
, ctrl
->val
);
738 static int mt9m111_suspend(struct mt9m111
*mt9m111
)
740 v4l2_ctrl_s_ctrl(mt9m111
->gain
, mt9m111_get_global_gain(mt9m111
));
745 static void mt9m111_restore_state(struct mt9m111
*mt9m111
)
747 mt9m111_set_context(mt9m111
, mt9m111
->context
);
748 mt9m111_set_pixfmt(mt9m111
, mt9m111
->fmt
->code
);
749 mt9m111_setup_rect(mt9m111
, &mt9m111
->rect
);
750 v4l2_ctrl_handler_setup(&mt9m111
->hdl
);
753 static int mt9m111_resume(struct mt9m111
*mt9m111
)
757 if (mt9m111
->powered
) {
758 ret
= mt9m111_enable(mt9m111
);
760 ret
= mt9m111_reset(mt9m111
);
762 mt9m111_restore_state(mt9m111
);
767 static int mt9m111_init(struct mt9m111
*mt9m111
)
769 struct i2c_client
*client
= v4l2_get_subdevdata(&mt9m111
->subdev
);
772 mt9m111
->context
= HIGHPOWER
;
773 ret
= mt9m111_enable(mt9m111
);
775 ret
= mt9m111_reset(mt9m111
);
777 ret
= mt9m111_set_context(mt9m111
, mt9m111
->context
);
779 dev_err(&client
->dev
, "mt9m111 init failed: %d\n", ret
);
784 * Interface active, can use i2c. If it fails, it can indeed mean, that
785 * this wasn't our capture interface, so, we wait for the right one
787 static int mt9m111_video_probe(struct i2c_client
*client
)
789 struct mt9m111
*mt9m111
= to_mt9m111(client
);
793 data
= reg_read(CHIP_VERSION
);
796 case 0x143a: /* MT9M111 or MT9M131 */
797 mt9m111
->model
= V4L2_IDENT_MT9M111
;
798 dev_info(&client
->dev
,
799 "Detected a MT9M111/MT9M131 chip ID %x\n", data
);
801 case 0x148c: /* MT9M112 */
802 mt9m111
->model
= V4L2_IDENT_MT9M112
;
803 dev_info(&client
->dev
, "Detected a MT9M112 chip ID %x\n", data
);
806 dev_err(&client
->dev
,
807 "No MT9M111/MT9M112/MT9M131 chip detected register read %x\n",
812 ret
= mt9m111_init(mt9m111
);
815 return v4l2_ctrl_handler_setup(&mt9m111
->hdl
);
818 static int mt9m111_s_power(struct v4l2_subdev
*sd
, int on
)
820 struct mt9m111
*mt9m111
= container_of(sd
, struct mt9m111
, subdev
);
821 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
824 mutex_lock(&mt9m111
->power_lock
);
827 * If the power count is modified from 0 to != 0 or from != 0 to 0,
828 * update the power state.
830 if (mt9m111
->power_count
== !on
) {
832 ret
= mt9m111_resume(mt9m111
);
834 dev_err(&client
->dev
,
835 "Failed to resume the sensor: %d\n", ret
);
839 mt9m111_suspend(mt9m111
);
843 /* Update the power count. */
844 mt9m111
->power_count
+= on
? 1 : -1;
845 WARN_ON(mt9m111
->power_count
< 0);
848 mutex_unlock(&mt9m111
->power_lock
);
852 static const struct v4l2_ctrl_ops mt9m111_ctrl_ops
= {
853 .s_ctrl
= mt9m111_s_ctrl
,
856 static struct v4l2_subdev_core_ops mt9m111_subdev_core_ops
= {
857 .g_chip_ident
= mt9m111_g_chip_ident
,
858 .s_power
= mt9m111_s_power
,
859 #ifdef CONFIG_VIDEO_ADV_DEBUG
860 .g_register
= mt9m111_g_register
,
861 .s_register
= mt9m111_s_register
,
865 static int mt9m111_enum_fmt(struct v4l2_subdev
*sd
, unsigned int index
,
866 enum v4l2_mbus_pixelcode
*code
)
868 if (index
>= ARRAY_SIZE(mt9m111_colour_fmts
))
871 *code
= mt9m111_colour_fmts
[index
].code
;
875 static int mt9m111_g_mbus_config(struct v4l2_subdev
*sd
,
876 struct v4l2_mbus_config
*cfg
)
878 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
879 struct soc_camera_link
*icl
= soc_camera_i2c_to_link(client
);
881 cfg
->flags
= V4L2_MBUS_MASTER
| V4L2_MBUS_PCLK_SAMPLE_RISING
|
882 V4L2_MBUS_HSYNC_ACTIVE_HIGH
| V4L2_MBUS_VSYNC_ACTIVE_HIGH
|
883 V4L2_MBUS_DATA_ACTIVE_HIGH
;
884 cfg
->type
= V4L2_MBUS_PARALLEL
;
885 cfg
->flags
= soc_camera_apply_board_flags(icl
, cfg
);
890 static struct v4l2_subdev_video_ops mt9m111_subdev_video_ops
= {
891 .s_mbus_fmt
= mt9m111_s_fmt
,
892 .g_mbus_fmt
= mt9m111_g_fmt
,
893 .try_mbus_fmt
= mt9m111_try_fmt
,
894 .s_crop
= mt9m111_s_crop
,
895 .g_crop
= mt9m111_g_crop
,
896 .cropcap
= mt9m111_cropcap
,
897 .enum_mbus_fmt
= mt9m111_enum_fmt
,
898 .g_mbus_config
= mt9m111_g_mbus_config
,
901 static struct v4l2_subdev_ops mt9m111_subdev_ops
= {
902 .core
= &mt9m111_subdev_core_ops
,
903 .video
= &mt9m111_subdev_video_ops
,
906 static int mt9m111_probe(struct i2c_client
*client
,
907 const struct i2c_device_id
*did
)
909 struct mt9m111
*mt9m111
;
910 struct i2c_adapter
*adapter
= to_i2c_adapter(client
->dev
.parent
);
911 struct soc_camera_link
*icl
= soc_camera_i2c_to_link(client
);
915 dev_err(&client
->dev
, "mt9m111: driver needs platform data\n");
919 if (!i2c_check_functionality(adapter
, I2C_FUNC_SMBUS_WORD_DATA
)) {
920 dev_warn(&adapter
->dev
,
921 "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n");
925 mt9m111
= kzalloc(sizeof(struct mt9m111
), GFP_KERNEL
);
929 v4l2_i2c_subdev_init(&mt9m111
->subdev
, client
, &mt9m111_subdev_ops
);
930 v4l2_ctrl_handler_init(&mt9m111
->hdl
, 5);
931 v4l2_ctrl_new_std(&mt9m111
->hdl
, &mt9m111_ctrl_ops
,
932 V4L2_CID_VFLIP
, 0, 1, 1, 0);
933 v4l2_ctrl_new_std(&mt9m111
->hdl
, &mt9m111_ctrl_ops
,
934 V4L2_CID_HFLIP
, 0, 1, 1, 0);
935 v4l2_ctrl_new_std(&mt9m111
->hdl
, &mt9m111_ctrl_ops
,
936 V4L2_CID_AUTO_WHITE_BALANCE
, 0, 1, 1, 1);
937 mt9m111
->gain
= v4l2_ctrl_new_std(&mt9m111
->hdl
, &mt9m111_ctrl_ops
,
938 V4L2_CID_GAIN
, 0, 63 * 2 * 2, 1, 32);
939 v4l2_ctrl_new_std_menu(&mt9m111
->hdl
,
940 &mt9m111_ctrl_ops
, V4L2_CID_EXPOSURE_AUTO
, 1, 0,
942 mt9m111
->subdev
.ctrl_handler
= &mt9m111
->hdl
;
943 if (mt9m111
->hdl
.error
) {
944 int err
= mt9m111
->hdl
.error
;
950 /* Second stage probe - when a capture adapter is there */
951 mt9m111
->rect
.left
= MT9M111_MIN_DARK_COLS
;
952 mt9m111
->rect
.top
= MT9M111_MIN_DARK_ROWS
;
953 mt9m111
->rect
.width
= MT9M111_MAX_WIDTH
;
954 mt9m111
->rect
.height
= MT9M111_MAX_HEIGHT
;
955 mt9m111
->fmt
= &mt9m111_colour_fmts
[0];
956 mt9m111
->lastpage
= -1;
958 ret
= mt9m111_video_probe(client
);
960 v4l2_ctrl_handler_free(&mt9m111
->hdl
);
967 static int mt9m111_remove(struct i2c_client
*client
)
969 struct mt9m111
*mt9m111
= to_mt9m111(client
);
971 v4l2_device_unregister_subdev(&mt9m111
->subdev
);
972 v4l2_ctrl_handler_free(&mt9m111
->hdl
);
978 static const struct i2c_device_id mt9m111_id
[] = {
982 MODULE_DEVICE_TABLE(i2c
, mt9m111_id
);
984 static struct i2c_driver mt9m111_i2c_driver
= {
988 .probe
= mt9m111_probe
,
989 .remove
= mt9m111_remove
,
990 .id_table
= mt9m111_id
,
993 static int __init
mt9m111_mod_init(void)
995 return i2c_add_driver(&mt9m111_i2c_driver
);
998 static void __exit
mt9m111_mod_exit(void)
1000 i2c_del_driver(&mt9m111_i2c_driver
);
1003 module_init(mt9m111_mod_init
);
1004 module_exit(mt9m111_mod_exit
);
1006 MODULE_DESCRIPTION("Micron/Aptina MT9M111/MT9M112/MT9M131 Camera driver");
1007 MODULE_AUTHOR("Robert Jarzmik");
1008 MODULE_LICENSE("GPL");