2 * V4L2 Driver for i.MX3x camera host
5 * Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/videodev2.h>
15 #include <linux/platform_device.h>
16 #include <linux/clk.h>
17 #include <linux/vmalloc.h>
18 #include <linux/interrupt.h>
19 #include <linux/sched.h>
21 #include <media/v4l2-common.h>
22 #include <media/v4l2-dev.h>
23 #include <media/videobuf2-dma-contig.h>
24 #include <media/soc_camera.h>
25 #include <media/soc_mediabus.h>
28 #include <mach/mx3_camera.h>
31 #define MX3_CAM_DRV_NAME "mx3-camera"
33 /* CMOS Sensor Interface Registers */
34 #define CSI_REG_START 0x60
36 #define CSI_SENS_CONF (0x60 - CSI_REG_START)
37 #define CSI_SENS_FRM_SIZE (0x64 - CSI_REG_START)
38 #define CSI_ACT_FRM_SIZE (0x68 - CSI_REG_START)
39 #define CSI_OUT_FRM_CTRL (0x6C - CSI_REG_START)
40 #define CSI_TST_CTRL (0x70 - CSI_REG_START)
41 #define CSI_CCIR_CODE_1 (0x74 - CSI_REG_START)
42 #define CSI_CCIR_CODE_2 (0x78 - CSI_REG_START)
43 #define CSI_CCIR_CODE_3 (0x7C - CSI_REG_START)
44 #define CSI_FLASH_STROBE_1 (0x80 - CSI_REG_START)
45 #define CSI_FLASH_STROBE_2 (0x84 - CSI_REG_START)
47 #define CSI_SENS_CONF_VSYNC_POL_SHIFT 0
48 #define CSI_SENS_CONF_HSYNC_POL_SHIFT 1
49 #define CSI_SENS_CONF_DATA_POL_SHIFT 2
50 #define CSI_SENS_CONF_PIX_CLK_POL_SHIFT 3
51 #define CSI_SENS_CONF_SENS_PRTCL_SHIFT 4
52 #define CSI_SENS_CONF_SENS_CLKSRC_SHIFT 7
53 #define CSI_SENS_CONF_DATA_FMT_SHIFT 8
54 #define CSI_SENS_CONF_DATA_WIDTH_SHIFT 10
55 #define CSI_SENS_CONF_EXT_VSYNC_SHIFT 15
56 #define CSI_SENS_CONF_DIVRATIO_SHIFT 16
58 #define CSI_SENS_CONF_DATA_FMT_RGB_YUV444 (0UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
59 #define CSI_SENS_CONF_DATA_FMT_YUV422 (2UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
60 #define CSI_SENS_CONF_DATA_FMT_BAYER (3UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
62 #define MAX_VIDEO_MEM 16
64 enum csi_buffer_state
{
69 struct mx3_camera_buffer
{
70 /* common v4l buffer stuff -- must be first */
72 enum csi_buffer_state state
;
73 struct list_head queue
;
75 /* One descriptot per scatterlist (per frame) */
76 struct dma_async_tx_descriptor
*txd
;
78 /* We have to "build" a scatterlist ourselves - one element per frame */
79 struct scatterlist sg
;
83 * struct mx3_camera_dev - i.MX3x camera (CSI) object
84 * @dev: camera device, to which the coherent buffer is attached
85 * @icd: currently attached camera sensor
86 * @clk: pointer to clock
87 * @base: remapped register base address
88 * @pdata: platform data
89 * @platform_flags: platform flags
90 * @mclk: master clock frequency in Hz
91 * @capture: list of capture videobuffers
92 * @lock: protects video buffer lists
93 * @active: active video buffer
94 * @idmac_channel: array of pointers to IPU DMAC DMA channels
95 * @soc_host: embedded soc_host object
97 struct mx3_camera_dev
{
99 * i.MX3x is only supposed to handle one camera on its Camera Sensor
100 * Interface. If anyone ever builds hardware to enable more than one
101 * camera _simultaneously_, they will have to modify this driver too
103 struct soc_camera_device
*icd
;
108 struct mx3_camera_pdata
*pdata
;
110 unsigned long platform_flags
;
112 u16 width_flags
; /* max 15 bits */
114 struct list_head capture
;
115 spinlock_t lock
; /* Protects video buffer lists */
116 struct mx3_camera_buffer
*active
;
118 struct vb2_alloc_ctx
*alloc_ctx
;
119 enum v4l2_field field
;
122 /* IDMAC / dmaengine interface */
123 struct idmac_channel
*idmac_channel
[1]; /* We need one channel */
125 struct soc_camera_host soc_host
;
128 struct dma_chan_request
{
129 struct mx3_camera_dev
*mx3_cam
;
133 static u32
csi_reg_read(struct mx3_camera_dev
*mx3
, off_t reg
)
135 return __raw_readl(mx3
->base
+ reg
);
138 static void csi_reg_write(struct mx3_camera_dev
*mx3
, u32 value
, off_t reg
)
140 __raw_writel(value
, mx3
->base
+ reg
);
143 static struct mx3_camera_buffer
*to_mx3_vb(struct vb2_buffer
*vb
)
145 return container_of(vb
, struct mx3_camera_buffer
, vb
);
148 /* Called from the IPU IDMAC ISR */
149 static void mx3_cam_dma_done(void *arg
)
151 struct idmac_tx_desc
*desc
= to_tx_desc(arg
);
152 struct dma_chan
*chan
= desc
->txd
.chan
;
153 struct idmac_channel
*ichannel
= to_idmac_chan(chan
);
154 struct mx3_camera_dev
*mx3_cam
= ichannel
->client
;
156 dev_dbg(chan
->device
->dev
, "callback cookie %d, active DMA 0x%08x\n",
157 desc
->txd
.cookie
, mx3_cam
->active
? sg_dma_address(&mx3_cam
->active
->sg
) : 0);
159 spin_lock(&mx3_cam
->lock
);
160 if (mx3_cam
->active
) {
161 struct vb2_buffer
*vb
= &mx3_cam
->active
->vb
;
162 struct mx3_camera_buffer
*buf
= to_mx3_vb(vb
);
164 list_del_init(&buf
->queue
);
165 do_gettimeofday(&vb
->v4l2_buf
.timestamp
);
166 vb
->v4l2_buf
.field
= mx3_cam
->field
;
167 vb
->v4l2_buf
.sequence
= mx3_cam
->sequence
++;
168 vb2_buffer_done(vb
, VB2_BUF_STATE_DONE
);
171 if (list_empty(&mx3_cam
->capture
)) {
172 mx3_cam
->active
= NULL
;
173 spin_unlock(&mx3_cam
->lock
);
176 * stop capture - without further buffers IPU_CHA_BUF0_RDY will
182 mx3_cam
->active
= list_entry(mx3_cam
->capture
.next
,
183 struct mx3_camera_buffer
, queue
);
184 spin_unlock(&mx3_cam
->lock
);
188 * Videobuf operations
192 * Calculate the __buffer__ (not data) size and number of buffers.
194 static int mx3_videobuf_setup(struct vb2_queue
*vq
,
195 const struct v4l2_format
*fmt
,
196 unsigned int *count
, unsigned int *num_planes
,
197 unsigned int sizes
[], void *alloc_ctxs
[])
199 struct soc_camera_device
*icd
= soc_camera_from_vb2q(vq
);
200 struct soc_camera_host
*ici
= to_soc_camera_host(icd
->parent
);
201 struct mx3_camera_dev
*mx3_cam
= ici
->priv
;
203 if (!mx3_cam
->idmac_channel
[0])
207 const struct soc_camera_format_xlate
*xlate
= soc_camera_xlate_by_fourcc(icd
,
208 fmt
->fmt
.pix
.pixelformat
);
209 unsigned int bytes_per_line
;
215 ret
= soc_mbus_bytes_per_line(fmt
->fmt
.pix
.width
,
220 bytes_per_line
= max_t(u32
, fmt
->fmt
.pix
.bytesperline
, ret
);
222 ret
= soc_mbus_image_size(xlate
->host_fmt
, bytes_per_line
,
223 fmt
->fmt
.pix
.height
);
227 sizes
[0] = max_t(u32
, fmt
->fmt
.pix
.sizeimage
, ret
);
229 /* Called from VIDIOC_REQBUFS or in compatibility mode */
230 sizes
[0] = icd
->sizeimage
;
233 alloc_ctxs
[0] = mx3_cam
->alloc_ctx
;
235 if (!vq
->num_buffers
)
236 mx3_cam
->sequence
= 0;
241 /* If *num_planes != 0, we have already verified *count. */
243 sizes
[0] * *count
+ mx3_cam
->buf_total
> MAX_VIDEO_MEM
* 1024 * 1024)
244 *count
= (MAX_VIDEO_MEM
* 1024 * 1024 - mx3_cam
->buf_total
) /
252 static enum pixel_fmt
fourcc_to_ipu_pix(__u32 fourcc
)
254 /* Add more formats as need arises and test possibilities appear... */
256 case V4L2_PIX_FMT_RGB24
:
257 return IPU_PIX_FMT_RGB24
;
258 case V4L2_PIX_FMT_UYVY
:
259 case V4L2_PIX_FMT_RGB565
:
261 return IPU_PIX_FMT_GENERIC
;
265 static void mx3_videobuf_queue(struct vb2_buffer
*vb
)
267 struct soc_camera_device
*icd
= soc_camera_from_vb2q(vb
->vb2_queue
);
268 struct soc_camera_host
*ici
= to_soc_camera_host(icd
->parent
);
269 struct mx3_camera_dev
*mx3_cam
= ici
->priv
;
270 struct mx3_camera_buffer
*buf
= to_mx3_vb(vb
);
271 struct scatterlist
*sg
= &buf
->sg
;
272 struct dma_async_tx_descriptor
*txd
;
273 struct idmac_channel
*ichan
= mx3_cam
->idmac_channel
[0];
274 struct idmac_video_param
*video
= &ichan
->params
.video
;
275 const struct soc_mbus_pixelfmt
*host_fmt
= icd
->current_fmt
->host_fmt
;
280 new_size
= icd
->sizeimage
;
282 if (vb2_plane_size(vb
, 0) < new_size
) {
283 dev_err(icd
->parent
, "Buffer #%d too small (%lu < %zu)\n",
284 vb
->v4l2_buf
.index
, vb2_plane_size(vb
, 0), new_size
);
288 if (buf
->state
== CSI_BUF_NEEDS_INIT
) {
289 sg_dma_address(sg
) = vb2_dma_contig_plane_dma_addr(vb
, 0);
290 sg_dma_len(sg
) = new_size
;
292 txd
= dmaengine_prep_slave_sg(
293 &ichan
->dma_chan
, sg
, 1, DMA_DEV_TO_MEM
,
298 txd
->callback_param
= txd
;
299 txd
->callback
= mx3_cam_dma_done
;
301 buf
->state
= CSI_BUF_PREPARED
;
307 vb2_set_plane_payload(vb
, 0, new_size
);
309 /* This is the configuration of one sg-element */
310 video
->out_pixel_fmt
= fourcc_to_ipu_pix(host_fmt
->fourcc
);
312 if (video
->out_pixel_fmt
== IPU_PIX_FMT_GENERIC
) {
314 * If the IPU DMA channel is configured to transfer generic
315 * 8-bit data, we have to set up the geometry parameters
316 * correctly, according to the current pixel format. The DMA
317 * horizontal parameters in this case are expressed in bytes,
320 video
->out_width
= icd
->bytesperline
;
321 video
->out_height
= icd
->user_height
;
322 video
->out_stride
= icd
->bytesperline
;
325 * For IPU known formats the pixel unit will be managed
326 * successfully by the IPU code
328 video
->out_width
= icd
->user_width
;
329 video
->out_height
= icd
->user_height
;
330 video
->out_stride
= icd
->user_width
;
334 /* helps to see what DMA actually has written */
335 if (vb2_plane_vaddr(vb
, 0))
336 memset(vb2_plane_vaddr(vb
, 0), 0xaa, vb2_get_plane_payload(vb
, 0));
339 spin_lock_irqsave(&mx3_cam
->lock
, flags
);
340 list_add_tail(&buf
->queue
, &mx3_cam
->capture
);
342 if (!mx3_cam
->active
)
343 mx3_cam
->active
= buf
;
345 spin_unlock_irq(&mx3_cam
->lock
);
347 cookie
= txd
->tx_submit(txd
);
348 dev_dbg(icd
->parent
, "Submitted cookie %d DMA 0x%08x\n",
349 cookie
, sg_dma_address(&buf
->sg
));
354 spin_lock_irq(&mx3_cam
->lock
);
357 list_del_init(&buf
->queue
);
359 if (mx3_cam
->active
== buf
)
360 mx3_cam
->active
= NULL
;
362 spin_unlock_irqrestore(&mx3_cam
->lock
, flags
);
364 vb2_buffer_done(vb
, VB2_BUF_STATE_ERROR
);
367 static void mx3_videobuf_release(struct vb2_buffer
*vb
)
369 struct soc_camera_device
*icd
= soc_camera_from_vb2q(vb
->vb2_queue
);
370 struct soc_camera_host
*ici
= to_soc_camera_host(icd
->parent
);
371 struct mx3_camera_dev
*mx3_cam
= ici
->priv
;
372 struct mx3_camera_buffer
*buf
= to_mx3_vb(vb
);
373 struct dma_async_tx_descriptor
*txd
= buf
->txd
;
377 "Release%s DMA 0x%08x, queue %sempty\n",
378 mx3_cam
->active
== buf
? " active" : "", sg_dma_address(&buf
->sg
),
379 list_empty(&buf
->queue
) ? "" : "not ");
381 spin_lock_irqsave(&mx3_cam
->lock
, flags
);
383 if (mx3_cam
->active
== buf
)
384 mx3_cam
->active
= NULL
;
386 /* Doesn't hurt also if the list is empty */
387 list_del_init(&buf
->queue
);
388 buf
->state
= CSI_BUF_NEEDS_INIT
;
392 if (mx3_cam
->idmac_channel
[0])
396 spin_unlock_irqrestore(&mx3_cam
->lock
, flags
);
398 mx3_cam
->buf_total
-= vb2_plane_size(vb
, 0);
401 static int mx3_videobuf_init(struct vb2_buffer
*vb
)
403 struct soc_camera_device
*icd
= soc_camera_from_vb2q(vb
->vb2_queue
);
404 struct soc_camera_host
*ici
= to_soc_camera_host(icd
->parent
);
405 struct mx3_camera_dev
*mx3_cam
= ici
->priv
;
406 struct mx3_camera_buffer
*buf
= to_mx3_vb(vb
);
408 /* This is for locking debugging only */
409 INIT_LIST_HEAD(&buf
->queue
);
410 sg_init_table(&buf
->sg
, 1);
412 buf
->state
= CSI_BUF_NEEDS_INIT
;
414 mx3_cam
->buf_total
+= vb2_plane_size(vb
, 0);
419 static int mx3_stop_streaming(struct vb2_queue
*q
)
421 struct soc_camera_device
*icd
= soc_camera_from_vb2q(q
);
422 struct soc_camera_host
*ici
= to_soc_camera_host(icd
->parent
);
423 struct mx3_camera_dev
*mx3_cam
= ici
->priv
;
424 struct idmac_channel
*ichan
= mx3_cam
->idmac_channel
[0];
425 struct mx3_camera_buffer
*buf
, *tmp
;
429 struct dma_chan
*chan
= &ichan
->dma_chan
;
430 chan
->device
->device_control(chan
, DMA_PAUSE
, 0);
433 spin_lock_irqsave(&mx3_cam
->lock
, flags
);
435 mx3_cam
->active
= NULL
;
437 list_for_each_entry_safe(buf
, tmp
, &mx3_cam
->capture
, queue
) {
438 list_del_init(&buf
->queue
);
439 vb2_buffer_done(&buf
->vb
, VB2_BUF_STATE_ERROR
);
442 spin_unlock_irqrestore(&mx3_cam
->lock
, flags
);
447 static struct vb2_ops mx3_videobuf_ops
= {
448 .queue_setup
= mx3_videobuf_setup
,
449 .buf_queue
= mx3_videobuf_queue
,
450 .buf_cleanup
= mx3_videobuf_release
,
451 .buf_init
= mx3_videobuf_init
,
452 .wait_prepare
= soc_camera_unlock
,
453 .wait_finish
= soc_camera_lock
,
454 .stop_streaming
= mx3_stop_streaming
,
457 static int mx3_camera_init_videobuf(struct vb2_queue
*q
,
458 struct soc_camera_device
*icd
)
460 q
->type
= V4L2_BUF_TYPE_VIDEO_CAPTURE
;
461 q
->io_modes
= VB2_MMAP
| VB2_USERPTR
;
463 q
->ops
= &mx3_videobuf_ops
;
464 q
->mem_ops
= &vb2_dma_contig_memops
;
465 q
->buf_struct_size
= sizeof(struct mx3_camera_buffer
);
467 return vb2_queue_init(q
);
470 /* First part of ipu_csi_init_interface() */
471 static void mx3_camera_activate(struct mx3_camera_dev
*mx3_cam
,
472 struct soc_camera_device
*icd
)
477 /* Set default size: ipu_csi_set_window_size() */
478 csi_reg_write(mx3_cam
, (640 - 1) | ((480 - 1) << 16), CSI_ACT_FRM_SIZE
);
479 /* ...and position to 0:0: ipu_csi_set_window_pos() */
480 conf
= csi_reg_read(mx3_cam
, CSI_OUT_FRM_CTRL
) & 0xffff0000;
481 csi_reg_write(mx3_cam
, conf
, CSI_OUT_FRM_CTRL
);
483 /* We use only gated clock synchronisation mode so far */
484 conf
= 0 << CSI_SENS_CONF_SENS_PRTCL_SHIFT
;
486 /* Set generic data, platform-biggest bus-width */
487 conf
|= CSI_SENS_CONF_DATA_FMT_BAYER
;
489 if (mx3_cam
->platform_flags
& MX3_CAMERA_DATAWIDTH_15
)
490 conf
|= 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT
;
491 else if (mx3_cam
->platform_flags
& MX3_CAMERA_DATAWIDTH_10
)
492 conf
|= 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT
;
493 else if (mx3_cam
->platform_flags
& MX3_CAMERA_DATAWIDTH_8
)
494 conf
|= 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT
;
495 else/* if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4)*/
496 conf
|= 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT
;
498 if (mx3_cam
->platform_flags
& MX3_CAMERA_CLK_SRC
)
499 conf
|= 1 << CSI_SENS_CONF_SENS_CLKSRC_SHIFT
;
500 if (mx3_cam
->platform_flags
& MX3_CAMERA_EXT_VSYNC
)
501 conf
|= 1 << CSI_SENS_CONF_EXT_VSYNC_SHIFT
;
502 if (mx3_cam
->platform_flags
& MX3_CAMERA_DP
)
503 conf
|= 1 << CSI_SENS_CONF_DATA_POL_SHIFT
;
504 if (mx3_cam
->platform_flags
& MX3_CAMERA_PCP
)
505 conf
|= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT
;
506 if (mx3_cam
->platform_flags
& MX3_CAMERA_HSP
)
507 conf
|= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT
;
508 if (mx3_cam
->platform_flags
& MX3_CAMERA_VSP
)
509 conf
|= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT
;
511 /* ipu_csi_init_interface() */
512 csi_reg_write(mx3_cam
, conf
, CSI_SENS_CONF
);
514 clk_prepare_enable(mx3_cam
->clk
);
515 rate
= clk_round_rate(mx3_cam
->clk
, mx3_cam
->mclk
);
516 dev_dbg(icd
->parent
, "Set SENS_CONF to %x, rate %ld\n", conf
, rate
);
518 clk_set_rate(mx3_cam
->clk
, rate
);
521 /* Called with .video_lock held */
522 static int mx3_camera_add_device(struct soc_camera_device
*icd
)
524 struct soc_camera_host
*ici
= to_soc_camera_host(icd
->parent
);
525 struct mx3_camera_dev
*mx3_cam
= ici
->priv
;
530 mx3_camera_activate(mx3_cam
, icd
);
532 mx3_cam
->buf_total
= 0;
535 dev_info(icd
->parent
, "MX3 Camera driver attached to camera %d\n",
541 /* Called with .video_lock held */
542 static void mx3_camera_remove_device(struct soc_camera_device
*icd
)
544 struct soc_camera_host
*ici
= to_soc_camera_host(icd
->parent
);
545 struct mx3_camera_dev
*mx3_cam
= ici
->priv
;
546 struct idmac_channel
**ichan
= &mx3_cam
->idmac_channel
[0];
548 BUG_ON(icd
!= mx3_cam
->icd
);
551 dma_release_channel(&(*ichan
)->dma_chan
);
555 clk_disable_unprepare(mx3_cam
->clk
);
559 dev_info(icd
->parent
, "MX3 Camera driver detached from camera %d\n",
563 static int test_platform_param(struct mx3_camera_dev
*mx3_cam
,
564 unsigned char buswidth
, unsigned long *flags
)
567 * If requested data width is supported by the platform, use it or any
568 * possible lower value - i.MX31 is smart enough to shift bits
570 if (buswidth
> fls(mx3_cam
->width_flags
))
574 * Platform specified synchronization and pixel clock polarities are
575 * only a recommendation and are only used during probing. MX3x
576 * camera interface only works in master mode, i.e., uses HSYNC and
577 * VSYNC signals from the sensor
579 *flags
= V4L2_MBUS_MASTER
|
580 V4L2_MBUS_HSYNC_ACTIVE_HIGH
|
581 V4L2_MBUS_HSYNC_ACTIVE_LOW
|
582 V4L2_MBUS_VSYNC_ACTIVE_HIGH
|
583 V4L2_MBUS_VSYNC_ACTIVE_LOW
|
584 V4L2_MBUS_PCLK_SAMPLE_RISING
|
585 V4L2_MBUS_PCLK_SAMPLE_FALLING
|
586 V4L2_MBUS_DATA_ACTIVE_HIGH
|
587 V4L2_MBUS_DATA_ACTIVE_LOW
;
592 static int mx3_camera_try_bus_param(struct soc_camera_device
*icd
,
593 const unsigned int depth
)
595 struct v4l2_subdev
*sd
= soc_camera_to_subdev(icd
);
596 struct soc_camera_host
*ici
= to_soc_camera_host(icd
->parent
);
597 struct mx3_camera_dev
*mx3_cam
= ici
->priv
;
598 struct v4l2_mbus_config cfg
= {.type
= V4L2_MBUS_PARALLEL
,};
599 unsigned long bus_flags
, common_flags
;
600 int ret
= test_platform_param(mx3_cam
, depth
, &bus_flags
);
602 dev_dbg(icd
->parent
, "request bus width %d bit: %d\n", depth
, ret
);
607 ret
= v4l2_subdev_call(sd
, video
, g_mbus_config
, &cfg
);
609 common_flags
= soc_mbus_config_compatible(&cfg
,
612 dev_warn(icd
->parent
,
613 "Flags incompatible: camera 0x%x, host 0x%lx\n",
614 cfg
.flags
, bus_flags
);
617 } else if (ret
!= -ENOIOCTLCMD
) {
624 static bool chan_filter(struct dma_chan
*chan
, void *arg
)
626 struct dma_chan_request
*rq
= arg
;
627 struct mx3_camera_pdata
*pdata
;
629 if (!imx_dma_is_ipu(chan
))
635 pdata
= rq
->mx3_cam
->soc_host
.v4l2_dev
.dev
->platform_data
;
637 return rq
->id
== chan
->chan_id
&&
638 pdata
->dma_dev
== chan
->device
->dev
;
641 static const struct soc_mbus_pixelfmt mx3_camera_formats
[] = {
643 .fourcc
= V4L2_PIX_FMT_SBGGR8
,
644 .name
= "Bayer BGGR (sRGB) 8 bit",
645 .bits_per_sample
= 8,
646 .packing
= SOC_MBUS_PACKING_NONE
,
647 .order
= SOC_MBUS_ORDER_LE
,
648 .layout
= SOC_MBUS_LAYOUT_PACKED
,
650 .fourcc
= V4L2_PIX_FMT_GREY
,
651 .name
= "Monochrome 8 bit",
652 .bits_per_sample
= 8,
653 .packing
= SOC_MBUS_PACKING_NONE
,
654 .order
= SOC_MBUS_ORDER_LE
,
655 .layout
= SOC_MBUS_LAYOUT_PACKED
,
659 /* This will be corrected as we get more formats */
660 static bool mx3_camera_packing_supported(const struct soc_mbus_pixelfmt
*fmt
)
662 return fmt
->packing
== SOC_MBUS_PACKING_NONE
||
663 (fmt
->bits_per_sample
== 8 &&
664 fmt
->packing
== SOC_MBUS_PACKING_2X8_PADHI
) ||
665 (fmt
->bits_per_sample
> 8 &&
666 fmt
->packing
== SOC_MBUS_PACKING_EXTEND16
);
669 static int mx3_camera_get_formats(struct soc_camera_device
*icd
, unsigned int idx
,
670 struct soc_camera_format_xlate
*xlate
)
672 struct v4l2_subdev
*sd
= soc_camera_to_subdev(icd
);
673 struct device
*dev
= icd
->parent
;
674 int formats
= 0, ret
;
675 enum v4l2_mbus_pixelcode code
;
676 const struct soc_mbus_pixelfmt
*fmt
;
678 ret
= v4l2_subdev_call(sd
, video
, enum_mbus_fmt
, idx
, &code
);
680 /* No more formats */
683 fmt
= soc_mbus_get_fmtdesc(code
);
685 dev_warn(icd
->parent
,
686 "Unsupported format code #%u: %d\n", idx
, code
);
690 /* This also checks support for the requested bits-per-sample */
691 ret
= mx3_camera_try_bus_param(icd
, fmt
->bits_per_sample
);
696 case V4L2_MBUS_FMT_SBGGR10_1X10
:
699 xlate
->host_fmt
= &mx3_camera_formats
[0];
702 dev_dbg(dev
, "Providing format %s using code %d\n",
703 mx3_camera_formats
[0].name
, code
);
706 case V4L2_MBUS_FMT_Y10_1X10
:
709 xlate
->host_fmt
= &mx3_camera_formats
[1];
712 dev_dbg(dev
, "Providing format %s using code %d\n",
713 mx3_camera_formats
[1].name
, code
);
717 if (!mx3_camera_packing_supported(fmt
))
721 /* Generic pass-through */
724 xlate
->host_fmt
= fmt
;
726 dev_dbg(dev
, "Providing format %c%c%c%c in pass-through mode\n",
727 (fmt
->fourcc
>> (0*8)) & 0xFF,
728 (fmt
->fourcc
>> (1*8)) & 0xFF,
729 (fmt
->fourcc
>> (2*8)) & 0xFF,
730 (fmt
->fourcc
>> (3*8)) & 0xFF);
737 static void configure_geometry(struct mx3_camera_dev
*mx3_cam
,
738 unsigned int width
, unsigned int height
,
739 const struct soc_mbus_pixelfmt
*fmt
)
741 u32 ctrl
, width_field
, height_field
;
743 if (fourcc_to_ipu_pix(fmt
->fourcc
) == IPU_PIX_FMT_GENERIC
) {
745 * As the CSI will be configured to output BAYER, here
746 * the width parameter count the number of samples to
747 * capture to complete the whole image width.
749 unsigned int num
, den
;
750 int ret
= soc_mbus_samples_per_pixel(fmt
, &num
, &den
);
752 width
= width
* num
/ den
;
755 /* Setup frame size - this cannot be changed on-the-fly... */
756 width_field
= width
- 1;
757 height_field
= height
- 1;
758 csi_reg_write(mx3_cam
, width_field
| (height_field
<< 16), CSI_SENS_FRM_SIZE
);
760 csi_reg_write(mx3_cam
, width_field
<< 16, CSI_FLASH_STROBE_1
);
761 csi_reg_write(mx3_cam
, (height_field
<< 16) | 0x22, CSI_FLASH_STROBE_2
);
763 csi_reg_write(mx3_cam
, width_field
| (height_field
<< 16), CSI_ACT_FRM_SIZE
);
765 /* ...and position */
766 ctrl
= csi_reg_read(mx3_cam
, CSI_OUT_FRM_CTRL
) & 0xffff0000;
767 /* Sensor does the cropping */
768 csi_reg_write(mx3_cam
, ctrl
| 0 | (0 << 8), CSI_OUT_FRM_CTRL
);
771 static int acquire_dma_channel(struct mx3_camera_dev
*mx3_cam
)
774 struct dma_chan
*chan
;
775 struct idmac_channel
**ichan
= &mx3_cam
->idmac_channel
[0];
776 /* We have to use IDMAC_IC_7 for Bayer / generic data */
777 struct dma_chan_request rq
= {.mx3_cam
= mx3_cam
,
781 dma_cap_set(DMA_SLAVE
, mask
);
782 dma_cap_set(DMA_PRIVATE
, mask
);
783 chan
= dma_request_channel(mask
, chan_filter
, &rq
);
787 *ichan
= to_idmac_chan(chan
);
788 (*ichan
)->client
= mx3_cam
;
794 * FIXME: learn to use stride != width, then we can keep stride properly aligned
795 * and support arbitrary (even) widths.
797 static inline void stride_align(__u32
*width
)
799 if (ALIGN(*width
, 8) < 4096)
800 *width
= ALIGN(*width
, 8);
802 *width
= *width
& ~7;
806 * As long as we don't implement host-side cropping and scaling, we can use
807 * default g_crop and cropcap from soc_camera.c
809 static int mx3_camera_set_crop(struct soc_camera_device
*icd
,
812 struct v4l2_rect
*rect
= &a
->c
;
813 struct soc_camera_host
*ici
= to_soc_camera_host(icd
->parent
);
814 struct mx3_camera_dev
*mx3_cam
= ici
->priv
;
815 struct v4l2_subdev
*sd
= soc_camera_to_subdev(icd
);
816 struct v4l2_mbus_framefmt mf
;
819 soc_camera_limit_side(&rect
->left
, &rect
->width
, 0, 2, 4096);
820 soc_camera_limit_side(&rect
->top
, &rect
->height
, 0, 2, 4096);
822 ret
= v4l2_subdev_call(sd
, video
, s_crop
, a
);
826 /* The capture device might have changed its output sizes */
827 ret
= v4l2_subdev_call(sd
, video
, g_mbus_fmt
, &mf
);
831 if (mf
.code
!= icd
->current_fmt
->code
)
835 /* Ouch! We can only handle 8-byte aligned width... */
836 stride_align(&mf
.width
);
837 ret
= v4l2_subdev_call(sd
, video
, s_mbus_fmt
, &mf
);
842 if (mf
.width
!= icd
->user_width
|| mf
.height
!= icd
->user_height
)
843 configure_geometry(mx3_cam
, mf
.width
, mf
.height
,
844 icd
->current_fmt
->host_fmt
);
846 dev_dbg(icd
->parent
, "Sensor cropped %dx%d\n",
847 mf
.width
, mf
.height
);
849 icd
->user_width
= mf
.width
;
850 icd
->user_height
= mf
.height
;
855 static int mx3_camera_set_fmt(struct soc_camera_device
*icd
,
856 struct v4l2_format
*f
)
858 struct soc_camera_host
*ici
= to_soc_camera_host(icd
->parent
);
859 struct mx3_camera_dev
*mx3_cam
= ici
->priv
;
860 struct v4l2_subdev
*sd
= soc_camera_to_subdev(icd
);
861 const struct soc_camera_format_xlate
*xlate
;
862 struct v4l2_pix_format
*pix
= &f
->fmt
.pix
;
863 struct v4l2_mbus_framefmt mf
;
866 xlate
= soc_camera_xlate_by_fourcc(icd
, pix
->pixelformat
);
868 dev_warn(icd
->parent
, "Format %x not found\n",
873 stride_align(&pix
->width
);
874 dev_dbg(icd
->parent
, "Set format %dx%d\n", pix
->width
, pix
->height
);
877 * Might have to perform a complete interface initialisation like in
878 * ipu_csi_init_interface() in mxc_v4l2_s_param(). Also consider
882 configure_geometry(mx3_cam
, pix
->width
, pix
->height
, xlate
->host_fmt
);
884 mf
.width
= pix
->width
;
885 mf
.height
= pix
->height
;
886 mf
.field
= pix
->field
;
887 mf
.colorspace
= pix
->colorspace
;
888 mf
.code
= xlate
->code
;
890 ret
= v4l2_subdev_call(sd
, video
, s_mbus_fmt
, &mf
);
894 if (mf
.code
!= xlate
->code
)
897 if (!mx3_cam
->idmac_channel
[0]) {
898 ret
= acquire_dma_channel(mx3_cam
);
903 pix
->width
= mf
.width
;
904 pix
->height
= mf
.height
;
905 pix
->field
= mf
.field
;
906 mx3_cam
->field
= mf
.field
;
907 pix
->colorspace
= mf
.colorspace
;
908 icd
->current_fmt
= xlate
;
910 dev_dbg(icd
->parent
, "Sensor set %dx%d\n", pix
->width
, pix
->height
);
915 static int mx3_camera_try_fmt(struct soc_camera_device
*icd
,
916 struct v4l2_format
*f
)
918 struct v4l2_subdev
*sd
= soc_camera_to_subdev(icd
);
919 const struct soc_camera_format_xlate
*xlate
;
920 struct v4l2_pix_format
*pix
= &f
->fmt
.pix
;
921 struct v4l2_mbus_framefmt mf
;
922 __u32 pixfmt
= pix
->pixelformat
;
925 xlate
= soc_camera_xlate_by_fourcc(icd
, pixfmt
);
926 if (pixfmt
&& !xlate
) {
927 dev_warn(icd
->parent
, "Format %x not found\n", pixfmt
);
931 /* limit to MX3 hardware capabilities */
932 if (pix
->height
> 4096)
934 if (pix
->width
> 4096)
937 /* limit to sensor capabilities */
938 mf
.width
= pix
->width
;
939 mf
.height
= pix
->height
;
940 mf
.field
= pix
->field
;
941 mf
.colorspace
= pix
->colorspace
;
942 mf
.code
= xlate
->code
;
944 ret
= v4l2_subdev_call(sd
, video
, try_mbus_fmt
, &mf
);
948 pix
->width
= mf
.width
;
949 pix
->height
= mf
.height
;
950 pix
->colorspace
= mf
.colorspace
;
954 pix
->field
= V4L2_FIELD_NONE
;
956 case V4L2_FIELD_NONE
:
959 dev_err(icd
->parent
, "Field type %d unsupported.\n",
967 static int mx3_camera_reqbufs(struct soc_camera_device
*icd
,
968 struct v4l2_requestbuffers
*p
)
973 static unsigned int mx3_camera_poll(struct file
*file
, poll_table
*pt
)
975 struct soc_camera_device
*icd
= file
->private_data
;
977 return vb2_poll(&icd
->vb2_vidq
, file
, pt
);
980 static int mx3_camera_querycap(struct soc_camera_host
*ici
,
981 struct v4l2_capability
*cap
)
983 /* cap->name is set by the firendly caller:-> */
984 strlcpy(cap
->card
, "i.MX3x Camera", sizeof(cap
->card
));
985 cap
->capabilities
= V4L2_CAP_VIDEO_CAPTURE
| V4L2_CAP_STREAMING
;
990 static int mx3_camera_set_bus_param(struct soc_camera_device
*icd
)
992 struct v4l2_subdev
*sd
= soc_camera_to_subdev(icd
);
993 struct soc_camera_host
*ici
= to_soc_camera_host(icd
->parent
);
994 struct mx3_camera_dev
*mx3_cam
= ici
->priv
;
995 struct v4l2_mbus_config cfg
= {.type
= V4L2_MBUS_PARALLEL
,};
996 u32 pixfmt
= icd
->current_fmt
->host_fmt
->fourcc
;
997 unsigned long bus_flags
, common_flags
;
999 const struct soc_mbus_pixelfmt
*fmt
;
1002 const struct soc_camera_format_xlate
*xlate
;
1003 struct device
*dev
= icd
->parent
;
1005 fmt
= soc_mbus_get_fmtdesc(icd
->current_fmt
->code
);
1009 xlate
= soc_camera_xlate_by_fourcc(icd
, pixfmt
);
1011 dev_warn(dev
, "Format %x not found\n", pixfmt
);
1015 buswidth
= fmt
->bits_per_sample
;
1016 ret
= test_platform_param(mx3_cam
, buswidth
, &bus_flags
);
1018 dev_dbg(dev
, "requested bus width %d bit: %d\n", buswidth
, ret
);
1023 ret
= v4l2_subdev_call(sd
, video
, g_mbus_config
, &cfg
);
1025 common_flags
= soc_mbus_config_compatible(&cfg
,
1027 if (!common_flags
) {
1028 dev_warn(icd
->parent
,
1029 "Flags incompatible: camera 0x%x, host 0x%lx\n",
1030 cfg
.flags
, bus_flags
);
1033 } else if (ret
!= -ENOIOCTLCMD
) {
1036 common_flags
= bus_flags
;
1039 dev_dbg(dev
, "Flags cam: 0x%x host: 0x%lx common: 0x%lx\n",
1040 cfg
.flags
, bus_flags
, common_flags
);
1042 /* Make choices, based on platform preferences */
1043 if ((common_flags
& V4L2_MBUS_HSYNC_ACTIVE_HIGH
) &&
1044 (common_flags
& V4L2_MBUS_HSYNC_ACTIVE_LOW
)) {
1045 if (mx3_cam
->platform_flags
& MX3_CAMERA_HSP
)
1046 common_flags
&= ~V4L2_MBUS_HSYNC_ACTIVE_HIGH
;
1048 common_flags
&= ~V4L2_MBUS_HSYNC_ACTIVE_LOW
;
1051 if ((common_flags
& V4L2_MBUS_VSYNC_ACTIVE_HIGH
) &&
1052 (common_flags
& V4L2_MBUS_VSYNC_ACTIVE_LOW
)) {
1053 if (mx3_cam
->platform_flags
& MX3_CAMERA_VSP
)
1054 common_flags
&= ~V4L2_MBUS_VSYNC_ACTIVE_HIGH
;
1056 common_flags
&= ~V4L2_MBUS_VSYNC_ACTIVE_LOW
;
1059 if ((common_flags
& V4L2_MBUS_DATA_ACTIVE_HIGH
) &&
1060 (common_flags
& V4L2_MBUS_DATA_ACTIVE_LOW
)) {
1061 if (mx3_cam
->platform_flags
& MX3_CAMERA_DP
)
1062 common_flags
&= ~V4L2_MBUS_DATA_ACTIVE_HIGH
;
1064 common_flags
&= ~V4L2_MBUS_DATA_ACTIVE_LOW
;
1067 if ((common_flags
& V4L2_MBUS_PCLK_SAMPLE_RISING
) &&
1068 (common_flags
& V4L2_MBUS_PCLK_SAMPLE_FALLING
)) {
1069 if (mx3_cam
->platform_flags
& MX3_CAMERA_PCP
)
1070 common_flags
&= ~V4L2_MBUS_PCLK_SAMPLE_RISING
;
1072 common_flags
&= ~V4L2_MBUS_PCLK_SAMPLE_FALLING
;
1075 cfg
.flags
= common_flags
;
1076 ret
= v4l2_subdev_call(sd
, video
, s_mbus_config
, &cfg
);
1077 if (ret
< 0 && ret
!= -ENOIOCTLCMD
) {
1078 dev_dbg(dev
, "camera s_mbus_config(0x%lx) returned %d\n",
1084 * So far only gated clock mode is supported. Add a line
1085 * (3 << CSI_SENS_CONF_SENS_PRTCL_SHIFT) |
1086 * below and select the required mode when supporting other
1087 * synchronisation protocols.
1089 sens_conf
= csi_reg_read(mx3_cam
, CSI_SENS_CONF
) &
1090 ~((1 << CSI_SENS_CONF_VSYNC_POL_SHIFT
) |
1091 (1 << CSI_SENS_CONF_HSYNC_POL_SHIFT
) |
1092 (1 << CSI_SENS_CONF_DATA_POL_SHIFT
) |
1093 (1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT
) |
1094 (3 << CSI_SENS_CONF_DATA_FMT_SHIFT
) |
1095 (3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT
));
1097 /* TODO: Support RGB and YUV formats */
1099 /* This has been set in mx3_camera_activate(), but we clear it above */
1100 sens_conf
|= CSI_SENS_CONF_DATA_FMT_BAYER
;
1102 if (common_flags
& V4L2_MBUS_PCLK_SAMPLE_FALLING
)
1103 sens_conf
|= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT
;
1104 if (common_flags
& V4L2_MBUS_HSYNC_ACTIVE_LOW
)
1105 sens_conf
|= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT
;
1106 if (common_flags
& V4L2_MBUS_VSYNC_ACTIVE_LOW
)
1107 sens_conf
|= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT
;
1108 if (common_flags
& V4L2_MBUS_DATA_ACTIVE_LOW
)
1109 sens_conf
|= 1 << CSI_SENS_CONF_DATA_POL_SHIFT
;
1111 /* Just do what we're asked to do */
1112 switch (xlate
->host_fmt
->bits_per_sample
) {
1114 dw
= 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT
;
1117 dw
= 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT
;
1120 dw
= 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT
;
1124 * Actually it can only be 15 now, default is just to silence
1128 dw
= 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT
;
1131 csi_reg_write(mx3_cam
, sens_conf
| dw
, CSI_SENS_CONF
);
1133 dev_dbg(dev
, "Set SENS_CONF to %x\n", sens_conf
| dw
);
1138 static struct soc_camera_host_ops mx3_soc_camera_host_ops
= {
1139 .owner
= THIS_MODULE
,
1140 .add
= mx3_camera_add_device
,
1141 .remove
= mx3_camera_remove_device
,
1142 .set_crop
= mx3_camera_set_crop
,
1143 .set_fmt
= mx3_camera_set_fmt
,
1144 .try_fmt
= mx3_camera_try_fmt
,
1145 .get_formats
= mx3_camera_get_formats
,
1146 .init_videobuf2
= mx3_camera_init_videobuf
,
1147 .reqbufs
= mx3_camera_reqbufs
,
1148 .poll
= mx3_camera_poll
,
1149 .querycap
= mx3_camera_querycap
,
1150 .set_bus_param
= mx3_camera_set_bus_param
,
1153 static int __devinit
mx3_camera_probe(struct platform_device
*pdev
)
1155 struct mx3_camera_dev
*mx3_cam
;
1156 struct resource
*res
;
1159 struct soc_camera_host
*soc_host
;
1161 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1167 mx3_cam
= vzalloc(sizeof(*mx3_cam
));
1169 dev_err(&pdev
->dev
, "Could not allocate mx3 camera object\n");
1174 mx3_cam
->clk
= clk_get(&pdev
->dev
, NULL
);
1175 if (IS_ERR(mx3_cam
->clk
)) {
1176 err
= PTR_ERR(mx3_cam
->clk
);
1180 mx3_cam
->pdata
= pdev
->dev
.platform_data
;
1181 mx3_cam
->platform_flags
= mx3_cam
->pdata
->flags
;
1182 if (!(mx3_cam
->platform_flags
& (MX3_CAMERA_DATAWIDTH_4
|
1183 MX3_CAMERA_DATAWIDTH_8
| MX3_CAMERA_DATAWIDTH_10
|
1184 MX3_CAMERA_DATAWIDTH_15
))) {
1186 * Platform hasn't set available data widths. This is bad.
1187 * Warn and use a default.
1189 dev_warn(&pdev
->dev
, "WARNING! Platform hasn't set available "
1190 "data widths, using default 8 bit\n");
1191 mx3_cam
->platform_flags
|= MX3_CAMERA_DATAWIDTH_8
;
1193 if (mx3_cam
->platform_flags
& MX3_CAMERA_DATAWIDTH_4
)
1194 mx3_cam
->width_flags
= 1 << 3;
1195 if (mx3_cam
->platform_flags
& MX3_CAMERA_DATAWIDTH_8
)
1196 mx3_cam
->width_flags
|= 1 << 7;
1197 if (mx3_cam
->platform_flags
& MX3_CAMERA_DATAWIDTH_10
)
1198 mx3_cam
->width_flags
|= 1 << 9;
1199 if (mx3_cam
->platform_flags
& MX3_CAMERA_DATAWIDTH_15
)
1200 mx3_cam
->width_flags
|= 1 << 14;
1202 mx3_cam
->mclk
= mx3_cam
->pdata
->mclk_10khz
* 10000;
1203 if (!mx3_cam
->mclk
) {
1204 dev_warn(&pdev
->dev
,
1205 "mclk_10khz == 0! Please, fix your platform data. "
1206 "Using default 20MHz\n");
1207 mx3_cam
->mclk
= 20000000;
1210 /* list of video-buffers */
1211 INIT_LIST_HEAD(&mx3_cam
->capture
);
1212 spin_lock_init(&mx3_cam
->lock
);
1214 base
= ioremap(res
->start
, resource_size(res
));
1216 pr_err("Couldn't map %x@%x\n", resource_size(res
), res
->start
);
1221 mx3_cam
->base
= base
;
1223 soc_host
= &mx3_cam
->soc_host
;
1224 soc_host
->drv_name
= MX3_CAM_DRV_NAME
;
1225 soc_host
->ops
= &mx3_soc_camera_host_ops
;
1226 soc_host
->priv
= mx3_cam
;
1227 soc_host
->v4l2_dev
.dev
= &pdev
->dev
;
1228 soc_host
->nr
= pdev
->id
;
1230 mx3_cam
->alloc_ctx
= vb2_dma_contig_init_ctx(&pdev
->dev
);
1231 if (IS_ERR(mx3_cam
->alloc_ctx
)) {
1232 err
= PTR_ERR(mx3_cam
->alloc_ctx
);
1236 err
= soc_camera_host_register(soc_host
);
1240 /* IDMAC interface */
1246 vb2_dma_contig_cleanup_ctx(mx3_cam
->alloc_ctx
);
1250 clk_put(mx3_cam
->clk
);
1258 static int __devexit
mx3_camera_remove(struct platform_device
*pdev
)
1260 struct soc_camera_host
*soc_host
= to_soc_camera_host(&pdev
->dev
);
1261 struct mx3_camera_dev
*mx3_cam
= container_of(soc_host
,
1262 struct mx3_camera_dev
, soc_host
);
1264 clk_put(mx3_cam
->clk
);
1266 soc_camera_host_unregister(soc_host
);
1268 iounmap(mx3_cam
->base
);
1271 * The channel has either not been allocated,
1272 * or should have been released
1274 if (WARN_ON(mx3_cam
->idmac_channel
[0]))
1275 dma_release_channel(&mx3_cam
->idmac_channel
[0]->dma_chan
);
1277 vb2_dma_contig_cleanup_ctx(mx3_cam
->alloc_ctx
);
1286 static struct platform_driver mx3_camera_driver
= {
1288 .name
= MX3_CAM_DRV_NAME
,
1290 .probe
= mx3_camera_probe
,
1291 .remove
= __devexit_p(mx3_camera_remove
),
1294 module_platform_driver(mx3_camera_driver
);
1296 MODULE_DESCRIPTION("i.MX3x SoC Camera Host driver");
1297 MODULE_AUTHOR("Guennadi Liakhovetski <lg@denx.de>");
1298 MODULE_LICENSE("GPL v2");
1299 MODULE_VERSION("0.2.3");
1300 MODULE_ALIAS("platform:" MX3_CAM_DRV_NAME
);