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[media] omap3isp: Fix frame number propagation
[deliverable/linux.git] / drivers / media / video / omap3isp / isp.c
1 /*
2 * isp.c
3 *
4 * TI OMAP3 ISP - Core
5 *
6 * Copyright (C) 2006-2010 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments, Inc.
8 *
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
11 *
12 * Contributors:
13 * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 * Sakari Ailus <sakari.ailus@iki.fi>
15 * David Cohen <dacohen@gmail.com>
16 * Stanimir Varbanov <svarbanov@mm-sol.com>
17 * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
18 * Tuukka Toivonen <tuukkat76@gmail.com>
19 * Sergio Aguirre <saaguirre@ti.com>
20 * Antti Koskipaa <akoskipa@gmail.com>
21 * Ivan T. Ivanov <iivanov@mm-sol.com>
22 * RaniSuneela <r-m@ti.com>
23 * Atanas Filipov <afilipov@mm-sol.com>
24 * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
25 * Hiroshi DOYU <hiroshi.doyu@nokia.com>
26 * Nayden Kanchev <nkanchev@mm-sol.com>
27 * Phil Carmody <ext-phil.2.carmody@nokia.com>
28 * Artem Bityutskiy <artem.bityutskiy@nokia.com>
29 * Dominic Curran <dcurran@ti.com>
30 * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
31 * Pallavi Kulkarni <p-kulkarni@ti.com>
32 * Vaibhav Hiremath <hvaibhav@ti.com>
33 * Mohit Jalori <mjalori@ti.com>
34 * Sameer Venkatraman <sameerv@ti.com>
35 * Senthilvadivu Guruswamy <svadivu@ti.com>
36 * Thara Gopinath <thara@ti.com>
37 * Toni Leinonen <toni.leinonen@nokia.com>
38 * Troy Laramy <t-laramy@ti.com>
39 *
40 * This program is free software; you can redistribute it and/or modify
41 * it under the terms of the GNU General Public License version 2 as
42 * published by the Free Software Foundation.
43 *
44 * This program is distributed in the hope that it will be useful, but
45 * WITHOUT ANY WARRANTY; without even the implied warranty of
46 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
47 * General Public License for more details.
48 *
49 * You should have received a copy of the GNU General Public License
50 * along with this program; if not, write to the Free Software
51 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
52 * 02110-1301 USA
53 */
54
55 #include <asm/cacheflush.h>
56
57 #include <linux/clk.h>
58 #include <linux/delay.h>
59 #include <linux/device.h>
60 #include <linux/dma-mapping.h>
61 #include <linux/i2c.h>
62 #include <linux/interrupt.h>
63 #include <linux/module.h>
64 #include <linux/platform_device.h>
65 #include <linux/regulator/consumer.h>
66 #include <linux/slab.h>
67 #include <linux/sched.h>
68 #include <linux/vmalloc.h>
69
70 #include <media/v4l2-common.h>
71 #include <media/v4l2-device.h>
72
73 #include "isp.h"
74 #include "ispreg.h"
75 #include "ispccdc.h"
76 #include "isppreview.h"
77 #include "ispresizer.h"
78 #include "ispcsi2.h"
79 #include "ispccp2.h"
80 #include "isph3a.h"
81 #include "isphist.h"
82
83 static unsigned int autoidle;
84 module_param(autoidle, int, 0444);
85 MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
86
87 static void isp_save_ctx(struct isp_device *isp);
88
89 static void isp_restore_ctx(struct isp_device *isp);
90
91 static const struct isp_res_mapping isp_res_maps[] = {
92 {
93 .isp_rev = ISP_REVISION_2_0,
94 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
95 1 << OMAP3_ISP_IOMEM_CCP2 |
96 1 << OMAP3_ISP_IOMEM_CCDC |
97 1 << OMAP3_ISP_IOMEM_HIST |
98 1 << OMAP3_ISP_IOMEM_H3A |
99 1 << OMAP3_ISP_IOMEM_PREV |
100 1 << OMAP3_ISP_IOMEM_RESZ |
101 1 << OMAP3_ISP_IOMEM_SBL |
102 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
103 1 << OMAP3_ISP_IOMEM_CSIPHY2,
104 },
105 {
106 .isp_rev = ISP_REVISION_15_0,
107 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
108 1 << OMAP3_ISP_IOMEM_CCP2 |
109 1 << OMAP3_ISP_IOMEM_CCDC |
110 1 << OMAP3_ISP_IOMEM_HIST |
111 1 << OMAP3_ISP_IOMEM_H3A |
112 1 << OMAP3_ISP_IOMEM_PREV |
113 1 << OMAP3_ISP_IOMEM_RESZ |
114 1 << OMAP3_ISP_IOMEM_SBL |
115 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
116 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
117 1 << OMAP3_ISP_IOMEM_CSI2A_REGS2 |
118 1 << OMAP3_ISP_IOMEM_CSI2C_REGS1 |
119 1 << OMAP3_ISP_IOMEM_CSIPHY1 |
120 1 << OMAP3_ISP_IOMEM_CSI2C_REGS2,
121 },
122 };
123
124 /* Structure for saving/restoring ISP module registers */
125 static struct isp_reg isp_reg_list[] = {
126 {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
127 {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
128 {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
129 {0, ISP_TOK_TERM, 0}
130 };
131
132 /*
133 * omap3isp_flush - Post pending L3 bus writes by doing a register readback
134 * @isp: OMAP3 ISP device
135 *
136 * In order to force posting of pending writes, we need to write and
137 * readback the same register, in this case the revision register.
138 *
139 * See this link for reference:
140 * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
141 */
142 void omap3isp_flush(struct isp_device *isp)
143 {
144 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
145 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
146 }
147
148 /*
149 * isp_enable_interrupts - Enable ISP interrupts.
150 * @isp: OMAP3 ISP device
151 */
152 static void isp_enable_interrupts(struct isp_device *isp)
153 {
154 static const u32 irq = IRQ0ENABLE_CSIA_IRQ
155 | IRQ0ENABLE_CSIB_IRQ
156 | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
157 | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
158 | IRQ0ENABLE_CCDC_VD0_IRQ
159 | IRQ0ENABLE_CCDC_VD1_IRQ
160 | IRQ0ENABLE_HS_VS_IRQ
161 | IRQ0ENABLE_HIST_DONE_IRQ
162 | IRQ0ENABLE_H3A_AWB_DONE_IRQ
163 | IRQ0ENABLE_H3A_AF_DONE_IRQ
164 | IRQ0ENABLE_PRV_DONE_IRQ
165 | IRQ0ENABLE_RSZ_DONE_IRQ;
166
167 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
168 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
169 }
170
171 /*
172 * isp_disable_interrupts - Disable ISP interrupts.
173 * @isp: OMAP3 ISP device
174 */
175 static void isp_disable_interrupts(struct isp_device *isp)
176 {
177 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
178 }
179
180 /**
181 * isp_set_xclk - Configures the specified cam_xclk to the desired frequency.
182 * @isp: OMAP3 ISP device
183 * @xclk: Desired frequency of the clock in Hz. 0 = stable low, 1 is stable high
184 * @xclksel: XCLK to configure (0 = A, 1 = B).
185 *
186 * Configures the specified MCLK divisor in the ISP timing control register
187 * (TCTRL_CTRL) to generate the desired xclk clock value.
188 *
189 * Divisor = cam_mclk_hz / xclk
190 *
191 * Returns the final frequency that is actually being generated
192 **/
193 static u32 isp_set_xclk(struct isp_device *isp, u32 xclk, u8 xclksel)
194 {
195 u32 divisor;
196 u32 currentxclk;
197 unsigned long mclk_hz;
198
199 if (!omap3isp_get(isp))
200 return 0;
201
202 mclk_hz = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
203
204 if (xclk >= mclk_hz) {
205 divisor = ISPTCTRL_CTRL_DIV_BYPASS;
206 currentxclk = mclk_hz;
207 } else if (xclk >= 2) {
208 divisor = mclk_hz / xclk;
209 if (divisor >= ISPTCTRL_CTRL_DIV_BYPASS)
210 divisor = ISPTCTRL_CTRL_DIV_BYPASS - 1;
211 currentxclk = mclk_hz / divisor;
212 } else {
213 divisor = xclk;
214 currentxclk = 0;
215 }
216
217 switch (xclksel) {
218 case ISP_XCLK_A:
219 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
220 ISPTCTRL_CTRL_DIVA_MASK,
221 divisor << ISPTCTRL_CTRL_DIVA_SHIFT);
222 dev_dbg(isp->dev, "isp_set_xclk(): cam_xclka set to %d Hz\n",
223 currentxclk);
224 break;
225 case ISP_XCLK_B:
226 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
227 ISPTCTRL_CTRL_DIVB_MASK,
228 divisor << ISPTCTRL_CTRL_DIVB_SHIFT);
229 dev_dbg(isp->dev, "isp_set_xclk(): cam_xclkb set to %d Hz\n",
230 currentxclk);
231 break;
232 case ISP_XCLK_NONE:
233 default:
234 omap3isp_put(isp);
235 dev_dbg(isp->dev, "ISP_ERR: isp_set_xclk(): Invalid requested "
236 "xclk. Must be 0 (A) or 1 (B).\n");
237 return -EINVAL;
238 }
239
240 /* Do we go from stable whatever to clock? */
241 if (divisor >= 2 && isp->xclk_divisor[xclksel - 1] < 2)
242 omap3isp_get(isp);
243 /* Stopping the clock. */
244 else if (divisor < 2 && isp->xclk_divisor[xclksel - 1] >= 2)
245 omap3isp_put(isp);
246
247 isp->xclk_divisor[xclksel - 1] = divisor;
248
249 omap3isp_put(isp);
250
251 return currentxclk;
252 }
253
254 /*
255 * isp_power_settings - Sysconfig settings, for Power Management.
256 * @isp: OMAP3 ISP device
257 * @idle: Consider idle state.
258 *
259 * Sets the power settings for the ISP, and SBL bus.
260 */
261 static void isp_power_settings(struct isp_device *isp, int idle)
262 {
263 isp_reg_writel(isp,
264 ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
265 ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
266 ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
267 ((isp->revision == ISP_REVISION_15_0) ?
268 ISP_SYSCONFIG_AUTOIDLE : 0),
269 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
270
271 if (isp->autoidle)
272 isp_reg_writel(isp, ISPCTRL_SBL_AUTOIDLE, OMAP3_ISP_IOMEM_MAIN,
273 ISP_CTRL);
274 }
275
276 /*
277 * Configure the bridge and lane shifter. Valid inputs are
278 *
279 * CCDC_INPUT_PARALLEL: Parallel interface
280 * CCDC_INPUT_CSI2A: CSI2a receiver
281 * CCDC_INPUT_CCP2B: CCP2b receiver
282 * CCDC_INPUT_CSI2C: CSI2c receiver
283 *
284 * The bridge and lane shifter are configured according to the selected input
285 * and the ISP platform data.
286 */
287 void omap3isp_configure_bridge(struct isp_device *isp,
288 enum ccdc_input_entity input,
289 const struct isp_parallel_platform_data *pdata,
290 unsigned int shift)
291 {
292 u32 ispctrl_val;
293
294 ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
295 ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
296 ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
297 ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
298 ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
299
300 switch (input) {
301 case CCDC_INPUT_PARALLEL:
302 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
303 ispctrl_val |= pdata->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
304 ispctrl_val |= pdata->bridge << ISPCTRL_PAR_BRIDGE_SHIFT;
305 shift += pdata->data_lane_shift * 2;
306 break;
307
308 case CCDC_INPUT_CSI2A:
309 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
310 break;
311
312 case CCDC_INPUT_CCP2B:
313 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
314 break;
315
316 case CCDC_INPUT_CSI2C:
317 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
318 break;
319
320 default:
321 return;
322 }
323
324 ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
325
326 ispctrl_val &= ~ISPCTRL_SYNC_DETECT_MASK;
327 ispctrl_val |= ISPCTRL_SYNC_DETECT_VSRISE;
328
329 isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
330 }
331
332 /**
333 * isp_set_pixel_clock - Configures the ISP pixel clock
334 * @isp: OMAP3 ISP device
335 * @pixelclk: Average pixel clock in Hz
336 *
337 * Set the average pixel clock required by the sensor. The ISP will use the
338 * lowest possible memory bandwidth settings compatible with the clock.
339 **/
340 static void isp_set_pixel_clock(struct isp_device *isp, unsigned int pixelclk)
341 {
342 isp->isp_ccdc.vpcfg.pixelclk = pixelclk;
343 }
344
345 void omap3isp_hist_dma_done(struct isp_device *isp)
346 {
347 if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
348 omap3isp_stat_pcr_busy(&isp->isp_hist)) {
349 /* Histogram cannot be enabled in this frame anymore */
350 atomic_set(&isp->isp_hist.buf_err, 1);
351 dev_dbg(isp->dev, "hist: Out of synchronization with "
352 "CCDC. Ignoring next buffer.\n");
353 }
354 }
355
356 static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
357 {
358 static const char *name[] = {
359 "CSIA_IRQ",
360 "res1",
361 "res2",
362 "CSIB_LCM_IRQ",
363 "CSIB_IRQ",
364 "res5",
365 "res6",
366 "res7",
367 "CCDC_VD0_IRQ",
368 "CCDC_VD1_IRQ",
369 "CCDC_VD2_IRQ",
370 "CCDC_ERR_IRQ",
371 "H3A_AF_DONE_IRQ",
372 "H3A_AWB_DONE_IRQ",
373 "res14",
374 "res15",
375 "HIST_DONE_IRQ",
376 "CCDC_LSC_DONE",
377 "CCDC_LSC_PREFETCH_COMPLETED",
378 "CCDC_LSC_PREFETCH_ERROR",
379 "PRV_DONE_IRQ",
380 "CBUFF_IRQ",
381 "res22",
382 "res23",
383 "RSZ_DONE_IRQ",
384 "OVF_IRQ",
385 "res26",
386 "res27",
387 "MMU_ERR_IRQ",
388 "OCP_ERR_IRQ",
389 "SEC_ERR_IRQ",
390 "HS_VS_IRQ",
391 };
392 int i;
393
394 dev_dbg(isp->dev, "ISP IRQ: ");
395
396 for (i = 0; i < ARRAY_SIZE(name); i++) {
397 if ((1 << i) & irqstatus)
398 printk(KERN_CONT "%s ", name[i]);
399 }
400 printk(KERN_CONT "\n");
401 }
402
403 static void isp_isr_sbl(struct isp_device *isp)
404 {
405 struct device *dev = isp->dev;
406 struct isp_pipeline *pipe;
407 u32 sbl_pcr;
408
409 /*
410 * Handle shared buffer logic overflows for video buffers.
411 * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
412 */
413 sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
414 isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
415 sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
416
417 if (sbl_pcr)
418 dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
419
420 if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) {
421 pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);
422 if (pipe != NULL)
423 pipe->error = true;
424 }
425
426 if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) {
427 pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);
428 if (pipe != NULL)
429 pipe->error = true;
430 }
431
432 if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) {
433 pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);
434 if (pipe != NULL)
435 pipe->error = true;
436 }
437
438 if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
439 pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);
440 if (pipe != NULL)
441 pipe->error = true;
442 }
443
444 if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
445 | ISPSBL_PCR_RSZ2_WBL_OVF
446 | ISPSBL_PCR_RSZ3_WBL_OVF
447 | ISPSBL_PCR_RSZ4_WBL_OVF)) {
448 pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);
449 if (pipe != NULL)
450 pipe->error = true;
451 }
452
453 if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
454 omap3isp_stat_sbl_overflow(&isp->isp_af);
455
456 if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
457 omap3isp_stat_sbl_overflow(&isp->isp_aewb);
458 }
459
460 /*
461 * isp_isr - Interrupt Service Routine for Camera ISP module.
462 * @irq: Not used currently.
463 * @_isp: Pointer to the OMAP3 ISP device
464 *
465 * Handles the corresponding callback if plugged in.
466 *
467 * Returns IRQ_HANDLED when IRQ was correctly handled, or IRQ_NONE when the
468 * IRQ wasn't handled.
469 */
470 static irqreturn_t isp_isr(int irq, void *_isp)
471 {
472 static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
473 IRQ0STATUS_CCDC_LSC_DONE_IRQ |
474 IRQ0STATUS_CCDC_VD0_IRQ |
475 IRQ0STATUS_CCDC_VD1_IRQ |
476 IRQ0STATUS_HS_VS_IRQ;
477 struct isp_device *isp = _isp;
478 u32 irqstatus;
479
480 irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
481 isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
482
483 isp_isr_sbl(isp);
484
485 if (irqstatus & IRQ0STATUS_CSIA_IRQ)
486 omap3isp_csi2_isr(&isp->isp_csi2a);
487
488 if (irqstatus & IRQ0STATUS_CSIB_IRQ)
489 omap3isp_ccp2_isr(&isp->isp_ccp2);
490
491 if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
492 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
493 omap3isp_preview_isr_frame_sync(&isp->isp_prev);
494 if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
495 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
496 omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
497 omap3isp_stat_isr_frame_sync(&isp->isp_af);
498 omap3isp_stat_isr_frame_sync(&isp->isp_hist);
499 }
500
501 if (irqstatus & ccdc_events)
502 omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
503
504 if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
505 if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
506 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
507 omap3isp_preview_isr(&isp->isp_prev);
508 }
509
510 if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
511 omap3isp_resizer_isr(&isp->isp_res);
512
513 if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
514 omap3isp_stat_isr(&isp->isp_aewb);
515
516 if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
517 omap3isp_stat_isr(&isp->isp_af);
518
519 if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
520 omap3isp_stat_isr(&isp->isp_hist);
521
522 omap3isp_flush(isp);
523
524 #if defined(DEBUG) && defined(ISP_ISR_DEBUG)
525 isp_isr_dbg(isp, irqstatus);
526 #endif
527
528 return IRQ_HANDLED;
529 }
530
531 /* -----------------------------------------------------------------------------
532 * Pipeline power management
533 *
534 * Entities must be powered up when part of a pipeline that contains at least
535 * one open video device node.
536 *
537 * To achieve this use the entity use_count field to track the number of users.
538 * For entities corresponding to video device nodes the use_count field stores
539 * the users count of the node. For entities corresponding to subdevs the
540 * use_count field stores the total number of users of all video device nodes
541 * in the pipeline.
542 *
543 * The omap3isp_pipeline_pm_use() function must be called in the open() and
544 * close() handlers of video device nodes. It increments or decrements the use
545 * count of all subdev entities in the pipeline.
546 *
547 * To react to link management on powered pipelines, the link setup notification
548 * callback updates the use count of all entities in the source and sink sides
549 * of the link.
550 */
551
552 /*
553 * isp_pipeline_pm_use_count - Count the number of users of a pipeline
554 * @entity: The entity
555 *
556 * Return the total number of users of all video device nodes in the pipeline.
557 */
558 static int isp_pipeline_pm_use_count(struct media_entity *entity)
559 {
560 struct media_entity_graph graph;
561 int use = 0;
562
563 media_entity_graph_walk_start(&graph, entity);
564
565 while ((entity = media_entity_graph_walk_next(&graph))) {
566 if (media_entity_type(entity) == MEDIA_ENT_T_DEVNODE)
567 use += entity->use_count;
568 }
569
570 return use;
571 }
572
573 /*
574 * isp_pipeline_pm_power_one - Apply power change to an entity
575 * @entity: The entity
576 * @change: Use count change
577 *
578 * Change the entity use count by @change. If the entity is a subdev update its
579 * power state by calling the core::s_power operation when the use count goes
580 * from 0 to != 0 or from != 0 to 0.
581 *
582 * Return 0 on success or a negative error code on failure.
583 */
584 static int isp_pipeline_pm_power_one(struct media_entity *entity, int change)
585 {
586 struct v4l2_subdev *subdev;
587 int ret;
588
589 subdev = media_entity_type(entity) == MEDIA_ENT_T_V4L2_SUBDEV
590 ? media_entity_to_v4l2_subdev(entity) : NULL;
591
592 if (entity->use_count == 0 && change > 0 && subdev != NULL) {
593 ret = v4l2_subdev_call(subdev, core, s_power, 1);
594 if (ret < 0 && ret != -ENOIOCTLCMD)
595 return ret;
596 }
597
598 entity->use_count += change;
599 WARN_ON(entity->use_count < 0);
600
601 if (entity->use_count == 0 && change < 0 && subdev != NULL)
602 v4l2_subdev_call(subdev, core, s_power, 0);
603
604 return 0;
605 }
606
607 /*
608 * isp_pipeline_pm_power - Apply power change to all entities in a pipeline
609 * @entity: The entity
610 * @change: Use count change
611 *
612 * Walk the pipeline to update the use count and the power state of all non-node
613 * entities.
614 *
615 * Return 0 on success or a negative error code on failure.
616 */
617 static int isp_pipeline_pm_power(struct media_entity *entity, int change)
618 {
619 struct media_entity_graph graph;
620 struct media_entity *first = entity;
621 int ret = 0;
622
623 if (!change)
624 return 0;
625
626 media_entity_graph_walk_start(&graph, entity);
627
628 while (!ret && (entity = media_entity_graph_walk_next(&graph)))
629 if (media_entity_type(entity) != MEDIA_ENT_T_DEVNODE)
630 ret = isp_pipeline_pm_power_one(entity, change);
631
632 if (!ret)
633 return 0;
634
635 media_entity_graph_walk_start(&graph, first);
636
637 while ((first = media_entity_graph_walk_next(&graph))
638 && first != entity)
639 if (media_entity_type(first) != MEDIA_ENT_T_DEVNODE)
640 isp_pipeline_pm_power_one(first, -change);
641
642 return ret;
643 }
644
645 /*
646 * omap3isp_pipeline_pm_use - Update the use count of an entity
647 * @entity: The entity
648 * @use: Use (1) or stop using (0) the entity
649 *
650 * Update the use count of all entities in the pipeline and power entities on or
651 * off accordingly.
652 *
653 * Return 0 on success or a negative error code on failure. Powering entities
654 * off is assumed to never fail. No failure can occur when the use parameter is
655 * set to 0.
656 */
657 int omap3isp_pipeline_pm_use(struct media_entity *entity, int use)
658 {
659 int change = use ? 1 : -1;
660 int ret;
661
662 mutex_lock(&entity->parent->graph_mutex);
663
664 /* Apply use count to node. */
665 entity->use_count += change;
666 WARN_ON(entity->use_count < 0);
667
668 /* Apply power change to connected non-nodes. */
669 ret = isp_pipeline_pm_power(entity, change);
670 if (ret < 0)
671 entity->use_count -= change;
672
673 mutex_unlock(&entity->parent->graph_mutex);
674
675 return ret;
676 }
677
678 /*
679 * isp_pipeline_link_notify - Link management notification callback
680 * @source: Pad at the start of the link
681 * @sink: Pad at the end of the link
682 * @flags: New link flags that will be applied
683 *
684 * React to link management on powered pipelines by updating the use count of
685 * all entities in the source and sink sides of the link. Entities are powered
686 * on or off accordingly.
687 *
688 * Return 0 on success or a negative error code on failure. Powering entities
689 * off is assumed to never fail. This function will not fail for disconnection
690 * events.
691 */
692 static int isp_pipeline_link_notify(struct media_pad *source,
693 struct media_pad *sink, u32 flags)
694 {
695 int source_use = isp_pipeline_pm_use_count(source->entity);
696 int sink_use = isp_pipeline_pm_use_count(sink->entity);
697 int ret;
698
699 if (!(flags & MEDIA_LNK_FL_ENABLED)) {
700 /* Powering off entities is assumed to never fail. */
701 isp_pipeline_pm_power(source->entity, -sink_use);
702 isp_pipeline_pm_power(sink->entity, -source_use);
703 return 0;
704 }
705
706 ret = isp_pipeline_pm_power(source->entity, sink_use);
707 if (ret < 0)
708 return ret;
709
710 ret = isp_pipeline_pm_power(sink->entity, source_use);
711 if (ret < 0)
712 isp_pipeline_pm_power(source->entity, -sink_use);
713
714 return ret;
715 }
716
717 /* -----------------------------------------------------------------------------
718 * Pipeline stream management
719 */
720
721 /*
722 * isp_pipeline_enable - Enable streaming on a pipeline
723 * @pipe: ISP pipeline
724 * @mode: Stream mode (single shot or continuous)
725 *
726 * Walk the entities chain starting at the pipeline output video node and start
727 * all modules in the chain in the given mode.
728 *
729 * Return 0 if successful, or the return value of the failed video::s_stream
730 * operation otherwise.
731 */
732 static int isp_pipeline_enable(struct isp_pipeline *pipe,
733 enum isp_pipeline_stream_state mode)
734 {
735 struct isp_device *isp = pipe->output->isp;
736 struct media_entity *entity;
737 struct media_pad *pad;
738 struct v4l2_subdev *subdev;
739 unsigned long flags;
740 int ret;
741
742 /* If the preview engine crashed it might not respond to read/write
743 * operations on the L4 bus. This would result in a bus fault and a
744 * kernel oops. Refuse to start streaming in that case. This check must
745 * be performed before the loop below to avoid starting entities if the
746 * pipeline won't start anyway (those entities would then likely fail to
747 * stop, making the problem worse).
748 */
749 if ((pipe->entities & isp->crashed) &
750 (1U << isp->isp_prev.subdev.entity.id))
751 return -EIO;
752
753 spin_lock_irqsave(&pipe->lock, flags);
754 pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
755 spin_unlock_irqrestore(&pipe->lock, flags);
756
757 pipe->do_propagation = false;
758
759 entity = &pipe->output->video.entity;
760 while (1) {
761 pad = &entity->pads[0];
762 if (!(pad->flags & MEDIA_PAD_FL_SINK))
763 break;
764
765 pad = media_entity_remote_source(pad);
766 if (pad == NULL ||
767 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
768 break;
769
770 entity = pad->entity;
771 subdev = media_entity_to_v4l2_subdev(entity);
772
773 ret = v4l2_subdev_call(subdev, video, s_stream, mode);
774 if (ret < 0 && ret != -ENOIOCTLCMD)
775 return ret;
776
777 if (subdev == &isp->isp_ccdc.subdev) {
778 v4l2_subdev_call(&isp->isp_aewb.subdev, video,
779 s_stream, mode);
780 v4l2_subdev_call(&isp->isp_af.subdev, video,
781 s_stream, mode);
782 v4l2_subdev_call(&isp->isp_hist.subdev, video,
783 s_stream, mode);
784 pipe->do_propagation = true;
785 }
786 }
787
788 return 0;
789 }
790
791 static int isp_pipeline_wait_resizer(struct isp_device *isp)
792 {
793 return omap3isp_resizer_busy(&isp->isp_res);
794 }
795
796 static int isp_pipeline_wait_preview(struct isp_device *isp)
797 {
798 return omap3isp_preview_busy(&isp->isp_prev);
799 }
800
801 static int isp_pipeline_wait_ccdc(struct isp_device *isp)
802 {
803 return omap3isp_stat_busy(&isp->isp_af)
804 || omap3isp_stat_busy(&isp->isp_aewb)
805 || omap3isp_stat_busy(&isp->isp_hist)
806 || omap3isp_ccdc_busy(&isp->isp_ccdc);
807 }
808
809 #define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
810
811 static int isp_pipeline_wait(struct isp_device *isp,
812 int(*busy)(struct isp_device *isp))
813 {
814 unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
815
816 while (!time_after(jiffies, timeout)) {
817 if (!busy(isp))
818 return 0;
819 }
820
821 return 1;
822 }
823
824 /*
825 * isp_pipeline_disable - Disable streaming on a pipeline
826 * @pipe: ISP pipeline
827 *
828 * Walk the entities chain starting at the pipeline output video node and stop
829 * all modules in the chain. Wait synchronously for the modules to be stopped if
830 * necessary.
831 *
832 * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
833 * can't be stopped (in which case a software reset of the ISP is probably
834 * necessary).
835 */
836 static int isp_pipeline_disable(struct isp_pipeline *pipe)
837 {
838 struct isp_device *isp = pipe->output->isp;
839 struct media_entity *entity;
840 struct media_pad *pad;
841 struct v4l2_subdev *subdev;
842 int failure = 0;
843 int ret;
844
845 /*
846 * We need to stop all the modules after CCDC first or they'll
847 * never stop since they may not get a full frame from CCDC.
848 */
849 entity = &pipe->output->video.entity;
850 while (1) {
851 pad = &entity->pads[0];
852 if (!(pad->flags & MEDIA_PAD_FL_SINK))
853 break;
854
855 pad = media_entity_remote_source(pad);
856 if (pad == NULL ||
857 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
858 break;
859
860 entity = pad->entity;
861 subdev = media_entity_to_v4l2_subdev(entity);
862
863 if (subdev == &isp->isp_ccdc.subdev) {
864 v4l2_subdev_call(&isp->isp_aewb.subdev,
865 video, s_stream, 0);
866 v4l2_subdev_call(&isp->isp_af.subdev,
867 video, s_stream, 0);
868 v4l2_subdev_call(&isp->isp_hist.subdev,
869 video, s_stream, 0);
870 }
871
872 v4l2_subdev_call(subdev, video, s_stream, 0);
873
874 if (subdev == &isp->isp_res.subdev)
875 ret = isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
876 else if (subdev == &isp->isp_prev.subdev)
877 ret = isp_pipeline_wait(isp, isp_pipeline_wait_preview);
878 else if (subdev == &isp->isp_ccdc.subdev)
879 ret = isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
880 else
881 ret = 0;
882
883 if (ret) {
884 dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
885 /* If the entity failed to stopped, assume it has
886 * crashed. Mark it as such, the ISP will be reset when
887 * applications will release it.
888 */
889 isp->crashed |= 1U << subdev->entity.id;
890 failure = -ETIMEDOUT;
891 }
892 }
893
894 return failure;
895 }
896
897 /*
898 * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
899 * @pipe: ISP pipeline
900 * @state: Stream state (stopped, single shot or continuous)
901 *
902 * Set the pipeline to the given stream state. Pipelines can be started in
903 * single-shot or continuous mode.
904 *
905 * Return 0 if successful, or the return value of the failed video::s_stream
906 * operation otherwise. The pipeline state is not updated when the operation
907 * fails, except when stopping the pipeline.
908 */
909 int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
910 enum isp_pipeline_stream_state state)
911 {
912 int ret;
913
914 if (state == ISP_PIPELINE_STREAM_STOPPED)
915 ret = isp_pipeline_disable(pipe);
916 else
917 ret = isp_pipeline_enable(pipe, state);
918
919 if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
920 pipe->stream_state = state;
921
922 return ret;
923 }
924
925 /*
926 * isp_pipeline_resume - Resume streaming on a pipeline
927 * @pipe: ISP pipeline
928 *
929 * Resume video output and input and re-enable pipeline.
930 */
931 static void isp_pipeline_resume(struct isp_pipeline *pipe)
932 {
933 int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
934
935 omap3isp_video_resume(pipe->output, !singleshot);
936 if (singleshot)
937 omap3isp_video_resume(pipe->input, 0);
938 isp_pipeline_enable(pipe, pipe->stream_state);
939 }
940
941 /*
942 * isp_pipeline_suspend - Suspend streaming on a pipeline
943 * @pipe: ISP pipeline
944 *
945 * Suspend pipeline.
946 */
947 static void isp_pipeline_suspend(struct isp_pipeline *pipe)
948 {
949 isp_pipeline_disable(pipe);
950 }
951
952 /*
953 * isp_pipeline_is_last - Verify if entity has an enabled link to the output
954 * video node
955 * @me: ISP module's media entity
956 *
957 * Returns 1 if the entity has an enabled link to the output video node or 0
958 * otherwise. It's true only while pipeline can have no more than one output
959 * node.
960 */
961 static int isp_pipeline_is_last(struct media_entity *me)
962 {
963 struct isp_pipeline *pipe;
964 struct media_pad *pad;
965
966 if (!me->pipe)
967 return 0;
968 pipe = to_isp_pipeline(me);
969 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
970 return 0;
971 pad = media_entity_remote_source(&pipe->output->pad);
972 return pad->entity == me;
973 }
974
975 /*
976 * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
977 * @me: ISP module's media entity
978 *
979 * Suspend the whole pipeline if module's entity has an enabled link to the
980 * output video node. It works only while pipeline can have no more than one
981 * output node.
982 */
983 static void isp_suspend_module_pipeline(struct media_entity *me)
984 {
985 if (isp_pipeline_is_last(me))
986 isp_pipeline_suspend(to_isp_pipeline(me));
987 }
988
989 /*
990 * isp_resume_module_pipeline - Resume pipeline to which belongs the module
991 * @me: ISP module's media entity
992 *
993 * Resume the whole pipeline if module's entity has an enabled link to the
994 * output video node. It works only while pipeline can have no more than one
995 * output node.
996 */
997 static void isp_resume_module_pipeline(struct media_entity *me)
998 {
999 if (isp_pipeline_is_last(me))
1000 isp_pipeline_resume(to_isp_pipeline(me));
1001 }
1002
1003 /*
1004 * isp_suspend_modules - Suspend ISP submodules.
1005 * @isp: OMAP3 ISP device
1006 *
1007 * Returns 0 if suspend left in idle state all the submodules properly,
1008 * or returns 1 if a general Reset is required to suspend the submodules.
1009 */
1010 static int isp_suspend_modules(struct isp_device *isp)
1011 {
1012 unsigned long timeout;
1013
1014 omap3isp_stat_suspend(&isp->isp_aewb);
1015 omap3isp_stat_suspend(&isp->isp_af);
1016 omap3isp_stat_suspend(&isp->isp_hist);
1017 isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
1018 isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
1019 isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
1020 isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
1021 isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
1022
1023 timeout = jiffies + ISP_STOP_TIMEOUT;
1024 while (omap3isp_stat_busy(&isp->isp_af)
1025 || omap3isp_stat_busy(&isp->isp_aewb)
1026 || omap3isp_stat_busy(&isp->isp_hist)
1027 || omap3isp_preview_busy(&isp->isp_prev)
1028 || omap3isp_resizer_busy(&isp->isp_res)
1029 || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
1030 if (time_after(jiffies, timeout)) {
1031 dev_info(isp->dev, "can't stop modules.\n");
1032 return 1;
1033 }
1034 msleep(1);
1035 }
1036
1037 return 0;
1038 }
1039
1040 /*
1041 * isp_resume_modules - Resume ISP submodules.
1042 * @isp: OMAP3 ISP device
1043 */
1044 static void isp_resume_modules(struct isp_device *isp)
1045 {
1046 omap3isp_stat_resume(&isp->isp_aewb);
1047 omap3isp_stat_resume(&isp->isp_af);
1048 omap3isp_stat_resume(&isp->isp_hist);
1049 isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
1050 isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
1051 isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
1052 isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
1053 isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
1054 }
1055
1056 /*
1057 * isp_reset - Reset ISP with a timeout wait for idle.
1058 * @isp: OMAP3 ISP device
1059 */
1060 static int isp_reset(struct isp_device *isp)
1061 {
1062 unsigned long timeout = 0;
1063
1064 isp_reg_writel(isp,
1065 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
1066 | ISP_SYSCONFIG_SOFTRESET,
1067 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
1068 while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
1069 ISP_SYSSTATUS) & 0x1)) {
1070 if (timeout++ > 10000) {
1071 dev_alert(isp->dev, "cannot reset ISP\n");
1072 return -ETIMEDOUT;
1073 }
1074 udelay(1);
1075 }
1076
1077 isp->crashed = 0;
1078 return 0;
1079 }
1080
1081 /*
1082 * isp_save_context - Saves the values of the ISP module registers.
1083 * @isp: OMAP3 ISP device
1084 * @reg_list: Structure containing pairs of register address and value to
1085 * modify on OMAP.
1086 */
1087 static void
1088 isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
1089 {
1090 struct isp_reg *next = reg_list;
1091
1092 for (; next->reg != ISP_TOK_TERM; next++)
1093 next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
1094 }
1095
1096 /*
1097 * isp_restore_context - Restores the values of the ISP module registers.
1098 * @isp: OMAP3 ISP device
1099 * @reg_list: Structure containing pairs of register address and value to
1100 * modify on OMAP.
1101 */
1102 static void
1103 isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
1104 {
1105 struct isp_reg *next = reg_list;
1106
1107 for (; next->reg != ISP_TOK_TERM; next++)
1108 isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
1109 }
1110
1111 /*
1112 * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1113 * @isp: OMAP3 ISP device
1114 *
1115 * Routine for saving the context of each module in the ISP.
1116 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1117 */
1118 static void isp_save_ctx(struct isp_device *isp)
1119 {
1120 isp_save_context(isp, isp_reg_list);
1121 omap_iommu_save_ctx(isp->dev);
1122 }
1123
1124 /*
1125 * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1126 * @isp: OMAP3 ISP device
1127 *
1128 * Routine for restoring the context of each module in the ISP.
1129 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1130 */
1131 static void isp_restore_ctx(struct isp_device *isp)
1132 {
1133 isp_restore_context(isp, isp_reg_list);
1134 omap_iommu_restore_ctx(isp->dev);
1135 omap3isp_ccdc_restore_context(isp);
1136 omap3isp_preview_restore_context(isp);
1137 }
1138
1139 /* -----------------------------------------------------------------------------
1140 * SBL resources management
1141 */
1142 #define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
1143 OMAP3_ISP_SBL_CCDC_LSC_READ | \
1144 OMAP3_ISP_SBL_PREVIEW_READ | \
1145 OMAP3_ISP_SBL_RESIZER_READ)
1146 #define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
1147 OMAP3_ISP_SBL_CSI2A_WRITE | \
1148 OMAP3_ISP_SBL_CSI2C_WRITE | \
1149 OMAP3_ISP_SBL_CCDC_WRITE | \
1150 OMAP3_ISP_SBL_PREVIEW_WRITE)
1151
1152 void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
1153 {
1154 u32 sbl = 0;
1155
1156 isp->sbl_resources |= res;
1157
1158 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
1159 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1160
1161 if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
1162 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1163
1164 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
1165 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1166
1167 if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
1168 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1169
1170 if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
1171 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1172
1173 if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
1174 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1175
1176 isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1177 }
1178
1179 void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
1180 {
1181 u32 sbl = 0;
1182
1183 isp->sbl_resources &= ~res;
1184
1185 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
1186 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1187
1188 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
1189 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1190
1191 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
1192 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1193
1194 if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
1195 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1196
1197 if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
1198 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1199
1200 if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
1201 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1202
1203 isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1204 }
1205
1206 /*
1207 * isp_module_sync_idle - Helper to sync module with its idle state
1208 * @me: ISP submodule's media entity
1209 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1210 * @stopping: flag which tells module wants to stop
1211 *
1212 * This function checks if ISP submodule needs to wait for next interrupt. If
1213 * yes, makes the caller to sleep while waiting for such event.
1214 */
1215 int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
1216 atomic_t *stopping)
1217 {
1218 struct isp_pipeline *pipe = to_isp_pipeline(me);
1219
1220 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
1221 (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1222 !isp_pipeline_ready(pipe)))
1223 return 0;
1224
1225 /*
1226 * atomic_set() doesn't include memory barrier on ARM platform for SMP
1227 * scenario. We'll call it here to avoid race conditions.
1228 */
1229 atomic_set(stopping, 1);
1230 smp_mb();
1231
1232 /*
1233 * If module is the last one, it's writing to memory. In this case,
1234 * it's necessary to check if the module is already paused due to
1235 * DMA queue underrun or if it has to wait for next interrupt to be
1236 * idle.
1237 * If it isn't the last one, the function won't sleep but *stopping
1238 * will still be set to warn next submodule caller's interrupt the
1239 * module wants to be idle.
1240 */
1241 if (isp_pipeline_is_last(me)) {
1242 struct isp_video *video = pipe->output;
1243 unsigned long flags;
1244 spin_lock_irqsave(&video->queue->irqlock, flags);
1245 if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
1246 spin_unlock_irqrestore(&video->queue->irqlock, flags);
1247 atomic_set(stopping, 0);
1248 smp_mb();
1249 return 0;
1250 }
1251 spin_unlock_irqrestore(&video->queue->irqlock, flags);
1252 if (!wait_event_timeout(*wait, !atomic_read(stopping),
1253 msecs_to_jiffies(1000))) {
1254 atomic_set(stopping, 0);
1255 smp_mb();
1256 return -ETIMEDOUT;
1257 }
1258 }
1259
1260 return 0;
1261 }
1262
1263 /*
1264 * omap3isp_module_sync_is_stopped - Helper to verify if module was stopping
1265 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1266 * @stopping: flag which tells module wants to stop
1267 *
1268 * This function checks if ISP submodule was stopping. In case of yes, it
1269 * notices the caller by setting stopping to 0 and waking up the wait queue.
1270 * Returns 1 if it was stopping or 0 otherwise.
1271 */
1272 int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
1273 atomic_t *stopping)
1274 {
1275 if (atomic_cmpxchg(stopping, 1, 0)) {
1276 wake_up(wait);
1277 return 1;
1278 }
1279
1280 return 0;
1281 }
1282
1283 /* --------------------------------------------------------------------------
1284 * Clock management
1285 */
1286
1287 #define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
1288 ISPCTRL_HIST_CLK_EN | \
1289 ISPCTRL_RSZ_CLK_EN | \
1290 (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
1291 (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
1292
1293 static void __isp_subclk_update(struct isp_device *isp)
1294 {
1295 u32 clk = 0;
1296
1297 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_H3A)
1298 clk |= ISPCTRL_H3A_CLK_EN;
1299
1300 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
1301 clk |= ISPCTRL_HIST_CLK_EN;
1302
1303 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
1304 clk |= ISPCTRL_RSZ_CLK_EN;
1305
1306 /* NOTE: For CCDC & Preview submodules, we need to affect internal
1307 * RAM as well.
1308 */
1309 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
1310 clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
1311
1312 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
1313 clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
1314
1315 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
1316 ISPCTRL_CLKS_MASK, clk);
1317 }
1318
1319 void omap3isp_subclk_enable(struct isp_device *isp,
1320 enum isp_subclk_resource res)
1321 {
1322 isp->subclk_resources |= res;
1323
1324 __isp_subclk_update(isp);
1325 }
1326
1327 void omap3isp_subclk_disable(struct isp_device *isp,
1328 enum isp_subclk_resource res)
1329 {
1330 isp->subclk_resources &= ~res;
1331
1332 __isp_subclk_update(isp);
1333 }
1334
1335 /*
1336 * isp_enable_clocks - Enable ISP clocks
1337 * @isp: OMAP3 ISP device
1338 *
1339 * Return 0 if successful, or clk_enable return value if any of tthem fails.
1340 */
1341 static int isp_enable_clocks(struct isp_device *isp)
1342 {
1343 int r;
1344 unsigned long rate;
1345 int divisor;
1346
1347 /*
1348 * cam_mclk clock chain:
1349 * dpll4 -> dpll4_m5 -> dpll4_m5x2 -> cam_mclk
1350 *
1351 * In OMAP3630 dpll4_m5x2 != 2 x dpll4_m5 but both are
1352 * set to the same value. Hence the rate set for dpll4_m5
1353 * has to be twice of what is set on OMAP3430 to get
1354 * the required value for cam_mclk
1355 */
1356 if (cpu_is_omap3630())
1357 divisor = 1;
1358 else
1359 divisor = 2;
1360
1361 r = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
1362 if (r) {
1363 dev_err(isp->dev, "clk_enable cam_ick failed\n");
1364 goto out_clk_enable_ick;
1365 }
1366 r = clk_set_rate(isp->clock[ISP_CLK_DPLL4_M5_CK],
1367 CM_CAM_MCLK_HZ/divisor);
1368 if (r) {
1369 dev_err(isp->dev, "clk_set_rate for dpll4_m5_ck failed\n");
1370 goto out_clk_enable_mclk;
1371 }
1372 r = clk_enable(isp->clock[ISP_CLK_CAM_MCLK]);
1373 if (r) {
1374 dev_err(isp->dev, "clk_enable cam_mclk failed\n");
1375 goto out_clk_enable_mclk;
1376 }
1377 rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
1378 if (rate != CM_CAM_MCLK_HZ)
1379 dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
1380 " expected : %d\n"
1381 " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
1382 r = clk_enable(isp->clock[ISP_CLK_CSI2_FCK]);
1383 if (r) {
1384 dev_err(isp->dev, "clk_enable csi2_fck failed\n");
1385 goto out_clk_enable_csi2_fclk;
1386 }
1387 return 0;
1388
1389 out_clk_enable_csi2_fclk:
1390 clk_disable(isp->clock[ISP_CLK_CAM_MCLK]);
1391 out_clk_enable_mclk:
1392 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
1393 out_clk_enable_ick:
1394 return r;
1395 }
1396
1397 /*
1398 * isp_disable_clocks - Disable ISP clocks
1399 * @isp: OMAP3 ISP device
1400 */
1401 static void isp_disable_clocks(struct isp_device *isp)
1402 {
1403 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
1404 clk_disable(isp->clock[ISP_CLK_CAM_MCLK]);
1405 clk_disable(isp->clock[ISP_CLK_CSI2_FCK]);
1406 }
1407
1408 static const char *isp_clocks[] = {
1409 "cam_ick",
1410 "cam_mclk",
1411 "dpll4_m5_ck",
1412 "csi2_96m_fck",
1413 "l3_ick",
1414 };
1415
1416 static void isp_put_clocks(struct isp_device *isp)
1417 {
1418 unsigned int i;
1419
1420 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1421 if (isp->clock[i]) {
1422 clk_put(isp->clock[i]);
1423 isp->clock[i] = NULL;
1424 }
1425 }
1426 }
1427
1428 static int isp_get_clocks(struct isp_device *isp)
1429 {
1430 struct clk *clk;
1431 unsigned int i;
1432
1433 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1434 clk = clk_get(isp->dev, isp_clocks[i]);
1435 if (IS_ERR(clk)) {
1436 dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
1437 isp_put_clocks(isp);
1438 return PTR_ERR(clk);
1439 }
1440
1441 isp->clock[i] = clk;
1442 }
1443
1444 return 0;
1445 }
1446
1447 /*
1448 * omap3isp_get - Acquire the ISP resource.
1449 *
1450 * Initializes the clocks for the first acquire.
1451 *
1452 * Increment the reference count on the ISP. If the first reference is taken,
1453 * enable clocks and power-up all submodules.
1454 *
1455 * Return a pointer to the ISP device structure, or NULL if an error occurred.
1456 */
1457 struct isp_device *omap3isp_get(struct isp_device *isp)
1458 {
1459 struct isp_device *__isp = isp;
1460
1461 if (isp == NULL)
1462 return NULL;
1463
1464 mutex_lock(&isp->isp_mutex);
1465 if (isp->ref_count > 0)
1466 goto out;
1467
1468 if (isp_enable_clocks(isp) < 0) {
1469 __isp = NULL;
1470 goto out;
1471 }
1472
1473 /* We don't want to restore context before saving it! */
1474 if (isp->has_context)
1475 isp_restore_ctx(isp);
1476 else
1477 isp->has_context = 1;
1478
1479 isp_enable_interrupts(isp);
1480
1481 out:
1482 if (__isp != NULL)
1483 isp->ref_count++;
1484 mutex_unlock(&isp->isp_mutex);
1485
1486 return __isp;
1487 }
1488
1489 /*
1490 * omap3isp_put - Release the ISP
1491 *
1492 * Decrement the reference count on the ISP. If the last reference is released,
1493 * power-down all submodules, disable clocks and free temporary buffers.
1494 */
1495 void omap3isp_put(struct isp_device *isp)
1496 {
1497 if (isp == NULL)
1498 return;
1499
1500 mutex_lock(&isp->isp_mutex);
1501 BUG_ON(isp->ref_count == 0);
1502 if (--isp->ref_count == 0) {
1503 isp_disable_interrupts(isp);
1504 if (isp->domain)
1505 isp_save_ctx(isp);
1506 /* Reset the ISP if an entity has failed to stop. This is the
1507 * only way to recover from such conditions.
1508 */
1509 if (isp->crashed)
1510 isp_reset(isp);
1511 isp_disable_clocks(isp);
1512 }
1513 mutex_unlock(&isp->isp_mutex);
1514 }
1515
1516 /* --------------------------------------------------------------------------
1517 * Platform device driver
1518 */
1519
1520 /*
1521 * omap3isp_print_status - Prints the values of the ISP Control Module registers
1522 * @isp: OMAP3 ISP device
1523 */
1524 #define ISP_PRINT_REGISTER(isp, name)\
1525 dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
1526 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
1527 #define SBL_PRINT_REGISTER(isp, name)\
1528 dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
1529 isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
1530
1531 void omap3isp_print_status(struct isp_device *isp)
1532 {
1533 dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
1534
1535 ISP_PRINT_REGISTER(isp, SYSCONFIG);
1536 ISP_PRINT_REGISTER(isp, SYSSTATUS);
1537 ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
1538 ISP_PRINT_REGISTER(isp, IRQ0STATUS);
1539 ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
1540 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
1541 ISP_PRINT_REGISTER(isp, CTRL);
1542 ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
1543 ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
1544 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
1545 ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
1546 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
1547 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
1548 ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
1549 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
1550
1551 SBL_PRINT_REGISTER(isp, PCR);
1552 SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
1553
1554 dev_dbg(isp->dev, "--------------------------------------------\n");
1555 }
1556
1557 #ifdef CONFIG_PM
1558
1559 /*
1560 * Power management support.
1561 *
1562 * As the ISP can't properly handle an input video stream interruption on a non
1563 * frame boundary, the ISP pipelines need to be stopped before sensors get
1564 * suspended. However, as suspending the sensors can require a running clock,
1565 * which can be provided by the ISP, the ISP can't be completely suspended
1566 * before the sensor.
1567 *
1568 * To solve this problem power management support is split into prepare/complete
1569 * and suspend/resume operations. The pipelines are stopped in prepare() and the
1570 * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
1571 * resume(), and the the pipelines are restarted in complete().
1572 *
1573 * TODO: PM dependencies between the ISP and sensors are not modeled explicitly
1574 * yet.
1575 */
1576 static int isp_pm_prepare(struct device *dev)
1577 {
1578 struct isp_device *isp = dev_get_drvdata(dev);
1579 int reset;
1580
1581 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1582
1583 if (isp->ref_count == 0)
1584 return 0;
1585
1586 reset = isp_suspend_modules(isp);
1587 isp_disable_interrupts(isp);
1588 isp_save_ctx(isp);
1589 if (reset)
1590 isp_reset(isp);
1591
1592 return 0;
1593 }
1594
1595 static int isp_pm_suspend(struct device *dev)
1596 {
1597 struct isp_device *isp = dev_get_drvdata(dev);
1598
1599 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1600
1601 if (isp->ref_count)
1602 isp_disable_clocks(isp);
1603
1604 return 0;
1605 }
1606
1607 static int isp_pm_resume(struct device *dev)
1608 {
1609 struct isp_device *isp = dev_get_drvdata(dev);
1610
1611 if (isp->ref_count == 0)
1612 return 0;
1613
1614 return isp_enable_clocks(isp);
1615 }
1616
1617 static void isp_pm_complete(struct device *dev)
1618 {
1619 struct isp_device *isp = dev_get_drvdata(dev);
1620
1621 if (isp->ref_count == 0)
1622 return;
1623
1624 isp_restore_ctx(isp);
1625 isp_enable_interrupts(isp);
1626 isp_resume_modules(isp);
1627 }
1628
1629 #else
1630
1631 #define isp_pm_prepare NULL
1632 #define isp_pm_suspend NULL
1633 #define isp_pm_resume NULL
1634 #define isp_pm_complete NULL
1635
1636 #endif /* CONFIG_PM */
1637
1638 static void isp_unregister_entities(struct isp_device *isp)
1639 {
1640 omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
1641 omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
1642 omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
1643 omap3isp_preview_unregister_entities(&isp->isp_prev);
1644 omap3isp_resizer_unregister_entities(&isp->isp_res);
1645 omap3isp_stat_unregister_entities(&isp->isp_aewb);
1646 omap3isp_stat_unregister_entities(&isp->isp_af);
1647 omap3isp_stat_unregister_entities(&isp->isp_hist);
1648
1649 v4l2_device_unregister(&isp->v4l2_dev);
1650 media_device_unregister(&isp->media_dev);
1651 }
1652
1653 /*
1654 * isp_register_subdev_group - Register a group of subdevices
1655 * @isp: OMAP3 ISP device
1656 * @board_info: I2C subdevs board information array
1657 *
1658 * Register all I2C subdevices in the board_info array. The array must be
1659 * terminated by a NULL entry, and the first entry must be the sensor.
1660 *
1661 * Return a pointer to the sensor media entity if it has been successfully
1662 * registered, or NULL otherwise.
1663 */
1664 static struct v4l2_subdev *
1665 isp_register_subdev_group(struct isp_device *isp,
1666 struct isp_subdev_i2c_board_info *board_info)
1667 {
1668 struct v4l2_subdev *sensor = NULL;
1669 unsigned int first;
1670
1671 if (board_info->board_info == NULL)
1672 return NULL;
1673
1674 for (first = 1; board_info->board_info; ++board_info, first = 0) {
1675 struct v4l2_subdev *subdev;
1676 struct i2c_adapter *adapter;
1677
1678 adapter = i2c_get_adapter(board_info->i2c_adapter_id);
1679 if (adapter == NULL) {
1680 printk(KERN_ERR "%s: Unable to get I2C adapter %d for "
1681 "device %s\n", __func__,
1682 board_info->i2c_adapter_id,
1683 board_info->board_info->type);
1684 continue;
1685 }
1686
1687 subdev = v4l2_i2c_new_subdev_board(&isp->v4l2_dev, adapter,
1688 board_info->board_info, NULL);
1689 if (subdev == NULL) {
1690 printk(KERN_ERR "%s: Unable to register subdev %s\n",
1691 __func__, board_info->board_info->type);
1692 continue;
1693 }
1694
1695 if (first)
1696 sensor = subdev;
1697 }
1698
1699 return sensor;
1700 }
1701
1702 static int isp_register_entities(struct isp_device *isp)
1703 {
1704 struct isp_platform_data *pdata = isp->pdata;
1705 struct isp_v4l2_subdevs_group *subdevs;
1706 int ret;
1707
1708 isp->media_dev.dev = isp->dev;
1709 strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
1710 sizeof(isp->media_dev.model));
1711 isp->media_dev.hw_revision = isp->revision;
1712 isp->media_dev.link_notify = isp_pipeline_link_notify;
1713 ret = media_device_register(&isp->media_dev);
1714 if (ret < 0) {
1715 printk(KERN_ERR "%s: Media device registration failed (%d)\n",
1716 __func__, ret);
1717 return ret;
1718 }
1719
1720 isp->v4l2_dev.mdev = &isp->media_dev;
1721 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
1722 if (ret < 0) {
1723 printk(KERN_ERR "%s: V4L2 device registration failed (%d)\n",
1724 __func__, ret);
1725 goto done;
1726 }
1727
1728 /* Register internal entities */
1729 ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
1730 if (ret < 0)
1731 goto done;
1732
1733 ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
1734 if (ret < 0)
1735 goto done;
1736
1737 ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
1738 if (ret < 0)
1739 goto done;
1740
1741 ret = omap3isp_preview_register_entities(&isp->isp_prev,
1742 &isp->v4l2_dev);
1743 if (ret < 0)
1744 goto done;
1745
1746 ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
1747 if (ret < 0)
1748 goto done;
1749
1750 ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
1751 if (ret < 0)
1752 goto done;
1753
1754 ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
1755 if (ret < 0)
1756 goto done;
1757
1758 ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
1759 if (ret < 0)
1760 goto done;
1761
1762 /* Register external entities */
1763 for (subdevs = pdata->subdevs; subdevs && subdevs->subdevs; ++subdevs) {
1764 struct v4l2_subdev *sensor;
1765 struct media_entity *input;
1766 unsigned int flags;
1767 unsigned int pad;
1768
1769 sensor = isp_register_subdev_group(isp, subdevs->subdevs);
1770 if (sensor == NULL)
1771 continue;
1772
1773 sensor->host_priv = subdevs;
1774
1775 /* Connect the sensor to the correct interface module. Parallel
1776 * sensors are connected directly to the CCDC, while serial
1777 * sensors are connected to the CSI2a, CCP2b or CSI2c receiver
1778 * through CSIPHY1 or CSIPHY2.
1779 */
1780 switch (subdevs->interface) {
1781 case ISP_INTERFACE_PARALLEL:
1782 input = &isp->isp_ccdc.subdev.entity;
1783 pad = CCDC_PAD_SINK;
1784 flags = 0;
1785 break;
1786
1787 case ISP_INTERFACE_CSI2A_PHY2:
1788 input = &isp->isp_csi2a.subdev.entity;
1789 pad = CSI2_PAD_SINK;
1790 flags = MEDIA_LNK_FL_IMMUTABLE
1791 | MEDIA_LNK_FL_ENABLED;
1792 break;
1793
1794 case ISP_INTERFACE_CCP2B_PHY1:
1795 case ISP_INTERFACE_CCP2B_PHY2:
1796 input = &isp->isp_ccp2.subdev.entity;
1797 pad = CCP2_PAD_SINK;
1798 flags = 0;
1799 break;
1800
1801 case ISP_INTERFACE_CSI2C_PHY1:
1802 input = &isp->isp_csi2c.subdev.entity;
1803 pad = CSI2_PAD_SINK;
1804 flags = MEDIA_LNK_FL_IMMUTABLE
1805 | MEDIA_LNK_FL_ENABLED;
1806 break;
1807
1808 default:
1809 printk(KERN_ERR "%s: invalid interface type %u\n",
1810 __func__, subdevs->interface);
1811 ret = -EINVAL;
1812 goto done;
1813 }
1814
1815 ret = media_entity_create_link(&sensor->entity, 0, input, pad,
1816 flags);
1817 if (ret < 0)
1818 goto done;
1819 }
1820
1821 ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
1822
1823 done:
1824 if (ret < 0)
1825 isp_unregister_entities(isp);
1826
1827 return ret;
1828 }
1829
1830 static void isp_cleanup_modules(struct isp_device *isp)
1831 {
1832 omap3isp_h3a_aewb_cleanup(isp);
1833 omap3isp_h3a_af_cleanup(isp);
1834 omap3isp_hist_cleanup(isp);
1835 omap3isp_resizer_cleanup(isp);
1836 omap3isp_preview_cleanup(isp);
1837 omap3isp_ccdc_cleanup(isp);
1838 omap3isp_ccp2_cleanup(isp);
1839 omap3isp_csi2_cleanup(isp);
1840 }
1841
1842 static int isp_initialize_modules(struct isp_device *isp)
1843 {
1844 int ret;
1845
1846 ret = omap3isp_csiphy_init(isp);
1847 if (ret < 0) {
1848 dev_err(isp->dev, "CSI PHY initialization failed\n");
1849 goto error_csiphy;
1850 }
1851
1852 ret = omap3isp_csi2_init(isp);
1853 if (ret < 0) {
1854 dev_err(isp->dev, "CSI2 initialization failed\n");
1855 goto error_csi2;
1856 }
1857
1858 ret = omap3isp_ccp2_init(isp);
1859 if (ret < 0) {
1860 dev_err(isp->dev, "CCP2 initialization failed\n");
1861 goto error_ccp2;
1862 }
1863
1864 ret = omap3isp_ccdc_init(isp);
1865 if (ret < 0) {
1866 dev_err(isp->dev, "CCDC initialization failed\n");
1867 goto error_ccdc;
1868 }
1869
1870 ret = omap3isp_preview_init(isp);
1871 if (ret < 0) {
1872 dev_err(isp->dev, "Preview initialization failed\n");
1873 goto error_preview;
1874 }
1875
1876 ret = omap3isp_resizer_init(isp);
1877 if (ret < 0) {
1878 dev_err(isp->dev, "Resizer initialization failed\n");
1879 goto error_resizer;
1880 }
1881
1882 ret = omap3isp_hist_init(isp);
1883 if (ret < 0) {
1884 dev_err(isp->dev, "Histogram initialization failed\n");
1885 goto error_hist;
1886 }
1887
1888 ret = omap3isp_h3a_aewb_init(isp);
1889 if (ret < 0) {
1890 dev_err(isp->dev, "H3A AEWB initialization failed\n");
1891 goto error_h3a_aewb;
1892 }
1893
1894 ret = omap3isp_h3a_af_init(isp);
1895 if (ret < 0) {
1896 dev_err(isp->dev, "H3A AF initialization failed\n");
1897 goto error_h3a_af;
1898 }
1899
1900 /* Connect the submodules. */
1901 ret = media_entity_create_link(
1902 &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
1903 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1904 if (ret < 0)
1905 goto error_link;
1906
1907 ret = media_entity_create_link(
1908 &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
1909 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1910 if (ret < 0)
1911 goto error_link;
1912
1913 ret = media_entity_create_link(
1914 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1915 &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
1916 if (ret < 0)
1917 goto error_link;
1918
1919 ret = media_entity_create_link(
1920 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
1921 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1922 if (ret < 0)
1923 goto error_link;
1924
1925 ret = media_entity_create_link(
1926 &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
1927 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1928 if (ret < 0)
1929 goto error_link;
1930
1931 ret = media_entity_create_link(
1932 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1933 &isp->isp_aewb.subdev.entity, 0,
1934 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1935 if (ret < 0)
1936 goto error_link;
1937
1938 ret = media_entity_create_link(
1939 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1940 &isp->isp_af.subdev.entity, 0,
1941 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1942 if (ret < 0)
1943 goto error_link;
1944
1945 ret = media_entity_create_link(
1946 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1947 &isp->isp_hist.subdev.entity, 0,
1948 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1949 if (ret < 0)
1950 goto error_link;
1951
1952 return 0;
1953
1954 error_link:
1955 omap3isp_h3a_af_cleanup(isp);
1956 error_h3a_af:
1957 omap3isp_h3a_aewb_cleanup(isp);
1958 error_h3a_aewb:
1959 omap3isp_hist_cleanup(isp);
1960 error_hist:
1961 omap3isp_resizer_cleanup(isp);
1962 error_resizer:
1963 omap3isp_preview_cleanup(isp);
1964 error_preview:
1965 omap3isp_ccdc_cleanup(isp);
1966 error_ccdc:
1967 omap3isp_ccp2_cleanup(isp);
1968 error_ccp2:
1969 omap3isp_csi2_cleanup(isp);
1970 error_csi2:
1971 error_csiphy:
1972 return ret;
1973 }
1974
1975 /*
1976 * isp_remove - Remove ISP platform device
1977 * @pdev: Pointer to ISP platform device
1978 *
1979 * Always returns 0.
1980 */
1981 static int isp_remove(struct platform_device *pdev)
1982 {
1983 struct isp_device *isp = platform_get_drvdata(pdev);
1984 int i;
1985
1986 isp_unregister_entities(isp);
1987 isp_cleanup_modules(isp);
1988
1989 omap3isp_get(isp);
1990 iommu_detach_device(isp->domain, &pdev->dev);
1991 iommu_domain_free(isp->domain);
1992 isp->domain = NULL;
1993 omap3isp_put(isp);
1994
1995 free_irq(isp->irq_num, isp);
1996 isp_put_clocks(isp);
1997
1998 for (i = 0; i < OMAP3_ISP_IOMEM_LAST; i++) {
1999 if (isp->mmio_base[i]) {
2000 iounmap(isp->mmio_base[i]);
2001 isp->mmio_base[i] = NULL;
2002 }
2003
2004 if (isp->mmio_base_phys[i]) {
2005 release_mem_region(isp->mmio_base_phys[i],
2006 isp->mmio_size[i]);
2007 isp->mmio_base_phys[i] = 0;
2008 }
2009 }
2010
2011 regulator_put(isp->isp_csiphy1.vdd);
2012 regulator_put(isp->isp_csiphy2.vdd);
2013 kfree(isp);
2014
2015 return 0;
2016 }
2017
2018 static int isp_map_mem_resource(struct platform_device *pdev,
2019 struct isp_device *isp,
2020 enum isp_mem_resources res)
2021 {
2022 struct resource *mem;
2023
2024 /* request the mem region for the camera registers */
2025
2026 mem = platform_get_resource(pdev, IORESOURCE_MEM, res);
2027 if (!mem) {
2028 dev_err(isp->dev, "no mem resource?\n");
2029 return -ENODEV;
2030 }
2031
2032 if (!request_mem_region(mem->start, resource_size(mem), pdev->name)) {
2033 dev_err(isp->dev,
2034 "cannot reserve camera register I/O region\n");
2035 return -ENODEV;
2036 }
2037 isp->mmio_base_phys[res] = mem->start;
2038 isp->mmio_size[res] = resource_size(mem);
2039
2040 /* map the region */
2041 isp->mmio_base[res] = ioremap_nocache(isp->mmio_base_phys[res],
2042 isp->mmio_size[res]);
2043 if (!isp->mmio_base[res]) {
2044 dev_err(isp->dev, "cannot map camera register I/O region\n");
2045 return -ENODEV;
2046 }
2047
2048 return 0;
2049 }
2050
2051 /*
2052 * isp_probe - Probe ISP platform device
2053 * @pdev: Pointer to ISP platform device
2054 *
2055 * Returns 0 if successful,
2056 * -ENOMEM if no memory available,
2057 * -ENODEV if no platform device resources found
2058 * or no space for remapping registers,
2059 * -EINVAL if couldn't install ISR,
2060 * or clk_get return error value.
2061 */
2062 static int isp_probe(struct platform_device *pdev)
2063 {
2064 struct isp_platform_data *pdata = pdev->dev.platform_data;
2065 struct isp_device *isp;
2066 int ret;
2067 int i, m;
2068
2069 if (pdata == NULL)
2070 return -EINVAL;
2071
2072 isp = kzalloc(sizeof(*isp), GFP_KERNEL);
2073 if (!isp) {
2074 dev_err(&pdev->dev, "could not allocate memory\n");
2075 return -ENOMEM;
2076 }
2077
2078 isp->autoidle = autoidle;
2079 isp->platform_cb.set_xclk = isp_set_xclk;
2080 isp->platform_cb.set_pixel_clock = isp_set_pixel_clock;
2081
2082 mutex_init(&isp->isp_mutex);
2083 spin_lock_init(&isp->stat_lock);
2084
2085 isp->dev = &pdev->dev;
2086 isp->pdata = pdata;
2087 isp->ref_count = 0;
2088
2089 isp->raw_dmamask = DMA_BIT_MASK(32);
2090 isp->dev->dma_mask = &isp->raw_dmamask;
2091 isp->dev->coherent_dma_mask = DMA_BIT_MASK(32);
2092
2093 platform_set_drvdata(pdev, isp);
2094
2095 /* Regulators */
2096 isp->isp_csiphy1.vdd = regulator_get(&pdev->dev, "VDD_CSIPHY1");
2097 isp->isp_csiphy2.vdd = regulator_get(&pdev->dev, "VDD_CSIPHY2");
2098
2099 /* Clocks */
2100 ret = isp_map_mem_resource(pdev, isp, OMAP3_ISP_IOMEM_MAIN);
2101 if (ret < 0)
2102 goto error;
2103
2104 ret = isp_get_clocks(isp);
2105 if (ret < 0)
2106 goto error;
2107
2108 if (omap3isp_get(isp) == NULL)
2109 goto error;
2110
2111 ret = isp_reset(isp);
2112 if (ret < 0)
2113 goto error_isp;
2114
2115 /* Memory resources */
2116 isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
2117 dev_info(isp->dev, "Revision %d.%d found\n",
2118 (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
2119
2120 for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
2121 if (isp->revision == isp_res_maps[m].isp_rev)
2122 break;
2123
2124 if (m == ARRAY_SIZE(isp_res_maps)) {
2125 dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
2126 (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
2127 ret = -ENODEV;
2128 goto error_isp;
2129 }
2130
2131 for (i = 1; i < OMAP3_ISP_IOMEM_LAST; i++) {
2132 if (isp_res_maps[m].map & 1 << i) {
2133 ret = isp_map_mem_resource(pdev, isp, i);
2134 if (ret)
2135 goto error_isp;
2136 }
2137 }
2138
2139 isp->domain = iommu_domain_alloc(pdev->dev.bus);
2140 if (!isp->domain) {
2141 dev_err(isp->dev, "can't alloc iommu domain\n");
2142 ret = -ENOMEM;
2143 goto error_isp;
2144 }
2145
2146 ret = iommu_attach_device(isp->domain, &pdev->dev);
2147 if (ret) {
2148 dev_err(&pdev->dev, "can't attach iommu device: %d\n", ret);
2149 goto free_domain;
2150 }
2151
2152 /* Interrupt */
2153 isp->irq_num = platform_get_irq(pdev, 0);
2154 if (isp->irq_num <= 0) {
2155 dev_err(isp->dev, "No IRQ resource\n");
2156 ret = -ENODEV;
2157 goto detach_dev;
2158 }
2159
2160 if (request_irq(isp->irq_num, isp_isr, IRQF_SHARED, "OMAP3 ISP", isp)) {
2161 dev_err(isp->dev, "Unable to request IRQ\n");
2162 ret = -EINVAL;
2163 goto detach_dev;
2164 }
2165
2166 /* Entities */
2167 ret = isp_initialize_modules(isp);
2168 if (ret < 0)
2169 goto error_irq;
2170
2171 ret = isp_register_entities(isp);
2172 if (ret < 0)
2173 goto error_modules;
2174
2175 isp_power_settings(isp, 1);
2176 omap3isp_put(isp);
2177
2178 return 0;
2179
2180 error_modules:
2181 isp_cleanup_modules(isp);
2182 error_irq:
2183 free_irq(isp->irq_num, isp);
2184 detach_dev:
2185 iommu_detach_device(isp->domain, &pdev->dev);
2186 free_domain:
2187 iommu_domain_free(isp->domain);
2188 error_isp:
2189 omap3isp_put(isp);
2190 error:
2191 isp_put_clocks(isp);
2192
2193 for (i = 0; i < OMAP3_ISP_IOMEM_LAST; i++) {
2194 if (isp->mmio_base[i]) {
2195 iounmap(isp->mmio_base[i]);
2196 isp->mmio_base[i] = NULL;
2197 }
2198
2199 if (isp->mmio_base_phys[i]) {
2200 release_mem_region(isp->mmio_base_phys[i],
2201 isp->mmio_size[i]);
2202 isp->mmio_base_phys[i] = 0;
2203 }
2204 }
2205 regulator_put(isp->isp_csiphy2.vdd);
2206 regulator_put(isp->isp_csiphy1.vdd);
2207 platform_set_drvdata(pdev, NULL);
2208
2209 mutex_destroy(&isp->isp_mutex);
2210 kfree(isp);
2211
2212 return ret;
2213 }
2214
2215 static const struct dev_pm_ops omap3isp_pm_ops = {
2216 .prepare = isp_pm_prepare,
2217 .suspend = isp_pm_suspend,
2218 .resume = isp_pm_resume,
2219 .complete = isp_pm_complete,
2220 };
2221
2222 static struct platform_device_id omap3isp_id_table[] = {
2223 { "omap3isp", 0 },
2224 { },
2225 };
2226 MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
2227
2228 static struct platform_driver omap3isp_driver = {
2229 .probe = isp_probe,
2230 .remove = isp_remove,
2231 .id_table = omap3isp_id_table,
2232 .driver = {
2233 .owner = THIS_MODULE,
2234 .name = "omap3isp",
2235 .pm = &omap3isp_pm_ops,
2236 },
2237 };
2238
2239 module_platform_driver(omap3isp_driver);
2240
2241 MODULE_AUTHOR("Nokia Corporation");
2242 MODULE_DESCRIPTION("TI OMAP3 ISP driver");
2243 MODULE_LICENSE("GPL");
2244 MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);
Linux kernel - Deliverables
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