drivers/media/video/omap3isp/ispcsi2.c

   1 /*
   2  * ispcsi2.c
   3  *
   4  * TI OMAP3 ISP - CSI2 module
   5  *
   6  * Copyright (C) 2010 Nokia Corporation
   7  * Copyright (C) 2009 Texas Instruments, Inc.
   8  *
   9  * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  10  *           Sakari Ailus <sakari.ailus@iki.fi>
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License version 2 as
  14  * published by the Free Software Foundation.
  15  *
  16  * This program is distributed in the hope that it will be useful, but
  17  * WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  19  * General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  24  * 02110-1301 USA
  25  */
  26 #include <linux/delay.h>
  27 #include <media/v4l2-common.h>
  28 #include <linux/v4l2-mediabus.h>
  29 #include <linux/mm.h>
  30
  31 #include "isp.h"
  32 #include "ispreg.h"
  33 #include "ispcsi2.h"
  34
  35 /*
  36  * csi2_if_enable - Enable CSI2 Receiver interface.
  37  * @enable: enable flag
  38  *
  39  */
  40 static void csi2_if_enable(struct isp_device *isp,
  41                            struct isp_csi2_device *csi2, u8 enable)
  42 {
  43         struct isp_csi2_ctrl_cfg *currctrl = &csi2->ctrl;
  44
  45         isp_reg_clr_set(isp, csi2->regs1, ISPCSI2_CTRL, ISPCSI2_CTRL_IF_EN,
  46                         enable ? ISPCSI2_CTRL_IF_EN : 0);
  47
  48         currctrl->if_enable = enable;
  49 }
  50
  51 /*
  52  * csi2_recv_config - CSI2 receiver module configuration.
  53  * @currctrl: isp_csi2_ctrl_cfg structure
  54  *
  55  */
  56 static void csi2_recv_config(struct isp_device *isp,
  57                              struct isp_csi2_device *csi2,
  58                              struct isp_csi2_ctrl_cfg *currctrl)
  59 {
  60         u32 reg;
  61
  62         reg = isp_reg_readl(isp, csi2->regs1, ISPCSI2_CTRL);
  63
  64         if (currctrl->frame_mode)
  65                 reg |= ISPCSI2_CTRL_FRAME;
  66         else
  67                 reg &= ~ISPCSI2_CTRL_FRAME;
  68
  69         if (currctrl->vp_clk_enable)
  70                 reg |= ISPCSI2_CTRL_VP_CLK_EN;
  71         else
  72                 reg &= ~ISPCSI2_CTRL_VP_CLK_EN;
  73
  74         if (currctrl->vp_only_enable)
  75                 reg |= ISPCSI2_CTRL_VP_ONLY_EN;
  76         else
  77                 reg &= ~ISPCSI2_CTRL_VP_ONLY_EN;
  78
  79         reg &= ~ISPCSI2_CTRL_VP_OUT_CTRL_MASK;
  80         reg |= currctrl->vp_out_ctrl << ISPCSI2_CTRL_VP_OUT_CTRL_SHIFT;
  81
  82         if (currctrl->ecc_enable)
  83                 reg |= ISPCSI2_CTRL_ECC_EN;
  84         else
  85                 reg &= ~ISPCSI2_CTRL_ECC_EN;
  86
  87         isp_reg_writel(isp, reg, csi2->regs1, ISPCSI2_CTRL);
  88 }
  89
  90 static const unsigned int csi2_input_fmts[] = {
  91         V4L2_MBUS_FMT_SGRBG10_1X10,
  92         V4L2_MBUS_FMT_SGRBG10_DPCM8_1X8,
  93         V4L2_MBUS_FMT_SRGGB10_1X10,
  94         V4L2_MBUS_FMT_SRGGB10_DPCM8_1X8,
  95         V4L2_MBUS_FMT_SBGGR10_1X10,
  96         V4L2_MBUS_FMT_SBGGR10_DPCM8_1X8,
  97         V4L2_MBUS_FMT_SGBRG10_1X10,
  98         V4L2_MBUS_FMT_SGBRG10_DPCM8_1X8,
  99 };
 100
 101 /* To set the format on the CSI2 requires a mapping function that takes
 102  * the following inputs:
 103  * - 2 different formats (at this time)
 104  * - 2 destinations (mem, vp+mem) (vp only handled separately)
 105  * - 2 decompression options (on, off)
 106  * - 2 isp revisions (certain format must be handled differently on OMAP3630)
 107  * Output should be CSI2 frame format code
 108  * Array indices as follows: [format][dest][decompr][is_3630]
 109  * Not all combinations are valid. 0 means invalid.
 110  */
 111 static const u16 __csi2_fmt_map[2][2][2][2] = {
 112         /* RAW10 formats */
 113         {
 114                 /* Output to memory */
 115                 {
 116                         /* No DPCM decompression */
 117                         { CSI2_PIX_FMT_RAW10_EXP16, CSI2_PIX_FMT_RAW10_EXP16 },
 118                         /* DPCM decompression */
 119                         { 0, 0 },
 120                 },
 121                 /* Output to both */
 122                 {
 123                         /* No DPCM decompression */
 124                         { CSI2_PIX_FMT_RAW10_EXP16_VP,
 125                           CSI2_PIX_FMT_RAW10_EXP16_VP },
 126                         /* DPCM decompression */
 127                         { 0, 0 },
 128                 },
 129         },
 130         /* RAW10 DPCM8 formats */
 131         {
 132                 /* Output to memory */
 133                 {
 134                         /* No DPCM decompression */
 135                         { CSI2_PIX_FMT_RAW8, CSI2_USERDEF_8BIT_DATA1 },
 136                         /* DPCM decompression */
 137                         { CSI2_PIX_FMT_RAW8_DPCM10_EXP16,
 138                           CSI2_USERDEF_8BIT_DATA1_DPCM10 },
 139                 },
 140                 /* Output to both */
 141                 {
 142                         /* No DPCM decompression */
 143                         { CSI2_PIX_FMT_RAW8_VP,
 144                           CSI2_PIX_FMT_RAW8_VP },
 145                         /* DPCM decompression */
 146                         { CSI2_PIX_FMT_RAW8_DPCM10_VP,
 147                           CSI2_USERDEF_8BIT_DATA1_DPCM10_VP },
 148                 },
 149         },
 150 };
 151
 152 /*
 153  * csi2_ctx_map_format - Map CSI2 sink media bus format to CSI2 format ID
 154  * @csi2: ISP CSI2 device
 155  *
 156  * Returns CSI2 physical format id
 157  */
 158 static u16 csi2_ctx_map_format(struct isp_csi2_device *csi2)
 159 {
 160         const struct v4l2_mbus_framefmt *fmt = &csi2->formats[CSI2_PAD_SINK];
 161         int fmtidx, destidx, is_3630;
 162
 163         switch (fmt->code) {
 164         case V4L2_MBUS_FMT_SGRBG10_1X10:
 165         case V4L2_MBUS_FMT_SRGGB10_1X10:
 166         case V4L2_MBUS_FMT_SBGGR10_1X10:
 167         case V4L2_MBUS_FMT_SGBRG10_1X10:
 168                 fmtidx = 0;
 169                 break;
 170         case V4L2_MBUS_FMT_SGRBG10_DPCM8_1X8:
 171         case V4L2_MBUS_FMT_SRGGB10_DPCM8_1X8:
 172         case V4L2_MBUS_FMT_SBGGR10_DPCM8_1X8:
 173         case V4L2_MBUS_FMT_SGBRG10_DPCM8_1X8:
 174                 fmtidx = 1;
 175                 break;
 176         default:
 177                 WARN(1, KERN_ERR "CSI2: pixel format %08x unsupported!\n",
 178                      fmt->code);
 179                 return 0;
 180         }
 181
 182         if (!(csi2->output & CSI2_OUTPUT_CCDC) &&
 183             !(csi2->output & CSI2_OUTPUT_MEMORY)) {
 184                 /* Neither output enabled is a valid combination */
 185                 return CSI2_PIX_FMT_OTHERS;
 186         }
 187
 188         /* If we need to skip frames at the beginning of the stream disable the
 189          * video port to avoid sending the skipped frames to the CCDC.
 190          */
 191         destidx = csi2->frame_skip ? 0 : !!(csi2->output & CSI2_OUTPUT_CCDC);
 192         is_3630 = csi2->isp->revision == ISP_REVISION_15_0;
 193
 194         return __csi2_fmt_map[fmtidx][destidx][csi2->dpcm_decompress][is_3630];
 195 }
 196
 197 /*
 198  * csi2_set_outaddr - Set memory address to save output image
 199  * @csi2: Pointer to ISP CSI2a device.
 200  * @addr: ISP MMU Mapped 32-bit memory address aligned on 32 byte boundary.
 201  *
 202  * Sets the memory address where the output will be saved.
 203  *
 204  * Returns 0 if successful, or -EINVAL if the address is not in the 32 byte
 205  * boundary.
 206  */
 207 static void csi2_set_outaddr(struct isp_csi2_device *csi2, u32 addr)
 208 {
 209         struct isp_device *isp = csi2->isp;
 210         struct isp_csi2_ctx_cfg *ctx = &csi2->contexts[0];
 211
 212         ctx->ping_addr = addr;
 213         ctx->pong_addr = addr;
 214         isp_reg_writel(isp, ctx->ping_addr,
 215                        csi2->regs1, ISPCSI2_CTX_DAT_PING_ADDR(ctx->ctxnum));
 216         isp_reg_writel(isp, ctx->pong_addr,
 217                        csi2->regs1, ISPCSI2_CTX_DAT_PONG_ADDR(ctx->ctxnum));
 218 }
 219
 220 /*
 221  * is_usr_def_mapping - Checks whether USER_DEF_MAPPING should
 222  *                      be enabled by CSI2.
 223  * @format_id: mapped format id
 224  *
 225  */
 226 static inline int is_usr_def_mapping(u32 format_id)
 227 {
 228         return (format_id & 0x40) ? 1 : 0;
 229 }
 230
 231 /*
 232  * csi2_ctx_enable - Enable specified CSI2 context
 233  * @ctxnum: Context number, valid between 0 and 7 values.
 234  * @enable: enable
 235  *
 236  */
 237 static void csi2_ctx_enable(struct isp_device *isp,
 238                             struct isp_csi2_device *csi2, u8 ctxnum, u8 enable)
 239 {
 240         struct isp_csi2_ctx_cfg *ctx = &csi2->contexts[ctxnum];
 241         unsigned int skip = 0;
 242         u32 reg;
 243
 244         reg = isp_reg_readl(isp, csi2->regs1, ISPCSI2_CTX_CTRL1(ctxnum));
 245
 246         if (enable) {
 247                 if (csi2->frame_skip)
 248                         skip = csi2->frame_skip;
 249                 else if (csi2->output & CSI2_OUTPUT_MEMORY)
 250                         skip = 1;
 251
 252                 reg &= ~ISPCSI2_CTX_CTRL1_COUNT_MASK;
 253                 reg |= ISPCSI2_CTX_CTRL1_COUNT_UNLOCK
 254                     |  (skip << ISPCSI2_CTX_CTRL1_COUNT_SHIFT)
 255                     |  ISPCSI2_CTX_CTRL1_CTX_EN;
 256         } else {
 257                 reg &= ~ISPCSI2_CTX_CTRL1_CTX_EN;
 258         }
 259
 260         isp_reg_writel(isp, reg, csi2->regs1, ISPCSI2_CTX_CTRL1(ctxnum));
 261         ctx->enabled = enable;
 262 }
 263
 264 /*
 265  * csi2_ctx_config - CSI2 context configuration.
 266  * @ctx: context configuration
 267  *
 268  */
 269 static void csi2_ctx_config(struct isp_device *isp,
 270                             struct isp_csi2_device *csi2,
 271                             struct isp_csi2_ctx_cfg *ctx)
 272 {
 273         u32 reg;
 274
 275         /* Set up CSI2_CTx_CTRL1 */
 276         reg = isp_reg_readl(isp, csi2->regs1, ISPCSI2_CTX_CTRL1(ctx->ctxnum));
 277
 278         if (ctx->eof_enabled)
 279                 reg |= ISPCSI2_CTX_CTRL1_EOF_EN;
 280         else
 281                 reg &= ~ISPCSI2_CTX_CTRL1_EOF_EN;
 282
 283         if (ctx->eol_enabled)
 284                 reg |= ISPCSI2_CTX_CTRL1_EOL_EN;
 285         else
 286                 reg &= ~ISPCSI2_CTX_CTRL1_EOL_EN;
 287
 288         if (ctx->checksum_enabled)
 289                 reg |= ISPCSI2_CTX_CTRL1_CS_EN;
 290         else
 291                 reg &= ~ISPCSI2_CTX_CTRL1_CS_EN;
 292
 293         isp_reg_writel(isp, reg, csi2->regs1, ISPCSI2_CTX_CTRL1(ctx->ctxnum));
 294
 295         /* Set up CSI2_CTx_CTRL2 */
 296         reg = isp_reg_readl(isp, csi2->regs1, ISPCSI2_CTX_CTRL2(ctx->ctxnum));
 297
 298         reg &= ~(ISPCSI2_CTX_CTRL2_VIRTUAL_ID_MASK);
 299         reg |= ctx->virtual_id << ISPCSI2_CTX_CTRL2_VIRTUAL_ID_SHIFT;
 300
 301         reg &= ~(ISPCSI2_CTX_CTRL2_FORMAT_MASK);
 302         reg |= ctx->format_id << ISPCSI2_CTX_CTRL2_FORMAT_SHIFT;
 303
 304         if (ctx->dpcm_decompress) {
 305                 if (ctx->dpcm_predictor)
 306                         reg |= ISPCSI2_CTX_CTRL2_DPCM_PRED;
 307                 else
 308                         reg &= ~ISPCSI2_CTX_CTRL2_DPCM_PRED;
 309         }
 310
 311         if (is_usr_def_mapping(ctx->format_id)) {
 312                 reg &= ~ISPCSI2_CTX_CTRL2_USER_DEF_MAP_MASK;
 313                 reg |= 2 << ISPCSI2_CTX_CTRL2_USER_DEF_MAP_SHIFT;
 314         }
 315
 316         isp_reg_writel(isp, reg, csi2->regs1, ISPCSI2_CTX_CTRL2(ctx->ctxnum));
 317
 318         /* Set up CSI2_CTx_CTRL3 */
 319         reg = isp_reg_readl(isp, csi2->regs1, ISPCSI2_CTX_CTRL3(ctx->ctxnum));
 320         reg &= ~(ISPCSI2_CTX_CTRL3_ALPHA_MASK);
 321         reg |= (ctx->alpha << ISPCSI2_CTX_CTRL3_ALPHA_SHIFT);
 322
 323         isp_reg_writel(isp, reg, csi2->regs1, ISPCSI2_CTX_CTRL3(ctx->ctxnum));
 324
 325         /* Set up CSI2_CTx_DAT_OFST */
 326         reg = isp_reg_readl(isp, csi2->regs1,
 327                             ISPCSI2_CTX_DAT_OFST(ctx->ctxnum));
 328         reg &= ~ISPCSI2_CTX_DAT_OFST_OFST_MASK;
 329         reg |= ctx->data_offset << ISPCSI2_CTX_DAT_OFST_OFST_SHIFT;
 330         isp_reg_writel(isp, reg, csi2->regs1,
 331                        ISPCSI2_CTX_DAT_OFST(ctx->ctxnum));
 332
 333         isp_reg_writel(isp, ctx->ping_addr,
 334                        csi2->regs1, ISPCSI2_CTX_DAT_PING_ADDR(ctx->ctxnum));
 335
 336         isp_reg_writel(isp, ctx->pong_addr,
 337                        csi2->regs1, ISPCSI2_CTX_DAT_PONG_ADDR(ctx->ctxnum));
 338 }
 339
 340 /*
 341  * csi2_timing_config - CSI2 timing configuration.
 342  * @timing: csi2_timing_cfg structure
 343  */
 344 static void csi2_timing_config(struct isp_device *isp,
 345                                struct isp_csi2_device *csi2,
 346                                struct isp_csi2_timing_cfg *timing)
 347 {
 348         u32 reg;
 349
 350         reg = isp_reg_readl(isp, csi2->regs1, ISPCSI2_TIMING);
 351
 352         if (timing->force_rx_mode)
 353                 reg |= ISPCSI2_TIMING_FORCE_RX_MODE_IO(timing->ionum);
 354         else
 355                 reg &= ~ISPCSI2_TIMING_FORCE_RX_MODE_IO(timing->ionum);
 356
 357         if (timing->stop_state_16x)
 358                 reg |= ISPCSI2_TIMING_STOP_STATE_X16_IO(timing->ionum);
 359         else
 360                 reg &= ~ISPCSI2_TIMING_STOP_STATE_X16_IO(timing->ionum);
 361
 362         if (timing->stop_state_4x)
 363                 reg |= ISPCSI2_TIMING_STOP_STATE_X4_IO(timing->ionum);
 364         else
 365                 reg &= ~ISPCSI2_TIMING_STOP_STATE_X4_IO(timing->ionum);
 366
 367         reg &= ~ISPCSI2_TIMING_STOP_STATE_COUNTER_IO_MASK(timing->ionum);
 368         reg |= timing->stop_state_counter <<
 369                ISPCSI2_TIMING_STOP_STATE_COUNTER_IO_SHIFT(timing->ionum);
 370
 371         isp_reg_writel(isp, reg, csi2->regs1, ISPCSI2_TIMING);
 372 }
 373
 374 /*
 375  * csi2_irq_ctx_set - Enables CSI2 Context IRQs.
 376  * @enable: Enable/disable CSI2 Context interrupts
 377  */
 378 static void csi2_irq_ctx_set(struct isp_device *isp,
 379                              struct isp_csi2_device *csi2, int enable)
 380 {
 381         int i;
 382
 383         for (i = 0; i < 8; i++) {
 384                 isp_reg_writel(isp, ISPCSI2_CTX_IRQSTATUS_FE_IRQ, csi2->regs1,
 385                                ISPCSI2_CTX_IRQSTATUS(i));
 386                 if (enable)
 387                         isp_reg_set(isp, csi2->regs1, ISPCSI2_CTX_IRQENABLE(i),
 388                                     ISPCSI2_CTX_IRQSTATUS_FE_IRQ);
 389                 else
 390                         isp_reg_clr(isp, csi2->regs1, ISPCSI2_CTX_IRQENABLE(i),
 391                                     ISPCSI2_CTX_IRQSTATUS_FE_IRQ);
 392         }
 393 }
 394
 395 /*
 396  * csi2_irq_complexio1_set - Enables CSI2 ComplexIO IRQs.
 397  * @enable: Enable/disable CSI2 ComplexIO #1 interrupts
 398  */
 399 static void csi2_irq_complexio1_set(struct isp_device *isp,
 400                                     struct isp_csi2_device *csi2, int enable)
 401 {
 402         u32 reg;
 403         reg = ISPCSI2_PHY_IRQENABLE_STATEALLULPMEXIT |
 404                 ISPCSI2_PHY_IRQENABLE_STATEALLULPMENTER |
 405                 ISPCSI2_PHY_IRQENABLE_STATEULPM5 |
 406                 ISPCSI2_PHY_IRQENABLE_ERRCONTROL5 |
 407                 ISPCSI2_PHY_IRQENABLE_ERRESC5 |
 408                 ISPCSI2_PHY_IRQENABLE_ERRSOTSYNCHS5 |
 409                 ISPCSI2_PHY_IRQENABLE_ERRSOTHS5 |
 410                 ISPCSI2_PHY_IRQENABLE_STATEULPM4 |
 411                 ISPCSI2_PHY_IRQENABLE_ERRCONTROL4 |
 412                 ISPCSI2_PHY_IRQENABLE_ERRESC4 |
 413                 ISPCSI2_PHY_IRQENABLE_ERRSOTSYNCHS4 |
 414                 ISPCSI2_PHY_IRQENABLE_ERRSOTHS4 |
 415                 ISPCSI2_PHY_IRQENABLE_STATEULPM3 |
 416                 ISPCSI2_PHY_IRQENABLE_ERRCONTROL3 |
 417                 ISPCSI2_PHY_IRQENABLE_ERRESC3 |
 418                 ISPCSI2_PHY_IRQENABLE_ERRSOTSYNCHS3 |
 419                 ISPCSI2_PHY_IRQENABLE_ERRSOTHS3 |
 420                 ISPCSI2_PHY_IRQENABLE_STATEULPM2 |
 421                 ISPCSI2_PHY_IRQENABLE_ERRCONTROL2 |
 422                 ISPCSI2_PHY_IRQENABLE_ERRESC2 |
 423                 ISPCSI2_PHY_IRQENABLE_ERRSOTSYNCHS2 |
 424                 ISPCSI2_PHY_IRQENABLE_ERRSOTHS2 |
 425                 ISPCSI2_PHY_IRQENABLE_STATEULPM1 |
 426                 ISPCSI2_PHY_IRQENABLE_ERRCONTROL1 |
 427                 ISPCSI2_PHY_IRQENABLE_ERRESC1 |
 428                 ISPCSI2_PHY_IRQENABLE_ERRSOTSYNCHS1 |
 429                 ISPCSI2_PHY_IRQENABLE_ERRSOTHS1;
 430         isp_reg_writel(isp, reg, csi2->regs1, ISPCSI2_PHY_IRQSTATUS);
 431         if (enable)
 432                 reg |= isp_reg_readl(isp, csi2->regs1, ISPCSI2_PHY_IRQENABLE);
 433         else
 434                 reg = 0;
 435         isp_reg_writel(isp, reg, csi2->regs1, ISPCSI2_PHY_IRQENABLE);
 436 }
 437
 438 /*
 439  * csi2_irq_status_set - Enables CSI2 Status IRQs.
 440  * @enable: Enable/disable CSI2 Status interrupts
 441  */
 442 static void csi2_irq_status_set(struct isp_device *isp,
 443                                 struct isp_csi2_device *csi2, int enable)
 444 {
 445         u32 reg;
 446         reg = ISPCSI2_IRQSTATUS_OCP_ERR_IRQ |
 447                 ISPCSI2_IRQSTATUS_SHORT_PACKET_IRQ |
 448                 ISPCSI2_IRQSTATUS_ECC_CORRECTION_IRQ |
 449                 ISPCSI2_IRQSTATUS_ECC_NO_CORRECTION_IRQ |
 450                 ISPCSI2_IRQSTATUS_COMPLEXIO2_ERR_IRQ |
 451                 ISPCSI2_IRQSTATUS_COMPLEXIO1_ERR_IRQ |
 452                 ISPCSI2_IRQSTATUS_FIFO_OVF_IRQ |
 453                 ISPCSI2_IRQSTATUS_CONTEXT(0);
 454         isp_reg_writel(isp, reg, csi2->regs1, ISPCSI2_IRQSTATUS);
 455         if (enable)
 456                 reg |= isp_reg_readl(isp, csi2->regs1, ISPCSI2_IRQENABLE);
 457         else
 458                 reg = 0;
 459
 460         isp_reg_writel(isp, reg, csi2->regs1, ISPCSI2_IRQENABLE);
 461 }
 462
 463 /*
 464  * omap3isp_csi2_reset - Resets the CSI2 module.
 465  *
 466  * Must be called with the phy lock held.
 467  *
 468  * Returns 0 if successful, or -EBUSY if power command didn't respond.
 469  */
 470 int omap3isp_csi2_reset(struct isp_csi2_device *csi2)
 471 {
 472         struct isp_device *isp = csi2->isp;
 473         u8 soft_reset_retries = 0;
 474         u32 reg;
 475         int i;
 476
 477         if (!csi2->available)
 478                 return -ENODEV;
 479
 480         if (csi2->phy->phy_in_use)
 481                 return -EBUSY;
 482
 483         isp_reg_set(isp, csi2->regs1, ISPCSI2_SYSCONFIG,
 484                     ISPCSI2_SYSCONFIG_SOFT_RESET);
 485
 486         do {
 487                 reg = isp_reg_readl(isp, csi2->regs1, ISPCSI2_SYSSTATUS) &
 488                                     ISPCSI2_SYSSTATUS_RESET_DONE;
 489                 if (reg == ISPCSI2_SYSSTATUS_RESET_DONE)
 490                         break;
 491                 soft_reset_retries++;
 492                 if (soft_reset_retries < 5)
 493                         udelay(100);
 494         } while (soft_reset_retries < 5);
 495
 496         if (soft_reset_retries == 5) {
 497                 printk(KERN_ERR "CSI2: Soft reset try count exceeded!\n");
 498                 return -EBUSY;
 499         }
 500
 501         if (isp->revision == ISP_REVISION_15_0)
 502                 isp_reg_set(isp, csi2->regs1, ISPCSI2_PHY_CFG,
 503                             ISPCSI2_PHY_CFG_RESET_CTRL);
 504
 505         i = 100;
 506         do {
 507                 reg = isp_reg_readl(isp, csi2->phy->phy_regs, ISPCSIPHY_REG1)
 508                     & ISPCSIPHY_REG1_RESET_DONE_CTRLCLK;
 509                 if (reg == ISPCSIPHY_REG1_RESET_DONE_CTRLCLK)
 510                         break;
 511                 udelay(100);
 512         } while (--i > 0);
 513
 514         if (i == 0) {
 515                 printk(KERN_ERR
 516                        "CSI2: Reset for CSI2_96M_FCLK domain Failed!\n");
 517                 return -EBUSY;
 518         }
 519
 520         if (isp->autoidle)
 521                 isp_reg_clr_set(isp, csi2->regs1, ISPCSI2_SYSCONFIG,
 522                                 ISPCSI2_SYSCONFIG_MSTANDBY_MODE_MASK |
 523                                 ISPCSI2_SYSCONFIG_AUTO_IDLE,
 524                                 ISPCSI2_SYSCONFIG_MSTANDBY_MODE_SMART |
 525                                 ((isp->revision == ISP_REVISION_15_0) ?
 526                                  ISPCSI2_SYSCONFIG_AUTO_IDLE : 0));
 527         else
 528                 isp_reg_clr_set(isp, csi2->regs1, ISPCSI2_SYSCONFIG,
 529                                 ISPCSI2_SYSCONFIG_MSTANDBY_MODE_MASK |
 530                                 ISPCSI2_SYSCONFIG_AUTO_IDLE,
 531                                 ISPCSI2_SYSCONFIG_MSTANDBY_MODE_NO);
 532
 533         return 0;
 534 }
 535
 536 static int csi2_configure(struct isp_csi2_device *csi2)
 537 {
 538         const struct isp_v4l2_subdevs_group *pdata;
 539         struct isp_device *isp = csi2->isp;
 540         struct isp_csi2_timing_cfg *timing = &csi2->timing[0];
 541         struct v4l2_subdev *sensor;
 542         struct media_pad *pad;
 543
 544         /*
 545          * CSI2 fields that can be updated while the context has
 546          * been enabled or the interface has been enabled are not
 547          * updated dynamically currently. So we do not allow to
 548          * reconfigure if either has been enabled
 549          */
 550         if (csi2->contexts[0].enabled || csi2->ctrl.if_enable)
 551                 return -EBUSY;
 552
 553         pad = media_entity_remote_source(&csi2->pads[CSI2_PAD_SINK]);
 554         sensor = media_entity_to_v4l2_subdev(pad->entity);
 555         pdata = sensor->host_priv;
 556
 557         csi2->frame_skip = 0;
 558         v4l2_subdev_call(sensor, sensor, g_skip_frames, &csi2->frame_skip);
 559
 560         csi2->ctrl.vp_out_ctrl = pdata->bus.csi2.vpclk_div;
 561         csi2->ctrl.frame_mode = ISP_CSI2_FRAME_IMMEDIATE;
 562         csi2->ctrl.ecc_enable = pdata->bus.csi2.crc;
 563
 564         timing->ionum = 1;
 565         timing->force_rx_mode = 1;
 566         timing->stop_state_16x = 1;
 567         timing->stop_state_4x = 1;
 568         timing->stop_state_counter = 0x1FF;
 569
 570         /*
 571          * The CSI2 receiver can't do any format conversion except DPCM
 572          * decompression, so every set_format call configures both pads
 573          * and enables DPCM decompression as a special case:
 574          */
 575         if (csi2->formats[CSI2_PAD_SINK].code !=
 576             csi2->formats[CSI2_PAD_SOURCE].code)
 577                 csi2->dpcm_decompress = true;
 578         else
 579                 csi2->dpcm_decompress = false;
 580
 581         csi2->contexts[0].format_id = csi2_ctx_map_format(csi2);
 582
 583         if (csi2->video_out.bpl_padding == 0)
 584                 csi2->contexts[0].data_offset = 0;
 585         else
 586                 csi2->contexts[0].data_offset = csi2->video_out.bpl_value;
 587
 588         /*
 589          * Enable end of frame and end of line signals generation for
 590          * context 0. These signals are generated from CSI2 receiver to
 591          * qualify the last pixel of a frame and the last pixel of a line.
 592          * Without enabling the signals CSI2 receiver writes data to memory
 593          * beyond buffer size and/or data line offset is not handled correctly.
 594          */
 595         csi2->contexts[0].eof_enabled = 1;
 596         csi2->contexts[0].eol_enabled = 1;
 597
 598         csi2_irq_complexio1_set(isp, csi2, 1);
 599         csi2_irq_ctx_set(isp, csi2, 1);
 600         csi2_irq_status_set(isp, csi2, 1);
 601
 602         /* Set configuration (timings, format and links) */
 603         csi2_timing_config(isp, csi2, timing);
 604         csi2_recv_config(isp, csi2, &csi2->ctrl);
 605         csi2_ctx_config(isp, csi2, &csi2->contexts[0]);
 606
 607         return 0;
 608 }
 609
 610 /*
 611  * csi2_print_status - Prints CSI2 debug information.
 612  */
 613 #define CSI2_PRINT_REGISTER(isp, regs, name)\
 614         dev_dbg(isp->dev, "###CSI2 " #name "=0x%08x\n", \
 615                 isp_reg_readl(isp, regs, ISPCSI2_##name))
 616
 617 static void csi2_print_status(struct isp_csi2_device *csi2)
 618 {
 619         struct isp_device *isp = csi2->isp;
 620
 621         if (!csi2->available)
 622                 return;
 623
 624         dev_dbg(isp->dev, "-------------CSI2 Register dump-------------\n");
 625
 626         CSI2_PRINT_REGISTER(isp, csi2->regs1, SYSCONFIG);
 627         CSI2_PRINT_REGISTER(isp, csi2->regs1, SYSSTATUS);
 628         CSI2_PRINT_REGISTER(isp, csi2->regs1, IRQENABLE);
 629         CSI2_PRINT_REGISTER(isp, csi2->regs1, IRQSTATUS);
 630         CSI2_PRINT_REGISTER(isp, csi2->regs1, CTRL);
 631         CSI2_PRINT_REGISTER(isp, csi2->regs1, DBG_H);
 632         CSI2_PRINT_REGISTER(isp, csi2->regs1, GNQ);
 633         CSI2_PRINT_REGISTER(isp, csi2->regs1, PHY_CFG);
 634         CSI2_PRINT_REGISTER(isp, csi2->regs1, PHY_IRQSTATUS);
 635         CSI2_PRINT_REGISTER(isp, csi2->regs1, SHORT_PACKET);
 636         CSI2_PRINT_REGISTER(isp, csi2->regs1, PHY_IRQENABLE);
 637         CSI2_PRINT_REGISTER(isp, csi2->regs1, DBG_P);
 638         CSI2_PRINT_REGISTER(isp, csi2->regs1, TIMING);
 639         CSI2_PRINT_REGISTER(isp, csi2->regs1, CTX_CTRL1(0));
 640         CSI2_PRINT_REGISTER(isp, csi2->regs1, CTX_CTRL2(0));
 641         CSI2_PRINT_REGISTER(isp, csi2->regs1, CTX_DAT_OFST(0));
 642         CSI2_PRINT_REGISTER(isp, csi2->regs1, CTX_DAT_PING_ADDR(0));
 643         CSI2_PRINT_REGISTER(isp, csi2->regs1, CTX_DAT_PONG_ADDR(0));
 644         CSI2_PRINT_REGISTER(isp, csi2->regs1, CTX_IRQENABLE(0));
 645         CSI2_PRINT_REGISTER(isp, csi2->regs1, CTX_IRQSTATUS(0));
 646         CSI2_PRINT_REGISTER(isp, csi2->regs1, CTX_CTRL3(0));
 647
 648         dev_dbg(isp->dev, "--------------------------------------------\n");
 649 }
 650
 651 /* -----------------------------------------------------------------------------
 652  * Interrupt handling
 653  */
 654
 655 /*
 656  * csi2_isr_buffer - Does buffer handling at end-of-frame
 657  * when writing to memory.
 658  */
 659 static void csi2_isr_buffer(struct isp_csi2_device *csi2)
 660 {
 661         struct isp_device *isp = csi2->isp;
 662         struct isp_buffer *buffer;
 663
 664         csi2_ctx_enable(isp, csi2, 0, 0);
 665
 666         buffer = omap3isp_video_buffer_next(&csi2->video_out);
 667
 668         /*
 669          * Let video queue operation restart engine if there is an underrun
 670          * condition.
 671          */
 672         if (buffer == NULL)
 673                 return;
 674
 675         csi2_set_outaddr(csi2, buffer->isp_addr);
 676         csi2_ctx_enable(isp, csi2, 0, 1);
 677 }
 678
 679 static void csi2_isr_ctx(struct isp_csi2_device *csi2,
 680                          struct isp_csi2_ctx_cfg *ctx)
 681 {
 682         struct isp_device *isp = csi2->isp;
 683         unsigned int n = ctx->ctxnum;
 684         u32 status;
 685
 686         status = isp_reg_readl(isp, csi2->regs1, ISPCSI2_CTX_IRQSTATUS(n));
 687         isp_reg_writel(isp, status, csi2->regs1, ISPCSI2_CTX_IRQSTATUS(n));
 688
 689         if (!(status & ISPCSI2_CTX_IRQSTATUS_FE_IRQ))
 690                 return;
 691
 692         /* Skip interrupts until we reach the frame skip count. The CSI2 will be
 693          * automatically disabled, as the frame skip count has been programmed
 694          * in the CSI2_CTx_CTRL1::COUNT field, so reenable it.
 695          *
 696          * It would have been nice to rely on the FRAME_NUMBER interrupt instead
 697          * but it turned out that the interrupt is only generated when the CSI2
 698          * writes to memory (the CSI2_CTx_CTRL1::COUNT field is decreased
 699          * correctly and reaches 0 when data is forwarded to the video port only
 700          * but no interrupt arrives). Maybe a CSI2 hardware bug.
 701          */
 702         if (csi2->frame_skip) {
 703                 csi2->frame_skip--;
 704                 if (csi2->frame_skip == 0) {
 705                         ctx->format_id = csi2_ctx_map_format(csi2);
 706                         csi2_ctx_config(isp, csi2, ctx);
 707                         csi2_ctx_enable(isp, csi2, n, 1);
 708                 }
 709                 return;
 710         }
 711
 712         if (csi2->output & CSI2_OUTPUT_MEMORY)
 713                 csi2_isr_buffer(csi2);
 714 }
 715
 716 /*
 717  * omap3isp_csi2_isr - CSI2 interrupt handling.
 718  */
 719 void omap3isp_csi2_isr(struct isp_csi2_device *csi2)
 720 {
 721         struct isp_pipeline *pipe = to_isp_pipeline(&csi2->subdev.entity);
 722         u32 csi2_irqstatus, cpxio1_irqstatus;
 723         struct isp_device *isp = csi2->isp;
 724
 725         if (!csi2->available)
 726                 return;
 727
 728         csi2_irqstatus = isp_reg_readl(isp, csi2->regs1, ISPCSI2_IRQSTATUS);
 729         isp_reg_writel(isp, csi2_irqstatus, csi2->regs1, ISPCSI2_IRQSTATUS);
 730
 731         /* Failure Cases */
 732         if (csi2_irqstatus & ISPCSI2_IRQSTATUS_COMPLEXIO1_ERR_IRQ) {
 733                 cpxio1_irqstatus = isp_reg_readl(isp, csi2->regs1,
 734                                                  ISPCSI2_PHY_IRQSTATUS);
 735                 isp_reg_writel(isp, cpxio1_irqstatus,
 736                                csi2->regs1, ISPCSI2_PHY_IRQSTATUS);
 737                 dev_dbg(isp->dev, "CSI2: ComplexIO Error IRQ "
 738                         "%x\n", cpxio1_irqstatus);
 739                 pipe->error = true;
 740         }
 741
 742         if (csi2_irqstatus & (ISPCSI2_IRQSTATUS_OCP_ERR_IRQ |
 743                               ISPCSI2_IRQSTATUS_SHORT_PACKET_IRQ |
 744                               ISPCSI2_IRQSTATUS_ECC_NO_CORRECTION_IRQ |
 745                               ISPCSI2_IRQSTATUS_COMPLEXIO2_ERR_IRQ |
 746                               ISPCSI2_IRQSTATUS_FIFO_OVF_IRQ)) {
 747                 dev_dbg(isp->dev, "CSI2 Err:"
 748                         " OCP:%d,"
 749                         " Short_pack:%d,"
 750                         " ECC:%d,"
 751                         " CPXIO2:%d,"
 752                         " FIFO_OVF:%d,"
 753                         "\n",
 754                         (csi2_irqstatus &
 755                          ISPCSI2_IRQSTATUS_OCP_ERR_IRQ) ? 1 : 0,
 756                         (csi2_irqstatus &
 757                          ISPCSI2_IRQSTATUS_SHORT_PACKET_IRQ) ? 1 : 0,
 758                         (csi2_irqstatus &
 759                          ISPCSI2_IRQSTATUS_ECC_NO_CORRECTION_IRQ) ? 1 : 0,
 760                         (csi2_irqstatus &
 761                          ISPCSI2_IRQSTATUS_COMPLEXIO2_ERR_IRQ) ? 1 : 0,
 762                         (csi2_irqstatus &
 763                          ISPCSI2_IRQSTATUS_FIFO_OVF_IRQ) ? 1 : 0);
 764                 pipe->error = true;
 765         }
 766
 767         if (omap3isp_module_sync_is_stopping(&csi2->wait, &csi2->stopping))
 768                 return;
 769
 770         /* Successful cases */
 771         if (csi2_irqstatus & ISPCSI2_IRQSTATUS_CONTEXT(0))
 772                 csi2_isr_ctx(csi2, &csi2->contexts[0]);
 773
 774         if (csi2_irqstatus & ISPCSI2_IRQSTATUS_ECC_CORRECTION_IRQ)
 775                 dev_dbg(isp->dev, "CSI2: ECC correction done\n");
 776 }
 777
 778 /* -----------------------------------------------------------------------------
 779  * ISP video operations
 780  */
 781
 782 /*
 783  * csi2_queue - Queues the first buffer when using memory output
 784  * @video: The video node
 785  * @buffer: buffer to queue
 786  */
 787 static int csi2_queue(struct isp_video *video, struct isp_buffer *buffer)
 788 {
 789         struct isp_device *isp = video->isp;
 790         struct isp_csi2_device *csi2 = &isp->isp_csi2a;
 791
 792         csi2_set_outaddr(csi2, buffer->isp_addr);
 793
 794         /*
 795          * If streaming was enabled before there was a buffer queued
 796          * or underrun happened in the ISR, the hardware was not enabled
 797          * and DMA queue flag ISP_VIDEO_DMAQUEUE_UNDERRUN is still set.
 798          * Enable it now.
 799          */
 800         if (csi2->video_out.dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
 801                 /* Enable / disable context 0 and IRQs */
 802                 csi2_if_enable(isp, csi2, 1);
 803                 csi2_ctx_enable(isp, csi2, 0, 1);
 804                 isp_video_dmaqueue_flags_clr(&csi2->video_out);
 805         }
 806
 807         return 0;
 808 }
 809
 810 static const struct isp_video_operations csi2_ispvideo_ops = {
 811         .queue = csi2_queue,
 812 };
 813
 814 /* -----------------------------------------------------------------------------
 815  * V4L2 subdev operations
 816  */
 817
 818 static struct v4l2_mbus_framefmt *
 819 __csi2_get_format(struct isp_csi2_device *csi2, struct v4l2_subdev_fh *fh,
 820                   unsigned int pad, enum v4l2_subdev_format_whence which)
 821 {
 822         if (which == V4L2_SUBDEV_FORMAT_TRY)
 823                 return v4l2_subdev_get_try_format(fh, pad);
 824         else
 825                 return &csi2->formats[pad];
 826 }
 827
 828 static void
 829 csi2_try_format(struct isp_csi2_device *csi2, struct v4l2_subdev_fh *fh,
 830                 unsigned int pad, struct v4l2_mbus_framefmt *fmt,
 831                 enum v4l2_subdev_format_whence which)
 832 {
 833         enum v4l2_mbus_pixelcode pixelcode;
 834         struct v4l2_mbus_framefmt *format;
 835         const struct isp_format_info *info;
 836         unsigned int i;
 837
 838         switch (pad) {
 839         case CSI2_PAD_SINK:
 840                 /* Clamp the width and height to valid range (1-8191). */
 841                 for (i = 0; i < ARRAY_SIZE(csi2_input_fmts); i++) {
 842                         if (fmt->code == csi2_input_fmts[i])
 843                                 break;
 844                 }
 845
 846                 /* If not found, use SGRBG10 as default */
 847                 if (i >= ARRAY_SIZE(csi2_input_fmts))
 848                         fmt->code = V4L2_MBUS_FMT_SGRBG10_1X10;
 849
 850                 fmt->width = clamp_t(u32, fmt->width, 1, 8191);
 851                 fmt->height = clamp_t(u32, fmt->height, 1, 8191);
 852                 break;
 853
 854         case CSI2_PAD_SOURCE:
 855                 /* Source format same as sink format, except for DPCM
 856                  * compression.
 857                  */
 858                 pixelcode = fmt->code;
 859                 format = __csi2_get_format(csi2, fh, CSI2_PAD_SINK, which);
 860                 memcpy(fmt, format, sizeof(*fmt));
 861
 862                 /*
 863                  * Only Allow DPCM decompression, and check that the
 864                  * pattern is preserved
 865                  */
 866                 info = omap3isp_video_format_info(fmt->code);
 867                 if (info->uncompressed == pixelcode)
 868                         fmt->code = pixelcode;
 869                 break;
 870         }
 871
 872         /* RGB, non-interlaced */
 873         fmt->colorspace = V4L2_COLORSPACE_SRGB;
 874         fmt->field = V4L2_FIELD_NONE;
 875 }
 876
 877 /*
 878  * csi2_enum_mbus_code - Handle pixel format enumeration
 879  * @sd     : pointer to v4l2 subdev structure
 880  * @fh     : V4L2 subdev file handle
 881  * @code   : pointer to v4l2_subdev_mbus_code_enum structure
 882  * return -EINVAL or zero on success
 883  */
 884 static int csi2_enum_mbus_code(struct v4l2_subdev *sd,
 885                                struct v4l2_subdev_fh *fh,
 886                                struct v4l2_subdev_mbus_code_enum *code)
 887 {
 888         struct isp_csi2_device *csi2 = v4l2_get_subdevdata(sd);
 889         struct v4l2_mbus_framefmt *format;
 890         const struct isp_format_info *info;
 891
 892         if (code->pad == CSI2_PAD_SINK) {
 893                 if (code->index >= ARRAY_SIZE(csi2_input_fmts))
 894                         return -EINVAL;
 895
 896                 code->code = csi2_input_fmts[code->index];
 897         } else {
 898                 format = __csi2_get_format(csi2, fh, CSI2_PAD_SINK,
 899                                            V4L2_SUBDEV_FORMAT_TRY);
 900                 switch (code->index) {
 901                 case 0:
 902                         /* Passthrough sink pad code */
 903                         code->code = format->code;
 904                         break;
 905                 case 1:
 906                         /* Uncompressed code */
 907                         info = omap3isp_video_format_info(format->code);
 908                         if (info->uncompressed == format->code)
 909                                 return -EINVAL;
 910
 911                         code->code = info->uncompressed;
 912                         break;
 913                 default:
 914                         return -EINVAL;
 915                 }
 916         }
 917
 918         return 0;
 919 }
 920
 921 static int csi2_enum_frame_size(struct v4l2_subdev *sd,
 922                                 struct v4l2_subdev_fh *fh,
 923                                 struct v4l2_subdev_frame_size_enum *fse)
 924 {
 925         struct isp_csi2_device *csi2 = v4l2_get_subdevdata(sd);
 926         struct v4l2_mbus_framefmt format;
 927
 928         if (fse->index != 0)
 929                 return -EINVAL;
 930
 931         format.code = fse->code;
 932         format.width = 1;
 933         format.height = 1;
 934         csi2_try_format(csi2, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
 935         fse->min_width = format.width;
 936         fse->min_height = format.height;
 937
 938         if (format.code != fse->code)
 939                 return -EINVAL;
 940
 941         format.code = fse->code;
 942         format.width = -1;
 943         format.height = -1;
 944         csi2_try_format(csi2, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
 945         fse->max_width = format.width;
 946         fse->max_height = format.height;
 947
 948         return 0;
 949 }
 950
 951 /*
 952  * csi2_get_format - Handle get format by pads subdev method
 953  * @sd : pointer to v4l2 subdev structure
 954  * @fh : V4L2 subdev file handle
 955  * @fmt: pointer to v4l2 subdev format structure
 956  * return -EINVAL or zero on success
 957  */
 958 static int csi2_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
 959                            struct v4l2_subdev_format *fmt)
 960 {
 961         struct isp_csi2_device *csi2 = v4l2_get_subdevdata(sd);
 962         struct v4l2_mbus_framefmt *format;
 963
 964         format = __csi2_get_format(csi2, fh, fmt->pad, fmt->which);
 965         if (format == NULL)
 966                 return -EINVAL;
 967
 968         fmt->format = *format;
 969         return 0;
 970 }
 971
 972 /*
 973  * csi2_set_format - Handle set format by pads subdev method
 974  * @sd : pointer to v4l2 subdev structure
 975  * @fh : V4L2 subdev file handle
 976  * @fmt: pointer to v4l2 subdev format structure
 977  * return -EINVAL or zero on success
 978  */
 979 static int csi2_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
 980                            struct v4l2_subdev_format *fmt)
 981 {
 982         struct isp_csi2_device *csi2 = v4l2_get_subdevdata(sd);
 983         struct v4l2_mbus_framefmt *format;
 984
 985         format = __csi2_get_format(csi2, fh, fmt->pad, fmt->which);
 986         if (format == NULL)
 987                 return -EINVAL;
 988
 989         csi2_try_format(csi2, fh, fmt->pad, &fmt->format, fmt->which);
 990         *format = fmt->format;
 991
 992         /* Propagate the format from sink to source */
 993         if (fmt->pad == CSI2_PAD_SINK) {
 994                 format = __csi2_get_format(csi2, fh, CSI2_PAD_SOURCE,
 995                                            fmt->which);
 996                 *format = fmt->format;
 997                 csi2_try_format(csi2, fh, CSI2_PAD_SOURCE, format, fmt->which);
 998         }
 999
1000         return 0;
1001 }
1002
1003 /*
1004  * csi2_init_formats - Initialize formats on all pads
1005  * @sd: ISP CSI2 V4L2 subdevice
1006  * @fh: V4L2 subdev file handle
1007  *
1008  * Initialize all pad formats with default values. If fh is not NULL, try
1009  * formats are initialized on the file handle. Otherwise active formats are
1010  * initialized on the device.
1011  */
1012 static int csi2_init_formats(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
1013 {
1014         struct v4l2_subdev_format format;
1015
1016         memset(&format, 0, sizeof(format));
1017         format.pad = CSI2_PAD_SINK;
1018         format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
1019         format.format.code = V4L2_MBUS_FMT_SGRBG10_1X10;
1020         format.format.width = 4096;
1021         format.format.height = 4096;
1022         csi2_set_format(sd, fh, &format);
1023
1024         return 0;
1025 }
1026
1027 /*
1028  * csi2_set_stream - Enable/Disable streaming on the CSI2 module
1029  * @sd: ISP CSI2 V4L2 subdevice
1030  * @enable: ISP pipeline stream state
1031  *
1032  * Return 0 on success or a negative error code otherwise.
1033  */
1034 static int csi2_set_stream(struct v4l2_subdev *sd, int enable)
1035 {
1036         struct isp_csi2_device *csi2 = v4l2_get_subdevdata(sd);
1037         struct isp_device *isp = csi2->isp;
1038         struct isp_video *video_out = &csi2->video_out;
1039
1040         switch (enable) {
1041         case ISP_PIPELINE_STREAM_CONTINUOUS:
1042                 if (omap3isp_csiphy_acquire(csi2->phy) < 0)
1043                         return -ENODEV;
1044                 if (csi2->output & CSI2_OUTPUT_MEMORY)
1045                         omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CSI2A_WRITE);
1046                 csi2_configure(csi2);
1047                 csi2_print_status(csi2);
1048
1049                 /*
1050                  * When outputting to memory with no buffer available, let the
1051                  * buffer queue handler start the hardware. A DMA queue flag
1052                  * ISP_VIDEO_DMAQUEUE_QUEUED will be set as soon as there is
1053                  * a buffer available.
1054                  */
1055                 if (csi2->output & CSI2_OUTPUT_MEMORY &&
1056                     !(video_out->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_QUEUED))
1057                         break;
1058                 /* Enable context 0 and IRQs */
1059                 atomic_set(&csi2->stopping, 0);
1060                 csi2_ctx_enable(isp, csi2, 0, 1);
1061                 csi2_if_enable(isp, csi2, 1);
1062                 isp_video_dmaqueue_flags_clr(video_out);
1063                 break;
1064
1065         case ISP_PIPELINE_STREAM_STOPPED:
1066                 if (csi2->state == ISP_PIPELINE_STREAM_STOPPED)
1067                         return 0;
1068                 if (omap3isp_module_sync_idle(&sd->entity, &csi2->wait,
1069                                               &csi2->stopping))
1070                         dev_dbg(isp->dev, "%s: module stop timeout.\n",
1071                                 sd->name);
1072                 csi2_ctx_enable(isp, csi2, 0, 0);
1073                 csi2_if_enable(isp, csi2, 0);
1074                 csi2_irq_ctx_set(isp, csi2, 0);
1075                 omap3isp_csiphy_release(csi2->phy);
1076                 isp_video_dmaqueue_flags_clr(video_out);
1077                 omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_CSI2A_WRITE);
1078                 break;
1079         }
1080
1081         csi2->state = enable;
1082         return 0;
1083 }
1084
1085 /* subdev video operations */
1086 static const struct v4l2_subdev_video_ops csi2_video_ops = {
1087         .s_stream = csi2_set_stream,
1088 };
1089
1090 /* subdev pad operations */
1091 static const struct v4l2_subdev_pad_ops csi2_pad_ops = {
1092         .enum_mbus_code = csi2_enum_mbus_code,
1093         .enum_frame_size = csi2_enum_frame_size,
1094         .get_fmt = csi2_get_format,
1095         .set_fmt = csi2_set_format,
1096 };
1097
1098 /* subdev operations */
1099 static const struct v4l2_subdev_ops csi2_ops = {
1100         .video = &csi2_video_ops,
1101         .pad = &csi2_pad_ops,
1102 };
1103
1104 /* subdev internal operations */
1105 static const struct v4l2_subdev_internal_ops csi2_internal_ops = {
1106         .open = csi2_init_formats,
1107 };
1108
1109 /* -----------------------------------------------------------------------------
1110  * Media entity operations
1111  */
1112
1113 /*
1114  * csi2_link_setup - Setup CSI2 connections.
1115  * @entity : Pointer to media entity structure
1116  * @local  : Pointer to local pad array
1117  * @remote : Pointer to remote pad array
1118  * @flags  : Link flags
1119  * return -EINVAL or zero on success
1120  */
1121 static int csi2_link_setup(struct media_entity *entity,
1122                            const struct media_pad *local,
1123                            const struct media_pad *remote, u32 flags)
1124 {
1125         struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
1126         struct isp_csi2_device *csi2 = v4l2_get_subdevdata(sd);
1127         struct isp_csi2_ctrl_cfg *ctrl = &csi2->ctrl;
1128
1129         /*
1130          * The ISP core doesn't support pipelines with multiple video outputs.
1131          * Revisit this when it will be implemented, and return -EBUSY for now.
1132          */
1133
1134         switch (local->index | media_entity_type(remote->entity)) {
1135         case CSI2_PAD_SOURCE | MEDIA_ENT_T_DEVNODE:
1136                 if (flags & MEDIA_LNK_FL_ENABLED) {
1137                         if (csi2->output & ~CSI2_OUTPUT_MEMORY)
1138                                 return -EBUSY;
1139                         csi2->output |= CSI2_OUTPUT_MEMORY;
1140                 } else {
1141                         csi2->output &= ~CSI2_OUTPUT_MEMORY;
1142                 }
1143                 break;
1144
1145         case CSI2_PAD_SOURCE | MEDIA_ENT_T_V4L2_SUBDEV:
1146                 if (flags & MEDIA_LNK_FL_ENABLED) {
1147                         if (csi2->output & ~CSI2_OUTPUT_CCDC)
1148                                 return -EBUSY;
1149                         csi2->output |= CSI2_OUTPUT_CCDC;
1150                 } else {
1151                         csi2->output &= ~CSI2_OUTPUT_CCDC;
1152                 }
1153                 break;
1154
1155         default:
1156                 /* Link from camera to CSI2 is fixed... */
1157                 return -EINVAL;
1158         }
1159
1160         ctrl->vp_only_enable =
1161                 (csi2->output & CSI2_OUTPUT_MEMORY) ? false : true;
1162         ctrl->vp_clk_enable = !!(csi2->output & CSI2_OUTPUT_CCDC);
1163
1164         return 0;
1165 }
1166
1167 /* media operations */
1168 static const struct media_entity_operations csi2_media_ops = {
1169         .link_setup = csi2_link_setup,
1170         .link_validate = v4l2_subdev_link_validate,
1171 };
1172
1173 void omap3isp_csi2_unregister_entities(struct isp_csi2_device *csi2)
1174 {
1175         v4l2_device_unregister_subdev(&csi2->subdev);
1176         omap3isp_video_unregister(&csi2->video_out);
1177 }
1178
1179 int omap3isp_csi2_register_entities(struct isp_csi2_device *csi2,
1180                                     struct v4l2_device *vdev)
1181 {
1182         int ret;
1183
1184         /* Register the subdev and video nodes. */
1185         ret = v4l2_device_register_subdev(vdev, &csi2->subdev);
1186         if (ret < 0)
1187                 goto error;
1188
1189         ret = omap3isp_video_register(&csi2->video_out, vdev);
1190         if (ret < 0)
1191                 goto error;
1192
1193         return 0;
1194
1195 error:
1196         omap3isp_csi2_unregister_entities(csi2);
1197         return ret;
1198 }
1199
1200 /* -----------------------------------------------------------------------------
1201  * ISP CSI2 initialisation and cleanup
1202  */
1203
1204 /*
1205  * csi2_init_entities - Initialize subdev and media entity.
1206  * @csi2: Pointer to csi2 structure.
1207  * return -ENOMEM or zero on success
1208  */
1209 static int csi2_init_entities(struct isp_csi2_device *csi2)
1210 {
1211         struct v4l2_subdev *sd = &csi2->subdev;
1212         struct media_pad *pads = csi2->pads;
1213         struct media_entity *me = &sd->entity;
1214         int ret;
1215
1216         v4l2_subdev_init(sd, &csi2_ops);
1217         sd->internal_ops = &csi2_internal_ops;
1218         strlcpy(sd->name, "OMAP3 ISP CSI2a", sizeof(sd->name));
1219
1220         sd->grp_id = 1 << 16;   /* group ID for isp subdevs */
1221         v4l2_set_subdevdata(sd, csi2);
1222         sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1223
1224         pads[CSI2_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
1225         pads[CSI2_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
1226
1227         me->ops = &csi2_media_ops;
1228         ret = media_entity_init(me, CSI2_PADS_NUM, pads, 0);
1229         if (ret < 0)
1230                 return ret;
1231
1232         csi2_init_formats(sd, NULL);
1233
1234         /* Video device node */
1235         csi2->video_out.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1236         csi2->video_out.ops = &csi2_ispvideo_ops;
1237         csi2->video_out.bpl_alignment = 32;
1238         csi2->video_out.bpl_zero_padding = 1;
1239         csi2->video_out.bpl_max = 0x1ffe0;
1240         csi2->video_out.isp = csi2->isp;
1241         csi2->video_out.capture_mem = PAGE_ALIGN(4096 * 4096) * 3;
1242
1243         ret = omap3isp_video_init(&csi2->video_out, "CSI2a");
1244         if (ret < 0)
1245                 goto error_video;
1246
1247         /* Connect the CSI2 subdev to the video node. */
1248         ret = media_entity_create_link(&csi2->subdev.entity, CSI2_PAD_SOURCE,
1249                                        &csi2->video_out.video.entity, 0, 0);
1250         if (ret < 0)
1251                 goto error_link;
1252
1253         return 0;
1254
1255 error_link:
1256         omap3isp_video_cleanup(&csi2->video_out);
1257 error_video:
1258         media_entity_cleanup(&csi2->subdev.entity);
1259         return ret;
1260 }
1261
1262 /*
1263  * omap3isp_csi2_init - Routine for module driver init
1264  */
1265 int omap3isp_csi2_init(struct isp_device *isp)
1266 {
1267         struct isp_csi2_device *csi2a = &isp->isp_csi2a;
1268         struct isp_csi2_device *csi2c = &isp->isp_csi2c;
1269         int ret;
1270
1271         csi2a->isp = isp;
1272         csi2a->available = 1;
1273         csi2a->regs1 = OMAP3_ISP_IOMEM_CSI2A_REGS1;
1274         csi2a->regs2 = OMAP3_ISP_IOMEM_CSI2A_REGS2;
1275         csi2a->phy = &isp->isp_csiphy2;
1276         csi2a->state = ISP_PIPELINE_STREAM_STOPPED;
1277         init_waitqueue_head(&csi2a->wait);
1278
1279         ret = csi2_init_entities(csi2a);
1280         if (ret < 0)
1281                 return ret;
1282
1283         if (isp->revision == ISP_REVISION_15_0) {
1284                 csi2c->isp = isp;
1285                 csi2c->available = 1;
1286                 csi2c->regs1 = OMAP3_ISP_IOMEM_CSI2C_REGS1;
1287                 csi2c->regs2 = OMAP3_ISP_IOMEM_CSI2C_REGS2;
1288                 csi2c->phy = &isp->isp_csiphy1;
1289                 csi2c->state = ISP_PIPELINE_STREAM_STOPPED;
1290                 init_waitqueue_head(&csi2c->wait);
1291         }
1292
1293         return 0;
1294 }
1295
1296 /*
1297  * omap3isp_csi2_cleanup - Routine for module driver cleanup
1298  */
1299 void omap3isp_csi2_cleanup(struct isp_device *isp)
1300 {
1301         struct isp_csi2_device *csi2a = &isp->isp_csi2a;
1302
1303         omap3isp_video_cleanup(&csi2a->video_out);
1304         media_entity_cleanup(&csi2a->subdev.entity);
1305 }