2 * experimental driver for simple i2c audio chips.
4 * Copyright (c) 2000 Gerd Knorr
6 * Eric Sandeen (eric_sandeen@bigfoot.com)
7 * Steve VanDeBogart (vandebo@uclink.berkeley.edu)
8 * Greg Alexander (galexand@acm.org)
10 * This code is placed under the terms of the GNU General Public License
13 * debug - set to 1 if you'd like to see debug messages
17 #include <linux/module.h>
18 #include <linux/moduleparam.h>
19 #include <linux/kernel.h>
20 #include <linux/sched.h>
21 #include <linux/string.h>
22 #include <linux/timer.h>
23 #include <linux/delay.h>
24 #include <linux/errno.h>
25 #include <linux/slab.h>
26 #include <linux/videodev.h>
27 #include <linux/i2c.h>
28 #include <linux/i2c-algo-bit.h>
29 #include <linux/init.h>
30 #include <linux/smp_lock.h>
31 #include <linux/kthread.h>
32 #include <linux/freezer.h>
34 #include <media/tvaudio.h>
35 #include <media/v4l2-common.h>
37 #include <media/i2c-addr.h>
39 /* ---------------------------------------------------------------------- */
42 static int debug
= 0; /* insmod parameter */
43 module_param(debug
, int, 0644);
45 MODULE_DESCRIPTION("device driver for various i2c TV sound decoder / audiomux chips");
46 MODULE_AUTHOR("Eric Sandeen, Steve VanDeBogart, Greg Alexander, Gerd Knorr");
47 MODULE_LICENSE("GPL");
51 /* ---------------------------------------------------------------------- */
57 typedef int (*getvalue
)(int);
58 typedef int (*checkit
)(struct CHIPSTATE
*);
59 typedef int (*initialize
)(struct CHIPSTATE
*);
60 typedef int (*getmode
)(struct CHIPSTATE
*);
61 typedef void (*setmode
)(struct CHIPSTATE
*, int mode
);
62 typedef void (*checkmode
)(struct CHIPSTATE
*);
65 typedef struct AUDIOCMD
{
66 int count
; /* # of bytes to send */
67 unsigned char bytes
[MAXREGS
+1]; /* addr, data, data, ... */
70 /* chip description */
72 char *name
; /* chip name */
74 int addr_lo
, addr_hi
; /* i2c address range */
75 int registers
; /* # of registers */
79 initialize initialize
;
81 #define CHIP_HAS_VOLUME 1
82 #define CHIP_HAS_BASSTREBLE 2
83 #define CHIP_HAS_INPUTSEL 4
85 /* various i2c command sequences */
88 /* which register has which value */
89 int leftreg
,rightreg
,treblereg
,bassreg
;
91 /* initialize with (defaults to 65535/65535/32768/32768 */
92 int leftinit
,rightinit
,trebleinit
,bassinit
;
94 /* functions to convert the values (v4l -> chip) */
95 getvalue volfunc
,treblefunc
,bassfunc
;
101 /* check / autoswitch audio after channel switches */
104 /* input switch register + values for v4l inputs */
110 static struct CHIPDESC chiplist
[];
112 /* current state of the chip */
116 /* index into CHIPDESC array */
119 /* shadow register set */
122 /* current settings */
123 __u16 left
,right
,treble
,bass
,muted
,mode
;
129 struct task_struct
*thread
;
130 struct timer_list wt
;
135 /* ---------------------------------------------------------------------- */
138 static unsigned short normal_i2c
[] = {
139 I2C_ADDR_TDA8425
>> 1,
140 I2C_ADDR_TEA6300
>> 1,
141 I2C_ADDR_TEA6420
>> 1,
142 I2C_ADDR_TDA9840
>> 1,
143 I2C_ADDR_TDA985x_L
>> 1,
144 I2C_ADDR_TDA985x_H
>> 1,
145 I2C_ADDR_TDA9874
>> 1,
146 I2C_ADDR_PIC16C54
>> 1,
150 static struct i2c_driver driver
;
151 static struct i2c_client client_template
;
154 /* ---------------------------------------------------------------------- */
155 /* i2c I/O functions */
157 static int chip_write(struct CHIPSTATE
*chip
, int subaddr
, int val
)
159 unsigned char buffer
[2];
162 v4l_dbg(1, debug
, &chip
->c
, "%s: chip_write: 0x%x\n",
164 chip
->shadow
.bytes
[1] = val
;
166 if (1 != i2c_master_send(&chip
->c
,buffer
,1)) {
167 v4l_warn(&chip
->c
, "%s: I/O error (write 0x%x)\n",
172 v4l_dbg(1, debug
, &chip
->c
, "%s: chip_write: reg%d=0x%x\n",
173 chip
->c
.name
, subaddr
, val
);
174 chip
->shadow
.bytes
[subaddr
+1] = val
;
177 if (2 != i2c_master_send(&chip
->c
,buffer
,2)) {
178 v4l_warn(&chip
->c
, "%s: I/O error (write reg%d=0x%x)\n",
179 chip
->c
.name
, subaddr
, val
);
186 static int chip_write_masked(struct CHIPSTATE
*chip
, int subaddr
, int val
, int mask
)
190 val
= (chip
->shadow
.bytes
[1] & ~mask
) | (val
& mask
);
192 val
= (chip
->shadow
.bytes
[subaddr
+1] & ~mask
) | (val
& mask
);
195 return chip_write(chip
, subaddr
, val
);
198 static int chip_read(struct CHIPSTATE
*chip
)
200 unsigned char buffer
;
202 if (1 != i2c_master_recv(&chip
->c
,&buffer
,1)) {
203 v4l_warn(&chip
->c
, "%s: I/O error (read)\n",
207 v4l_dbg(1, debug
, &chip
->c
, "%s: chip_read: 0x%x\n",chip
->c
.name
, buffer
);
211 static int chip_read2(struct CHIPSTATE
*chip
, int subaddr
)
213 unsigned char write
[1];
214 unsigned char read
[1];
215 struct i2c_msg msgs
[2] = {
216 { chip
->c
.addr
, 0, 1, write
},
217 { chip
->c
.addr
, I2C_M_RD
, 1, read
}
221 if (2 != i2c_transfer(chip
->c
.adapter
,msgs
,2)) {
222 v4l_warn(&chip
->c
, "%s: I/O error (read2)\n", chip
->c
.name
);
225 v4l_dbg(1, debug
, &chip
->c
, "%s: chip_read2: reg%d=0x%x\n",
226 chip
->c
.name
, subaddr
,read
[0]);
230 static int chip_cmd(struct CHIPSTATE
*chip
, char *name
, audiocmd
*cmd
)
237 /* update our shadow register set; print bytes if (debug > 0) */
238 v4l_dbg(1, debug
, &chip
->c
, "%s: chip_cmd(%s): reg=%d, data:",
239 chip
->c
.name
, name
,cmd
->bytes
[0]);
240 for (i
= 1; i
< cmd
->count
; i
++) {
242 printk(" 0x%x",cmd
->bytes
[i
]);
243 chip
->shadow
.bytes
[i
+cmd
->bytes
[0]] = cmd
->bytes
[i
];
248 /* send data to the chip */
249 if (cmd
->count
!= i2c_master_send(&chip
->c
,cmd
->bytes
,cmd
->count
)) {
250 v4l_warn(&chip
->c
, "%s: I/O error (%s)\n", chip
->c
.name
, name
);
256 /* ---------------------------------------------------------------------- */
257 /* kernel thread for doing i2c stuff asyncronly
258 * right now it is used only to check the audio mode (mono/stereo/whatever)
259 * some time after switching to another TV channel, then turn on stereo
263 static void chip_thread_wake(unsigned long data
)
265 struct CHIPSTATE
*chip
= (struct CHIPSTATE
*)data
;
266 wake_up_process(chip
->thread
);
269 static int chip_thread(void *data
)
271 struct CHIPSTATE
*chip
= data
;
272 struct CHIPDESC
*desc
= chiplist
+ chip
->type
;
274 v4l_dbg(1, debug
, &chip
->c
, "%s: thread started\n", chip
->c
.name
);
277 set_current_state(TASK_INTERRUPTIBLE
);
278 if (!kthread_should_stop())
280 set_current_state(TASK_RUNNING
);
282 if (kthread_should_stop())
284 v4l_dbg(1, debug
, &chip
->c
, "%s: thread wakeup\n", chip
->c
.name
);
286 /* don't do anything for radio or if mode != auto */
287 if (chip
->radio
|| chip
->mode
!= 0)
290 /* have a look what's going on */
291 desc
->checkmode(chip
);
293 /* schedule next check */
294 mod_timer(&chip
->wt
, jiffies
+2*HZ
);
297 v4l_dbg(1, debug
, &chip
->c
, "%s: thread exiting\n", chip
->c
.name
);
301 static void generic_checkmode(struct CHIPSTATE
*chip
)
303 struct CHIPDESC
*desc
= chiplist
+ chip
->type
;
304 int mode
= desc
->getmode(chip
);
306 if (mode
== chip
->prevmode
)
309 v4l_dbg(1, debug
, &chip
->c
, "%s: thread checkmode\n", chip
->c
.name
);
310 chip
->prevmode
= mode
;
312 if (mode
& VIDEO_SOUND_STEREO
)
313 desc
->setmode(chip
,VIDEO_SOUND_STEREO
);
314 else if (mode
& VIDEO_SOUND_LANG1
)
315 desc
->setmode(chip
,VIDEO_SOUND_LANG1
);
316 else if (mode
& VIDEO_SOUND_LANG2
)
317 desc
->setmode(chip
,VIDEO_SOUND_LANG2
);
319 desc
->setmode(chip
,VIDEO_SOUND_MONO
);
322 /* ---------------------------------------------------------------------- */
323 /* audio chip descriptions - defines+functions for tda9840 */
325 #define TDA9840_SW 0x00
326 #define TDA9840_LVADJ 0x02
327 #define TDA9840_STADJ 0x03
328 #define TDA9840_TEST 0x04
330 #define TDA9840_MONO 0x10
331 #define TDA9840_STEREO 0x2a
332 #define TDA9840_DUALA 0x12
333 #define TDA9840_DUALB 0x1e
334 #define TDA9840_DUALAB 0x1a
335 #define TDA9840_DUALBA 0x16
336 #define TDA9840_EXTERNAL 0x7a
338 #define TDA9840_DS_DUAL 0x20 /* Dual sound identified */
339 #define TDA9840_ST_STEREO 0x40 /* Stereo sound identified */
340 #define TDA9840_PONRES 0x80 /* Power-on reset detected if = 1 */
342 #define TDA9840_TEST_INT1SN 0x1 /* Integration time 0.5s when set */
343 #define TDA9840_TEST_INTFU 0x02 /* Disables integrator function */
345 static int tda9840_getmode(struct CHIPSTATE
*chip
)
349 val
= chip_read(chip
);
350 mode
= VIDEO_SOUND_MONO
;
351 if (val
& TDA9840_DS_DUAL
)
352 mode
|= VIDEO_SOUND_LANG1
| VIDEO_SOUND_LANG2
;
353 if (val
& TDA9840_ST_STEREO
)
354 mode
|= VIDEO_SOUND_STEREO
;
356 v4l_dbg(1, debug
, &chip
->c
, "tda9840_getmode(): raw chip read: %d, return: %d\n",
361 static void tda9840_setmode(struct CHIPSTATE
*chip
, int mode
)
364 int t
= chip
->shadow
.bytes
[TDA9840_SW
+ 1] & ~0x7e;
367 case VIDEO_SOUND_MONO
:
370 case VIDEO_SOUND_STEREO
:
373 case VIDEO_SOUND_LANG1
:
376 case VIDEO_SOUND_LANG2
:
384 chip_write(chip
, TDA9840_SW
, t
);
387 static int tda9840_checkit(struct CHIPSTATE
*chip
)
390 rc
= chip_read(chip
);
391 /* lower 5 bits should be 0 */
392 return ((rc
& 0x1f) == 0) ? 1 : 0;
395 /* ---------------------------------------------------------------------- */
396 /* audio chip descriptions - defines+functions for tda985x */
398 /* subaddresses for TDA9855 */
399 #define TDA9855_VR 0x00 /* Volume, right */
400 #define TDA9855_VL 0x01 /* Volume, left */
401 #define TDA9855_BA 0x02 /* Bass */
402 #define TDA9855_TR 0x03 /* Treble */
403 #define TDA9855_SW 0x04 /* Subwoofer - not connected on DTV2000 */
405 /* subaddresses for TDA9850 */
406 #define TDA9850_C4 0x04 /* Control 1 for TDA9850 */
408 /* subaddesses for both chips */
409 #define TDA985x_C5 0x05 /* Control 2 for TDA9850, Control 1 for TDA9855 */
410 #define TDA985x_C6 0x06 /* Control 3 for TDA9850, Control 2 for TDA9855 */
411 #define TDA985x_C7 0x07 /* Control 4 for TDA9850, Control 3 for TDA9855 */
412 #define TDA985x_A1 0x08 /* Alignment 1 for both chips */
413 #define TDA985x_A2 0x09 /* Alignment 2 for both chips */
414 #define TDA985x_A3 0x0a /* Alignment 3 for both chips */
416 /* Masks for bits in TDA9855 subaddresses */
417 /* 0x00 - VR in TDA9855 */
418 /* 0x01 - VL in TDA9855 */
419 /* lower 7 bits control gain from -71dB (0x28) to 16dB (0x7f)
420 * in 1dB steps - mute is 0x27 */
423 /* 0x02 - BA in TDA9855 */
424 /* lower 5 bits control bass gain from -12dB (0x06) to 16.5dB (0x19)
425 * in .5dB steps - 0 is 0x0E */
428 /* 0x03 - TR in TDA9855 */
429 /* 4 bits << 1 control treble gain from -12dB (0x3) to 12dB (0xb)
430 * in 3dB steps - 0 is 0x7 */
432 /* Masks for bits in both chips' subaddresses */
433 /* 0x04 - SW in TDA9855, C4/Control 1 in TDA9850 */
434 /* Unique to TDA9855: */
435 /* 4 bits << 2 control subwoofer/surround gain from -14db (0x1) to 14db (0xf)
436 * in 3dB steps - mute is 0x0 */
438 /* Unique to TDA9850: */
439 /* lower 4 bits control stereo noise threshold, over which stereo turns off
440 * set to values of 0x00 through 0x0f for Ster1 through Ster16 */
443 /* 0x05 - C5 - Control 1 in TDA9855 , Control 2 in TDA9850*/
444 /* Unique to TDA9855: */
445 #define TDA9855_MUTE 1<<7 /* GMU, Mute at outputs */
446 #define TDA9855_AVL 1<<6 /* AVL, Automatic Volume Level */
447 #define TDA9855_LOUD 1<<5 /* Loudness, 1==off */
448 #define TDA9855_SUR 1<<3 /* Surround / Subwoofer 1==.5(L-R) 0==.5(L+R) */
449 /* Bits 0 to 3 select various combinations
450 * of line in and line out, only the
451 * interesting ones are defined */
452 #define TDA9855_EXT 1<<2 /* Selects inputs LIR and LIL. Pins 41 & 12 */
453 #define TDA9855_INT 0 /* Selects inputs LOR and LOL. (internal) */
455 /* Unique to TDA9850: */
456 /* lower 4 bits contol SAP noise threshold, over which SAP turns off
457 * set to values of 0x00 through 0x0f for SAP1 through SAP16 */
460 /* 0x06 - C6 - Control 2 in TDA9855, Control 3 in TDA9850 */
461 /* Common to TDA9855 and TDA9850: */
462 #define TDA985x_SAP 3<<6 /* Selects SAP output, mute if not received */
463 #define TDA985x_STEREO 1<<6 /* Selects Stereo ouput, mono if not received */
464 #define TDA985x_MONO 0 /* Forces Mono output */
465 #define TDA985x_LMU 1<<3 /* Mute (LOR/LOL for 9855, OUTL/OUTR for 9850) */
467 /* Unique to TDA9855: */
468 #define TDA9855_TZCM 1<<5 /* If set, don't mute till zero crossing */
469 #define TDA9855_VZCM 1<<4 /* If set, don't change volume till zero crossing*/
470 #define TDA9855_LINEAR 0 /* Linear Stereo */
471 #define TDA9855_PSEUDO 1 /* Pseudo Stereo */
472 #define TDA9855_SPAT_30 2 /* Spatial Stereo, 30% anti-phase crosstalk */
473 #define TDA9855_SPAT_50 3 /* Spatial Stereo, 52% anti-phase crosstalk */
474 #define TDA9855_E_MONO 7 /* Forced mono - mono select elseware, so useless*/
476 /* 0x07 - C7 - Control 3 in TDA9855, Control 4 in TDA9850 */
477 /* Common to both TDA9855 and TDA9850: */
478 /* lower 4 bits control input gain from -3.5dB (0x0) to 4dB (0xF)
479 * in .5dB steps - 0dB is 0x7 */
481 /* 0x08, 0x09 - A1 and A2 (read/write) */
482 /* Common to both TDA9855 and TDA9850: */
483 /* lower 5 bites are wideband and spectral expander alignment
484 * from 0x00 to 0x1f - nominal at 0x0f and 0x10 (read/write) */
485 #define TDA985x_STP 1<<5 /* Stereo Pilot/detect (read-only) */
486 #define TDA985x_SAPP 1<<6 /* SAP Pilot/detect (read-only) */
487 #define TDA985x_STS 1<<7 /* Stereo trigger 1= <35mV 0= <30mV (write-only)*/
490 /* Common to both TDA9855 and TDA9850: */
491 /* lower 3 bits control timing current for alignment: -30% (0x0), -20% (0x1),
492 * -10% (0x2), nominal (0x3), +10% (0x6), +20% (0x5), +30% (0x4) */
493 #define TDA985x_ADJ 1<<7 /* Stereo adjust on/off (wideband and spectral */
495 static int tda9855_volume(int val
) { return val
/0x2e8+0x27; }
496 static int tda9855_bass(int val
) { return val
/0xccc+0x06; }
497 static int tda9855_treble(int val
) { return (val
/0x1c71+0x3)<<1; }
499 static int tda985x_getmode(struct CHIPSTATE
*chip
)
503 mode
= ((TDA985x_STP
| TDA985x_SAPP
) &
504 chip_read(chip
)) >> 4;
505 /* Add mono mode regardless of SAP and stereo */
506 /* Allows forced mono */
507 return mode
| VIDEO_SOUND_MONO
;
510 static void tda985x_setmode(struct CHIPSTATE
*chip
, int mode
)
513 int c6
= chip
->shadow
.bytes
[TDA985x_C6
+1] & 0x3f;
516 case VIDEO_SOUND_MONO
:
519 case VIDEO_SOUND_STEREO
:
520 c6
|= TDA985x_STEREO
;
522 case VIDEO_SOUND_LANG1
:
529 chip_write(chip
,TDA985x_C6
,c6
);
533 /* ---------------------------------------------------------------------- */
534 /* audio chip descriptions - defines+functions for tda9873h */
536 /* Subaddresses for TDA9873H */
538 #define TDA9873_SW 0x00 /* Switching */
539 #define TDA9873_AD 0x01 /* Adjust */
540 #define TDA9873_PT 0x02 /* Port */
542 /* Subaddress 0x00: Switching Data
545 * B1, B0: Input source selection
547 * 1, 0 external stereo
550 #define TDA9873_INP_MASK 3
551 #define TDA9873_INTERNAL 0
552 #define TDA9873_EXT_STEREO 2
553 #define TDA9873_EXT_MONO 1
555 /* B3, B2: output signal select
556 * B4 : transmission mode
559 * 1, 1, 1 Stereo (reversed channel)
566 #define TDA9873_TR_MASK (7 << 2)
567 #define TDA9873_TR_MONO 4
568 #define TDA9873_TR_STEREO 1 << 4
569 #define TDA9873_TR_REVERSE (1 << 3) & (1 << 2)
570 #define TDA9873_TR_DUALA 1 << 2
571 #define TDA9873_TR_DUALB 1 << 3
573 /* output level controls
574 * B5: output level switch (0 = reduced gain, 1 = normal gain)
575 * B6: mute (1 = muted)
576 * B7: auto-mute (1 = auto-mute enabled)
579 #define TDA9873_GAIN_NORMAL 1 << 5
580 #define TDA9873_MUTE 1 << 6
581 #define TDA9873_AUTOMUTE 1 << 7
583 /* Subaddress 0x01: Adjust/standard */
585 /* Lower 4 bits (C3..C0) control stereo adjustment on R channel (-0.6 - +0.7 dB)
586 * Recommended value is +0 dB
589 #define TDA9873_STEREO_ADJ 0x06 /* 0dB gain */
591 /* Bits C6..C4 control FM stantard
593 * 0, 0, 0 B/G (PAL FM)
602 #define TDA9873_DK1 2
603 #define TDA9873_DK2 3
604 #define TDA9873_DK3 4
607 /* C7 controls identification response time (1=fast/0=normal)
609 #define TDA9873_IDR_NORM 0
610 #define TDA9873_IDR_FAST 1 << 7
613 /* Subaddress 0x02: Port data */
615 /* E1, E0 free programmable ports P1/P2
622 #define TDA9873_PORTS 3
625 #define TDA9873_TST_PORT 1 << 2
627 /* E5..E3 control mono output channel (together with transmission mode bit B4)
632 * 0 1 0 1 mono (from stereo decoder)
634 #define TDA9873_MOUT_MONO 0
635 #define TDA9873_MOUT_FMONO 0
636 #define TDA9873_MOUT_DUALA 0
637 #define TDA9873_MOUT_DUALB 1 << 3
638 #define TDA9873_MOUT_ST 1 << 4
639 #define TDA9873_MOUT_EXTM (1 << 4 ) & (1 << 3)
640 #define TDA9873_MOUT_EXTL 1 << 5
641 #define TDA9873_MOUT_EXTR (1 << 5 ) & (1 << 3)
642 #define TDA9873_MOUT_EXTLR (1 << 5 ) & (1 << 4)
643 #define TDA9873_MOUT_MUTE (1 << 5 ) & (1 << 4) & (1 << 3)
645 /* Status bits: (chip read) */
646 #define TDA9873_PONR 0 /* Power-on reset detected if = 1 */
647 #define TDA9873_STEREO 2 /* Stereo sound is identified */
648 #define TDA9873_DUAL 4 /* Dual sound is identified */
650 static int tda9873_getmode(struct CHIPSTATE
*chip
)
654 val
= chip_read(chip
);
655 mode
= VIDEO_SOUND_MONO
;
656 if (val
& TDA9873_STEREO
)
657 mode
|= VIDEO_SOUND_STEREO
;
658 if (val
& TDA9873_DUAL
)
659 mode
|= VIDEO_SOUND_LANG1
| VIDEO_SOUND_LANG2
;
660 v4l_dbg(1, debug
, &chip
->c
, "tda9873_getmode(): raw chip read: %d, return: %d\n",
665 static void tda9873_setmode(struct CHIPSTATE
*chip
, int mode
)
667 int sw_data
= chip
->shadow
.bytes
[TDA9873_SW
+1] & ~ TDA9873_TR_MASK
;
668 /* int adj_data = chip->shadow.bytes[TDA9873_AD+1] ; */
670 if ((sw_data
& TDA9873_INP_MASK
) != TDA9873_INTERNAL
) {
671 v4l_dbg(1, debug
, &chip
->c
, "tda9873_setmode(): external input\n");
675 v4l_dbg(1, debug
, &chip
->c
, "tda9873_setmode(): chip->shadow.bytes[%d] = %d\n", TDA9873_SW
+1, chip
->shadow
.bytes
[TDA9873_SW
+1]);
676 v4l_dbg(1, debug
, &chip
->c
, "tda9873_setmode(): sw_data = %d\n", sw_data
);
679 case VIDEO_SOUND_MONO
:
680 sw_data
|= TDA9873_TR_MONO
;
682 case VIDEO_SOUND_STEREO
:
683 sw_data
|= TDA9873_TR_STEREO
;
685 case VIDEO_SOUND_LANG1
:
686 sw_data
|= TDA9873_TR_DUALA
;
688 case VIDEO_SOUND_LANG2
:
689 sw_data
|= TDA9873_TR_DUALB
;
696 chip_write(chip
, TDA9873_SW
, sw_data
);
697 v4l_dbg(1, debug
, &chip
->c
, "tda9873_setmode(): req. mode %d; chip_write: %d\n",
701 static int tda9873_checkit(struct CHIPSTATE
*chip
)
705 if (-1 == (rc
= chip_read2(chip
,254)))
707 return (rc
& ~0x1f) == 0x80;
711 /* ---------------------------------------------------------------------- */
712 /* audio chip description - defines+functions for tda9874h and tda9874a */
713 /* Dariusz Kowalewski <darekk@automex.pl> */
715 /* Subaddresses for TDA9874H and TDA9874A (slave rx) */
716 #define TDA9874A_AGCGR 0x00 /* AGC gain */
717 #define TDA9874A_GCONR 0x01 /* general config */
718 #define TDA9874A_MSR 0x02 /* monitor select */
719 #define TDA9874A_C1FRA 0x03 /* carrier 1 freq. */
720 #define TDA9874A_C1FRB 0x04 /* carrier 1 freq. */
721 #define TDA9874A_C1FRC 0x05 /* carrier 1 freq. */
722 #define TDA9874A_C2FRA 0x06 /* carrier 2 freq. */
723 #define TDA9874A_C2FRB 0x07 /* carrier 2 freq. */
724 #define TDA9874A_C2FRC 0x08 /* carrier 2 freq. */
725 #define TDA9874A_DCR 0x09 /* demodulator config */
726 #define TDA9874A_FMER 0x0a /* FM de-emphasis */
727 #define TDA9874A_FMMR 0x0b /* FM dematrix */
728 #define TDA9874A_C1OLAR 0x0c /* ch.1 output level adj. */
729 #define TDA9874A_C2OLAR 0x0d /* ch.2 output level adj. */
730 #define TDA9874A_NCONR 0x0e /* NICAM config */
731 #define TDA9874A_NOLAR 0x0f /* NICAM output level adj. */
732 #define TDA9874A_NLELR 0x10 /* NICAM lower error limit */
733 #define TDA9874A_NUELR 0x11 /* NICAM upper error limit */
734 #define TDA9874A_AMCONR 0x12 /* audio mute control */
735 #define TDA9874A_SDACOSR 0x13 /* stereo DAC output select */
736 #define TDA9874A_AOSR 0x14 /* analog output select */
737 #define TDA9874A_DAICONR 0x15 /* digital audio interface config */
738 #define TDA9874A_I2SOSR 0x16 /* I2S-bus output select */
739 #define TDA9874A_I2SOLAR 0x17 /* I2S-bus output level adj. */
740 #define TDA9874A_MDACOSR 0x18 /* mono DAC output select (tda9874a) */
741 #define TDA9874A_ESP 0xFF /* easy standard progr. (tda9874a) */
743 /* Subaddresses for TDA9874H and TDA9874A (slave tx) */
744 #define TDA9874A_DSR 0x00 /* device status */
745 #define TDA9874A_NSR 0x01 /* NICAM status */
746 #define TDA9874A_NECR 0x02 /* NICAM error count */
747 #define TDA9874A_DR1 0x03 /* add. data LSB */
748 #define TDA9874A_DR2 0x04 /* add. data MSB */
749 #define TDA9874A_LLRA 0x05 /* monitor level read-out LSB */
750 #define TDA9874A_LLRB 0x06 /* monitor level read-out MSB */
751 #define TDA9874A_SIFLR 0x07 /* SIF level */
752 #define TDA9874A_TR2 252 /* test reg. 2 */
753 #define TDA9874A_TR1 253 /* test reg. 1 */
754 #define TDA9874A_DIC 254 /* device id. code */
755 #define TDA9874A_SIC 255 /* software id. code */
758 static int tda9874a_mode
= 1; /* 0: A2, 1: NICAM */
759 static int tda9874a_GCONR
= 0xc0; /* default config. input pin: SIFSEL=0 */
760 static int tda9874a_NCONR
= 0x01; /* default NICAM config.: AMSEL=0,AMUTE=1 */
761 static int tda9874a_ESP
= 0x07; /* default standard: NICAM D/K */
762 static int tda9874a_dic
= -1; /* device id. code */
764 /* insmod options for tda9874a */
765 static unsigned int tda9874a_SIF
= UNSET
;
766 static unsigned int tda9874a_AMSEL
= UNSET
;
767 static unsigned int tda9874a_STD
= UNSET
;
768 module_param(tda9874a_SIF
, int, 0444);
769 module_param(tda9874a_AMSEL
, int, 0444);
770 module_param(tda9874a_STD
, int, 0444);
773 * initialization table for tda9874 decoder:
774 * - carrier 1 freq. registers (3 bytes)
775 * - carrier 2 freq. registers (3 bytes)
776 * - demudulator config register
777 * - FM de-emphasis register (slow identification mode)
778 * Note: frequency registers must be written in single i2c transfer.
780 static struct tda9874a_MODES
{
783 } tda9874a_modelist
[9] = {
785 { 9, { TDA9874A_C1FRA
, 0x72,0x95,0x55, 0x77,0xA0,0x00, 0x00,0x00 }} },
787 { 9, { TDA9874A_C1FRA
, 0x5D,0xC0,0x00, 0x62,0x6A,0xAA, 0x20,0x22 }} },
789 { 9, { TDA9874A_C1FRA
, 0x87,0x6A,0xAA, 0x82,0x60,0x00, 0x00,0x00 }} },
791 { 9, { TDA9874A_C1FRA
, 0x87,0x6A,0xAA, 0x8C,0x75,0x55, 0x00,0x00 }} },
793 { 9, { TDA9874A_C1FRA
, 0x87,0x6A,0xAA, 0x77,0xA0,0x00, 0x00,0x00 }} },
795 { 9, { TDA9874A_C1FRA
, 0x7D,0x00,0x00, 0x88,0x8A,0xAA, 0x08,0x33 }} },
797 { 9, { TDA9874A_C1FRA
, 0x72,0x95,0x55, 0x79,0xEA,0xAA, 0x08,0x33 }} },
798 { "NICAM, D/K", /* default */
799 { 9, { TDA9874A_C1FRA
, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x08,0x33 }} },
801 { 9, { TDA9874A_C1FRA
, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x09,0x33 }} }
804 static int tda9874a_setup(struct CHIPSTATE
*chip
)
806 chip_write(chip
, TDA9874A_AGCGR
, 0x00); /* 0 dB */
807 chip_write(chip
, TDA9874A_GCONR
, tda9874a_GCONR
);
808 chip_write(chip
, TDA9874A_MSR
, (tda9874a_mode
) ? 0x03:0x02);
809 if(tda9874a_dic
== 0x11) {
810 chip_write(chip
, TDA9874A_FMMR
, 0x80);
811 } else { /* dic == 0x07 */
812 chip_cmd(chip
,"tda9874_modelist",&tda9874a_modelist
[tda9874a_STD
].cmd
);
813 chip_write(chip
, TDA9874A_FMMR
, 0x00);
815 chip_write(chip
, TDA9874A_C1OLAR
, 0x00); /* 0 dB */
816 chip_write(chip
, TDA9874A_C2OLAR
, 0x00); /* 0 dB */
817 chip_write(chip
, TDA9874A_NCONR
, tda9874a_NCONR
);
818 chip_write(chip
, TDA9874A_NOLAR
, 0x00); /* 0 dB */
819 /* Note: If signal quality is poor you may want to change NICAM */
820 /* error limit registers (NLELR and NUELR) to some greater values. */
821 /* Then the sound would remain stereo, but won't be so clear. */
822 chip_write(chip
, TDA9874A_NLELR
, 0x14); /* default */
823 chip_write(chip
, TDA9874A_NUELR
, 0x50); /* default */
825 if(tda9874a_dic
== 0x11) {
826 chip_write(chip
, TDA9874A_AMCONR
, 0xf9);
827 chip_write(chip
, TDA9874A_SDACOSR
, (tda9874a_mode
) ? 0x81:0x80);
828 chip_write(chip
, TDA9874A_AOSR
, 0x80);
829 chip_write(chip
, TDA9874A_MDACOSR
, (tda9874a_mode
) ? 0x82:0x80);
830 chip_write(chip
, TDA9874A_ESP
, tda9874a_ESP
);
831 } else { /* dic == 0x07 */
832 chip_write(chip
, TDA9874A_AMCONR
, 0xfb);
833 chip_write(chip
, TDA9874A_SDACOSR
, (tda9874a_mode
) ? 0x81:0x80);
834 chip_write(chip
, TDA9874A_AOSR
, 0x00); /* or 0x10 */
836 v4l_dbg(1, debug
, &chip
->c
, "tda9874a_setup(): %s [0x%02X].\n",
837 tda9874a_modelist
[tda9874a_STD
].name
,tda9874a_STD
);
841 static int tda9874a_getmode(struct CHIPSTATE
*chip
)
844 int necr
; /* just for debugging */
846 mode
= VIDEO_SOUND_MONO
;
848 if(-1 == (dsr
= chip_read2(chip
,TDA9874A_DSR
)))
850 if(-1 == (nsr
= chip_read2(chip
,TDA9874A_NSR
)))
852 if(-1 == (necr
= chip_read2(chip
,TDA9874A_NECR
)))
855 /* need to store dsr/nsr somewhere */
856 chip
->shadow
.bytes
[MAXREGS
-2] = dsr
;
857 chip
->shadow
.bytes
[MAXREGS
-1] = nsr
;
860 /* Note: DSR.RSSF and DSR.AMSTAT bits are also checked.
861 * If NICAM auto-muting is enabled, DSR.AMSTAT=1 indicates
862 * that sound has (temporarily) switched from NICAM to
863 * mono FM (or AM) on 1st sound carrier due to high NICAM bit
864 * error count. So in fact there is no stereo in this case :-(
865 * But changing the mode to VIDEO_SOUND_MONO would switch
866 * external 4052 multiplexer in audio_hook().
868 if(nsr
& 0x02) /* NSR.S/MB=1 */
869 mode
|= VIDEO_SOUND_STEREO
;
870 if(nsr
& 0x01) /* NSR.D/SB=1 */
871 mode
|= VIDEO_SOUND_LANG1
| VIDEO_SOUND_LANG2
;
873 if(dsr
& 0x02) /* DSR.IDSTE=1 */
874 mode
|= VIDEO_SOUND_STEREO
;
875 if(dsr
& 0x04) /* DSR.IDDUA=1 */
876 mode
|= VIDEO_SOUND_LANG1
| VIDEO_SOUND_LANG2
;
879 v4l_dbg(1, debug
, &chip
->c
, "tda9874a_getmode(): DSR=0x%X, NSR=0x%X, NECR=0x%X, return: %d.\n",
880 dsr
, nsr
, necr
, mode
);
884 static void tda9874a_setmode(struct CHIPSTATE
*chip
, int mode
)
886 /* Disable/enable NICAM auto-muting (based on DSR.RSSF status bit). */
887 /* If auto-muting is disabled, we can hear a signal of degrading quality. */
889 if(chip
->shadow
.bytes
[MAXREGS
-2] & 0x20) /* DSR.RSSF=1 */
890 tda9874a_NCONR
&= 0xfe; /* enable */
892 tda9874a_NCONR
|= 0x01; /* disable */
893 chip_write(chip
, TDA9874A_NCONR
, tda9874a_NCONR
);
896 /* Note: TDA9874A supports automatic FM dematrixing (FMMR register)
897 * and has auto-select function for audio output (AOSR register).
898 * Old TDA9874H doesn't support these features.
899 * TDA9874A also has additional mono output pin (OUTM), which
900 * on same (all?) tv-cards is not used, anyway (as well as MONOIN).
902 if(tda9874a_dic
== 0x11) {
904 int mdacosr
= (tda9874a_mode
) ? 0x82:0x80;
907 case VIDEO_SOUND_MONO
:
908 case VIDEO_SOUND_STEREO
:
910 case VIDEO_SOUND_LANG1
:
911 aosr
= 0x80; /* auto-select, dual A/A */
912 mdacosr
= (tda9874a_mode
) ? 0x82:0x80;
914 case VIDEO_SOUND_LANG2
:
915 aosr
= 0xa0; /* auto-select, dual B/B */
916 mdacosr
= (tda9874a_mode
) ? 0x83:0x81;
922 chip_write(chip
, TDA9874A_AOSR
, aosr
);
923 chip_write(chip
, TDA9874A_MDACOSR
, mdacosr
);
925 v4l_dbg(1, debug
, &chip
->c
, "tda9874a_setmode(): req. mode %d; AOSR=0x%X, MDACOSR=0x%X.\n",
926 mode
, aosr
, mdacosr
);
928 } else { /* dic == 0x07 */
932 case VIDEO_SOUND_MONO
:
933 fmmr
= 0x00; /* mono */
934 aosr
= 0x10; /* A/A */
936 case VIDEO_SOUND_STEREO
:
939 aosr
= 0x00; /* handled by NICAM auto-mute */
941 fmmr
= (tda9874a_ESP
== 1) ? 0x05 : 0x04; /* stereo */
945 case VIDEO_SOUND_LANG1
:
946 fmmr
= 0x02; /* dual */
947 aosr
= 0x10; /* dual A/A */
949 case VIDEO_SOUND_LANG2
:
950 fmmr
= 0x02; /* dual */
951 aosr
= 0x20; /* dual B/B */
957 chip_write(chip
, TDA9874A_FMMR
, fmmr
);
958 chip_write(chip
, TDA9874A_AOSR
, aosr
);
960 v4l_dbg(1, debug
, &chip
->c
, "tda9874a_setmode(): req. mode %d; FMMR=0x%X, AOSR=0x%X.\n",
965 static int tda9874a_checkit(struct CHIPSTATE
*chip
)
967 int dic
,sic
; /* device id. and software id. codes */
969 if(-1 == (dic
= chip_read2(chip
,TDA9874A_DIC
)))
971 if(-1 == (sic
= chip_read2(chip
,TDA9874A_SIC
)))
974 v4l_dbg(1, debug
, &chip
->c
, "tda9874a_checkit(): DIC=0x%X, SIC=0x%X.\n", dic
, sic
);
976 if((dic
== 0x11)||(dic
== 0x07)) {
977 v4l_info(&chip
->c
, "found tda9874%s.\n", (dic
== 0x11) ? "a":"h");
978 tda9874a_dic
= dic
; /* remember device id. */
981 return 0; /* not found */
984 static int tda9874a_initialize(struct CHIPSTATE
*chip
)
986 if (tda9874a_SIF
> 2)
988 if (tda9874a_STD
> 8)
990 if(tda9874a_AMSEL
> 1)
993 if(tda9874a_SIF
== 1)
994 tda9874a_GCONR
= 0xc0; /* sound IF input 1 */
996 tda9874a_GCONR
= 0xc1; /* sound IF input 2 */
998 tda9874a_ESP
= tda9874a_STD
;
999 tda9874a_mode
= (tda9874a_STD
< 5) ? 0 : 1;
1001 if(tda9874a_AMSEL
== 0)
1002 tda9874a_NCONR
= 0x01; /* auto-mute: analog mono input */
1004 tda9874a_NCONR
= 0x05; /* auto-mute: 1st carrier FM or AM */
1006 tda9874a_setup(chip
);
1011 /* ---------------------------------------------------------------------- */
1012 /* audio chip descriptions - defines+functions for tea6420 */
1014 #define TEA6300_VL 0x00 /* volume left */
1015 #define TEA6300_VR 0x01 /* volume right */
1016 #define TEA6300_BA 0x02 /* bass */
1017 #define TEA6300_TR 0x03 /* treble */
1018 #define TEA6300_FA 0x04 /* fader control */
1019 #define TEA6300_S 0x05 /* switch register */
1020 /* values for those registers: */
1021 #define TEA6300_S_SA 0x01 /* stereo A input */
1022 #define TEA6300_S_SB 0x02 /* stereo B */
1023 #define TEA6300_S_SC 0x04 /* stereo C */
1024 #define TEA6300_S_GMU 0x80 /* general mute */
1026 #define TEA6320_V 0x00 /* volume (0-5)/loudness off (6)/zero crossing mute(7) */
1027 #define TEA6320_FFR 0x01 /* fader front right (0-5) */
1028 #define TEA6320_FFL 0x02 /* fader front left (0-5) */
1029 #define TEA6320_FRR 0x03 /* fader rear right (0-5) */
1030 #define TEA6320_FRL 0x04 /* fader rear left (0-5) */
1031 #define TEA6320_BA 0x05 /* bass (0-4) */
1032 #define TEA6320_TR 0x06 /* treble (0-4) */
1033 #define TEA6320_S 0x07 /* switch register */
1034 /* values for those registers: */
1035 #define TEA6320_S_SA 0x07 /* stereo A input */
1036 #define TEA6320_S_SB 0x06 /* stereo B */
1037 #define TEA6320_S_SC 0x05 /* stereo C */
1038 #define TEA6320_S_SD 0x04 /* stereo D */
1039 #define TEA6320_S_GMU 0x80 /* general mute */
1041 #define TEA6420_S_SA 0x00 /* stereo A input */
1042 #define TEA6420_S_SB 0x01 /* stereo B */
1043 #define TEA6420_S_SC 0x02 /* stereo C */
1044 #define TEA6420_S_SD 0x03 /* stereo D */
1045 #define TEA6420_S_SE 0x04 /* stereo E */
1046 #define TEA6420_S_GMU 0x05 /* general mute */
1048 static int tea6300_shift10(int val
) { return val
>> 10; }
1049 static int tea6300_shift12(int val
) { return val
>> 12; }
1051 /* Assumes 16bit input (values 0x3f to 0x0c are unique, values less than */
1052 /* 0x0c mirror those immediately higher) */
1053 static int tea6320_volume(int val
) { return (val
/ (65535/(63-12)) + 12) & 0x3f; }
1054 static int tea6320_shift11(int val
) { return val
>> 11; }
1055 static int tea6320_initialize(struct CHIPSTATE
* chip
)
1057 chip_write(chip
, TEA6320_FFR
, 0x3f);
1058 chip_write(chip
, TEA6320_FFL
, 0x3f);
1059 chip_write(chip
, TEA6320_FRR
, 0x3f);
1060 chip_write(chip
, TEA6320_FRL
, 0x3f);
1066 /* ---------------------------------------------------------------------- */
1067 /* audio chip descriptions - defines+functions for tda8425 */
1069 #define TDA8425_VL 0x00 /* volume left */
1070 #define TDA8425_VR 0x01 /* volume right */
1071 #define TDA8425_BA 0x02 /* bass */
1072 #define TDA8425_TR 0x03 /* treble */
1073 #define TDA8425_S1 0x08 /* switch functions */
1074 /* values for those registers: */
1075 #define TDA8425_S1_OFF 0xEE /* audio off (mute on) */
1076 #define TDA8425_S1_CH1 0xCE /* audio channel 1 (mute off) - "linear stereo" mode */
1077 #define TDA8425_S1_CH2 0xCF /* audio channel 2 (mute off) - "linear stereo" mode */
1078 #define TDA8425_S1_MU 0x20 /* mute bit */
1079 #define TDA8425_S1_STEREO 0x18 /* stereo bits */
1080 #define TDA8425_S1_STEREO_SPATIAL 0x18 /* spatial stereo */
1081 #define TDA8425_S1_STEREO_LINEAR 0x08 /* linear stereo */
1082 #define TDA8425_S1_STEREO_PSEUDO 0x10 /* pseudo stereo */
1083 #define TDA8425_S1_STEREO_MONO 0x00 /* forced mono */
1084 #define TDA8425_S1_ML 0x06 /* language selector */
1085 #define TDA8425_S1_ML_SOUND_A 0x02 /* sound a */
1086 #define TDA8425_S1_ML_SOUND_B 0x04 /* sound b */
1087 #define TDA8425_S1_ML_STEREO 0x06 /* stereo */
1088 #define TDA8425_S1_IS 0x01 /* channel selector */
1091 static int tda8425_shift10(int val
) { return (val
>> 10) | 0xc0; }
1092 static int tda8425_shift12(int val
) { return (val
>> 12) | 0xf0; }
1094 static int tda8425_initialize(struct CHIPSTATE
*chip
)
1096 struct CHIPDESC
*desc
= chiplist
+ chip
->type
;
1097 int inputmap
[4] = { /* tuner */ TDA8425_S1_CH2
, /* radio */ TDA8425_S1_CH1
,
1098 /* extern */ TDA8425_S1_CH1
, /* intern */ TDA8425_S1_OFF
};
1100 if (chip
->c
.adapter
->id
== I2C_HW_B_RIVA
) {
1101 memcpy (desc
->inputmap
, inputmap
, sizeof (inputmap
));
1106 static void tda8425_setmode(struct CHIPSTATE
*chip
, int mode
)
1108 int s1
= chip
->shadow
.bytes
[TDA8425_S1
+1] & 0xe1;
1110 if (mode
& VIDEO_SOUND_LANG1
) {
1111 s1
|= TDA8425_S1_ML_SOUND_A
;
1112 s1
|= TDA8425_S1_STEREO_PSEUDO
;
1114 } else if (mode
& VIDEO_SOUND_LANG2
) {
1115 s1
|= TDA8425_S1_ML_SOUND_B
;
1116 s1
|= TDA8425_S1_STEREO_PSEUDO
;
1119 s1
|= TDA8425_S1_ML_STEREO
;
1121 if (mode
& VIDEO_SOUND_MONO
)
1122 s1
|= TDA8425_S1_STEREO_MONO
;
1123 if (mode
& VIDEO_SOUND_STEREO
)
1124 s1
|= TDA8425_S1_STEREO_SPATIAL
;
1126 chip_write(chip
,TDA8425_S1
,s1
);
1130 /* ---------------------------------------------------------------------- */
1131 /* audio chip descriptions - defines+functions for pic16c54 (PV951) */
1133 /* the registers of 16C54, I2C sub address. */
1134 #define PIC16C54_REG_KEY_CODE 0x01 /* Not use. */
1135 #define PIC16C54_REG_MISC 0x02
1137 /* bit definition of the RESET register, I2C data. */
1138 #define PIC16C54_MISC_RESET_REMOTE_CTL 0x01 /* bit 0, Reset to receive the key */
1139 /* code of remote controller */
1140 #define PIC16C54_MISC_MTS_MAIN 0x02 /* bit 1 */
1141 #define PIC16C54_MISC_MTS_SAP 0x04 /* bit 2 */
1142 #define PIC16C54_MISC_MTS_BOTH 0x08 /* bit 3 */
1143 #define PIC16C54_MISC_SND_MUTE 0x10 /* bit 4, Mute Audio(Line-in and Tuner) */
1144 #define PIC16C54_MISC_SND_NOTMUTE 0x20 /* bit 5 */
1145 #define PIC16C54_MISC_SWITCH_TUNER 0x40 /* bit 6 , Switch to Line-in */
1146 #define PIC16C54_MISC_SWITCH_LINE 0x80 /* bit 7 , Switch to Tuner */
1148 /* ---------------------------------------------------------------------- */
1149 /* audio chip descriptions - defines+functions for TA8874Z */
1151 /* write 1st byte */
1152 #define TA8874Z_LED_STE 0x80
1153 #define TA8874Z_LED_BIL 0x40
1154 #define TA8874Z_LED_EXT 0x20
1155 #define TA8874Z_MONO_SET 0x10
1156 #define TA8874Z_MUTE 0x08
1157 #define TA8874Z_F_MONO 0x04
1158 #define TA8874Z_MODE_SUB 0x02
1159 #define TA8874Z_MODE_MAIN 0x01
1161 /* write 2nd byte */
1162 /*#define TA8874Z_TI 0x80 */ /* test mode */
1163 #define TA8874Z_SEPARATION 0x3f
1164 #define TA8874Z_SEPARATION_DEFAULT 0x10
1167 #define TA8874Z_B1 0x80
1168 #define TA8874Z_B0 0x40
1169 #define TA8874Z_CHAG_FLAG 0x20
1177 static int ta8874z_getmode(struct CHIPSTATE
*chip
)
1181 val
= chip_read(chip
);
1182 mode
= VIDEO_SOUND_MONO
;
1183 if (val
& TA8874Z_B1
){
1184 mode
|= VIDEO_SOUND_LANG1
| VIDEO_SOUND_LANG2
;
1185 }else if (!(val
& TA8874Z_B0
)){
1186 mode
|= VIDEO_SOUND_STEREO
;
1188 /* v4l_dbg(1, debug, &chip->c, "ta8874z_getmode(): raw chip read: 0x%02x, return: 0x%02x\n", val, mode); */
1192 static audiocmd ta8874z_stereo
= { 2, {0, TA8874Z_SEPARATION_DEFAULT
}};
1193 static audiocmd ta8874z_mono
= {2, { TA8874Z_MONO_SET
, TA8874Z_SEPARATION_DEFAULT
}};
1194 static audiocmd ta8874z_main
= {2, { 0, TA8874Z_SEPARATION_DEFAULT
}};
1195 static audiocmd ta8874z_sub
= {2, { TA8874Z_MODE_SUB
, TA8874Z_SEPARATION_DEFAULT
}};
1197 static void ta8874z_setmode(struct CHIPSTATE
*chip
, int mode
)
1201 v4l_dbg(1, debug
, &chip
->c
, "ta8874z_setmode(): mode: 0x%02x\n", mode
);
1204 case VIDEO_SOUND_MONO
:
1207 case VIDEO_SOUND_STEREO
:
1208 t
= &ta8874z_stereo
;
1210 case VIDEO_SOUND_LANG1
:
1213 case VIDEO_SOUND_LANG2
:
1221 chip_cmd(chip
, "TA8874Z", t
);
1224 static int ta8874z_checkit(struct CHIPSTATE
*chip
)
1227 rc
= chip_read(chip
);
1228 return ((rc
& 0x1f) == 0x1f) ? 1 : 0;
1231 /* ---------------------------------------------------------------------- */
1232 /* audio chip descriptions - struct CHIPDESC */
1234 /* insmod options to enable/disable individual audio chips */
1235 static int tda8425
= 1;
1236 static int tda9840
= 1;
1237 static int tda9850
= 1;
1238 static int tda9855
= 1;
1239 static int tda9873
= 1;
1240 static int tda9874a
= 1;
1241 static int tea6300
= 0; /* address clash with msp34xx */
1242 static int tea6320
= 0; /* address clash with msp34xx */
1243 static int tea6420
= 1;
1244 static int pic16c54
= 1;
1245 static int ta8874z
= 0; /* address clash with tda9840 */
1247 module_param(tda8425
, int, 0444);
1248 module_param(tda9840
, int, 0444);
1249 module_param(tda9850
, int, 0444);
1250 module_param(tda9855
, int, 0444);
1251 module_param(tda9873
, int, 0444);
1252 module_param(tda9874a
, int, 0444);
1253 module_param(tea6300
, int, 0444);
1254 module_param(tea6320
, int, 0444);
1255 module_param(tea6420
, int, 0444);
1256 module_param(pic16c54
, int, 0444);
1257 module_param(ta8874z
, int, 0444);
1259 static struct CHIPDESC chiplist
[] = {
1262 .id
= I2C_DRIVERID_TDA9840
,
1263 .insmodopt
= &tda9840
,
1264 .addr_lo
= I2C_ADDR_TDA9840
>> 1,
1265 .addr_hi
= I2C_ADDR_TDA9840
>> 1,
1268 .checkit
= tda9840_checkit
,
1269 .getmode
= tda9840_getmode
,
1270 .setmode
= tda9840_setmode
,
1271 .checkmode
= generic_checkmode
,
1273 .init
= { 2, { TDA9840_TEST
, TDA9840_TEST_INT1SN
1274 /* ,TDA9840_SW, TDA9840_MONO */} }
1278 .id
= I2C_DRIVERID_TDA9873
,
1279 .checkit
= tda9873_checkit
,
1280 .insmodopt
= &tda9873
,
1281 .addr_lo
= I2C_ADDR_TDA985x_L
>> 1,
1282 .addr_hi
= I2C_ADDR_TDA985x_H
>> 1,
1284 .flags
= CHIP_HAS_INPUTSEL
,
1286 .getmode
= tda9873_getmode
,
1287 .setmode
= tda9873_setmode
,
1288 .checkmode
= generic_checkmode
,
1290 .init
= { 4, { TDA9873_SW
, 0xa4, 0x06, 0x03 } },
1291 .inputreg
= TDA9873_SW
,
1292 .inputmute
= TDA9873_MUTE
| TDA9873_AUTOMUTE
,
1293 .inputmap
= {0xa0, 0xa2, 0xa0, 0xa0},
1294 .inputmask
= TDA9873_INP_MASK
|TDA9873_MUTE
|TDA9873_AUTOMUTE
,
1298 .name
= "tda9874h/a",
1299 .id
= I2C_DRIVERID_TDA9874
,
1300 .checkit
= tda9874a_checkit
,
1301 .initialize
= tda9874a_initialize
,
1302 .insmodopt
= &tda9874a
,
1303 .addr_lo
= I2C_ADDR_TDA9874
>> 1,
1304 .addr_hi
= I2C_ADDR_TDA9874
>> 1,
1306 .getmode
= tda9874a_getmode
,
1307 .setmode
= tda9874a_setmode
,
1308 .checkmode
= generic_checkmode
,
1312 .id
= I2C_DRIVERID_TDA9850
,
1313 .insmodopt
= &tda9850
,
1314 .addr_lo
= I2C_ADDR_TDA985x_L
>> 1,
1315 .addr_hi
= I2C_ADDR_TDA985x_H
>> 1,
1318 .getmode
= tda985x_getmode
,
1319 .setmode
= tda985x_setmode
,
1321 .init
= { 8, { TDA9850_C4
, 0x08, 0x08, TDA985x_STEREO
, 0x07, 0x10, 0x10, 0x03 } }
1325 .id
= I2C_DRIVERID_TDA9855
,
1326 .insmodopt
= &tda9855
,
1327 .addr_lo
= I2C_ADDR_TDA985x_L
>> 1,
1328 .addr_hi
= I2C_ADDR_TDA985x_H
>> 1,
1330 .flags
= CHIP_HAS_VOLUME
| CHIP_HAS_BASSTREBLE
,
1332 .leftreg
= TDA9855_VL
,
1333 .rightreg
= TDA9855_VR
,
1334 .bassreg
= TDA9855_BA
,
1335 .treblereg
= TDA9855_TR
,
1336 .volfunc
= tda9855_volume
,
1337 .bassfunc
= tda9855_bass
,
1338 .treblefunc
= tda9855_treble
,
1340 .getmode
= tda985x_getmode
,
1341 .setmode
= tda985x_setmode
,
1343 .init
= { 12, { 0, 0x6f, 0x6f, 0x0e, 0x07<<1, 0x8<<2,
1344 TDA9855_MUTE
| TDA9855_AVL
| TDA9855_LOUD
| TDA9855_INT
,
1345 TDA985x_STEREO
| TDA9855_LINEAR
| TDA9855_TZCM
| TDA9855_VZCM
,
1346 0x07, 0x10, 0x10, 0x03 }}
1350 .id
= I2C_DRIVERID_TEA6300
,
1351 .insmodopt
= &tea6300
,
1352 .addr_lo
= I2C_ADDR_TEA6300
>> 1,
1353 .addr_hi
= I2C_ADDR_TEA6300
>> 1,
1355 .flags
= CHIP_HAS_VOLUME
| CHIP_HAS_BASSTREBLE
| CHIP_HAS_INPUTSEL
,
1357 .leftreg
= TEA6300_VR
,
1358 .rightreg
= TEA6300_VL
,
1359 .bassreg
= TEA6300_BA
,
1360 .treblereg
= TEA6300_TR
,
1361 .volfunc
= tea6300_shift10
,
1362 .bassfunc
= tea6300_shift12
,
1363 .treblefunc
= tea6300_shift12
,
1365 .inputreg
= TEA6300_S
,
1366 .inputmap
= { TEA6300_S_SA
, TEA6300_S_SB
, TEA6300_S_SC
},
1367 .inputmute
= TEA6300_S_GMU
,
1371 .id
= I2C_DRIVERID_TEA6300
,
1372 .initialize
= tea6320_initialize
,
1373 .insmodopt
= &tea6320
,
1374 .addr_lo
= I2C_ADDR_TEA6300
>> 1,
1375 .addr_hi
= I2C_ADDR_TEA6300
>> 1,
1377 .flags
= CHIP_HAS_VOLUME
| CHIP_HAS_BASSTREBLE
| CHIP_HAS_INPUTSEL
,
1379 .leftreg
= TEA6320_V
,
1380 .rightreg
= TEA6320_V
,
1381 .bassreg
= TEA6320_BA
,
1382 .treblereg
= TEA6320_TR
,
1383 .volfunc
= tea6320_volume
,
1384 .bassfunc
= tea6320_shift11
,
1385 .treblefunc
= tea6320_shift11
,
1387 .inputreg
= TEA6320_S
,
1388 .inputmap
= { TEA6320_S_SA
, TEA6420_S_SB
, TEA6300_S_SC
, TEA6320_S_SD
},
1389 .inputmute
= TEA6300_S_GMU
,
1393 .id
= I2C_DRIVERID_TEA6420
,
1394 .insmodopt
= &tea6420
,
1395 .addr_lo
= I2C_ADDR_TEA6420
>> 1,
1396 .addr_hi
= I2C_ADDR_TEA6420
>> 1,
1398 .flags
= CHIP_HAS_INPUTSEL
,
1401 .inputmap
= { TEA6420_S_SA
, TEA6420_S_SB
, TEA6420_S_SC
},
1402 .inputmute
= TEA6300_S_GMU
,
1406 .id
= I2C_DRIVERID_TDA8425
,
1407 .insmodopt
= &tda8425
,
1408 .addr_lo
= I2C_ADDR_TDA8425
>> 1,
1409 .addr_hi
= I2C_ADDR_TDA8425
>> 1,
1411 .flags
= CHIP_HAS_VOLUME
| CHIP_HAS_BASSTREBLE
| CHIP_HAS_INPUTSEL
,
1413 .leftreg
= TDA8425_VL
,
1414 .rightreg
= TDA8425_VR
,
1415 .bassreg
= TDA8425_BA
,
1416 .treblereg
= TDA8425_TR
,
1417 .volfunc
= tda8425_shift10
,
1418 .bassfunc
= tda8425_shift12
,
1419 .treblefunc
= tda8425_shift12
,
1421 .inputreg
= TDA8425_S1
,
1422 .inputmap
= { TDA8425_S1_CH1
, TDA8425_S1_CH1
, TDA8425_S1_CH1
},
1423 .inputmute
= TDA8425_S1_OFF
,
1425 .setmode
= tda8425_setmode
,
1426 .initialize
= tda8425_initialize
,
1429 .name
= "pic16c54 (PV951)",
1430 .id
= I2C_DRIVERID_PIC16C54_PV9
,
1431 .insmodopt
= &pic16c54
,
1432 .addr_lo
= I2C_ADDR_PIC16C54
>> 1,
1433 .addr_hi
= I2C_ADDR_PIC16C54
>> 1,
1435 .flags
= CHIP_HAS_INPUTSEL
,
1437 .inputreg
= PIC16C54_REG_MISC
,
1438 .inputmap
= {PIC16C54_MISC_SND_NOTMUTE
|PIC16C54_MISC_SWITCH_TUNER
,
1439 PIC16C54_MISC_SND_NOTMUTE
|PIC16C54_MISC_SWITCH_LINE
,
1440 PIC16C54_MISC_SND_NOTMUTE
|PIC16C54_MISC_SWITCH_LINE
,
1441 PIC16C54_MISC_SND_MUTE
},
1442 .inputmute
= PIC16C54_MISC_SND_MUTE
,
1447 /*.id = I2C_DRIVERID_TA8874Z, */
1448 .checkit
= ta8874z_checkit
,
1449 .insmodopt
= &ta8874z
,
1450 .addr_lo
= I2C_ADDR_TDA9840
>> 1,
1451 .addr_hi
= I2C_ADDR_TDA9840
>> 1,
1454 .getmode
= ta8874z_getmode
,
1455 .setmode
= ta8874z_setmode
,
1456 .checkmode
= generic_checkmode
,
1458 .init
= {2, { TA8874Z_MONO_SET
, TA8874Z_SEPARATION_DEFAULT
}},
1460 { .name
= NULL
} /* EOF */
1464 /* ---------------------------------------------------------------------- */
1465 /* i2c registration */
1467 static int chip_attach(struct i2c_adapter
*adap
, int addr
, int kind
)
1469 struct CHIPSTATE
*chip
;
1470 struct CHIPDESC
*desc
;
1472 chip
= kzalloc(sizeof(*chip
),GFP_KERNEL
);
1475 memcpy(&chip
->c
,&client_template
,sizeof(struct i2c_client
));
1476 chip
->c
.adapter
= adap
;
1477 chip
->c
.addr
= addr
;
1478 i2c_set_clientdata(&chip
->c
, chip
);
1480 /* find description for the chip */
1481 v4l_dbg(1, debug
, &chip
->c
, "chip found @ 0x%x\n", addr
<<1);
1482 for (desc
= chiplist
; desc
->name
!= NULL
; desc
++) {
1483 if (0 == *(desc
->insmodopt
))
1485 if (addr
< desc
->addr_lo
||
1486 addr
> desc
->addr_hi
)
1488 if (desc
->checkit
&& !desc
->checkit(chip
))
1492 if (desc
->name
== NULL
) {
1493 v4l_dbg(1, debug
, &chip
->c
, "no matching chip description found\n");
1496 v4l_info(&chip
->c
, "%s found @ 0x%x (%s)\n", desc
->name
, addr
<<1, adap
->name
);
1498 v4l_dbg(1, debug
, &chip
->c
, "matches:%s%s%s.\n",
1499 (desc
->flags
& CHIP_HAS_VOLUME
) ? " volume" : "",
1500 (desc
->flags
& CHIP_HAS_BASSTREBLE
) ? " bass/treble" : "",
1501 (desc
->flags
& CHIP_HAS_INPUTSEL
) ? " audiomux" : "");
1504 /* fill required data structures */
1505 strcpy(chip
->c
.name
, desc
->name
);
1506 chip
->type
= desc
-chiplist
;
1507 chip
->shadow
.count
= desc
->registers
+1;
1508 chip
->prevmode
= -1;
1509 chip
->audmode
= V4L2_TUNER_MODE_LANG1
;
1511 i2c_attach_client(&chip
->c
);
1513 /* initialization */
1514 if (desc
->initialize
!= NULL
)
1515 desc
->initialize(chip
);
1517 chip_cmd(chip
,"init",&desc
->init
);
1519 if (desc
->flags
& CHIP_HAS_VOLUME
) {
1520 chip
->left
= desc
->leftinit
? desc
->leftinit
: 65535;
1521 chip
->right
= desc
->rightinit
? desc
->rightinit
: 65535;
1522 chip_write(chip
,desc
->leftreg
,desc
->volfunc(chip
->left
));
1523 chip_write(chip
,desc
->rightreg
,desc
->volfunc(chip
->right
));
1525 if (desc
->flags
& CHIP_HAS_BASSTREBLE
) {
1526 chip
->treble
= desc
->trebleinit
? desc
->trebleinit
: 32768;
1527 chip
->bass
= desc
->bassinit
? desc
->bassinit
: 32768;
1528 chip_write(chip
,desc
->bassreg
,desc
->bassfunc(chip
->bass
));
1529 chip_write(chip
,desc
->treblereg
,desc
->treblefunc(chip
->treble
));
1532 chip
->thread
= NULL
;
1533 if (desc
->checkmode
) {
1534 /* start async thread */
1535 init_timer(&chip
->wt
);
1536 chip
->wt
.function
= chip_thread_wake
;
1537 chip
->wt
.data
= (unsigned long)chip
;
1538 chip
->thread
= kthread_run(chip_thread
, chip
, chip
->c
.name
);
1539 if (IS_ERR(chip
->thread
)) {
1540 v4l_warn(&chip
->c
, "%s: failed to create kthread\n",
1542 chip
->thread
= NULL
;
1548 static int chip_probe(struct i2c_adapter
*adap
)
1550 /* don't attach on saa7146 based cards,
1551 because dedicated drivers are used */
1552 if ((adap
->id
== I2C_HW_SAA7146
))
1554 if (adap
->class & I2C_CLASS_TV_ANALOG
)
1555 return i2c_probe(adap
, &addr_data
, chip_attach
);
1559 static int chip_detach(struct i2c_client
*client
)
1561 struct CHIPSTATE
*chip
= i2c_get_clientdata(client
);
1563 del_timer_sync(&chip
->wt
);
1565 /* shutdown async thread */
1566 kthread_stop(chip
->thread
);
1567 chip
->thread
= NULL
;
1570 i2c_detach_client(&chip
->c
);
1575 static int tvaudio_set_ctrl(struct CHIPSTATE
*chip
, struct v4l2_control
*ctrl
)
1577 struct CHIPDESC
*desc
= chiplist
+ chip
->type
;
1580 case V4L2_CID_AUDIO_MUTE
:
1581 if (ctrl
->value
< 0 || ctrl
->value
>= 2)
1583 chip
->muted
= ctrl
->value
;
1585 chip_write_masked(chip
,desc
->inputreg
,desc
->inputmute
,desc
->inputmask
);
1587 chip_write_masked(chip
,desc
->inputreg
,
1588 desc
->inputmap
[chip
->input
],desc
->inputmask
);
1597 /* ---------------------------------------------------------------------- */
1598 /* video4linux interface */
1600 static int chip_command(struct i2c_client
*client
,
1601 unsigned int cmd
, void *arg
)
1603 struct CHIPSTATE
*chip
= i2c_get_clientdata(client
);
1604 struct CHIPDESC
*desc
= chiplist
+ chip
->type
;
1606 v4l_dbg(1, debug
, &chip
->c
, "%s: chip_command 0x%x\n", chip
->c
.name
, cmd
);
1609 case AUDC_SET_RADIO
:
1611 chip
->watch_stereo
= 0;
1612 /* del_timer(&chip->wt); */
1615 /* --- v4l ioctls --- */
1616 /* take care: bttv does userspace copying, we'll get a
1617 kernel pointer here... */
1620 struct video_audio
*va
= arg
;
1622 if (desc
->flags
& CHIP_HAS_VOLUME
) {
1623 va
->flags
|= VIDEO_AUDIO_VOLUME
;
1624 va
->volume
= max(chip
->left
,chip
->right
);
1626 va
->balance
= (32768*min(chip
->left
,chip
->right
))/
1629 va
->balance
= 32768;
1631 if (desc
->flags
& CHIP_HAS_BASSTREBLE
) {
1632 va
->flags
|= VIDEO_AUDIO_BASS
| VIDEO_AUDIO_TREBLE
;
1633 va
->bass
= chip
->bass
;
1634 va
->treble
= chip
->treble
;
1638 va
->mode
= desc
->getmode(chip
);
1640 va
->mode
= VIDEO_SOUND_MONO
;
1647 struct video_audio
*va
= arg
;
1649 if (desc
->flags
& CHIP_HAS_VOLUME
) {
1650 chip
->left
= (min(65536 - va
->balance
,32768) *
1651 va
->volume
) / 32768;
1652 chip
->right
= (min(va
->balance
,(__u16
)32768) *
1653 va
->volume
) / 32768;
1654 chip_write(chip
,desc
->leftreg
,desc
->volfunc(chip
->left
));
1655 chip_write(chip
,desc
->rightreg
,desc
->volfunc(chip
->right
));
1657 if (desc
->flags
& CHIP_HAS_BASSTREBLE
) {
1658 chip
->bass
= va
->bass
;
1659 chip
->treble
= va
->treble
;
1660 chip_write(chip
,desc
->bassreg
,desc
->bassfunc(chip
->bass
));
1661 chip_write(chip
,desc
->treblereg
,desc
->treblefunc(chip
->treble
));
1663 if (desc
->setmode
&& va
->mode
) {
1664 chip
->watch_stereo
= 0;
1665 /* del_timer(&chip->wt); */
1666 chip
->mode
= va
->mode
;
1667 desc
->setmode(chip
,va
->mode
);
1673 return tvaudio_set_ctrl(chip
, arg
);
1675 case VIDIOC_INT_G_AUDIO_ROUTING
:
1677 struct v4l2_routing
*rt
= arg
;
1679 rt
->input
= chip
->input
;
1684 case VIDIOC_INT_S_AUDIO_ROUTING
:
1686 struct v4l2_routing
*rt
= arg
;
1688 if (!(desc
->flags
& CHIP_HAS_INPUTSEL
) || rt
->input
>= 4)
1690 /* There are four inputs: tuner, radio, extern and intern. */
1691 chip
->input
= rt
->input
;
1694 chip_write_masked(chip
, desc
->inputreg
,
1695 desc
->inputmap
[chip
->input
], desc
->inputmask
);
1699 case VIDIOC_S_TUNER
:
1701 struct v4l2_tuner
*vt
= arg
;
1706 switch (vt
->audmode
) {
1707 case V4L2_TUNER_MODE_MONO
:
1708 mode
= VIDEO_SOUND_MONO
;
1710 case V4L2_TUNER_MODE_STEREO
:
1711 case V4L2_TUNER_MODE_LANG1_LANG2
:
1712 mode
= VIDEO_SOUND_STEREO
;
1714 case V4L2_TUNER_MODE_LANG1
:
1715 mode
= VIDEO_SOUND_LANG1
;
1717 case V4L2_TUNER_MODE_LANG2
:
1718 mode
= VIDEO_SOUND_LANG2
;
1723 chip
->audmode
= vt
->audmode
;
1725 if (desc
->setmode
&& mode
) {
1726 chip
->watch_stereo
= 0;
1727 /* del_timer(&chip->wt); */
1729 desc
->setmode(chip
, mode
);
1734 case VIDIOC_G_TUNER
:
1736 struct v4l2_tuner
*vt
= arg
;
1737 int mode
= VIDEO_SOUND_MONO
;
1741 vt
->audmode
= chip
->audmode
;
1743 vt
->capability
= V4L2_TUNER_CAP_STEREO
|
1744 V4L2_TUNER_CAP_LANG1
| V4L2_TUNER_CAP_LANG2
;
1747 mode
= desc
->getmode(chip
);
1749 if (mode
& VIDEO_SOUND_MONO
)
1750 vt
->rxsubchans
|= V4L2_TUNER_SUB_MONO
;
1751 if (mode
& VIDEO_SOUND_STEREO
)
1752 vt
->rxsubchans
|= V4L2_TUNER_SUB_STEREO
;
1753 /* Note: for SAP it should be mono/lang2 or stereo/lang2.
1754 When this module is converted fully to v4l2, then this
1755 should change for those chips that can detect SAP. */
1756 if (mode
& VIDEO_SOUND_LANG1
)
1757 vt
->rxsubchans
= V4L2_TUNER_SUB_LANG1
|
1758 V4L2_TUNER_SUB_LANG2
;
1768 case VIDIOC_S_FREQUENCY
:
1769 chip
->mode
= 0; /* automatic */
1770 if (desc
->checkmode
) {
1771 desc
->setmode(chip
,VIDEO_SOUND_MONO
);
1772 if (chip
->prevmode
!= VIDEO_SOUND_MONO
)
1773 chip
->prevmode
= -1; /* reset previous mode */
1774 mod_timer(&chip
->wt
, jiffies
+2*HZ
);
1775 /* the thread will call checkmode() later */
1782 static struct i2c_driver driver
= {
1786 .id
= I2C_DRIVERID_TVAUDIO
,
1787 .attach_adapter
= chip_probe
,
1788 .detach_client
= chip_detach
,
1789 .command
= chip_command
,
1792 static struct i2c_client client_template
=
1798 static int __init
audiochip_init_module(void)
1800 struct CHIPDESC
*desc
;
1803 printk(KERN_INFO
"tvaudio: TV audio decoder + audio/video mux driver\n");
1804 printk(KERN_INFO
"tvaudio: known chips: ");
1805 for (desc
= chiplist
; desc
->name
!= NULL
; desc
++)
1806 printk("%s%s", (desc
== chiplist
) ? "" : ", ", desc
->name
);
1810 return i2c_add_driver(&driver
);
1813 static void __exit
audiochip_cleanup_module(void)
1815 i2c_del_driver(&driver
);
1818 module_init(audiochip_init_module
);
1819 module_exit(audiochip_cleanup_module
);