irqchip/gic-v3-its: Add missing cache flushes
[deliverable/linux.git] / drivers / mfd / arizona-core.c
1 /*
2 * Arizona core driver
3 *
4 * Copyright 2012 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/delay.h>
14 #include <linux/err.h>
15 #include <linux/gpio.h>
16 #include <linux/interrupt.h>
17 #include <linux/mfd/core.h>
18 #include <linux/module.h>
19 #include <linux/of.h>
20 #include <linux/of_device.h>
21 #include <linux/of_gpio.h>
22 #include <linux/pm_runtime.h>
23 #include <linux/regmap.h>
24 #include <linux/regulator/consumer.h>
25 #include <linux/regulator/machine.h>
26 #include <linux/slab.h>
27
28 #include <linux/mfd/arizona/core.h>
29 #include <linux/mfd/arizona/registers.h>
30
31 #include "arizona.h"
32
33 static const char * const wm5102_core_supplies[] = {
34 "AVDD",
35 "DBVDD1",
36 };
37
38 int arizona_clk32k_enable(struct arizona *arizona)
39 {
40 int ret = 0;
41
42 mutex_lock(&arizona->clk_lock);
43
44 arizona->clk32k_ref++;
45
46 if (arizona->clk32k_ref == 1) {
47 switch (arizona->pdata.clk32k_src) {
48 case ARIZONA_32KZ_MCLK1:
49 ret = pm_runtime_get_sync(arizona->dev);
50 if (ret != 0)
51 goto out;
52 break;
53 }
54
55 ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
56 ARIZONA_CLK_32K_ENA,
57 ARIZONA_CLK_32K_ENA);
58 }
59
60 out:
61 if (ret != 0)
62 arizona->clk32k_ref--;
63
64 mutex_unlock(&arizona->clk_lock);
65
66 return ret;
67 }
68 EXPORT_SYMBOL_GPL(arizona_clk32k_enable);
69
70 int arizona_clk32k_disable(struct arizona *arizona)
71 {
72 int ret = 0;
73
74 mutex_lock(&arizona->clk_lock);
75
76 BUG_ON(arizona->clk32k_ref <= 0);
77
78 arizona->clk32k_ref--;
79
80 if (arizona->clk32k_ref == 0) {
81 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
82 ARIZONA_CLK_32K_ENA, 0);
83
84 switch (arizona->pdata.clk32k_src) {
85 case ARIZONA_32KZ_MCLK1:
86 pm_runtime_put_sync(arizona->dev);
87 break;
88 }
89 }
90
91 mutex_unlock(&arizona->clk_lock);
92
93 return ret;
94 }
95 EXPORT_SYMBOL_GPL(arizona_clk32k_disable);
96
97 static irqreturn_t arizona_clkgen_err(int irq, void *data)
98 {
99 struct arizona *arizona = data;
100
101 dev_err(arizona->dev, "CLKGEN error\n");
102
103 return IRQ_HANDLED;
104 }
105
106 static irqreturn_t arizona_underclocked(int irq, void *data)
107 {
108 struct arizona *arizona = data;
109 unsigned int val;
110 int ret;
111
112 ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8,
113 &val);
114 if (ret != 0) {
115 dev_err(arizona->dev, "Failed to read underclock status: %d\n",
116 ret);
117 return IRQ_NONE;
118 }
119
120 if (val & ARIZONA_AIF3_UNDERCLOCKED_STS)
121 dev_err(arizona->dev, "AIF3 underclocked\n");
122 if (val & ARIZONA_AIF2_UNDERCLOCKED_STS)
123 dev_err(arizona->dev, "AIF2 underclocked\n");
124 if (val & ARIZONA_AIF1_UNDERCLOCKED_STS)
125 dev_err(arizona->dev, "AIF1 underclocked\n");
126 if (val & ARIZONA_ISRC3_UNDERCLOCKED_STS)
127 dev_err(arizona->dev, "ISRC3 underclocked\n");
128 if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS)
129 dev_err(arizona->dev, "ISRC2 underclocked\n");
130 if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS)
131 dev_err(arizona->dev, "ISRC1 underclocked\n");
132 if (val & ARIZONA_FX_UNDERCLOCKED_STS)
133 dev_err(arizona->dev, "FX underclocked\n");
134 if (val & ARIZONA_ASRC_UNDERCLOCKED_STS)
135 dev_err(arizona->dev, "ASRC underclocked\n");
136 if (val & ARIZONA_DAC_UNDERCLOCKED_STS)
137 dev_err(arizona->dev, "DAC underclocked\n");
138 if (val & ARIZONA_ADC_UNDERCLOCKED_STS)
139 dev_err(arizona->dev, "ADC underclocked\n");
140 if (val & ARIZONA_MIXER_UNDERCLOCKED_STS)
141 dev_err(arizona->dev, "Mixer dropped sample\n");
142
143 return IRQ_HANDLED;
144 }
145
146 static irqreturn_t arizona_overclocked(int irq, void *data)
147 {
148 struct arizona *arizona = data;
149 unsigned int val[3];
150 int ret;
151
152 ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6,
153 &val[0], 3);
154 if (ret != 0) {
155 dev_err(arizona->dev, "Failed to read overclock status: %d\n",
156 ret);
157 return IRQ_NONE;
158 }
159
160 switch (arizona->type) {
161 case WM8998:
162 case WM1814:
163 /* Some bits are shifted on WM8998,
164 * rearrange to match the standard bit layout
165 */
166 val[0] = ((val[0] & 0x60e0) >> 1) |
167 ((val[0] & 0x1e00) >> 2) |
168 (val[0] & 0x000f);
169 break;
170 default:
171 break;
172 }
173
174 if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS)
175 dev_err(arizona->dev, "PWM overclocked\n");
176 if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS)
177 dev_err(arizona->dev, "FX core overclocked\n");
178 if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS)
179 dev_err(arizona->dev, "DAC SYS overclocked\n");
180 if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS)
181 dev_err(arizona->dev, "DAC WARP overclocked\n");
182 if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS)
183 dev_err(arizona->dev, "ADC overclocked\n");
184 if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS)
185 dev_err(arizona->dev, "Mixer overclocked\n");
186 if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS)
187 dev_err(arizona->dev, "AIF3 overclocked\n");
188 if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS)
189 dev_err(arizona->dev, "AIF2 overclocked\n");
190 if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS)
191 dev_err(arizona->dev, "AIF1 overclocked\n");
192 if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS)
193 dev_err(arizona->dev, "Pad control overclocked\n");
194
195 if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS)
196 dev_err(arizona->dev, "Slimbus subsystem overclocked\n");
197 if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS)
198 dev_err(arizona->dev, "Slimbus async overclocked\n");
199 if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS)
200 dev_err(arizona->dev, "Slimbus sync overclocked\n");
201 if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS)
202 dev_err(arizona->dev, "ASRC async system overclocked\n");
203 if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS)
204 dev_err(arizona->dev, "ASRC async WARP overclocked\n");
205 if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS)
206 dev_err(arizona->dev, "ASRC sync system overclocked\n");
207 if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS)
208 dev_err(arizona->dev, "ASRC sync WARP overclocked\n");
209 if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS)
210 dev_err(arizona->dev, "DSP1 overclocked\n");
211 if (val[1] & ARIZONA_ISRC3_OVERCLOCKED_STS)
212 dev_err(arizona->dev, "ISRC3 overclocked\n");
213 if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS)
214 dev_err(arizona->dev, "ISRC2 overclocked\n");
215 if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS)
216 dev_err(arizona->dev, "ISRC1 overclocked\n");
217
218 if (val[2] & ARIZONA_SPDIF_OVERCLOCKED_STS)
219 dev_err(arizona->dev, "SPDIF overclocked\n");
220
221 return IRQ_HANDLED;
222 }
223
224 static int arizona_poll_reg(struct arizona *arizona,
225 int timeout, unsigned int reg,
226 unsigned int mask, unsigned int target)
227 {
228 unsigned int val = 0;
229 int ret, i;
230
231 for (i = 0; i < timeout; i++) {
232 ret = regmap_read(arizona->regmap, reg, &val);
233 if (ret != 0) {
234 dev_err(arizona->dev, "Failed to read reg %u: %d\n",
235 reg, ret);
236 continue;
237 }
238
239 if ((val & mask) == target)
240 return 0;
241
242 msleep(1);
243 }
244
245 dev_err(arizona->dev, "Polling reg %u timed out: %x\n", reg, val);
246 return -ETIMEDOUT;
247 }
248
249 static int arizona_wait_for_boot(struct arizona *arizona)
250 {
251 int ret;
252
253 /*
254 * We can't use an interrupt as we need to runtime resume to do so,
255 * we won't race with the interrupt handler as it'll be blocked on
256 * runtime resume.
257 */
258 ret = arizona_poll_reg(arizona, 5, ARIZONA_INTERRUPT_RAW_STATUS_5,
259 ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS);
260
261 if (!ret)
262 regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5,
263 ARIZONA_BOOT_DONE_STS);
264
265 pm_runtime_mark_last_busy(arizona->dev);
266
267 return ret;
268 }
269
270 static inline void arizona_enable_reset(struct arizona *arizona)
271 {
272 if (arizona->pdata.reset)
273 gpio_set_value_cansleep(arizona->pdata.reset, 0);
274 }
275
276 static void arizona_disable_reset(struct arizona *arizona)
277 {
278 if (arizona->pdata.reset) {
279 switch (arizona->type) {
280 case WM5110:
281 case WM8280:
282 /* Meet requirements for minimum reset duration */
283 msleep(5);
284 break;
285 default:
286 break;
287 }
288
289 gpio_set_value_cansleep(arizona->pdata.reset, 1);
290 msleep(1);
291 }
292 }
293
294 struct arizona_sysclk_state {
295 unsigned int fll;
296 unsigned int sysclk;
297 };
298
299 static int arizona_enable_freerun_sysclk(struct arizona *arizona,
300 struct arizona_sysclk_state *state)
301 {
302 int ret, err;
303
304 /* Cache existing FLL and SYSCLK settings */
305 ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &state->fll);
306 if (ret) {
307 dev_err(arizona->dev, "Failed to cache FLL settings: %d\n",
308 ret);
309 return ret;
310 }
311 ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1,
312 &state->sysclk);
313 if (ret) {
314 dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n",
315 ret);
316 return ret;
317 }
318
319 /* Start up SYSCLK using the FLL in free running mode */
320 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1,
321 ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN);
322 if (ret) {
323 dev_err(arizona->dev,
324 "Failed to start FLL in freerunning mode: %d\n",
325 ret);
326 return ret;
327 }
328 ret = arizona_poll_reg(arizona, 25, ARIZONA_INTERRUPT_RAW_STATUS_5,
329 ARIZONA_FLL1_CLOCK_OK_STS,
330 ARIZONA_FLL1_CLOCK_OK_STS);
331 if (ret) {
332 ret = -ETIMEDOUT;
333 goto err_fll;
334 }
335
336 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144);
337 if (ret) {
338 dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret);
339 goto err_fll;
340 }
341
342 return 0;
343
344 err_fll:
345 err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll);
346 if (err)
347 dev_err(arizona->dev,
348 "Failed to re-apply old FLL settings: %d\n", err);
349
350 return ret;
351 }
352
353 static int arizona_disable_freerun_sysclk(struct arizona *arizona,
354 struct arizona_sysclk_state *state)
355 {
356 int ret;
357
358 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1,
359 state->sysclk);
360 if (ret) {
361 dev_err(arizona->dev,
362 "Failed to re-apply old SYSCLK settings: %d\n", ret);
363 return ret;
364 }
365
366 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll);
367 if (ret) {
368 dev_err(arizona->dev,
369 "Failed to re-apply old FLL settings: %d\n", ret);
370 return ret;
371 }
372
373 return 0;
374 }
375
376 static int wm5102_apply_hardware_patch(struct arizona *arizona)
377 {
378 struct arizona_sysclk_state state;
379 int err, ret;
380
381 ret = arizona_enable_freerun_sysclk(arizona, &state);
382 if (ret)
383 return ret;
384
385 /* Start the write sequencer and wait for it to finish */
386 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
387 ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160);
388 if (ret) {
389 dev_err(arizona->dev, "Failed to start write sequencer: %d\n",
390 ret);
391 goto err;
392 }
393
394 ret = arizona_poll_reg(arizona, 5, ARIZONA_WRITE_SEQUENCER_CTRL_1,
395 ARIZONA_WSEQ_BUSY, 0);
396 if (ret) {
397 regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
398 ARIZONA_WSEQ_ABORT);
399 ret = -ETIMEDOUT;
400 }
401
402 err:
403 err = arizona_disable_freerun_sysclk(arizona, &state);
404
405 return ret ?: err;
406 }
407
408 /*
409 * Register patch to some of the CODECs internal write sequences
410 * to ensure a clean exit from the low power sleep state.
411 */
412 static const struct reg_sequence wm5110_sleep_patch[] = {
413 { 0x337A, 0xC100 },
414 { 0x337B, 0x0041 },
415 { 0x3300, 0xA210 },
416 { 0x3301, 0x050C },
417 };
418
419 static int wm5110_apply_sleep_patch(struct arizona *arizona)
420 {
421 struct arizona_sysclk_state state;
422 int err, ret;
423
424 ret = arizona_enable_freerun_sysclk(arizona, &state);
425 if (ret)
426 return ret;
427
428 ret = regmap_multi_reg_write_bypassed(arizona->regmap,
429 wm5110_sleep_patch,
430 ARRAY_SIZE(wm5110_sleep_patch));
431
432 err = arizona_disable_freerun_sysclk(arizona, &state);
433
434 return ret ?: err;
435 }
436
437 static int wm5102_clear_write_sequencer(struct arizona *arizona)
438 {
439 int ret;
440
441 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_3,
442 0x0);
443 if (ret) {
444 dev_err(arizona->dev,
445 "Failed to clear write sequencer state: %d\n", ret);
446 return ret;
447 }
448
449 arizona_enable_reset(arizona);
450 regulator_disable(arizona->dcvdd);
451
452 msleep(20);
453
454 ret = regulator_enable(arizona->dcvdd);
455 if (ret) {
456 dev_err(arizona->dev, "Failed to re-enable DCVDD: %d\n", ret);
457 return ret;
458 }
459 arizona_disable_reset(arizona);
460
461 return 0;
462 }
463
464 #ifdef CONFIG_PM
465 static int arizona_runtime_resume(struct device *dev)
466 {
467 struct arizona *arizona = dev_get_drvdata(dev);
468 int ret;
469
470 dev_dbg(arizona->dev, "Leaving AoD mode\n");
471
472 if (arizona->has_fully_powered_off) {
473 dev_dbg(arizona->dev, "Re-enabling core supplies\n");
474
475 ret = regulator_bulk_enable(arizona->num_core_supplies,
476 arizona->core_supplies);
477 if (ret) {
478 dev_err(dev, "Failed to enable core supplies: %d\n",
479 ret);
480 return ret;
481 }
482 }
483
484 ret = regulator_enable(arizona->dcvdd);
485 if (ret != 0) {
486 dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret);
487 if (arizona->has_fully_powered_off)
488 regulator_bulk_disable(arizona->num_core_supplies,
489 arizona->core_supplies);
490 return ret;
491 }
492
493 if (arizona->has_fully_powered_off) {
494 arizona_disable_reset(arizona);
495 enable_irq(arizona->irq);
496 arizona->has_fully_powered_off = false;
497 }
498
499 regcache_cache_only(arizona->regmap, false);
500
501 switch (arizona->type) {
502 case WM5102:
503 if (arizona->external_dcvdd) {
504 ret = regmap_update_bits(arizona->regmap,
505 ARIZONA_ISOLATION_CONTROL,
506 ARIZONA_ISOLATE_DCVDD1, 0);
507 if (ret != 0) {
508 dev_err(arizona->dev,
509 "Failed to connect DCVDD: %d\n", ret);
510 goto err;
511 }
512 }
513
514 ret = wm5102_patch(arizona);
515 if (ret != 0) {
516 dev_err(arizona->dev, "Failed to apply patch: %d\n",
517 ret);
518 goto err;
519 }
520
521 ret = wm5102_apply_hardware_patch(arizona);
522 if (ret) {
523 dev_err(arizona->dev,
524 "Failed to apply hardware patch: %d\n",
525 ret);
526 goto err;
527 }
528 break;
529 case WM5110:
530 case WM8280:
531 ret = arizona_wait_for_boot(arizona);
532 if (ret)
533 goto err;
534
535 if (arizona->external_dcvdd) {
536 ret = regmap_update_bits(arizona->regmap,
537 ARIZONA_ISOLATION_CONTROL,
538 ARIZONA_ISOLATE_DCVDD1, 0);
539 if (ret) {
540 dev_err(arizona->dev,
541 "Failed to connect DCVDD: %d\n", ret);
542 goto err;
543 }
544 } else {
545 /*
546 * As this is only called for the internal regulator
547 * (where we know voltage ranges available) it is ok
548 * to request an exact range.
549 */
550 ret = regulator_set_voltage(arizona->dcvdd,
551 1200000, 1200000);
552 if (ret < 0) {
553 dev_err(arizona->dev,
554 "Failed to set resume voltage: %d\n",
555 ret);
556 goto err;
557 }
558 }
559
560 ret = wm5110_apply_sleep_patch(arizona);
561 if (ret) {
562 dev_err(arizona->dev,
563 "Failed to re-apply sleep patch: %d\n",
564 ret);
565 goto err;
566 }
567 break;
568 default:
569 ret = arizona_wait_for_boot(arizona);
570 if (ret != 0)
571 goto err;
572
573 if (arizona->external_dcvdd) {
574 ret = regmap_update_bits(arizona->regmap,
575 ARIZONA_ISOLATION_CONTROL,
576 ARIZONA_ISOLATE_DCVDD1, 0);
577 if (ret != 0) {
578 dev_err(arizona->dev,
579 "Failed to connect DCVDD: %d\n", ret);
580 goto err;
581 }
582 }
583 break;
584 }
585
586 ret = regcache_sync(arizona->regmap);
587 if (ret != 0) {
588 dev_err(arizona->dev, "Failed to restore register cache\n");
589 goto err;
590 }
591
592 return 0;
593
594 err:
595 regcache_cache_only(arizona->regmap, true);
596 regulator_disable(arizona->dcvdd);
597 return ret;
598 }
599
600 static int arizona_runtime_suspend(struct device *dev)
601 {
602 struct arizona *arizona = dev_get_drvdata(dev);
603 unsigned int val;
604 int ret;
605
606 dev_dbg(arizona->dev, "Entering AoD mode\n");
607
608 ret = regmap_read(arizona->regmap, ARIZONA_JACK_DETECT_ANALOGUE, &val);
609 if (ret) {
610 dev_err(dev, "Failed to check jack det status: %d\n", ret);
611 return ret;
612 }
613
614 if (arizona->external_dcvdd) {
615 ret = regmap_update_bits(arizona->regmap,
616 ARIZONA_ISOLATION_CONTROL,
617 ARIZONA_ISOLATE_DCVDD1,
618 ARIZONA_ISOLATE_DCVDD1);
619 if (ret != 0) {
620 dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n",
621 ret);
622 return ret;
623 }
624 }
625
626 switch (arizona->type) {
627 case WM5110:
628 case WM8280:
629 if (arizona->external_dcvdd)
630 break;
631
632 /*
633 * As this is only called for the internal regulator
634 * (where we know voltage ranges available) it is ok
635 * to request an exact range.
636 */
637 ret = regulator_set_voltage(arizona->dcvdd, 1175000, 1175000);
638 if (ret < 0) {
639 dev_err(arizona->dev,
640 "Failed to set suspend voltage: %d\n", ret);
641 return ret;
642 }
643 break;
644 case WM5102:
645 if (!(val & ARIZONA_JD1_ENA)) {
646 ret = regmap_write(arizona->regmap,
647 ARIZONA_WRITE_SEQUENCER_CTRL_3, 0x0);
648 if (ret) {
649 dev_err(arizona->dev,
650 "Failed to clear write sequencer: %d\n",
651 ret);
652 return ret;
653 }
654 }
655 break;
656 default:
657 break;
658 }
659
660 regcache_cache_only(arizona->regmap, true);
661 regcache_mark_dirty(arizona->regmap);
662 regulator_disable(arizona->dcvdd);
663
664 /* Allow us to completely power down if no jack detection */
665 if (!(val & ARIZONA_JD1_ENA)) {
666 dev_dbg(arizona->dev, "Fully powering off\n");
667
668 arizona->has_fully_powered_off = true;
669
670 disable_irq_nosync(arizona->irq);
671 arizona_enable_reset(arizona);
672 regulator_bulk_disable(arizona->num_core_supplies,
673 arizona->core_supplies);
674 }
675
676 return 0;
677 }
678 #endif
679
680 #ifdef CONFIG_PM_SLEEP
681 static int arizona_suspend(struct device *dev)
682 {
683 struct arizona *arizona = dev_get_drvdata(dev);
684
685 dev_dbg(arizona->dev, "Suspend, disabling IRQ\n");
686 disable_irq(arizona->irq);
687
688 return 0;
689 }
690
691 static int arizona_suspend_late(struct device *dev)
692 {
693 struct arizona *arizona = dev_get_drvdata(dev);
694
695 dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n");
696 enable_irq(arizona->irq);
697
698 return 0;
699 }
700
701 static int arizona_resume_noirq(struct device *dev)
702 {
703 struct arizona *arizona = dev_get_drvdata(dev);
704
705 dev_dbg(arizona->dev, "Early resume, disabling IRQ\n");
706 disable_irq(arizona->irq);
707
708 return 0;
709 }
710
711 static int arizona_resume(struct device *dev)
712 {
713 struct arizona *arizona = dev_get_drvdata(dev);
714
715 dev_dbg(arizona->dev, "Late resume, reenabling IRQ\n");
716 enable_irq(arizona->irq);
717
718 return 0;
719 }
720 #endif
721
722 const struct dev_pm_ops arizona_pm_ops = {
723 SET_RUNTIME_PM_OPS(arizona_runtime_suspend,
724 arizona_runtime_resume,
725 NULL)
726 SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume)
727 #ifdef CONFIG_PM_SLEEP
728 .suspend_late = arizona_suspend_late,
729 .resume_noirq = arizona_resume_noirq,
730 #endif
731 };
732 EXPORT_SYMBOL_GPL(arizona_pm_ops);
733
734 #ifdef CONFIG_OF
735 unsigned long arizona_of_get_type(struct device *dev)
736 {
737 const struct of_device_id *id = of_match_device(arizona_of_match, dev);
738
739 if (id)
740 return (unsigned long)id->data;
741 else
742 return 0;
743 }
744 EXPORT_SYMBOL_GPL(arizona_of_get_type);
745
746 int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop,
747 bool mandatory)
748 {
749 int gpio;
750
751 gpio = of_get_named_gpio(arizona->dev->of_node, prop, 0);
752 if (gpio < 0) {
753 if (mandatory)
754 dev_err(arizona->dev,
755 "Mandatory DT gpio %s missing/malformed: %d\n",
756 prop, gpio);
757
758 gpio = 0;
759 }
760
761 return gpio;
762 }
763 EXPORT_SYMBOL_GPL(arizona_of_get_named_gpio);
764
765 static int arizona_of_get_core_pdata(struct arizona *arizona)
766 {
767 struct arizona_pdata *pdata = &arizona->pdata;
768 struct property *prop;
769 const __be32 *cur;
770 u32 val;
771 int ret, i;
772 int count = 0;
773
774 pdata->reset = arizona_of_get_named_gpio(arizona, "wlf,reset", true);
775
776 ret = of_property_read_u32_array(arizona->dev->of_node,
777 "wlf,gpio-defaults",
778 pdata->gpio_defaults,
779 ARRAY_SIZE(pdata->gpio_defaults));
780 if (ret >= 0) {
781 /*
782 * All values are literal except out of range values
783 * which are chip default, translate into platform
784 * data which uses 0 as chip default and out of range
785 * as zero.
786 */
787 for (i = 0; i < ARRAY_SIZE(pdata->gpio_defaults); i++) {
788 if (pdata->gpio_defaults[i] > 0xffff)
789 pdata->gpio_defaults[i] = 0;
790 else if (pdata->gpio_defaults[i] == 0)
791 pdata->gpio_defaults[i] = 0x10000;
792 }
793 } else {
794 dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n",
795 ret);
796 }
797
798 of_property_for_each_u32(arizona->dev->of_node, "wlf,inmode", prop,
799 cur, val) {
800 if (count == ARRAY_SIZE(pdata->inmode))
801 break;
802
803 pdata->inmode[count] = val;
804 count++;
805 }
806
807 count = 0;
808 of_property_for_each_u32(arizona->dev->of_node, "wlf,dmic-ref", prop,
809 cur, val) {
810 if (count == ARRAY_SIZE(pdata->dmic_ref))
811 break;
812
813 pdata->dmic_ref[count] = val;
814 count++;
815 }
816
817 return 0;
818 }
819
820 const struct of_device_id arizona_of_match[] = {
821 { .compatible = "wlf,wm5102", .data = (void *)WM5102 },
822 { .compatible = "wlf,wm5110", .data = (void *)WM5110 },
823 { .compatible = "wlf,wm8280", .data = (void *)WM8280 },
824 { .compatible = "wlf,wm8997", .data = (void *)WM8997 },
825 { .compatible = "wlf,wm8998", .data = (void *)WM8998 },
826 { .compatible = "wlf,wm1814", .data = (void *)WM1814 },
827 {},
828 };
829 EXPORT_SYMBOL_GPL(arizona_of_match);
830 #else
831 static inline int arizona_of_get_core_pdata(struct arizona *arizona)
832 {
833 return 0;
834 }
835 #endif
836
837 static const struct mfd_cell early_devs[] = {
838 { .name = "arizona-ldo1" },
839 };
840
841 static const char * const wm5102_supplies[] = {
842 "MICVDD",
843 "DBVDD2",
844 "DBVDD3",
845 "CPVDD",
846 "SPKVDDL",
847 "SPKVDDR",
848 };
849
850 static const struct mfd_cell wm5102_devs[] = {
851 { .name = "arizona-micsupp" },
852 {
853 .name = "arizona-extcon",
854 .parent_supplies = wm5102_supplies,
855 .num_parent_supplies = 1, /* We only need MICVDD */
856 },
857 { .name = "arizona-gpio" },
858 { .name = "arizona-haptics" },
859 { .name = "arizona-pwm" },
860 {
861 .name = "wm5102-codec",
862 .parent_supplies = wm5102_supplies,
863 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
864 },
865 };
866
867 static const struct mfd_cell wm5110_devs[] = {
868 { .name = "arizona-micsupp" },
869 {
870 .name = "arizona-extcon",
871 .parent_supplies = wm5102_supplies,
872 .num_parent_supplies = 1, /* We only need MICVDD */
873 },
874 { .name = "arizona-gpio" },
875 { .name = "arizona-haptics" },
876 { .name = "arizona-pwm" },
877 {
878 .name = "wm5110-codec",
879 .parent_supplies = wm5102_supplies,
880 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
881 },
882 };
883
884 static const char * const wm8997_supplies[] = {
885 "MICVDD",
886 "DBVDD2",
887 "CPVDD",
888 "SPKVDD",
889 };
890
891 static const struct mfd_cell wm8997_devs[] = {
892 { .name = "arizona-micsupp" },
893 {
894 .name = "arizona-extcon",
895 .parent_supplies = wm8997_supplies,
896 .num_parent_supplies = 1, /* We only need MICVDD */
897 },
898 { .name = "arizona-gpio" },
899 { .name = "arizona-haptics" },
900 { .name = "arizona-pwm" },
901 {
902 .name = "wm8997-codec",
903 .parent_supplies = wm8997_supplies,
904 .num_parent_supplies = ARRAY_SIZE(wm8997_supplies),
905 },
906 };
907
908 static const struct mfd_cell wm8998_devs[] = {
909 {
910 .name = "arizona-extcon",
911 .parent_supplies = wm5102_supplies,
912 .num_parent_supplies = 1, /* We only need MICVDD */
913 },
914 { .name = "arizona-gpio" },
915 { .name = "arizona-haptics" },
916 { .name = "arizona-pwm" },
917 {
918 .name = "wm8998-codec",
919 .parent_supplies = wm5102_supplies,
920 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
921 },
922 { .name = "arizona-micsupp" },
923 };
924
925 int arizona_dev_init(struct arizona *arizona)
926 {
927 struct device *dev = arizona->dev;
928 const char *type_name;
929 unsigned int reg, val, mask;
930 int (*apply_patch)(struct arizona *) = NULL;
931 int ret, i;
932
933 dev_set_drvdata(arizona->dev, arizona);
934 mutex_init(&arizona->clk_lock);
935
936 if (dev_get_platdata(arizona->dev))
937 memcpy(&arizona->pdata, dev_get_platdata(arizona->dev),
938 sizeof(arizona->pdata));
939 else
940 arizona_of_get_core_pdata(arizona);
941
942 regcache_cache_only(arizona->regmap, true);
943
944 switch (arizona->type) {
945 case WM5102:
946 case WM5110:
947 case WM8280:
948 case WM8997:
949 case WM8998:
950 case WM1814:
951 for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++)
952 arizona->core_supplies[i].supply
953 = wm5102_core_supplies[i];
954 arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies);
955 break;
956 default:
957 dev_err(arizona->dev, "Unknown device type %d\n",
958 arizona->type);
959 return -EINVAL;
960 }
961
962 /* Mark DCVDD as external, LDO1 driver will clear if internal */
963 arizona->external_dcvdd = true;
964
965 ret = mfd_add_devices(arizona->dev, -1, early_devs,
966 ARRAY_SIZE(early_devs), NULL, 0, NULL);
967 if (ret != 0) {
968 dev_err(dev, "Failed to add early children: %d\n", ret);
969 return ret;
970 }
971
972 ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies,
973 arizona->core_supplies);
974 if (ret != 0) {
975 dev_err(dev, "Failed to request core supplies: %d\n",
976 ret);
977 goto err_early;
978 }
979
980 /**
981 * Don't use devres here because the only device we have to get
982 * against is the MFD device and DCVDD will likely be supplied by
983 * one of its children. Meaning that the regulator will be
984 * destroyed by the time devres calls regulator put.
985 */
986 arizona->dcvdd = regulator_get(arizona->dev, "DCVDD");
987 if (IS_ERR(arizona->dcvdd)) {
988 ret = PTR_ERR(arizona->dcvdd);
989 dev_err(dev, "Failed to request DCVDD: %d\n", ret);
990 goto err_early;
991 }
992
993 if (arizona->pdata.reset) {
994 /* Start out with /RESET low to put the chip into reset */
995 ret = devm_gpio_request_one(arizona->dev, arizona->pdata.reset,
996 GPIOF_DIR_OUT | GPIOF_INIT_LOW,
997 "arizona /RESET");
998 if (ret != 0) {
999 dev_err(dev, "Failed to request /RESET: %d\n", ret);
1000 goto err_dcvdd;
1001 }
1002 }
1003
1004 ret = regulator_bulk_enable(arizona->num_core_supplies,
1005 arizona->core_supplies);
1006 if (ret != 0) {
1007 dev_err(dev, "Failed to enable core supplies: %d\n",
1008 ret);
1009 goto err_dcvdd;
1010 }
1011
1012 ret = regulator_enable(arizona->dcvdd);
1013 if (ret != 0) {
1014 dev_err(dev, "Failed to enable DCVDD: %d\n", ret);
1015 goto err_enable;
1016 }
1017
1018 arizona_disable_reset(arizona);
1019
1020 regcache_cache_only(arizona->regmap, false);
1021
1022 /* Verify that this is a chip we know about */
1023 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
1024 if (ret != 0) {
1025 dev_err(dev, "Failed to read ID register: %d\n", ret);
1026 goto err_reset;
1027 }
1028
1029 switch (reg) {
1030 case 0x5102:
1031 case 0x5110:
1032 case 0x6349:
1033 case 0x8997:
1034 break;
1035 default:
1036 dev_err(arizona->dev, "Unknown device ID: %x\n", reg);
1037 goto err_reset;
1038 }
1039
1040 /* If we have a /RESET GPIO we'll already be reset */
1041 if (!arizona->pdata.reset) {
1042 ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0);
1043 if (ret != 0) {
1044 dev_err(dev, "Failed to reset device: %d\n", ret);
1045 goto err_reset;
1046 }
1047
1048 msleep(1);
1049 }
1050
1051 /* Ensure device startup is complete */
1052 switch (arizona->type) {
1053 case WM5102:
1054 ret = regmap_read(arizona->regmap,
1055 ARIZONA_WRITE_SEQUENCER_CTRL_3, &val);
1056 if (ret) {
1057 dev_err(dev,
1058 "Failed to check write sequencer state: %d\n",
1059 ret);
1060 } else if (val & 0x01) {
1061 ret = wm5102_clear_write_sequencer(arizona);
1062 if (ret)
1063 return ret;
1064 }
1065 break;
1066 default:
1067 break;
1068 }
1069
1070 ret = arizona_wait_for_boot(arizona);
1071 if (ret) {
1072 dev_err(arizona->dev, "Device failed initial boot: %d\n", ret);
1073 goto err_reset;
1074 }
1075
1076 /* Read the device ID information & do device specific stuff */
1077 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
1078 if (ret != 0) {
1079 dev_err(dev, "Failed to read ID register: %d\n", ret);
1080 goto err_reset;
1081 }
1082
1083 ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION,
1084 &arizona->rev);
1085 if (ret != 0) {
1086 dev_err(dev, "Failed to read revision register: %d\n", ret);
1087 goto err_reset;
1088 }
1089 arizona->rev &= ARIZONA_DEVICE_REVISION_MASK;
1090
1091 switch (reg) {
1092 #ifdef CONFIG_MFD_WM5102
1093 case 0x5102:
1094 type_name = "WM5102";
1095 if (arizona->type != WM5102) {
1096 dev_err(arizona->dev, "WM5102 registered as %d\n",
1097 arizona->type);
1098 arizona->type = WM5102;
1099 }
1100 apply_patch = wm5102_patch;
1101 arizona->rev &= 0x7;
1102 break;
1103 #endif
1104 #ifdef CONFIG_MFD_WM5110
1105 case 0x5110:
1106 switch (arizona->type) {
1107 case WM5110:
1108 type_name = "WM5110";
1109 break;
1110 case WM8280:
1111 type_name = "WM8280";
1112 break;
1113 default:
1114 type_name = "WM5110";
1115 dev_err(arizona->dev, "WM5110 registered as %d\n",
1116 arizona->type);
1117 arizona->type = WM5110;
1118 break;
1119 }
1120 apply_patch = wm5110_patch;
1121 break;
1122 #endif
1123 #ifdef CONFIG_MFD_WM8997
1124 case 0x8997:
1125 type_name = "WM8997";
1126 if (arizona->type != WM8997) {
1127 dev_err(arizona->dev, "WM8997 registered as %d\n",
1128 arizona->type);
1129 arizona->type = WM8997;
1130 }
1131 apply_patch = wm8997_patch;
1132 break;
1133 #endif
1134 #ifdef CONFIG_MFD_WM8998
1135 case 0x6349:
1136 switch (arizona->type) {
1137 case WM8998:
1138 type_name = "WM8998";
1139 break;
1140
1141 case WM1814:
1142 type_name = "WM1814";
1143 break;
1144
1145 default:
1146 type_name = "WM8998";
1147 dev_err(arizona->dev, "WM8998 registered as %d\n",
1148 arizona->type);
1149 arizona->type = WM8998;
1150 }
1151
1152 apply_patch = wm8998_patch;
1153 break;
1154 #endif
1155 default:
1156 dev_err(arizona->dev, "Unknown device ID %x\n", reg);
1157 goto err_reset;
1158 }
1159
1160 dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A');
1161
1162 if (apply_patch) {
1163 ret = apply_patch(arizona);
1164 if (ret != 0) {
1165 dev_err(arizona->dev, "Failed to apply patch: %d\n",
1166 ret);
1167 goto err_reset;
1168 }
1169
1170 switch (arizona->type) {
1171 case WM5102:
1172 ret = wm5102_apply_hardware_patch(arizona);
1173 if (ret) {
1174 dev_err(arizona->dev,
1175 "Failed to apply hardware patch: %d\n",
1176 ret);
1177 goto err_reset;
1178 }
1179 break;
1180 case WM5110:
1181 case WM8280:
1182 ret = wm5110_apply_sleep_patch(arizona);
1183 if (ret) {
1184 dev_err(arizona->dev,
1185 "Failed to apply sleep patch: %d\n",
1186 ret);
1187 goto err_reset;
1188 }
1189 break;
1190 default:
1191 break;
1192 }
1193 }
1194
1195 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
1196 if (!arizona->pdata.gpio_defaults[i])
1197 continue;
1198
1199 regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i,
1200 arizona->pdata.gpio_defaults[i]);
1201 }
1202
1203 /* Chip default */
1204 if (!arizona->pdata.clk32k_src)
1205 arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2;
1206
1207 switch (arizona->pdata.clk32k_src) {
1208 case ARIZONA_32KZ_MCLK1:
1209 case ARIZONA_32KZ_MCLK2:
1210 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
1211 ARIZONA_CLK_32K_SRC_MASK,
1212 arizona->pdata.clk32k_src - 1);
1213 arizona_clk32k_enable(arizona);
1214 break;
1215 case ARIZONA_32KZ_NONE:
1216 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
1217 ARIZONA_CLK_32K_SRC_MASK, 2);
1218 break;
1219 default:
1220 dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n",
1221 arizona->pdata.clk32k_src);
1222 ret = -EINVAL;
1223 goto err_reset;
1224 }
1225
1226 for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) {
1227 if (!arizona->pdata.micbias[i].mV &&
1228 !arizona->pdata.micbias[i].bypass)
1229 continue;
1230
1231 /* Apply default for bypass mode */
1232 if (!arizona->pdata.micbias[i].mV)
1233 arizona->pdata.micbias[i].mV = 2800;
1234
1235 val = (arizona->pdata.micbias[i].mV - 1500) / 100;
1236
1237 val <<= ARIZONA_MICB1_LVL_SHIFT;
1238
1239 if (arizona->pdata.micbias[i].ext_cap)
1240 val |= ARIZONA_MICB1_EXT_CAP;
1241
1242 if (arizona->pdata.micbias[i].discharge)
1243 val |= ARIZONA_MICB1_DISCH;
1244
1245 if (arizona->pdata.micbias[i].soft_start)
1246 val |= ARIZONA_MICB1_RATE;
1247
1248 if (arizona->pdata.micbias[i].bypass)
1249 val |= ARIZONA_MICB1_BYPASS;
1250
1251 regmap_update_bits(arizona->regmap,
1252 ARIZONA_MIC_BIAS_CTRL_1 + i,
1253 ARIZONA_MICB1_LVL_MASK |
1254 ARIZONA_MICB1_EXT_CAP |
1255 ARIZONA_MICB1_DISCH |
1256 ARIZONA_MICB1_BYPASS |
1257 ARIZONA_MICB1_RATE, val);
1258 }
1259
1260 for (i = 0; i < ARIZONA_MAX_INPUT; i++) {
1261 /* Default for both is 0 so noop with defaults */
1262 val = arizona->pdata.dmic_ref[i]
1263 << ARIZONA_IN1_DMIC_SUP_SHIFT;
1264 if (arizona->pdata.inmode[i] & ARIZONA_INMODE_DMIC)
1265 val |= 1 << ARIZONA_IN1_MODE_SHIFT;
1266
1267 switch (arizona->type) {
1268 case WM8998:
1269 case WM1814:
1270 regmap_update_bits(arizona->regmap,
1271 ARIZONA_ADC_DIGITAL_VOLUME_1L + (i * 8),
1272 ARIZONA_IN1L_SRC_SE_MASK,
1273 (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE)
1274 << ARIZONA_IN1L_SRC_SE_SHIFT);
1275
1276 regmap_update_bits(arizona->regmap,
1277 ARIZONA_ADC_DIGITAL_VOLUME_1R + (i * 8),
1278 ARIZONA_IN1R_SRC_SE_MASK,
1279 (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE)
1280 << ARIZONA_IN1R_SRC_SE_SHIFT);
1281
1282 mask = ARIZONA_IN1_DMIC_SUP_MASK |
1283 ARIZONA_IN1_MODE_MASK;
1284 break;
1285 default:
1286 if (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE)
1287 val |= 1 << ARIZONA_IN1_SINGLE_ENDED_SHIFT;
1288
1289 mask = ARIZONA_IN1_DMIC_SUP_MASK |
1290 ARIZONA_IN1_MODE_MASK |
1291 ARIZONA_IN1_SINGLE_ENDED_MASK;
1292 break;
1293 }
1294
1295 regmap_update_bits(arizona->regmap,
1296 ARIZONA_IN1L_CONTROL + (i * 8),
1297 mask, val);
1298 }
1299
1300 for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) {
1301 /* Default is 0 so noop with defaults */
1302 if (arizona->pdata.out_mono[i])
1303 val = ARIZONA_OUT1_MONO;
1304 else
1305 val = 0;
1306
1307 regmap_update_bits(arizona->regmap,
1308 ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8),
1309 ARIZONA_OUT1_MONO, val);
1310 }
1311
1312 for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) {
1313 if (arizona->pdata.spk_mute[i])
1314 regmap_update_bits(arizona->regmap,
1315 ARIZONA_PDM_SPK1_CTRL_1 + (i * 2),
1316 ARIZONA_SPK1_MUTE_ENDIAN_MASK |
1317 ARIZONA_SPK1_MUTE_SEQ1_MASK,
1318 arizona->pdata.spk_mute[i]);
1319
1320 if (arizona->pdata.spk_fmt[i])
1321 regmap_update_bits(arizona->regmap,
1322 ARIZONA_PDM_SPK1_CTRL_2 + (i * 2),
1323 ARIZONA_SPK1_FMT_MASK,
1324 arizona->pdata.spk_fmt[i]);
1325 }
1326
1327 pm_runtime_set_active(arizona->dev);
1328 pm_runtime_enable(arizona->dev);
1329
1330 /* Set up for interrupts */
1331 ret = arizona_irq_init(arizona);
1332 if (ret != 0)
1333 goto err_reset;
1334
1335 pm_runtime_set_autosuspend_delay(arizona->dev, 100);
1336 pm_runtime_use_autosuspend(arizona->dev);
1337
1338 arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error",
1339 arizona_clkgen_err, arizona);
1340 arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked",
1341 arizona_overclocked, arizona);
1342 arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked",
1343 arizona_underclocked, arizona);
1344
1345 switch (arizona->type) {
1346 case WM5102:
1347 ret = mfd_add_devices(arizona->dev, -1, wm5102_devs,
1348 ARRAY_SIZE(wm5102_devs), NULL, 0, NULL);
1349 break;
1350 case WM5110:
1351 case WM8280:
1352 ret = mfd_add_devices(arizona->dev, -1, wm5110_devs,
1353 ARRAY_SIZE(wm5110_devs), NULL, 0, NULL);
1354 break;
1355 case WM8997:
1356 ret = mfd_add_devices(arizona->dev, -1, wm8997_devs,
1357 ARRAY_SIZE(wm8997_devs), NULL, 0, NULL);
1358 break;
1359 case WM8998:
1360 case WM1814:
1361 ret = mfd_add_devices(arizona->dev, -1, wm8998_devs,
1362 ARRAY_SIZE(wm8998_devs), NULL, 0, NULL);
1363 break;
1364 }
1365
1366 if (ret != 0) {
1367 dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret);
1368 goto err_irq;
1369 }
1370
1371 return 0;
1372
1373 err_irq:
1374 arizona_irq_exit(arizona);
1375 err_reset:
1376 arizona_enable_reset(arizona);
1377 regulator_disable(arizona->dcvdd);
1378 err_enable:
1379 regulator_bulk_disable(arizona->num_core_supplies,
1380 arizona->core_supplies);
1381 err_dcvdd:
1382 regulator_put(arizona->dcvdd);
1383 err_early:
1384 mfd_remove_devices(dev);
1385 return ret;
1386 }
1387 EXPORT_SYMBOL_GPL(arizona_dev_init);
1388
1389 int arizona_dev_exit(struct arizona *arizona)
1390 {
1391 pm_runtime_disable(arizona->dev);
1392
1393 regulator_disable(arizona->dcvdd);
1394 regulator_put(arizona->dcvdd);
1395
1396 mfd_remove_devices(arizona->dev);
1397 arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona);
1398 arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona);
1399 arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona);
1400 arizona_irq_exit(arizona);
1401 arizona_enable_reset(arizona);
1402
1403 regulator_bulk_disable(arizona->num_core_supplies,
1404 arizona->core_supplies);
1405 return 0;
1406 }
1407 EXPORT_SYMBOL_GPL(arizona_dev_exit);
This page took 0.239455 seconds and 5 git commands to generate.