Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs
[deliverable/linux.git] / drivers / mfd / arizona-core.c
1 /*
2 * Arizona core driver
3 *
4 * Copyright 2012 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/delay.h>
14 #include <linux/err.h>
15 #include <linux/gpio.h>
16 #include <linux/interrupt.h>
17 #include <linux/mfd/core.h>
18 #include <linux/module.h>
19 #include <linux/of.h>
20 #include <linux/of_device.h>
21 #include <linux/of_gpio.h>
22 #include <linux/pm_runtime.h>
23 #include <linux/regmap.h>
24 #include <linux/regulator/consumer.h>
25 #include <linux/regulator/machine.h>
26 #include <linux/slab.h>
27
28 #include <linux/mfd/arizona/core.h>
29 #include <linux/mfd/arizona/registers.h>
30
31 #include "arizona.h"
32
33 static const char *wm5102_core_supplies[] = {
34 "AVDD",
35 "DBVDD1",
36 };
37
38 int arizona_clk32k_enable(struct arizona *arizona)
39 {
40 int ret = 0;
41
42 mutex_lock(&arizona->clk_lock);
43
44 arizona->clk32k_ref++;
45
46 if (arizona->clk32k_ref == 1) {
47 switch (arizona->pdata.clk32k_src) {
48 case ARIZONA_32KZ_MCLK1:
49 ret = pm_runtime_get_sync(arizona->dev);
50 if (ret != 0)
51 goto out;
52 break;
53 }
54
55 ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
56 ARIZONA_CLK_32K_ENA,
57 ARIZONA_CLK_32K_ENA);
58 }
59
60 out:
61 if (ret != 0)
62 arizona->clk32k_ref--;
63
64 mutex_unlock(&arizona->clk_lock);
65
66 return ret;
67 }
68 EXPORT_SYMBOL_GPL(arizona_clk32k_enable);
69
70 int arizona_clk32k_disable(struct arizona *arizona)
71 {
72 int ret = 0;
73
74 mutex_lock(&arizona->clk_lock);
75
76 BUG_ON(arizona->clk32k_ref <= 0);
77
78 arizona->clk32k_ref--;
79
80 if (arizona->clk32k_ref == 0) {
81 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
82 ARIZONA_CLK_32K_ENA, 0);
83
84 switch (arizona->pdata.clk32k_src) {
85 case ARIZONA_32KZ_MCLK1:
86 pm_runtime_put_sync(arizona->dev);
87 break;
88 }
89 }
90
91 mutex_unlock(&arizona->clk_lock);
92
93 return ret;
94 }
95 EXPORT_SYMBOL_GPL(arizona_clk32k_disable);
96
97 static irqreturn_t arizona_clkgen_err(int irq, void *data)
98 {
99 struct arizona *arizona = data;
100
101 dev_err(arizona->dev, "CLKGEN error\n");
102
103 return IRQ_HANDLED;
104 }
105
106 static irqreturn_t arizona_underclocked(int irq, void *data)
107 {
108 struct arizona *arizona = data;
109 unsigned int val;
110 int ret;
111
112 ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8,
113 &val);
114 if (ret != 0) {
115 dev_err(arizona->dev, "Failed to read underclock status: %d\n",
116 ret);
117 return IRQ_NONE;
118 }
119
120 if (val & ARIZONA_AIF3_UNDERCLOCKED_STS)
121 dev_err(arizona->dev, "AIF3 underclocked\n");
122 if (val & ARIZONA_AIF2_UNDERCLOCKED_STS)
123 dev_err(arizona->dev, "AIF2 underclocked\n");
124 if (val & ARIZONA_AIF1_UNDERCLOCKED_STS)
125 dev_err(arizona->dev, "AIF1 underclocked\n");
126 if (val & ARIZONA_ISRC3_UNDERCLOCKED_STS)
127 dev_err(arizona->dev, "ISRC3 underclocked\n");
128 if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS)
129 dev_err(arizona->dev, "ISRC2 underclocked\n");
130 if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS)
131 dev_err(arizona->dev, "ISRC1 underclocked\n");
132 if (val & ARIZONA_FX_UNDERCLOCKED_STS)
133 dev_err(arizona->dev, "FX underclocked\n");
134 if (val & ARIZONA_ASRC_UNDERCLOCKED_STS)
135 dev_err(arizona->dev, "ASRC underclocked\n");
136 if (val & ARIZONA_DAC_UNDERCLOCKED_STS)
137 dev_err(arizona->dev, "DAC underclocked\n");
138 if (val & ARIZONA_ADC_UNDERCLOCKED_STS)
139 dev_err(arizona->dev, "ADC underclocked\n");
140 if (val & ARIZONA_MIXER_UNDERCLOCKED_STS)
141 dev_err(arizona->dev, "Mixer dropped sample\n");
142
143 return IRQ_HANDLED;
144 }
145
146 static irqreturn_t arizona_overclocked(int irq, void *data)
147 {
148 struct arizona *arizona = data;
149 unsigned int val[2];
150 int ret;
151
152 ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6,
153 &val[0], 2);
154 if (ret != 0) {
155 dev_err(arizona->dev, "Failed to read overclock status: %d\n",
156 ret);
157 return IRQ_NONE;
158 }
159
160 if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS)
161 dev_err(arizona->dev, "PWM overclocked\n");
162 if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS)
163 dev_err(arizona->dev, "FX core overclocked\n");
164 if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS)
165 dev_err(arizona->dev, "DAC SYS overclocked\n");
166 if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS)
167 dev_err(arizona->dev, "DAC WARP overclocked\n");
168 if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS)
169 dev_err(arizona->dev, "ADC overclocked\n");
170 if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS)
171 dev_err(arizona->dev, "Mixer overclocked\n");
172 if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS)
173 dev_err(arizona->dev, "AIF3 overclocked\n");
174 if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS)
175 dev_err(arizona->dev, "AIF2 overclocked\n");
176 if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS)
177 dev_err(arizona->dev, "AIF1 overclocked\n");
178 if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS)
179 dev_err(arizona->dev, "Pad control overclocked\n");
180
181 if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS)
182 dev_err(arizona->dev, "Slimbus subsystem overclocked\n");
183 if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS)
184 dev_err(arizona->dev, "Slimbus async overclocked\n");
185 if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS)
186 dev_err(arizona->dev, "Slimbus sync overclocked\n");
187 if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS)
188 dev_err(arizona->dev, "ASRC async system overclocked\n");
189 if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS)
190 dev_err(arizona->dev, "ASRC async WARP overclocked\n");
191 if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS)
192 dev_err(arizona->dev, "ASRC sync system overclocked\n");
193 if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS)
194 dev_err(arizona->dev, "ASRC sync WARP overclocked\n");
195 if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS)
196 dev_err(arizona->dev, "DSP1 overclocked\n");
197 if (val[1] & ARIZONA_ISRC3_OVERCLOCKED_STS)
198 dev_err(arizona->dev, "ISRC3 overclocked\n");
199 if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS)
200 dev_err(arizona->dev, "ISRC2 overclocked\n");
201 if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS)
202 dev_err(arizona->dev, "ISRC1 overclocked\n");
203
204 return IRQ_HANDLED;
205 }
206
207 static int arizona_poll_reg(struct arizona *arizona,
208 int timeout, unsigned int reg,
209 unsigned int mask, unsigned int target)
210 {
211 unsigned int val = 0;
212 int ret, i;
213
214 for (i = 0; i < timeout; i++) {
215 ret = regmap_read(arizona->regmap, reg, &val);
216 if (ret != 0) {
217 dev_err(arizona->dev, "Failed to read reg %u: %d\n",
218 reg, ret);
219 continue;
220 }
221
222 if ((val & mask) == target)
223 return 0;
224
225 msleep(1);
226 }
227
228 dev_err(arizona->dev, "Polling reg %u timed out: %x\n", reg, val);
229 return -ETIMEDOUT;
230 }
231
232 static int arizona_wait_for_boot(struct arizona *arizona)
233 {
234 int ret;
235
236 /*
237 * We can't use an interrupt as we need to runtime resume to do so,
238 * we won't race with the interrupt handler as it'll be blocked on
239 * runtime resume.
240 */
241 ret = arizona_poll_reg(arizona, 5, ARIZONA_INTERRUPT_RAW_STATUS_5,
242 ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS);
243
244 if (!ret)
245 regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5,
246 ARIZONA_BOOT_DONE_STS);
247
248 pm_runtime_mark_last_busy(arizona->dev);
249
250 return ret;
251 }
252
253 static int arizona_apply_hardware_patch(struct arizona* arizona)
254 {
255 unsigned int fll, sysclk;
256 int ret, err;
257
258 /* Cache existing FLL and SYSCLK settings */
259 ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &fll);
260 if (ret != 0) {
261 dev_err(arizona->dev, "Failed to cache FLL settings: %d\n",
262 ret);
263 return ret;
264 }
265 ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, &sysclk);
266 if (ret != 0) {
267 dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n",
268 ret);
269 return ret;
270 }
271
272 /* Start up SYSCLK using the FLL in free running mode */
273 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1,
274 ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN);
275 if (ret != 0) {
276 dev_err(arizona->dev,
277 "Failed to start FLL in freerunning mode: %d\n",
278 ret);
279 return ret;
280 }
281 ret = arizona_poll_reg(arizona, 25, ARIZONA_INTERRUPT_RAW_STATUS_5,
282 ARIZONA_FLL1_CLOCK_OK_STS,
283 ARIZONA_FLL1_CLOCK_OK_STS);
284 if (ret != 0) {
285 ret = -ETIMEDOUT;
286 goto err_fll;
287 }
288
289 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144);
290 if (ret != 0) {
291 dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret);
292 goto err_fll;
293 }
294
295 /* Start the write sequencer and wait for it to finish */
296 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
297 ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160);
298 if (ret != 0) {
299 dev_err(arizona->dev, "Failed to start write sequencer: %d\n",
300 ret);
301 goto err_sysclk;
302 }
303 ret = arizona_poll_reg(arizona, 5, ARIZONA_WRITE_SEQUENCER_CTRL_1,
304 ARIZONA_WSEQ_BUSY, 0);
305 if (ret != 0) {
306 regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
307 ARIZONA_WSEQ_ABORT);
308 ret = -ETIMEDOUT;
309 }
310
311 err_sysclk:
312 err = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, sysclk);
313 if (err != 0) {
314 dev_err(arizona->dev,
315 "Failed to re-apply old SYSCLK settings: %d\n",
316 err);
317 }
318
319 err_fll:
320 err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, fll);
321 if (err != 0) {
322 dev_err(arizona->dev,
323 "Failed to re-apply old FLL settings: %d\n",
324 err);
325 }
326
327 if (ret != 0)
328 return ret;
329 else
330 return err;
331 }
332
333 #ifdef CONFIG_PM
334 static int arizona_runtime_resume(struct device *dev)
335 {
336 struct arizona *arizona = dev_get_drvdata(dev);
337 int ret;
338
339 dev_dbg(arizona->dev, "Leaving AoD mode\n");
340
341 ret = regulator_enable(arizona->dcvdd);
342 if (ret != 0) {
343 dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret);
344 return ret;
345 }
346
347 regcache_cache_only(arizona->regmap, false);
348
349 switch (arizona->type) {
350 case WM5102:
351 if (arizona->external_dcvdd) {
352 ret = regmap_update_bits(arizona->regmap,
353 ARIZONA_ISOLATION_CONTROL,
354 ARIZONA_ISOLATE_DCVDD1, 0);
355 if (ret != 0) {
356 dev_err(arizona->dev,
357 "Failed to connect DCVDD: %d\n", ret);
358 goto err;
359 }
360 }
361
362 ret = wm5102_patch(arizona);
363 if (ret != 0) {
364 dev_err(arizona->dev, "Failed to apply patch: %d\n",
365 ret);
366 goto err;
367 }
368
369 ret = arizona_apply_hardware_patch(arizona);
370 if (ret != 0) {
371 dev_err(arizona->dev,
372 "Failed to apply hardware patch: %d\n",
373 ret);
374 goto err;
375 }
376 break;
377 default:
378 ret = arizona_wait_for_boot(arizona);
379 if (ret != 0) {
380 goto err;
381 }
382
383 if (arizona->external_dcvdd) {
384 ret = regmap_update_bits(arizona->regmap,
385 ARIZONA_ISOLATION_CONTROL,
386 ARIZONA_ISOLATE_DCVDD1, 0);
387 if (ret != 0) {
388 dev_err(arizona->dev,
389 "Failed to connect DCVDD: %d\n", ret);
390 goto err;
391 }
392 }
393 break;
394 }
395
396 ret = regcache_sync(arizona->regmap);
397 if (ret != 0) {
398 dev_err(arizona->dev, "Failed to restore register cache\n");
399 goto err;
400 }
401
402 return 0;
403
404 err:
405 regcache_cache_only(arizona->regmap, true);
406 regulator_disable(arizona->dcvdd);
407 return ret;
408 }
409
410 static int arizona_runtime_suspend(struct device *dev)
411 {
412 struct arizona *arizona = dev_get_drvdata(dev);
413 int ret;
414
415 dev_dbg(arizona->dev, "Entering AoD mode\n");
416
417 if (arizona->external_dcvdd) {
418 ret = regmap_update_bits(arizona->regmap,
419 ARIZONA_ISOLATION_CONTROL,
420 ARIZONA_ISOLATE_DCVDD1,
421 ARIZONA_ISOLATE_DCVDD1);
422 if (ret != 0) {
423 dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n",
424 ret);
425 return ret;
426 }
427 }
428
429 regcache_cache_only(arizona->regmap, true);
430 regcache_mark_dirty(arizona->regmap);
431 regulator_disable(arizona->dcvdd);
432
433 return 0;
434 }
435 #endif
436
437 #ifdef CONFIG_PM_SLEEP
438 static int arizona_suspend(struct device *dev)
439 {
440 struct arizona *arizona = dev_get_drvdata(dev);
441
442 dev_dbg(arizona->dev, "Suspend, disabling IRQ\n");
443 disable_irq(arizona->irq);
444
445 return 0;
446 }
447
448 static int arizona_suspend_late(struct device *dev)
449 {
450 struct arizona *arizona = dev_get_drvdata(dev);
451
452 dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n");
453 enable_irq(arizona->irq);
454
455 return 0;
456 }
457
458 static int arizona_resume_noirq(struct device *dev)
459 {
460 struct arizona *arizona = dev_get_drvdata(dev);
461
462 dev_dbg(arizona->dev, "Early resume, disabling IRQ\n");
463 disable_irq(arizona->irq);
464
465 return 0;
466 }
467
468 static int arizona_resume(struct device *dev)
469 {
470 struct arizona *arizona = dev_get_drvdata(dev);
471
472 dev_dbg(arizona->dev, "Late resume, reenabling IRQ\n");
473 enable_irq(arizona->irq);
474
475 return 0;
476 }
477 #endif
478
479 const struct dev_pm_ops arizona_pm_ops = {
480 SET_RUNTIME_PM_OPS(arizona_runtime_suspend,
481 arizona_runtime_resume,
482 NULL)
483 SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume)
484 #ifdef CONFIG_PM_SLEEP
485 .suspend_late = arizona_suspend_late,
486 .resume_noirq = arizona_resume_noirq,
487 #endif
488 };
489 EXPORT_SYMBOL_GPL(arizona_pm_ops);
490
491 #ifdef CONFIG_OF
492 unsigned long arizona_of_get_type(struct device *dev)
493 {
494 const struct of_device_id *id = of_match_device(arizona_of_match, dev);
495
496 if (id)
497 return (unsigned long)id->data;
498 else
499 return 0;
500 }
501 EXPORT_SYMBOL_GPL(arizona_of_get_type);
502
503 int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop,
504 bool mandatory)
505 {
506 int gpio;
507
508 gpio = of_get_named_gpio(arizona->dev->of_node, prop, 0);
509 if (gpio < 0) {
510 if (mandatory)
511 dev_err(arizona->dev,
512 "Mandatory DT gpio %s missing/malformed: %d\n",
513 prop, gpio);
514
515 gpio = 0;
516 }
517
518 return gpio;
519 }
520 EXPORT_SYMBOL_GPL(arizona_of_get_named_gpio);
521
522 static int arizona_of_get_core_pdata(struct arizona *arizona)
523 {
524 struct arizona_pdata *pdata = &arizona->pdata;
525 struct property *prop;
526 const __be32 *cur;
527 u32 val;
528 int ret, i;
529 int count = 0;
530
531 pdata->reset = arizona_of_get_named_gpio(arizona, "wlf,reset", true);
532
533 ret = of_property_read_u32_array(arizona->dev->of_node,
534 "wlf,gpio-defaults",
535 arizona->pdata.gpio_defaults,
536 ARRAY_SIZE(arizona->pdata.gpio_defaults));
537 if (ret >= 0) {
538 /*
539 * All values are literal except out of range values
540 * which are chip default, translate into platform
541 * data which uses 0 as chip default and out of range
542 * as zero.
543 */
544 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
545 if (arizona->pdata.gpio_defaults[i] > 0xffff)
546 arizona->pdata.gpio_defaults[i] = 0;
547 else if (arizona->pdata.gpio_defaults[i] == 0)
548 arizona->pdata.gpio_defaults[i] = 0x10000;
549 }
550 } else {
551 dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n",
552 ret);
553 }
554
555 of_property_for_each_u32(arizona->dev->of_node, "wlf,inmode", prop,
556 cur, val) {
557 if (count == ARRAY_SIZE(arizona->pdata.inmode))
558 break;
559
560 arizona->pdata.inmode[count] = val;
561 count++;
562 }
563
564 count = 0;
565 of_property_for_each_u32(arizona->dev->of_node, "wlf,dmic-ref", prop,
566 cur, val) {
567 if (count == ARRAY_SIZE(arizona->pdata.dmic_ref))
568 break;
569
570 arizona->pdata.dmic_ref[count] = val;
571 count++;
572 }
573
574 return 0;
575 }
576
577 const struct of_device_id arizona_of_match[] = {
578 { .compatible = "wlf,wm5102", .data = (void *)WM5102 },
579 { .compatible = "wlf,wm5110", .data = (void *)WM5110 },
580 { .compatible = "wlf,wm8280", .data = (void *)WM8280 },
581 { .compatible = "wlf,wm8997", .data = (void *)WM8997 },
582 {},
583 };
584 EXPORT_SYMBOL_GPL(arizona_of_match);
585 #else
586 static inline int arizona_of_get_core_pdata(struct arizona *arizona)
587 {
588 return 0;
589 }
590 #endif
591
592 static const struct mfd_cell early_devs[] = {
593 { .name = "arizona-ldo1" },
594 };
595
596 static const char *wm5102_supplies[] = {
597 "MICVDD",
598 "DBVDD2",
599 "DBVDD3",
600 "CPVDD",
601 "SPKVDDL",
602 "SPKVDDR",
603 };
604
605 static const struct mfd_cell wm5102_devs[] = {
606 { .name = "arizona-micsupp" },
607 {
608 .name = "arizona-extcon",
609 .parent_supplies = wm5102_supplies,
610 .num_parent_supplies = 1, /* We only need MICVDD */
611 },
612 { .name = "arizona-gpio" },
613 { .name = "arizona-haptics" },
614 { .name = "arizona-pwm" },
615 {
616 .name = "wm5102-codec",
617 .parent_supplies = wm5102_supplies,
618 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
619 },
620 };
621
622 static const struct mfd_cell wm5110_devs[] = {
623 { .name = "arizona-micsupp" },
624 {
625 .name = "arizona-extcon",
626 .parent_supplies = wm5102_supplies,
627 .num_parent_supplies = 1, /* We only need MICVDD */
628 },
629 { .name = "arizona-gpio" },
630 { .name = "arizona-haptics" },
631 { .name = "arizona-pwm" },
632 {
633 .name = "wm5110-codec",
634 .parent_supplies = wm5102_supplies,
635 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
636 },
637 };
638
639 static const char *wm8997_supplies[] = {
640 "MICVDD",
641 "DBVDD2",
642 "CPVDD",
643 "SPKVDD",
644 };
645
646 static const struct mfd_cell wm8997_devs[] = {
647 { .name = "arizona-micsupp" },
648 {
649 .name = "arizona-extcon",
650 .parent_supplies = wm8997_supplies,
651 .num_parent_supplies = 1, /* We only need MICVDD */
652 },
653 { .name = "arizona-gpio" },
654 { .name = "arizona-haptics" },
655 { .name = "arizona-pwm" },
656 {
657 .name = "wm8997-codec",
658 .parent_supplies = wm8997_supplies,
659 .num_parent_supplies = ARRAY_SIZE(wm8997_supplies),
660 },
661 };
662
663 int arizona_dev_init(struct arizona *arizona)
664 {
665 struct device *dev = arizona->dev;
666 const char *type_name;
667 unsigned int reg, val;
668 int (*apply_patch)(struct arizona *) = NULL;
669 int ret, i;
670
671 dev_set_drvdata(arizona->dev, arizona);
672 mutex_init(&arizona->clk_lock);
673
674 if (dev_get_platdata(arizona->dev))
675 memcpy(&arizona->pdata, dev_get_platdata(arizona->dev),
676 sizeof(arizona->pdata));
677 else
678 arizona_of_get_core_pdata(arizona);
679
680 regcache_cache_only(arizona->regmap, true);
681
682 switch (arizona->type) {
683 case WM5102:
684 case WM5110:
685 case WM8280:
686 case WM8997:
687 for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++)
688 arizona->core_supplies[i].supply
689 = wm5102_core_supplies[i];
690 arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies);
691 break;
692 default:
693 dev_err(arizona->dev, "Unknown device type %d\n",
694 arizona->type);
695 return -EINVAL;
696 }
697
698 /* Mark DCVDD as external, LDO1 driver will clear if internal */
699 arizona->external_dcvdd = true;
700
701 ret = mfd_add_devices(arizona->dev, -1, early_devs,
702 ARRAY_SIZE(early_devs), NULL, 0, NULL);
703 if (ret != 0) {
704 dev_err(dev, "Failed to add early children: %d\n", ret);
705 return ret;
706 }
707
708 ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies,
709 arizona->core_supplies);
710 if (ret != 0) {
711 dev_err(dev, "Failed to request core supplies: %d\n",
712 ret);
713 goto err_early;
714 }
715
716 /**
717 * Don't use devres here because the only device we have to get
718 * against is the MFD device and DCVDD will likely be supplied by
719 * one of its children. Meaning that the regulator will be
720 * destroyed by the time devres calls regulator put.
721 */
722 arizona->dcvdd = regulator_get(arizona->dev, "DCVDD");
723 if (IS_ERR(arizona->dcvdd)) {
724 ret = PTR_ERR(arizona->dcvdd);
725 dev_err(dev, "Failed to request DCVDD: %d\n", ret);
726 goto err_early;
727 }
728
729 if (arizona->pdata.reset) {
730 /* Start out with /RESET low to put the chip into reset */
731 ret = gpio_request_one(arizona->pdata.reset,
732 GPIOF_DIR_OUT | GPIOF_INIT_LOW,
733 "arizona /RESET");
734 if (ret != 0) {
735 dev_err(dev, "Failed to request /RESET: %d\n", ret);
736 goto err_dcvdd;
737 }
738 }
739
740 ret = regulator_bulk_enable(arizona->num_core_supplies,
741 arizona->core_supplies);
742 if (ret != 0) {
743 dev_err(dev, "Failed to enable core supplies: %d\n",
744 ret);
745 goto err_dcvdd;
746 }
747
748 ret = regulator_enable(arizona->dcvdd);
749 if (ret != 0) {
750 dev_err(dev, "Failed to enable DCVDD: %d\n", ret);
751 goto err_enable;
752 }
753
754 if (arizona->pdata.reset) {
755 gpio_set_value_cansleep(arizona->pdata.reset, 1);
756 msleep(1);
757 }
758
759 regcache_cache_only(arizona->regmap, false);
760
761 /* Verify that this is a chip we know about */
762 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
763 if (ret != 0) {
764 dev_err(dev, "Failed to read ID register: %d\n", ret);
765 goto err_reset;
766 }
767
768 switch (reg) {
769 case 0x5102:
770 case 0x5110:
771 case 0x8997:
772 break;
773 default:
774 dev_err(arizona->dev, "Unknown device ID: %x\n", reg);
775 goto err_reset;
776 }
777
778 /* If we have a /RESET GPIO we'll already be reset */
779 if (!arizona->pdata.reset) {
780 regcache_mark_dirty(arizona->regmap);
781
782 ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0);
783 if (ret != 0) {
784 dev_err(dev, "Failed to reset device: %d\n", ret);
785 goto err_reset;
786 }
787
788 msleep(1);
789
790 ret = regcache_sync(arizona->regmap);
791 if (ret != 0) {
792 dev_err(dev, "Failed to sync device: %d\n", ret);
793 goto err_reset;
794 }
795 }
796
797 /* Ensure device startup is complete */
798 switch (arizona->type) {
799 case WM5102:
800 ret = regmap_read(arizona->regmap,
801 ARIZONA_WRITE_SEQUENCER_CTRL_3, &val);
802 if (ret != 0)
803 dev_err(dev,
804 "Failed to check write sequencer state: %d\n",
805 ret);
806 else if (val & 0x01)
807 break;
808 /* Fall through */
809 default:
810 ret = arizona_wait_for_boot(arizona);
811 if (ret != 0) {
812 dev_err(arizona->dev,
813 "Device failed initial boot: %d\n", ret);
814 goto err_reset;
815 }
816 break;
817 }
818
819 /* Read the device ID information & do device specific stuff */
820 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
821 if (ret != 0) {
822 dev_err(dev, "Failed to read ID register: %d\n", ret);
823 goto err_reset;
824 }
825
826 ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION,
827 &arizona->rev);
828 if (ret != 0) {
829 dev_err(dev, "Failed to read revision register: %d\n", ret);
830 goto err_reset;
831 }
832 arizona->rev &= ARIZONA_DEVICE_REVISION_MASK;
833
834 switch (reg) {
835 #ifdef CONFIG_MFD_WM5102
836 case 0x5102:
837 type_name = "WM5102";
838 if (arizona->type != WM5102) {
839 dev_err(arizona->dev, "WM5102 registered as %d\n",
840 arizona->type);
841 arizona->type = WM5102;
842 }
843 apply_patch = wm5102_patch;
844 arizona->rev &= 0x7;
845 break;
846 #endif
847 #ifdef CONFIG_MFD_WM5110
848 case 0x5110:
849 switch (arizona->type) {
850 case WM5110:
851 type_name = "WM5110";
852 break;
853 case WM8280:
854 type_name = "WM8280";
855 break;
856 default:
857 type_name = "WM5110";
858 dev_err(arizona->dev, "WM5110 registered as %d\n",
859 arizona->type);
860 arizona->type = WM5110;
861 break;
862 }
863 apply_patch = wm5110_patch;
864 break;
865 #endif
866 #ifdef CONFIG_MFD_WM8997
867 case 0x8997:
868 type_name = "WM8997";
869 if (arizona->type != WM8997) {
870 dev_err(arizona->dev, "WM8997 registered as %d\n",
871 arizona->type);
872 arizona->type = WM8997;
873 }
874 apply_patch = wm8997_patch;
875 break;
876 #endif
877 default:
878 dev_err(arizona->dev, "Unknown device ID %x\n", reg);
879 goto err_reset;
880 }
881
882 dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A');
883
884 if (apply_patch) {
885 ret = apply_patch(arizona);
886 if (ret != 0) {
887 dev_err(arizona->dev, "Failed to apply patch: %d\n",
888 ret);
889 goto err_reset;
890 }
891
892 switch (arizona->type) {
893 case WM5102:
894 ret = arizona_apply_hardware_patch(arizona);
895 if (ret != 0) {
896 dev_err(arizona->dev,
897 "Failed to apply hardware patch: %d\n",
898 ret);
899 goto err_reset;
900 }
901 break;
902 default:
903 break;
904 }
905 }
906
907 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
908 if (!arizona->pdata.gpio_defaults[i])
909 continue;
910
911 regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i,
912 arizona->pdata.gpio_defaults[i]);
913 }
914
915 pm_runtime_set_autosuspend_delay(arizona->dev, 100);
916 pm_runtime_use_autosuspend(arizona->dev);
917 pm_runtime_enable(arizona->dev);
918
919 /* Chip default */
920 if (!arizona->pdata.clk32k_src)
921 arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2;
922
923 switch (arizona->pdata.clk32k_src) {
924 case ARIZONA_32KZ_MCLK1:
925 case ARIZONA_32KZ_MCLK2:
926 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
927 ARIZONA_CLK_32K_SRC_MASK,
928 arizona->pdata.clk32k_src - 1);
929 arizona_clk32k_enable(arizona);
930 break;
931 case ARIZONA_32KZ_NONE:
932 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
933 ARIZONA_CLK_32K_SRC_MASK, 2);
934 break;
935 default:
936 dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n",
937 arizona->pdata.clk32k_src);
938 ret = -EINVAL;
939 goto err_reset;
940 }
941
942 for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) {
943 if (!arizona->pdata.micbias[i].mV &&
944 !arizona->pdata.micbias[i].bypass)
945 continue;
946
947 /* Apply default for bypass mode */
948 if (!arizona->pdata.micbias[i].mV)
949 arizona->pdata.micbias[i].mV = 2800;
950
951 val = (arizona->pdata.micbias[i].mV - 1500) / 100;
952
953 val <<= ARIZONA_MICB1_LVL_SHIFT;
954
955 if (arizona->pdata.micbias[i].ext_cap)
956 val |= ARIZONA_MICB1_EXT_CAP;
957
958 if (arizona->pdata.micbias[i].discharge)
959 val |= ARIZONA_MICB1_DISCH;
960
961 if (arizona->pdata.micbias[i].soft_start)
962 val |= ARIZONA_MICB1_RATE;
963
964 if (arizona->pdata.micbias[i].bypass)
965 val |= ARIZONA_MICB1_BYPASS;
966
967 regmap_update_bits(arizona->regmap,
968 ARIZONA_MIC_BIAS_CTRL_1 + i,
969 ARIZONA_MICB1_LVL_MASK |
970 ARIZONA_MICB1_EXT_CAP |
971 ARIZONA_MICB1_DISCH |
972 ARIZONA_MICB1_BYPASS |
973 ARIZONA_MICB1_RATE, val);
974 }
975
976 for (i = 0; i < ARIZONA_MAX_INPUT; i++) {
977 /* Default for both is 0 so noop with defaults */
978 val = arizona->pdata.dmic_ref[i]
979 << ARIZONA_IN1_DMIC_SUP_SHIFT;
980 val |= arizona->pdata.inmode[i] << ARIZONA_IN1_MODE_SHIFT;
981
982 regmap_update_bits(arizona->regmap,
983 ARIZONA_IN1L_CONTROL + (i * 8),
984 ARIZONA_IN1_DMIC_SUP_MASK |
985 ARIZONA_IN1_MODE_MASK, val);
986 }
987
988 for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) {
989 /* Default is 0 so noop with defaults */
990 if (arizona->pdata.out_mono[i])
991 val = ARIZONA_OUT1_MONO;
992 else
993 val = 0;
994
995 regmap_update_bits(arizona->regmap,
996 ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8),
997 ARIZONA_OUT1_MONO, val);
998 }
999
1000 for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) {
1001 if (arizona->pdata.spk_mute[i])
1002 regmap_update_bits(arizona->regmap,
1003 ARIZONA_PDM_SPK1_CTRL_1 + (i * 2),
1004 ARIZONA_SPK1_MUTE_ENDIAN_MASK |
1005 ARIZONA_SPK1_MUTE_SEQ1_MASK,
1006 arizona->pdata.spk_mute[i]);
1007
1008 if (arizona->pdata.spk_fmt[i])
1009 regmap_update_bits(arizona->regmap,
1010 ARIZONA_PDM_SPK1_CTRL_2 + (i * 2),
1011 ARIZONA_SPK1_FMT_MASK,
1012 arizona->pdata.spk_fmt[i]);
1013 }
1014
1015 /* Set up for interrupts */
1016 ret = arizona_irq_init(arizona);
1017 if (ret != 0)
1018 goto err_reset;
1019
1020 arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error",
1021 arizona_clkgen_err, arizona);
1022 arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked",
1023 arizona_overclocked, arizona);
1024 arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked",
1025 arizona_underclocked, arizona);
1026
1027 switch (arizona->type) {
1028 case WM5102:
1029 ret = mfd_add_devices(arizona->dev, -1, wm5102_devs,
1030 ARRAY_SIZE(wm5102_devs), NULL, 0, NULL);
1031 break;
1032 case WM5110:
1033 case WM8280:
1034 ret = mfd_add_devices(arizona->dev, -1, wm5110_devs,
1035 ARRAY_SIZE(wm5110_devs), NULL, 0, NULL);
1036 break;
1037 case WM8997:
1038 ret = mfd_add_devices(arizona->dev, -1, wm8997_devs,
1039 ARRAY_SIZE(wm8997_devs), NULL, 0, NULL);
1040 break;
1041 }
1042
1043 if (ret != 0) {
1044 dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret);
1045 goto err_irq;
1046 }
1047
1048 #ifdef CONFIG_PM
1049 regulator_disable(arizona->dcvdd);
1050 #endif
1051
1052 return 0;
1053
1054 err_irq:
1055 arizona_irq_exit(arizona);
1056 err_reset:
1057 if (arizona->pdata.reset) {
1058 gpio_set_value_cansleep(arizona->pdata.reset, 0);
1059 gpio_free(arizona->pdata.reset);
1060 }
1061 regulator_disable(arizona->dcvdd);
1062 err_enable:
1063 regulator_bulk_disable(arizona->num_core_supplies,
1064 arizona->core_supplies);
1065 err_dcvdd:
1066 regulator_put(arizona->dcvdd);
1067 err_early:
1068 mfd_remove_devices(dev);
1069 return ret;
1070 }
1071 EXPORT_SYMBOL_GPL(arizona_dev_init);
1072
1073 int arizona_dev_exit(struct arizona *arizona)
1074 {
1075 pm_runtime_disable(arizona->dev);
1076
1077 regulator_disable(arizona->dcvdd);
1078 regulator_put(arizona->dcvdd);
1079
1080 mfd_remove_devices(arizona->dev);
1081 arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona);
1082 arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona);
1083 arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona);
1084 arizona_irq_exit(arizona);
1085 if (arizona->pdata.reset)
1086 gpio_set_value_cansleep(arizona->pdata.reset, 0);
1087
1088 regulator_bulk_disable(arizona->num_core_supplies,
1089 arizona->core_supplies);
1090 return 0;
1091 }
1092 EXPORT_SYMBOL_GPL(arizona_dev_exit);
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