2 * ChromeOS EC multi-function device (SPI)
4 * Copyright (C) 2012 Google, Inc
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 #include <linux/delay.h>
17 #include <linux/kernel.h>
18 #include <linux/module.h>
19 #include <linux/mfd/cros_ec.h>
20 #include <linux/mfd/cros_ec_commands.h>
22 #include <linux/platform_device.h>
23 #include <linux/slab.h>
24 #include <linux/spi/spi.h>
27 /* The header byte, which follows the preamble */
28 #define EC_MSG_HEADER 0xec
31 * Number of EC preamble bytes we read at a time. Since it takes
32 * about 400-500us for the EC to respond there is not a lot of
33 * point in tuning this. If the EC could respond faster then
34 * we could increase this so that might expect the preamble and
35 * message to occur in a single transaction. However, the maximum
36 * SPI transfer size is 256 bytes, so at 5MHz we need a response
37 * time of perhaps <320us (200 bytes / 1600 bits).
39 #define EC_MSG_PREAMBLE_COUNT 32
42 * Allow for a long time for the EC to respond. We support i2c
43 * tunneling and support fairly long messages for the tunnel (249
44 * bytes long at the moment). If we're talking to a 100 kHz device
45 * on the other end and need to transfer ~256 bytes, then we need:
46 * 10 us/bit * ~10 bits/byte * ~256 bytes = ~25ms
48 * We'll wait 4 times that to handle clock stretching and other
51 * It's pretty unlikely that we'll really see a 249 byte tunnel in
52 * anything other than testing. If this was more common we might
53 * consider having slow commands like this require a GET_STATUS
54 * wait loop. The 'flash write' command would be another candidate
55 * for this, clocking in at 2-3ms.
57 #define EC_MSG_DEADLINE_MS 100
60 * Time between raising the SPI chip select (for the end of a
61 * transaction) and dropping it again (for the next transaction).
62 * If we go too fast, the EC will miss the transaction. We know that we
63 * need at least 70 us with the 16 MHz STM32 EC, so go with 200 us to be
66 #define EC_SPI_RECOVERY_TIME_NS (200 * 1000)
69 * struct cros_ec_spi - information about a SPI-connected EC
71 * @spi: SPI device we are connected to
72 * @last_transfer_ns: time that we last finished a transfer, or 0 if there
74 * @end_of_msg_delay: used to set the delay_usecs on the spi_transfer that
75 * is sent when we want to turn off CS at the end of a transaction.
76 * @lock: mutex to ensure only one user of cros_ec_command_spi_xfer at a time
79 struct spi_device
*spi
;
81 unsigned int end_of_msg_delay
;
85 static void debug_packet(struct device
*dev
, const char *name
, u8
*ptr
,
91 dev_dbg(dev
, "%s: ", name
);
92 for (i
= 0; i
< len
; i
++)
93 pr_cont(" %02x", ptr
[i
]);
100 * cros_ec_spi_receive_response - Receive a response from the EC.
102 * This function has two phases: reading the preamble bytes (since if we read
103 * data from the EC before it is ready to send, we just get preamble) and
104 * reading the actual message.
106 * The received data is placed into ec_dev->din.
108 * @ec_dev: ChromeOS EC device
109 * @need_len: Number of message bytes we need to read
111 static int cros_ec_spi_receive_response(struct cros_ec_device
*ec_dev
,
114 struct cros_ec_spi
*ec_spi
= ec_dev
->priv
;
115 struct spi_transfer trans
;
116 struct spi_message msg
;
119 unsigned long deadline
;
122 /* Receive data until we see the header byte */
123 deadline
= jiffies
+ msecs_to_jiffies(EC_MSG_DEADLINE_MS
);
125 unsigned long start_jiffies
= jiffies
;
127 memset(&trans
, 0, sizeof(trans
));
129 trans
.rx_buf
= ptr
= ec_dev
->din
;
130 trans
.len
= EC_MSG_PREAMBLE_COUNT
;
132 spi_message_init(&msg
);
133 spi_message_add_tail(&trans
, &msg
);
134 ret
= spi_sync(ec_spi
->spi
, &msg
);
136 dev_err(ec_dev
->dev
, "spi transfer failed: %d\n", ret
);
140 for (end
= ptr
+ EC_MSG_PREAMBLE_COUNT
; ptr
!= end
; ptr
++) {
141 if (*ptr
== EC_MSG_HEADER
) {
142 dev_dbg(ec_dev
->dev
, "msg found at %zd\n",
151 * Use the time at the start of the loop as a timeout. This
152 * gives us one last shot at getting the transfer and is useful
153 * in case we got context switched out for a while.
155 if (time_after(start_jiffies
, deadline
)) {
156 dev_warn(ec_dev
->dev
, "EC failed to respond in time\n");
162 * ptr now points to the header byte. Copy any valid data to the
163 * start of our buffer
166 BUG_ON(todo
< 0 || todo
> ec_dev
->din_size
);
167 todo
= min(todo
, need_len
);
168 memmove(ec_dev
->din
, ptr
, todo
);
169 ptr
= ec_dev
->din
+ todo
;
170 dev_dbg(ec_dev
->dev
, "need %d, got %d bytes from preamble\n",
174 /* Receive data until we have it all */
175 while (need_len
> 0) {
177 * We can't support transfers larger than the SPI FIFO size
178 * unless we have DMA. We don't have DMA on the ISP SPI ports
179 * for Exynos. We need a way of asking SPI driver for
180 * maximum-supported transfer size.
182 todo
= min(need_len
, 256);
183 dev_dbg(ec_dev
->dev
, "loop, todo=%d, need_len=%d, ptr=%zd\n",
184 todo
, need_len
, ptr
- ec_dev
->din
);
186 memset(&trans
, 0, sizeof(trans
));
190 spi_message_init(&msg
);
191 spi_message_add_tail(&trans
, &msg
);
193 /* send command to EC and read answer */
194 BUG_ON((u8
*)trans
.rx_buf
- ec_dev
->din
+ todo
>
196 ret
= spi_sync(ec_spi
->spi
, &msg
);
198 dev_err(ec_dev
->dev
, "spi transfer failed: %d\n", ret
);
202 debug_packet(ec_dev
->dev
, "interim", ptr
, todo
);
207 dev_dbg(ec_dev
->dev
, "loop done, ptr=%zd\n", ptr
- ec_dev
->din
);
213 * cros_ec_command_spi_xfer - Transfer a message over SPI and receive the reply
215 * @ec_dev: ChromeOS EC device
216 * @ec_msg: Message to transfer
218 static int cros_ec_command_spi_xfer(struct cros_ec_device
*ec_dev
,
219 struct cros_ec_msg
*ec_msg
)
221 struct cros_ec_spi
*ec_spi
= ec_dev
->priv
;
222 struct spi_transfer trans
;
223 struct spi_message msg
;
227 int ret
= 0, final_ret
;
231 * We have the shared ec_dev buffer plus we do lots of separate spi_sync
232 * calls, so we need to make sure only one person is using this at a
235 mutex_lock(&ec_spi
->lock
);
237 len
= cros_ec_prepare_tx(ec_dev
, ec_msg
);
238 dev_dbg(ec_dev
->dev
, "prepared, len=%d\n", len
);
240 /* If it's too soon to do another transaction, wait */
241 if (ec_spi
->last_transfer_ns
) {
243 unsigned long delay
; /* The delay completed so far */
246 delay
= timespec_to_ns(&ts
) - ec_spi
->last_transfer_ns
;
247 if (delay
< EC_SPI_RECOVERY_TIME_NS
)
248 ndelay(EC_SPI_RECOVERY_TIME_NS
- delay
);
251 /* Transmit phase - send our message */
252 debug_packet(ec_dev
->dev
, "out", ec_dev
->dout
, len
);
253 memset(&trans
, 0, sizeof(trans
));
254 trans
.tx_buf
= ec_dev
->dout
;
257 spi_message_init(&msg
);
258 spi_message_add_tail(&trans
, &msg
);
259 ret
= spi_sync(ec_spi
->spi
, &msg
);
261 /* Get the response */
263 ret
= cros_ec_spi_receive_response(ec_dev
,
264 ec_msg
->in_len
+ EC_MSG_TX_PROTO_BYTES
);
266 dev_err(ec_dev
->dev
, "spi transfer failed: %d\n", ret
);
270 spi_message_init(&msg
);
272 if (ec_spi
->end_of_msg_delay
) {
274 * Add delay for last transaction, to ensure the rising edge
275 * doesn't come too soon after the end of the data.
277 memset(&trans
, 0, sizeof(trans
));
278 trans
.delay_usecs
= ec_spi
->end_of_msg_delay
;
279 spi_message_add_tail(&trans
, &msg
);
282 final_ret
= spi_sync(ec_spi
->spi
, &msg
);
284 ec_spi
->last_transfer_ns
= timespec_to_ns(&ts
);
288 dev_err(ec_dev
->dev
, "spi transfer failed: %d\n", ret
);
292 /* check response error code */
295 dev_warn(ec_dev
->dev
, "command 0x%02x returned an error %d\n",
296 ec_msg
->cmd
, ptr
[0]);
297 debug_packet(ec_dev
->dev
, "in_err", ptr
, len
);
302 sum
= ptr
[0] + ptr
[1];
303 if (len
> ec_msg
->in_len
) {
304 dev_err(ec_dev
->dev
, "packet too long (%d bytes, expected %d)",
305 len
, ec_msg
->in_len
);
310 /* copy response packet payload and compute checksum */
311 for (i
= 0; i
< len
; i
++) {
314 ec_msg
->in_buf
[i
] = ptr
[i
+ 2];
318 debug_packet(ec_dev
->dev
, "in", ptr
, len
+ 3);
320 if (sum
!= ptr
[len
+ 2]) {
322 "bad packet checksum, expected %02x, got %02x\n",
330 mutex_unlock(&ec_spi
->lock
);
334 static void cros_ec_spi_dt_probe(struct cros_ec_spi
*ec_spi
, struct device
*dev
)
336 struct device_node
*np
= dev
->of_node
;
340 ret
= of_property_read_u32(np
, "google,cros-ec-spi-msg-delay", &val
);
342 ec_spi
->end_of_msg_delay
= val
;
345 static int cros_ec_spi_probe(struct spi_device
*spi
)
347 struct device
*dev
= &spi
->dev
;
348 struct cros_ec_device
*ec_dev
;
349 struct cros_ec_spi
*ec_spi
;
352 spi
->bits_per_word
= 8;
353 spi
->mode
= SPI_MODE_0
;
354 err
= spi_setup(spi
);
358 ec_spi
= devm_kzalloc(dev
, sizeof(*ec_spi
), GFP_KERNEL
);
362 mutex_init(&ec_spi
->lock
);
363 ec_dev
= devm_kzalloc(dev
, sizeof(*ec_dev
), GFP_KERNEL
);
367 /* Check for any DT properties */
368 cros_ec_spi_dt_probe(ec_spi
, dev
);
370 spi_set_drvdata(spi
, ec_dev
);
371 ec_dev
->name
= "SPI";
373 ec_dev
->priv
= ec_spi
;
374 ec_dev
->irq
= spi
->irq
;
375 ec_dev
->command_xfer
= cros_ec_command_spi_xfer
;
376 ec_dev
->ec_name
= ec_spi
->spi
->modalias
;
377 ec_dev
->phys_name
= dev_name(&ec_spi
->spi
->dev
);
378 ec_dev
->parent
= &ec_spi
->spi
->dev
;
379 ec_dev
->din_size
= EC_MSG_BYTES
+ EC_MSG_PREAMBLE_COUNT
;
380 ec_dev
->dout_size
= EC_MSG_BYTES
;
382 err
= cros_ec_register(ec_dev
);
384 dev_err(dev
, "cannot register EC\n");
391 static int cros_ec_spi_remove(struct spi_device
*spi
)
393 struct cros_ec_device
*ec_dev
;
395 ec_dev
= spi_get_drvdata(spi
);
396 cros_ec_remove(ec_dev
);
401 #ifdef CONFIG_PM_SLEEP
402 static int cros_ec_spi_suspend(struct device
*dev
)
404 struct cros_ec_device
*ec_dev
= dev_get_drvdata(dev
);
406 return cros_ec_suspend(ec_dev
);
409 static int cros_ec_spi_resume(struct device
*dev
)
411 struct cros_ec_device
*ec_dev
= dev_get_drvdata(dev
);
413 return cros_ec_resume(ec_dev
);
417 static SIMPLE_DEV_PM_OPS(cros_ec_spi_pm_ops
, cros_ec_spi_suspend
,
420 static const struct spi_device_id cros_ec_spi_id
[] = {
421 { "cros-ec-spi", 0 },
424 MODULE_DEVICE_TABLE(spi
, cros_ec_spi_id
);
426 static struct spi_driver cros_ec_driver_spi
= {
428 .name
= "cros-ec-spi",
429 .owner
= THIS_MODULE
,
430 .pm
= &cros_ec_spi_pm_ops
,
432 .probe
= cros_ec_spi_probe
,
433 .remove
= cros_ec_spi_remove
,
434 .id_table
= cros_ec_spi_id
,
437 module_spi_driver(cros_ec_driver_spi
);
439 MODULE_LICENSE("GPL v2");
440 MODULE_DESCRIPTION("ChromeOS EC multi function device (SPI)");