TPS65910: IRQ: Add interrupt controller
[deliverable/linux.git] / drivers / mfd / tps65910-irq.c
1 /*
2 * tps65910-irq.c -- TI TPS6591x
3 *
4 * Copyright 2010 Texas Instruments Inc.
5 *
6 * Author: Graeme Gregory <gg@slimlogic.co.uk>
7 * Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16 #include <linux/kernel.h>
17 #include <linux/module.h>
18 #include <linux/init.h>
19 #include <linux/bug.h>
20 #include <linux/device.h>
21 #include <linux/interrupt.h>
22 #include <linux/irq.h>
23 #include <linux/gpio.h>
24 #include <linux/mfd/tps65910.h>
25
26 static inline int irq_to_tps65910_irq(struct tps65910 *tps65910,
27 int irq)
28 {
29 return (irq - tps65910->irq_base);
30 }
31
32 /*
33 * This is a threaded IRQ handler so can access I2C/SPI. Since all
34 * interrupts are clear on read the IRQ line will be reasserted and
35 * the physical IRQ will be handled again if another interrupt is
36 * asserted while we run - in the normal course of events this is a
37 * rare occurrence so we save I2C/SPI reads. We're also assuming that
38 * it's rare to get lots of interrupts firing simultaneously so try to
39 * minimise I/O.
40 */
41 static irqreturn_t tps65910_irq(int irq, void *irq_data)
42 {
43 struct tps65910 *tps65910 = irq_data;
44 u16 irq_sts;
45 u16 irq_mask;
46 u8 reg;
47 int i;
48
49 tps65910->read(tps65910, TPS65910_INT_STS, 1, &reg);
50 irq_sts = reg;
51 tps65910->read(tps65910, TPS65910_INT_STS2, 1, &reg);
52 irq_sts |= reg << 8;
53
54 tps65910->read(tps65910, TPS65910_INT_MSK, 1, &reg);
55 irq_mask = reg;
56 tps65910->read(tps65910, TPS65910_INT_MSK2, 1, &reg);
57 irq_mask |= reg << 8;
58
59 irq_sts &= ~irq_mask;
60
61 if (!irq_sts)
62 return IRQ_NONE;
63
64 for (i = 0; i < TPS65910_NUM_IRQ; i++) {
65
66 if (!(irq_sts & (1 << i)))
67 continue;
68
69 handle_nested_irq(tps65910->irq_base + i);
70 }
71
72 /* Write the STS register back to clear IRQs we handled */
73 reg = irq_sts & 0xFF;
74 tps65910->write(tps65910, TPS65910_INT_STS, 1, &reg);
75 reg = irq_sts >> 8;
76 tps65910->write(tps65910, TPS65910_INT_STS2, 1, &reg);
77
78 return IRQ_HANDLED;
79 }
80
81 static void tps65910_irq_lock(struct irq_data *data)
82 {
83 struct tps65910 *tps65910 = irq_data_get_irq_chip_data(data);
84
85 mutex_lock(&tps65910->irq_lock);
86 }
87
88 static void tps65910_irq_sync_unlock(struct irq_data *data)
89 {
90 struct tps65910 *tps65910 = irq_data_get_irq_chip_data(data);
91 u16 reg_mask;
92 u8 reg;
93
94 tps65910->read(tps65910, TPS65910_INT_MSK, 1, &reg);
95 reg_mask = reg;
96 tps65910->read(tps65910, TPS65910_INT_MSK2, 1, &reg);
97 reg_mask |= reg << 8;
98
99 if (tps65910->irq_mask != reg_mask) {
100 reg = tps65910->irq_mask & 0xFF;
101 tps65910->write(tps65910, TPS65910_INT_MSK, 1, &reg);
102 reg = tps65910->irq_mask >> 8;
103 tps65910->write(tps65910, TPS65910_INT_MSK2, 1, &reg);
104 }
105 mutex_unlock(&tps65910->irq_lock);
106 }
107
108 static void tps65910_irq_enable(struct irq_data *data)
109 {
110 struct tps65910 *tps65910 = irq_data_get_irq_chip_data(data);
111
112 tps65910->irq_mask &= ~( 1 << irq_to_tps65910_irq(tps65910, data->irq));
113 }
114
115 static void tps65910_irq_disable(struct irq_data *data)
116 {
117 struct tps65910 *tps65910 = irq_data_get_irq_chip_data(data);
118
119 tps65910->irq_mask |= ( 1 << irq_to_tps65910_irq(tps65910, data->irq));
120 }
121
122 static struct irq_chip tps65910_irq_chip = {
123 .name = "tps65910",
124 .irq_bus_lock = tps65910_irq_lock,
125 .irq_bus_sync_unlock = tps65910_irq_sync_unlock,
126 .irq_disable = tps65910_irq_disable,
127 .irq_enable = tps65910_irq_enable,
128 };
129
130 int tps65910_irq_init(struct tps65910 *tps65910, int irq,
131 struct tps65910_platform_data *pdata)
132 {
133 int ret, cur_irq;
134 int flags = IRQF_ONESHOT;
135 u8 reg;
136
137 if (!irq) {
138 dev_warn(tps65910->dev, "No interrupt support, no core IRQ\n");
139 return -EINVAL;
140 }
141
142 if (!pdata || !pdata->irq_base) {
143 dev_warn(tps65910->dev, "No interrupt support, no IRQ base\n");
144 return -EINVAL;
145 }
146
147 /* Mask top level interrupts */
148 reg = 0xFF;
149 tps65910->write(tps65910, TPS65910_INT_MSK, 1, &reg);
150 reg = 0x03;
151 tps65910->write(tps65910, TPS65910_INT_MSK2, 1, &reg);
152
153 mutex_init(&tps65910->irq_lock);
154 tps65910->chip_irq = irq;
155 tps65910->irq_base = pdata->irq_base;
156
157 /* Register with genirq */
158 for (cur_irq = tps65910->irq_base;
159 cur_irq < TPS65910_NUM_IRQ + tps65910->irq_base;
160 cur_irq++) {
161 irq_set_chip_data(cur_irq, tps65910);
162 irq_set_chip_and_handler(cur_irq, &tps65910_irq_chip,
163 handle_edge_irq);
164 irq_set_nested_thread(cur_irq, 1);
165
166 /* ARM needs us to explicitly flag the IRQ as valid
167 * and will set them noprobe when we do so. */
168 #ifdef CONFIG_ARM
169 set_irq_flags(cur_irq, IRQF_VALID);
170 #else
171 irq_set_noprobe(cur_irq);
172 #endif
173 }
174
175 ret = request_threaded_irq(irq, NULL, tps65910_irq, flags,
176 "tps65910", tps65910);
177 if (ret != 0)
178 dev_err(tps65910->dev, "Failed to request IRQ: %d\n", ret);
179
180 return ret;
181 }
182
183 int tps65910_irq_exit(struct tps65910 *tps65910)
184 {
185 free_irq(tps65910->chip_irq, tps65910);
186 return 0;
187 }
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