464419b364408c084578cb3632c618bf52f62c7f
[deliverable/linux.git] / drivers / misc / c2port / core.c
1 /*
2 * Silicon Labs C2 port core Linux support
3 *
4 * Copyright (c) 2007 Rodolfo Giometti <giometti@linux.it>
5 * Copyright (c) 2007 Eurotech S.p.A. <info@eurotech.it>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation
10 */
11
12 #include <linux/module.h>
13 #include <linux/init.h>
14 #include <linux/device.h>
15 #include <linux/errno.h>
16 #include <linux/err.h>
17 #include <linux/kernel.h>
18 #include <linux/kmemcheck.h>
19 #include <linux/ctype.h>
20 #include <linux/delay.h>
21 #include <linux/idr.h>
22 #include <linux/sched.h>
23 #include <linux/slab.h>
24
25 #include <linux/c2port.h>
26
27 #define DRIVER_NAME "c2port"
28 #define DRIVER_VERSION "0.51.0"
29
30 static DEFINE_SPINLOCK(c2port_idr_lock);
31 static DEFINE_IDR(c2port_idr);
32
33 /*
34 * Local variables
35 */
36
37 static struct class *c2port_class;
38
39 /*
40 * C2 registers & commands defines
41 */
42
43 /* C2 registers */
44 #define C2PORT_DEVICEID 0x00
45 #define C2PORT_REVID 0x01
46 #define C2PORT_FPCTL 0x02
47 #define C2PORT_FPDAT 0xB4
48
49 /* C2 interface commands */
50 #define C2PORT_GET_VERSION 0x01
51 #define C2PORT_DEVICE_ERASE 0x03
52 #define C2PORT_BLOCK_READ 0x06
53 #define C2PORT_BLOCK_WRITE 0x07
54 #define C2PORT_PAGE_ERASE 0x08
55
56 /* C2 status return codes */
57 #define C2PORT_INVALID_COMMAND 0x00
58 #define C2PORT_COMMAND_FAILED 0x02
59 #define C2PORT_COMMAND_OK 0x0d
60
61 /*
62 * C2 port low level signal managements
63 */
64
65 static void c2port_reset(struct c2port_device *dev)
66 {
67 struct c2port_ops *ops = dev->ops;
68
69 /* To reset the device we have to keep clock line low for at least
70 * 20us.
71 */
72 local_irq_disable();
73 ops->c2ck_set(dev, 0);
74 udelay(25);
75 ops->c2ck_set(dev, 1);
76 local_irq_enable();
77
78 udelay(1);
79 }
80
81 static void c2port_strobe_ck(struct c2port_device *dev)
82 {
83 struct c2port_ops *ops = dev->ops;
84
85 /* During hi-low-hi transition we disable local IRQs to avoid
86 * interructions since C2 port specification says that it must be
87 * shorter than 5us, otherwise the microcontroller may consider
88 * it as a reset signal!
89 */
90 local_irq_disable();
91 ops->c2ck_set(dev, 0);
92 udelay(1);
93 ops->c2ck_set(dev, 1);
94 local_irq_enable();
95
96 udelay(1);
97 }
98
99 /*
100 * C2 port basic functions
101 */
102
103 static void c2port_write_ar(struct c2port_device *dev, u8 addr)
104 {
105 struct c2port_ops *ops = dev->ops;
106 int i;
107
108 /* START field */
109 c2port_strobe_ck(dev);
110
111 /* INS field (11b, LSB first) */
112 ops->c2d_dir(dev, 0);
113 ops->c2d_set(dev, 1);
114 c2port_strobe_ck(dev);
115 ops->c2d_set(dev, 1);
116 c2port_strobe_ck(dev);
117
118 /* ADDRESS field */
119 for (i = 0; i < 8; i++) {
120 ops->c2d_set(dev, addr & 0x01);
121 c2port_strobe_ck(dev);
122
123 addr >>= 1;
124 }
125
126 /* STOP field */
127 ops->c2d_dir(dev, 1);
128 c2port_strobe_ck(dev);
129 }
130
131 static int c2port_read_ar(struct c2port_device *dev, u8 *addr)
132 {
133 struct c2port_ops *ops = dev->ops;
134 int i;
135
136 /* START field */
137 c2port_strobe_ck(dev);
138
139 /* INS field (10b, LSB first) */
140 ops->c2d_dir(dev, 0);
141 ops->c2d_set(dev, 0);
142 c2port_strobe_ck(dev);
143 ops->c2d_set(dev, 1);
144 c2port_strobe_ck(dev);
145
146 /* ADDRESS field */
147 ops->c2d_dir(dev, 1);
148 *addr = 0;
149 for (i = 0; i < 8; i++) {
150 *addr >>= 1; /* shift in 8-bit ADDRESS field LSB first */
151
152 c2port_strobe_ck(dev);
153 if (ops->c2d_get(dev))
154 *addr |= 0x80;
155 }
156
157 /* STOP field */
158 c2port_strobe_ck(dev);
159
160 return 0;
161 }
162
163 static int c2port_write_dr(struct c2port_device *dev, u8 data)
164 {
165 struct c2port_ops *ops = dev->ops;
166 int timeout, i;
167
168 /* START field */
169 c2port_strobe_ck(dev);
170
171 /* INS field (01b, LSB first) */
172 ops->c2d_dir(dev, 0);
173 ops->c2d_set(dev, 1);
174 c2port_strobe_ck(dev);
175 ops->c2d_set(dev, 0);
176 c2port_strobe_ck(dev);
177
178 /* LENGTH field (00b, LSB first -> 1 byte) */
179 ops->c2d_set(dev, 0);
180 c2port_strobe_ck(dev);
181 ops->c2d_set(dev, 0);
182 c2port_strobe_ck(dev);
183
184 /* DATA field */
185 for (i = 0; i < 8; i++) {
186 ops->c2d_set(dev, data & 0x01);
187 c2port_strobe_ck(dev);
188
189 data >>= 1;
190 }
191
192 /* WAIT field */
193 ops->c2d_dir(dev, 1);
194 timeout = 20;
195 do {
196 c2port_strobe_ck(dev);
197 if (ops->c2d_get(dev))
198 break;
199
200 udelay(1);
201 } while (--timeout > 0);
202 if (timeout == 0)
203 return -EIO;
204
205 /* STOP field */
206 c2port_strobe_ck(dev);
207
208 return 0;
209 }
210
211 static int c2port_read_dr(struct c2port_device *dev, u8 *data)
212 {
213 struct c2port_ops *ops = dev->ops;
214 int timeout, i;
215
216 /* START field */
217 c2port_strobe_ck(dev);
218
219 /* INS field (00b, LSB first) */
220 ops->c2d_dir(dev, 0);
221 ops->c2d_set(dev, 0);
222 c2port_strobe_ck(dev);
223 ops->c2d_set(dev, 0);
224 c2port_strobe_ck(dev);
225
226 /* LENGTH field (00b, LSB first -> 1 byte) */
227 ops->c2d_set(dev, 0);
228 c2port_strobe_ck(dev);
229 ops->c2d_set(dev, 0);
230 c2port_strobe_ck(dev);
231
232 /* WAIT field */
233 ops->c2d_dir(dev, 1);
234 timeout = 20;
235 do {
236 c2port_strobe_ck(dev);
237 if (ops->c2d_get(dev))
238 break;
239
240 udelay(1);
241 } while (--timeout > 0);
242 if (timeout == 0)
243 return -EIO;
244
245 /* DATA field */
246 *data = 0;
247 for (i = 0; i < 8; i++) {
248 *data >>= 1; /* shift in 8-bit DATA field LSB first */
249
250 c2port_strobe_ck(dev);
251 if (ops->c2d_get(dev))
252 *data |= 0x80;
253 }
254
255 /* STOP field */
256 c2port_strobe_ck(dev);
257
258 return 0;
259 }
260
261 static int c2port_poll_in_busy(struct c2port_device *dev)
262 {
263 u8 addr;
264 int ret, timeout = 20;
265
266 do {
267 ret = (c2port_read_ar(dev, &addr));
268 if (ret < 0)
269 return -EIO;
270
271 if (!(addr & 0x02))
272 break;
273
274 udelay(1);
275 } while (--timeout > 0);
276 if (timeout == 0)
277 return -EIO;
278
279 return 0;
280 }
281
282 static int c2port_poll_out_ready(struct c2port_device *dev)
283 {
284 u8 addr;
285 int ret, timeout = 10000; /* erase flash needs long time... */
286
287 do {
288 ret = (c2port_read_ar(dev, &addr));
289 if (ret < 0)
290 return -EIO;
291
292 if (addr & 0x01)
293 break;
294
295 udelay(1);
296 } while (--timeout > 0);
297 if (timeout == 0)
298 return -EIO;
299
300 return 0;
301 }
302
303 /*
304 * sysfs methods
305 */
306
307 static ssize_t c2port_show_name(struct device *dev,
308 struct device_attribute *attr, char *buf)
309 {
310 struct c2port_device *c2dev = dev_get_drvdata(dev);
311
312 return sprintf(buf, "%s\n", c2dev->name);
313 }
314 static DEVICE_ATTR(name, 0444, c2port_show_name, NULL);
315
316 static ssize_t c2port_show_flash_blocks_num(struct device *dev,
317 struct device_attribute *attr, char *buf)
318 {
319 struct c2port_device *c2dev = dev_get_drvdata(dev);
320 struct c2port_ops *ops = c2dev->ops;
321
322 return sprintf(buf, "%d\n", ops->blocks_num);
323 }
324 static DEVICE_ATTR(flash_blocks_num, 0444, c2port_show_flash_blocks_num, NULL);
325
326 static ssize_t c2port_show_flash_block_size(struct device *dev,
327 struct device_attribute *attr, char *buf)
328 {
329 struct c2port_device *c2dev = dev_get_drvdata(dev);
330 struct c2port_ops *ops = c2dev->ops;
331
332 return sprintf(buf, "%d\n", ops->block_size);
333 }
334 static DEVICE_ATTR(flash_block_size, 0444, c2port_show_flash_block_size, NULL);
335
336 static ssize_t c2port_show_flash_size(struct device *dev,
337 struct device_attribute *attr, char *buf)
338 {
339 struct c2port_device *c2dev = dev_get_drvdata(dev);
340 struct c2port_ops *ops = c2dev->ops;
341
342 return sprintf(buf, "%d\n", ops->blocks_num * ops->block_size);
343 }
344 static DEVICE_ATTR(flash_size, 0444, c2port_show_flash_size, NULL);
345
346 static ssize_t access_show(struct device *dev, struct device_attribute *attr,
347 char *buf)
348 {
349 struct c2port_device *c2dev = dev_get_drvdata(dev);
350
351 return sprintf(buf, "%d\n", c2dev->access);
352 }
353
354 static ssize_t access_store(struct device *dev, struct device_attribute *attr,
355 const char *buf, size_t count)
356 {
357 struct c2port_device *c2dev = dev_get_drvdata(dev);
358 struct c2port_ops *ops = c2dev->ops;
359 int status, ret;
360
361 ret = sscanf(buf, "%d", &status);
362 if (ret != 1)
363 return -EINVAL;
364
365 mutex_lock(&c2dev->mutex);
366
367 c2dev->access = !!status;
368
369 /* If access is "on" clock should be HIGH _before_ setting the line
370 * as output and data line should be set as INPUT anyway */
371 if (c2dev->access)
372 ops->c2ck_set(c2dev, 1);
373 ops->access(c2dev, c2dev->access);
374 if (c2dev->access)
375 ops->c2d_dir(c2dev, 1);
376
377 mutex_unlock(&c2dev->mutex);
378
379 return count;
380 }
381 static DEVICE_ATTR_RW(access);
382
383 static ssize_t c2port_store_reset(struct device *dev,
384 struct device_attribute *attr,
385 const char *buf, size_t count)
386 {
387 struct c2port_device *c2dev = dev_get_drvdata(dev);
388
389 /* Check the device access status */
390 if (!c2dev->access)
391 return -EBUSY;
392
393 mutex_lock(&c2dev->mutex);
394
395 c2port_reset(c2dev);
396 c2dev->flash_access = 0;
397
398 mutex_unlock(&c2dev->mutex);
399
400 return count;
401 }
402 static DEVICE_ATTR(reset, 0200, NULL, c2port_store_reset);
403
404 static ssize_t __c2port_show_dev_id(struct c2port_device *dev, char *buf)
405 {
406 u8 data;
407 int ret;
408
409 /* Select DEVICEID register for C2 data register accesses */
410 c2port_write_ar(dev, C2PORT_DEVICEID);
411
412 /* Read and return the device ID register */
413 ret = c2port_read_dr(dev, &data);
414 if (ret < 0)
415 return ret;
416
417 return sprintf(buf, "%d\n", data);
418 }
419
420 static ssize_t c2port_show_dev_id(struct device *dev,
421 struct device_attribute *attr, char *buf)
422 {
423 struct c2port_device *c2dev = dev_get_drvdata(dev);
424 ssize_t ret;
425
426 /* Check the device access status */
427 if (!c2dev->access)
428 return -EBUSY;
429
430 mutex_lock(&c2dev->mutex);
431 ret = __c2port_show_dev_id(c2dev, buf);
432 mutex_unlock(&c2dev->mutex);
433
434 if (ret < 0)
435 dev_err(dev, "cannot read from %s\n", c2dev->name);
436
437 return ret;
438 }
439 static DEVICE_ATTR(dev_id, 0444, c2port_show_dev_id, NULL);
440
441 static ssize_t __c2port_show_rev_id(struct c2port_device *dev, char *buf)
442 {
443 u8 data;
444 int ret;
445
446 /* Select REVID register for C2 data register accesses */
447 c2port_write_ar(dev, C2PORT_REVID);
448
449 /* Read and return the revision ID register */
450 ret = c2port_read_dr(dev, &data);
451 if (ret < 0)
452 return ret;
453
454 return sprintf(buf, "%d\n", data);
455 }
456
457 static ssize_t c2port_show_rev_id(struct device *dev,
458 struct device_attribute *attr, char *buf)
459 {
460 struct c2port_device *c2dev = dev_get_drvdata(dev);
461 ssize_t ret;
462
463 /* Check the device access status */
464 if (!c2dev->access)
465 return -EBUSY;
466
467 mutex_lock(&c2dev->mutex);
468 ret = __c2port_show_rev_id(c2dev, buf);
469 mutex_unlock(&c2dev->mutex);
470
471 if (ret < 0)
472 dev_err(c2dev->dev, "cannot read from %s\n", c2dev->name);
473
474 return ret;
475 }
476 static DEVICE_ATTR(rev_id, 0444, c2port_show_rev_id, NULL);
477
478 static ssize_t c2port_show_flash_access(struct device *dev,
479 struct device_attribute *attr, char *buf)
480 {
481 struct c2port_device *c2dev = dev_get_drvdata(dev);
482
483 return sprintf(buf, "%d\n", c2dev->flash_access);
484 }
485
486 static ssize_t __c2port_store_flash_access(struct c2port_device *dev,
487 int status)
488 {
489 int ret;
490
491 /* Check the device access status */
492 if (!dev->access)
493 return -EBUSY;
494
495 dev->flash_access = !!status;
496
497 /* If flash_access is off we have nothing to do... */
498 if (dev->flash_access == 0)
499 return 0;
500
501 /* Target the C2 flash programming control register for C2 data
502 * register access */
503 c2port_write_ar(dev, C2PORT_FPCTL);
504
505 /* Write the first keycode to enable C2 Flash programming */
506 ret = c2port_write_dr(dev, 0x02);
507 if (ret < 0)
508 return ret;
509
510 /* Write the second keycode to enable C2 Flash programming */
511 ret = c2port_write_dr(dev, 0x01);
512 if (ret < 0)
513 return ret;
514
515 /* Delay for at least 20ms to ensure the target is ready for
516 * C2 flash programming */
517 mdelay(25);
518
519 return 0;
520 }
521
522 static ssize_t c2port_store_flash_access(struct device *dev,
523 struct device_attribute *attr,
524 const char *buf, size_t count)
525 {
526 struct c2port_device *c2dev = dev_get_drvdata(dev);
527 int status;
528 ssize_t ret;
529
530 ret = sscanf(buf, "%d", &status);
531 if (ret != 1)
532 return -EINVAL;
533
534 mutex_lock(&c2dev->mutex);
535 ret = __c2port_store_flash_access(c2dev, status);
536 mutex_unlock(&c2dev->mutex);
537
538 if (ret < 0) {
539 dev_err(c2dev->dev, "cannot enable %s flash programming\n",
540 c2dev->name);
541 return ret;
542 }
543
544 return count;
545 }
546 static DEVICE_ATTR(flash_access, 0644, c2port_show_flash_access,
547 c2port_store_flash_access);
548
549 static ssize_t __c2port_write_flash_erase(struct c2port_device *dev)
550 {
551 u8 status;
552 int ret;
553
554 /* Target the C2 flash programming data register for C2 data register
555 * access.
556 */
557 c2port_write_ar(dev, C2PORT_FPDAT);
558
559 /* Send device erase command */
560 c2port_write_dr(dev, C2PORT_DEVICE_ERASE);
561
562 /* Wait for input acknowledge */
563 ret = c2port_poll_in_busy(dev);
564 if (ret < 0)
565 return ret;
566
567 /* Should check status before starting FLASH access sequence */
568
569 /* Wait for status information */
570 ret = c2port_poll_out_ready(dev);
571 if (ret < 0)
572 return ret;
573
574 /* Read flash programming interface status */
575 ret = c2port_read_dr(dev, &status);
576 if (ret < 0)
577 return ret;
578 if (status != C2PORT_COMMAND_OK)
579 return -EBUSY;
580
581 /* Send a three-byte arming sequence to enable the device erase.
582 * If the sequence is not received correctly, the command will be
583 * ignored.
584 * Sequence is: 0xde, 0xad, 0xa5.
585 */
586 c2port_write_dr(dev, 0xde);
587 ret = c2port_poll_in_busy(dev);
588 if (ret < 0)
589 return ret;
590 c2port_write_dr(dev, 0xad);
591 ret = c2port_poll_in_busy(dev);
592 if (ret < 0)
593 return ret;
594 c2port_write_dr(dev, 0xa5);
595 ret = c2port_poll_in_busy(dev);
596 if (ret < 0)
597 return ret;
598
599 ret = c2port_poll_out_ready(dev);
600 if (ret < 0)
601 return ret;
602
603 return 0;
604 }
605
606 static ssize_t c2port_store_flash_erase(struct device *dev,
607 struct device_attribute *attr,
608 const char *buf, size_t count)
609 {
610 struct c2port_device *c2dev = dev_get_drvdata(dev);
611 int ret;
612
613 /* Check the device and flash access status */
614 if (!c2dev->access || !c2dev->flash_access)
615 return -EBUSY;
616
617 mutex_lock(&c2dev->mutex);
618 ret = __c2port_write_flash_erase(c2dev);
619 mutex_unlock(&c2dev->mutex);
620
621 if (ret < 0) {
622 dev_err(c2dev->dev, "cannot erase %s flash\n", c2dev->name);
623 return ret;
624 }
625
626 return count;
627 }
628 static DEVICE_ATTR(flash_erase, 0200, NULL, c2port_store_flash_erase);
629
630 static ssize_t __c2port_read_flash_data(struct c2port_device *dev,
631 char *buffer, loff_t offset, size_t count)
632 {
633 struct c2port_ops *ops = dev->ops;
634 u8 status, nread = 128;
635 int i, ret;
636
637 /* Check for flash end */
638 if (offset >= ops->block_size * ops->blocks_num)
639 return 0;
640
641 if (ops->block_size * ops->blocks_num - offset < nread)
642 nread = ops->block_size * ops->blocks_num - offset;
643 if (count < nread)
644 nread = count;
645 if (nread == 0)
646 return nread;
647
648 /* Target the C2 flash programming data register for C2 data register
649 * access */
650 c2port_write_ar(dev, C2PORT_FPDAT);
651
652 /* Send flash block read command */
653 c2port_write_dr(dev, C2PORT_BLOCK_READ);
654
655 /* Wait for input acknowledge */
656 ret = c2port_poll_in_busy(dev);
657 if (ret < 0)
658 return ret;
659
660 /* Should check status before starting FLASH access sequence */
661
662 /* Wait for status information */
663 ret = c2port_poll_out_ready(dev);
664 if (ret < 0)
665 return ret;
666
667 /* Read flash programming interface status */
668 ret = c2port_read_dr(dev, &status);
669 if (ret < 0)
670 return ret;
671 if (status != C2PORT_COMMAND_OK)
672 return -EBUSY;
673
674 /* Send address high byte */
675 c2port_write_dr(dev, offset >> 8);
676 ret = c2port_poll_in_busy(dev);
677 if (ret < 0)
678 return ret;
679
680 /* Send address low byte */
681 c2port_write_dr(dev, offset & 0x00ff);
682 ret = c2port_poll_in_busy(dev);
683 if (ret < 0)
684 return ret;
685
686 /* Send address block size */
687 c2port_write_dr(dev, nread);
688 ret = c2port_poll_in_busy(dev);
689 if (ret < 0)
690 return ret;
691
692 /* Should check status before reading FLASH block */
693
694 /* Wait for status information */
695 ret = c2port_poll_out_ready(dev);
696 if (ret < 0)
697 return ret;
698
699 /* Read flash programming interface status */
700 ret = c2port_read_dr(dev, &status);
701 if (ret < 0)
702 return ret;
703 if (status != C2PORT_COMMAND_OK)
704 return -EBUSY;
705
706 /* Read flash block */
707 for (i = 0; i < nread; i++) {
708 ret = c2port_poll_out_ready(dev);
709 if (ret < 0)
710 return ret;
711
712 ret = c2port_read_dr(dev, buffer+i);
713 if (ret < 0)
714 return ret;
715 }
716
717 return nread;
718 }
719
720 static ssize_t c2port_read_flash_data(struct file *filp, struct kobject *kobj,
721 struct bin_attribute *attr,
722 char *buffer, loff_t offset, size_t count)
723 {
724 struct c2port_device *c2dev =
725 dev_get_drvdata(container_of(kobj,
726 struct device, kobj));
727 ssize_t ret;
728
729 /* Check the device and flash access status */
730 if (!c2dev->access || !c2dev->flash_access)
731 return -EBUSY;
732
733 mutex_lock(&c2dev->mutex);
734 ret = __c2port_read_flash_data(c2dev, buffer, offset, count);
735 mutex_unlock(&c2dev->mutex);
736
737 if (ret < 0)
738 dev_err(c2dev->dev, "cannot read %s flash\n", c2dev->name);
739
740 return ret;
741 }
742
743 static ssize_t __c2port_write_flash_data(struct c2port_device *dev,
744 char *buffer, loff_t offset, size_t count)
745 {
746 struct c2port_ops *ops = dev->ops;
747 u8 status, nwrite = 128;
748 int i, ret;
749
750 if (nwrite > count)
751 nwrite = count;
752 if (ops->block_size * ops->blocks_num - offset < nwrite)
753 nwrite = ops->block_size * ops->blocks_num - offset;
754
755 /* Check for flash end */
756 if (offset >= ops->block_size * ops->blocks_num)
757 return -EINVAL;
758
759 /* Target the C2 flash programming data register for C2 data register
760 * access */
761 c2port_write_ar(dev, C2PORT_FPDAT);
762
763 /* Send flash block write command */
764 c2port_write_dr(dev, C2PORT_BLOCK_WRITE);
765
766 /* Wait for input acknowledge */
767 ret = c2port_poll_in_busy(dev);
768 if (ret < 0)
769 return ret;
770
771 /* Should check status before starting FLASH access sequence */
772
773 /* Wait for status information */
774 ret = c2port_poll_out_ready(dev);
775 if (ret < 0)
776 return ret;
777
778 /* Read flash programming interface status */
779 ret = c2port_read_dr(dev, &status);
780 if (ret < 0)
781 return ret;
782 if (status != C2PORT_COMMAND_OK)
783 return -EBUSY;
784
785 /* Send address high byte */
786 c2port_write_dr(dev, offset >> 8);
787 ret = c2port_poll_in_busy(dev);
788 if (ret < 0)
789 return ret;
790
791 /* Send address low byte */
792 c2port_write_dr(dev, offset & 0x00ff);
793 ret = c2port_poll_in_busy(dev);
794 if (ret < 0)
795 return ret;
796
797 /* Send address block size */
798 c2port_write_dr(dev, nwrite);
799 ret = c2port_poll_in_busy(dev);
800 if (ret < 0)
801 return ret;
802
803 /* Should check status before writing FLASH block */
804
805 /* Wait for status information */
806 ret = c2port_poll_out_ready(dev);
807 if (ret < 0)
808 return ret;
809
810 /* Read flash programming interface status */
811 ret = c2port_read_dr(dev, &status);
812 if (ret < 0)
813 return ret;
814 if (status != C2PORT_COMMAND_OK)
815 return -EBUSY;
816
817 /* Write flash block */
818 for (i = 0; i < nwrite; i++) {
819 ret = c2port_write_dr(dev, *(buffer+i));
820 if (ret < 0)
821 return ret;
822
823 ret = c2port_poll_in_busy(dev);
824 if (ret < 0)
825 return ret;
826
827 }
828
829 /* Wait for last flash write to complete */
830 ret = c2port_poll_out_ready(dev);
831 if (ret < 0)
832 return ret;
833
834 return nwrite;
835 }
836
837 static ssize_t c2port_write_flash_data(struct file *filp, struct kobject *kobj,
838 struct bin_attribute *attr,
839 char *buffer, loff_t offset, size_t count)
840 {
841 struct c2port_device *c2dev =
842 dev_get_drvdata(container_of(kobj,
843 struct device, kobj));
844 int ret;
845
846 /* Check the device access status */
847 if (!c2dev->access || !c2dev->flash_access)
848 return -EBUSY;
849
850 mutex_lock(&c2dev->mutex);
851 ret = __c2port_write_flash_data(c2dev, buffer, offset, count);
852 mutex_unlock(&c2dev->mutex);
853
854 if (ret < 0)
855 dev_err(c2dev->dev, "cannot write %s flash\n", c2dev->name);
856
857 return ret;
858 }
859 /* size is computed at run-time */
860 static BIN_ATTR(flash_data, 0644, c2port_read_flash_data,
861 c2port_write_flash_data, 0);
862
863 /*
864 * Class attributes
865 */
866 static struct attribute *c2port_attrs[] = {
867 &dev_attr_name.attr,
868 &dev_attr_flash_blocks_num.attr,
869 &dev_attr_flash_block_size.attr,
870 &dev_attr_flash_size.attr,
871 &dev_attr_access.attr,
872 &dev_attr_reset.attr,
873 &dev_attr_dev_id.attr,
874 &dev_attr_rev_id.attr,
875 &dev_attr_flash_access.attr,
876 &dev_attr_flash_erase.attr,
877 NULL,
878 };
879
880 static struct bin_attribute *c2port_bin_attrs[] = {
881 &bin_attr_flash_data,
882 NULL,
883 };
884
885 static const struct attribute_group c2port_group = {
886 .attrs = c2port_attrs,
887 .bin_attrs = c2port_bin_attrs,
888 };
889
890 static const struct attribute_group *c2port_groups[] = {
891 &c2port_group,
892 NULL,
893 };
894
895 /*
896 * Exported functions
897 */
898
899 struct c2port_device *c2port_device_register(char *name,
900 struct c2port_ops *ops, void *devdata)
901 {
902 struct c2port_device *c2dev;
903 int ret;
904
905 if (unlikely(!ops) || unlikely(!ops->access) || \
906 unlikely(!ops->c2d_dir) || unlikely(!ops->c2ck_set) || \
907 unlikely(!ops->c2d_get) || unlikely(!ops->c2d_set))
908 return ERR_PTR(-EINVAL);
909
910 c2dev = kmalloc(sizeof(struct c2port_device), GFP_KERNEL);
911 kmemcheck_annotate_bitfield(c2dev, flags);
912 if (unlikely(!c2dev))
913 return ERR_PTR(-ENOMEM);
914
915 idr_preload(GFP_KERNEL);
916 spin_lock_irq(&c2port_idr_lock);
917 ret = idr_alloc(&c2port_idr, c2dev, 0, 0, GFP_NOWAIT);
918 spin_unlock_irq(&c2port_idr_lock);
919 idr_preload_end();
920
921 if (ret < 0)
922 goto error_idr_alloc;
923 c2dev->id = ret;
924
925 bin_attr_flash_data.size = ops->blocks_num * ops->block_size;
926
927 c2dev->dev = device_create(c2port_class, NULL, 0, c2dev,
928 "c2port%d", c2dev->id);
929 if (unlikely(IS_ERR(c2dev->dev))) {
930 ret = PTR_ERR(c2dev->dev);
931 goto error_device_create;
932 }
933 dev_set_drvdata(c2dev->dev, c2dev);
934
935 strncpy(c2dev->name, name, C2PORT_NAME_LEN);
936 c2dev->ops = ops;
937 mutex_init(&c2dev->mutex);
938
939 /* By default C2 port access is off */
940 c2dev->access = c2dev->flash_access = 0;
941 ops->access(c2dev, 0);
942
943 dev_info(c2dev->dev, "C2 port %s added\n", name);
944 dev_info(c2dev->dev, "%s flash has %d blocks x %d bytes "
945 "(%d bytes total)\n",
946 name, ops->blocks_num, ops->block_size,
947 ops->blocks_num * ops->block_size);
948
949 return c2dev;
950
951 error_device_create:
952 spin_lock_irq(&c2port_idr_lock);
953 idr_remove(&c2port_idr, c2dev->id);
954 spin_unlock_irq(&c2port_idr_lock);
955
956 error_idr_alloc:
957 kfree(c2dev);
958
959 return ERR_PTR(ret);
960 }
961 EXPORT_SYMBOL(c2port_device_register);
962
963 void c2port_device_unregister(struct c2port_device *c2dev)
964 {
965 if (!c2dev)
966 return;
967
968 dev_info(c2dev->dev, "C2 port %s removed\n", c2dev->name);
969
970 spin_lock_irq(&c2port_idr_lock);
971 idr_remove(&c2port_idr, c2dev->id);
972 spin_unlock_irq(&c2port_idr_lock);
973
974 device_destroy(c2port_class, c2dev->id);
975
976 kfree(c2dev);
977 }
978 EXPORT_SYMBOL(c2port_device_unregister);
979
980 /*
981 * Module stuff
982 */
983
984 static int __init c2port_init(void)
985 {
986 printk(KERN_INFO "Silicon Labs C2 port support v. " DRIVER_VERSION
987 " - (C) 2007 Rodolfo Giometti\n");
988
989 c2port_class = class_create(THIS_MODULE, "c2port");
990 if (IS_ERR(c2port_class)) {
991 printk(KERN_ERR "c2port: failed to allocate class\n");
992 return PTR_ERR(c2port_class);
993 }
994 c2port_class->dev_groups = c2port_groups;
995
996 return 0;
997 }
998
999 static void __exit c2port_exit(void)
1000 {
1001 class_destroy(c2port_class);
1002 }
1003
1004 module_init(c2port_init);
1005 module_exit(c2port_exit);
1006
1007 MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
1008 MODULE_DESCRIPTION("Silicon Labs C2 port support v. " DRIVER_VERSION);
1009 MODULE_LICENSE("GPL");
This page took 0.049484 seconds and 4 git commands to generate.