Merge tag 'platform-drivers-x86-v4.3-2' of git://git.infradead.org/users/dvhart/linux...
[deliverable/linux.git] / drivers / misc / eeprom / at24.c
1 /*
2 * at24.c - handle most I2C EEPROMs
3 *
4 * Copyright (C) 2005-2007 David Brownell
5 * Copyright (C) 2008 Wolfram Sang, Pengutronix
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 */
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/module.h>
15 #include <linux/slab.h>
16 #include <linux/delay.h>
17 #include <linux/mutex.h>
18 #include <linux/sysfs.h>
19 #include <linux/mod_devicetable.h>
20 #include <linux/log2.h>
21 #include <linux/bitops.h>
22 #include <linux/jiffies.h>
23 #include <linux/of.h>
24 #include <linux/i2c.h>
25 #include <linux/platform_data/at24.h>
26
27 /*
28 * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable.
29 * Differences between different vendor product lines (like Atmel AT24C or
30 * MicroChip 24LC, etc) won't much matter for typical read/write access.
31 * There are also I2C RAM chips, likewise interchangeable. One example
32 * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes).
33 *
34 * However, misconfiguration can lose data. "Set 16-bit memory address"
35 * to a part with 8-bit addressing will overwrite data. Writing with too
36 * big a page size also loses data. And it's not safe to assume that the
37 * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC
38 * uses 0x51, for just one example.
39 *
40 * Accordingly, explicit board-specific configuration data should be used
41 * in almost all cases. (One partial exception is an SMBus used to access
42 * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.)
43 *
44 * So this driver uses "new style" I2C driver binding, expecting to be
45 * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or
46 * similar kernel-resident tables; or, configuration data coming from
47 * a bootloader.
48 *
49 * Other than binding model, current differences from "eeprom" driver are
50 * that this one handles write access and isn't restricted to 24c02 devices.
51 * It also handles larger devices (32 kbit and up) with two-byte addresses,
52 * which won't work on pure SMBus systems.
53 */
54
55 struct at24_data {
56 struct at24_platform_data chip;
57 struct memory_accessor macc;
58 int use_smbus;
59 int use_smbus_write;
60
61 /*
62 * Lock protects against activities from other Linux tasks,
63 * but not from changes by other I2C masters.
64 */
65 struct mutex lock;
66 struct bin_attribute bin;
67
68 u8 *writebuf;
69 unsigned write_max;
70 unsigned num_addresses;
71
72 /*
73 * Some chips tie up multiple I2C addresses; dummy devices reserve
74 * them for us, and we'll use them with SMBus calls.
75 */
76 struct i2c_client *client[];
77 };
78
79 /*
80 * This parameter is to help this driver avoid blocking other drivers out
81 * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C
82 * clock, one 256 byte read takes about 1/43 second which is excessive;
83 * but the 1/170 second it takes at 400 kHz may be quite reasonable; and
84 * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible.
85 *
86 * This value is forced to be a power of two so that writes align on pages.
87 */
88 static unsigned io_limit = 128;
89 module_param(io_limit, uint, 0);
90 MODULE_PARM_DESC(io_limit, "Maximum bytes per I/O (default 128)");
91
92 /*
93 * Specs often allow 5 msec for a page write, sometimes 20 msec;
94 * it's important to recover from write timeouts.
95 */
96 static unsigned write_timeout = 25;
97 module_param(write_timeout, uint, 0);
98 MODULE_PARM_DESC(write_timeout, "Time (in ms) to try writes (default 25)");
99
100 #define AT24_SIZE_BYTELEN 5
101 #define AT24_SIZE_FLAGS 8
102
103 #define AT24_BITMASK(x) (BIT(x) - 1)
104
105 /* create non-zero magic value for given eeprom parameters */
106 #define AT24_DEVICE_MAGIC(_len, _flags) \
107 ((1 << AT24_SIZE_FLAGS | (_flags)) \
108 << AT24_SIZE_BYTELEN | ilog2(_len))
109
110 static const struct i2c_device_id at24_ids[] = {
111 /* needs 8 addresses as A0-A2 are ignored */
112 { "24c00", AT24_DEVICE_MAGIC(128 / 8, AT24_FLAG_TAKE8ADDR) },
113 /* old variants can't be handled with this generic entry! */
114 { "24c01", AT24_DEVICE_MAGIC(1024 / 8, 0) },
115 { "24c02", AT24_DEVICE_MAGIC(2048 / 8, 0) },
116 /* spd is a 24c02 in memory DIMMs */
117 { "spd", AT24_DEVICE_MAGIC(2048 / 8,
118 AT24_FLAG_READONLY | AT24_FLAG_IRUGO) },
119 { "24c04", AT24_DEVICE_MAGIC(4096 / 8, 0) },
120 /* 24rf08 quirk is handled at i2c-core */
121 { "24c08", AT24_DEVICE_MAGIC(8192 / 8, 0) },
122 { "24c16", AT24_DEVICE_MAGIC(16384 / 8, 0) },
123 { "24c32", AT24_DEVICE_MAGIC(32768 / 8, AT24_FLAG_ADDR16) },
124 { "24c64", AT24_DEVICE_MAGIC(65536 / 8, AT24_FLAG_ADDR16) },
125 { "24c128", AT24_DEVICE_MAGIC(131072 / 8, AT24_FLAG_ADDR16) },
126 { "24c256", AT24_DEVICE_MAGIC(262144 / 8, AT24_FLAG_ADDR16) },
127 { "24c512", AT24_DEVICE_MAGIC(524288 / 8, AT24_FLAG_ADDR16) },
128 { "24c1024", AT24_DEVICE_MAGIC(1048576 / 8, AT24_FLAG_ADDR16) },
129 { "at24", 0 },
130 { /* END OF LIST */ }
131 };
132 MODULE_DEVICE_TABLE(i2c, at24_ids);
133
134 /*-------------------------------------------------------------------------*/
135
136 /*
137 * This routine supports chips which consume multiple I2C addresses. It
138 * computes the addressing information to be used for a given r/w request.
139 * Assumes that sanity checks for offset happened at sysfs-layer.
140 */
141 static struct i2c_client *at24_translate_offset(struct at24_data *at24,
142 unsigned *offset)
143 {
144 unsigned i;
145
146 if (at24->chip.flags & AT24_FLAG_ADDR16) {
147 i = *offset >> 16;
148 *offset &= 0xffff;
149 } else {
150 i = *offset >> 8;
151 *offset &= 0xff;
152 }
153
154 return at24->client[i];
155 }
156
157 static ssize_t at24_eeprom_read(struct at24_data *at24, char *buf,
158 unsigned offset, size_t count)
159 {
160 struct i2c_msg msg[2];
161 u8 msgbuf[2];
162 struct i2c_client *client;
163 unsigned long timeout, read_time;
164 int status, i;
165
166 memset(msg, 0, sizeof(msg));
167
168 /*
169 * REVISIT some multi-address chips don't rollover page reads to
170 * the next slave address, so we may need to truncate the count.
171 * Those chips might need another quirk flag.
172 *
173 * If the real hardware used four adjacent 24c02 chips and that
174 * were misconfigured as one 24c08, that would be a similar effect:
175 * one "eeprom" file not four, but larger reads would fail when
176 * they crossed certain pages.
177 */
178
179 /*
180 * Slave address and byte offset derive from the offset. Always
181 * set the byte address; on a multi-master board, another master
182 * may have changed the chip's "current" address pointer.
183 */
184 client = at24_translate_offset(at24, &offset);
185
186 if (count > io_limit)
187 count = io_limit;
188
189 if (at24->use_smbus) {
190 /* Smaller eeproms can work given some SMBus extension calls */
191 if (count > I2C_SMBUS_BLOCK_MAX)
192 count = I2C_SMBUS_BLOCK_MAX;
193 } else {
194 /*
195 * When we have a better choice than SMBus calls, use a
196 * combined I2C message. Write address; then read up to
197 * io_limit data bytes. Note that read page rollover helps us
198 * here (unlike writes). msgbuf is u8 and will cast to our
199 * needs.
200 */
201 i = 0;
202 if (at24->chip.flags & AT24_FLAG_ADDR16)
203 msgbuf[i++] = offset >> 8;
204 msgbuf[i++] = offset;
205
206 msg[0].addr = client->addr;
207 msg[0].buf = msgbuf;
208 msg[0].len = i;
209
210 msg[1].addr = client->addr;
211 msg[1].flags = I2C_M_RD;
212 msg[1].buf = buf;
213 msg[1].len = count;
214 }
215
216 /*
217 * Reads fail if the previous write didn't complete yet. We may
218 * loop a few times until this one succeeds, waiting at least
219 * long enough for one entire page write to work.
220 */
221 timeout = jiffies + msecs_to_jiffies(write_timeout);
222 do {
223 read_time = jiffies;
224 if (at24->use_smbus) {
225 status = i2c_smbus_read_i2c_block_data_or_emulated(client, offset,
226 count, buf);
227 } else {
228 status = i2c_transfer(client->adapter, msg, 2);
229 if (status == 2)
230 status = count;
231 }
232 dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n",
233 count, offset, status, jiffies);
234
235 if (status == count)
236 return count;
237
238 /* REVISIT: at HZ=100, this is sloooow */
239 msleep(1);
240 } while (time_before(read_time, timeout));
241
242 return -ETIMEDOUT;
243 }
244
245 static ssize_t at24_read(struct at24_data *at24,
246 char *buf, loff_t off, size_t count)
247 {
248 ssize_t retval = 0;
249
250 if (unlikely(!count))
251 return count;
252
253 /*
254 * Read data from chip, protecting against concurrent updates
255 * from this host, but not from other I2C masters.
256 */
257 mutex_lock(&at24->lock);
258
259 while (count) {
260 ssize_t status;
261
262 status = at24_eeprom_read(at24, buf, off, count);
263 if (status <= 0) {
264 if (retval == 0)
265 retval = status;
266 break;
267 }
268 buf += status;
269 off += status;
270 count -= status;
271 retval += status;
272 }
273
274 mutex_unlock(&at24->lock);
275
276 return retval;
277 }
278
279 static ssize_t at24_bin_read(struct file *filp, struct kobject *kobj,
280 struct bin_attribute *attr,
281 char *buf, loff_t off, size_t count)
282 {
283 struct at24_data *at24;
284
285 at24 = dev_get_drvdata(container_of(kobj, struct device, kobj));
286 return at24_read(at24, buf, off, count);
287 }
288
289
290 /*
291 * Note that if the hardware write-protect pin is pulled high, the whole
292 * chip is normally write protected. But there are plenty of product
293 * variants here, including OTP fuses and partial chip protect.
294 *
295 * We only use page mode writes; the alternative is sloooow. This routine
296 * writes at most one page.
297 */
298 static ssize_t at24_eeprom_write(struct at24_data *at24, const char *buf,
299 unsigned offset, size_t count)
300 {
301 struct i2c_client *client;
302 struct i2c_msg msg;
303 ssize_t status = 0;
304 unsigned long timeout, write_time;
305 unsigned next_page;
306
307 /* Get corresponding I2C address and adjust offset */
308 client = at24_translate_offset(at24, &offset);
309
310 /* write_max is at most a page */
311 if (count > at24->write_max)
312 count = at24->write_max;
313
314 /* Never roll over backwards, to the start of this page */
315 next_page = roundup(offset + 1, at24->chip.page_size);
316 if (offset + count > next_page)
317 count = next_page - offset;
318
319 /* If we'll use I2C calls for I/O, set up the message */
320 if (!at24->use_smbus) {
321 int i = 0;
322
323 msg.addr = client->addr;
324 msg.flags = 0;
325
326 /* msg.buf is u8 and casts will mask the values */
327 msg.buf = at24->writebuf;
328 if (at24->chip.flags & AT24_FLAG_ADDR16)
329 msg.buf[i++] = offset >> 8;
330
331 msg.buf[i++] = offset;
332 memcpy(&msg.buf[i], buf, count);
333 msg.len = i + count;
334 }
335
336 /*
337 * Writes fail if the previous one didn't complete yet. We may
338 * loop a few times until this one succeeds, waiting at least
339 * long enough for one entire page write to work.
340 */
341 timeout = jiffies + msecs_to_jiffies(write_timeout);
342 do {
343 write_time = jiffies;
344 if (at24->use_smbus_write) {
345 switch (at24->use_smbus_write) {
346 case I2C_SMBUS_I2C_BLOCK_DATA:
347 status = i2c_smbus_write_i2c_block_data(client,
348 offset, count, buf);
349 break;
350 case I2C_SMBUS_BYTE_DATA:
351 status = i2c_smbus_write_byte_data(client,
352 offset, buf[0]);
353 break;
354 }
355
356 if (status == 0)
357 status = count;
358 } else {
359 status = i2c_transfer(client->adapter, &msg, 1);
360 if (status == 1)
361 status = count;
362 }
363 dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n",
364 count, offset, status, jiffies);
365
366 if (status == count)
367 return count;
368
369 /* REVISIT: at HZ=100, this is sloooow */
370 msleep(1);
371 } while (time_before(write_time, timeout));
372
373 return -ETIMEDOUT;
374 }
375
376 static ssize_t at24_write(struct at24_data *at24, const char *buf, loff_t off,
377 size_t count)
378 {
379 ssize_t retval = 0;
380
381 if (unlikely(!count))
382 return count;
383
384 /*
385 * Write data to chip, protecting against concurrent updates
386 * from this host, but not from other I2C masters.
387 */
388 mutex_lock(&at24->lock);
389
390 while (count) {
391 ssize_t status;
392
393 status = at24_eeprom_write(at24, buf, off, count);
394 if (status <= 0) {
395 if (retval == 0)
396 retval = status;
397 break;
398 }
399 buf += status;
400 off += status;
401 count -= status;
402 retval += status;
403 }
404
405 mutex_unlock(&at24->lock);
406
407 return retval;
408 }
409
410 static ssize_t at24_bin_write(struct file *filp, struct kobject *kobj,
411 struct bin_attribute *attr,
412 char *buf, loff_t off, size_t count)
413 {
414 struct at24_data *at24;
415
416 at24 = dev_get_drvdata(container_of(kobj, struct device, kobj));
417 return at24_write(at24, buf, off, count);
418 }
419
420 /*-------------------------------------------------------------------------*/
421
422 /*
423 * This lets other kernel code access the eeprom data. For example, it
424 * might hold a board's Ethernet address, or board-specific calibration
425 * data generated on the manufacturing floor.
426 */
427
428 static ssize_t at24_macc_read(struct memory_accessor *macc, char *buf,
429 off_t offset, size_t count)
430 {
431 struct at24_data *at24 = container_of(macc, struct at24_data, macc);
432
433 return at24_read(at24, buf, offset, count);
434 }
435
436 static ssize_t at24_macc_write(struct memory_accessor *macc, const char *buf,
437 off_t offset, size_t count)
438 {
439 struct at24_data *at24 = container_of(macc, struct at24_data, macc);
440
441 return at24_write(at24, buf, offset, count);
442 }
443
444 /*-------------------------------------------------------------------------*/
445
446 #ifdef CONFIG_OF
447 static void at24_get_ofdata(struct i2c_client *client,
448 struct at24_platform_data *chip)
449 {
450 const __be32 *val;
451 struct device_node *node = client->dev.of_node;
452
453 if (node) {
454 if (of_get_property(node, "read-only", NULL))
455 chip->flags |= AT24_FLAG_READONLY;
456 val = of_get_property(node, "pagesize", NULL);
457 if (val)
458 chip->page_size = be32_to_cpup(val);
459 }
460 }
461 #else
462 static void at24_get_ofdata(struct i2c_client *client,
463 struct at24_platform_data *chip)
464 { }
465 #endif /* CONFIG_OF */
466
467 static int at24_probe(struct i2c_client *client, const struct i2c_device_id *id)
468 {
469 struct at24_platform_data chip;
470 bool writable;
471 int use_smbus = 0;
472 int use_smbus_write = 0;
473 struct at24_data *at24;
474 int err;
475 unsigned i, num_addresses;
476 kernel_ulong_t magic;
477
478 if (client->dev.platform_data) {
479 chip = *(struct at24_platform_data *)client->dev.platform_data;
480 } else {
481 if (!id->driver_data)
482 return -ENODEV;
483
484 magic = id->driver_data;
485 chip.byte_len = BIT(magic & AT24_BITMASK(AT24_SIZE_BYTELEN));
486 magic >>= AT24_SIZE_BYTELEN;
487 chip.flags = magic & AT24_BITMASK(AT24_SIZE_FLAGS);
488 /*
489 * This is slow, but we can't know all eeproms, so we better
490 * play safe. Specifying custom eeprom-types via platform_data
491 * is recommended anyhow.
492 */
493 chip.page_size = 1;
494
495 /* update chipdata if OF is present */
496 at24_get_ofdata(client, &chip);
497
498 chip.setup = NULL;
499 chip.context = NULL;
500 }
501
502 if (!is_power_of_2(chip.byte_len))
503 dev_warn(&client->dev,
504 "byte_len looks suspicious (no power of 2)!\n");
505 if (!chip.page_size) {
506 dev_err(&client->dev, "page_size must not be 0!\n");
507 return -EINVAL;
508 }
509 if (!is_power_of_2(chip.page_size))
510 dev_warn(&client->dev,
511 "page_size looks suspicious (no power of 2)!\n");
512
513 /* Use I2C operations unless we're stuck with SMBus extensions. */
514 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
515 if (chip.flags & AT24_FLAG_ADDR16)
516 return -EPFNOSUPPORT;
517
518 if (i2c_check_functionality(client->adapter,
519 I2C_FUNC_SMBUS_READ_I2C_BLOCK)) {
520 use_smbus = I2C_SMBUS_I2C_BLOCK_DATA;
521 } else if (i2c_check_functionality(client->adapter,
522 I2C_FUNC_SMBUS_READ_WORD_DATA)) {
523 use_smbus = I2C_SMBUS_WORD_DATA;
524 } else if (i2c_check_functionality(client->adapter,
525 I2C_FUNC_SMBUS_READ_BYTE_DATA)) {
526 use_smbus = I2C_SMBUS_BYTE_DATA;
527 } else {
528 return -EPFNOSUPPORT;
529 }
530 }
531
532 /* Use I2C operations unless we're stuck with SMBus extensions. */
533 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
534 if (i2c_check_functionality(client->adapter,
535 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)) {
536 use_smbus_write = I2C_SMBUS_I2C_BLOCK_DATA;
537 } else if (i2c_check_functionality(client->adapter,
538 I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) {
539 use_smbus_write = I2C_SMBUS_BYTE_DATA;
540 chip.page_size = 1;
541 }
542 }
543
544 if (chip.flags & AT24_FLAG_TAKE8ADDR)
545 num_addresses = 8;
546 else
547 num_addresses = DIV_ROUND_UP(chip.byte_len,
548 (chip.flags & AT24_FLAG_ADDR16) ? 65536 : 256);
549
550 at24 = devm_kzalloc(&client->dev, sizeof(struct at24_data) +
551 num_addresses * sizeof(struct i2c_client *), GFP_KERNEL);
552 if (!at24)
553 return -ENOMEM;
554
555 mutex_init(&at24->lock);
556 at24->use_smbus = use_smbus;
557 at24->use_smbus_write = use_smbus_write;
558 at24->chip = chip;
559 at24->num_addresses = num_addresses;
560
561 /*
562 * Export the EEPROM bytes through sysfs, since that's convenient.
563 * By default, only root should see the data (maybe passwords etc)
564 */
565 sysfs_bin_attr_init(&at24->bin);
566 at24->bin.attr.name = "eeprom";
567 at24->bin.attr.mode = chip.flags & AT24_FLAG_IRUGO ? S_IRUGO : S_IRUSR;
568 at24->bin.read = at24_bin_read;
569 at24->bin.size = chip.byte_len;
570
571 at24->macc.read = at24_macc_read;
572
573 writable = !(chip.flags & AT24_FLAG_READONLY);
574 if (writable) {
575 if (!use_smbus || use_smbus_write) {
576
577 unsigned write_max = chip.page_size;
578
579 at24->macc.write = at24_macc_write;
580
581 at24->bin.write = at24_bin_write;
582 at24->bin.attr.mode |= S_IWUSR;
583
584 if (write_max > io_limit)
585 write_max = io_limit;
586 if (use_smbus && write_max > I2C_SMBUS_BLOCK_MAX)
587 write_max = I2C_SMBUS_BLOCK_MAX;
588 at24->write_max = write_max;
589
590 /* buffer (data + address at the beginning) */
591 at24->writebuf = devm_kzalloc(&client->dev,
592 write_max + 2, GFP_KERNEL);
593 if (!at24->writebuf)
594 return -ENOMEM;
595 } else {
596 dev_warn(&client->dev,
597 "cannot write due to controller restrictions.");
598 }
599 }
600
601 at24->client[0] = client;
602
603 /* use dummy devices for multiple-address chips */
604 for (i = 1; i < num_addresses; i++) {
605 at24->client[i] = i2c_new_dummy(client->adapter,
606 client->addr + i);
607 if (!at24->client[i]) {
608 dev_err(&client->dev, "address 0x%02x unavailable\n",
609 client->addr + i);
610 err = -EADDRINUSE;
611 goto err_clients;
612 }
613 }
614
615 err = sysfs_create_bin_file(&client->dev.kobj, &at24->bin);
616 if (err)
617 goto err_clients;
618
619 i2c_set_clientdata(client, at24);
620
621 dev_info(&client->dev, "%zu byte %s EEPROM, %s, %u bytes/write\n",
622 at24->bin.size, client->name,
623 writable ? "writable" : "read-only", at24->write_max);
624 if (use_smbus == I2C_SMBUS_WORD_DATA ||
625 use_smbus == I2C_SMBUS_BYTE_DATA) {
626 dev_notice(&client->dev, "Falling back to %s reads, "
627 "performance will suffer\n", use_smbus ==
628 I2C_SMBUS_WORD_DATA ? "word" : "byte");
629 }
630
631 /* export data to kernel code */
632 if (chip.setup)
633 chip.setup(&at24->macc, chip.context);
634
635 return 0;
636
637 err_clients:
638 for (i = 1; i < num_addresses; i++)
639 if (at24->client[i])
640 i2c_unregister_device(at24->client[i]);
641
642 return err;
643 }
644
645 static int at24_remove(struct i2c_client *client)
646 {
647 struct at24_data *at24;
648 int i;
649
650 at24 = i2c_get_clientdata(client);
651 sysfs_remove_bin_file(&client->dev.kobj, &at24->bin);
652
653 for (i = 1; i < at24->num_addresses; i++)
654 i2c_unregister_device(at24->client[i]);
655
656 return 0;
657 }
658
659 /*-------------------------------------------------------------------------*/
660
661 static struct i2c_driver at24_driver = {
662 .driver = {
663 .name = "at24",
664 },
665 .probe = at24_probe,
666 .remove = at24_remove,
667 .id_table = at24_ids,
668 };
669
670 static int __init at24_init(void)
671 {
672 if (!io_limit) {
673 pr_err("at24: io_limit must not be 0!\n");
674 return -EINVAL;
675 }
676
677 io_limit = rounddown_pow_of_two(io_limit);
678 return i2c_add_driver(&at24_driver);
679 }
680 module_init(at24_init);
681
682 static void __exit at24_exit(void)
683 {
684 i2c_del_driver(&at24_driver);
685 }
686 module_exit(at24_exit);
687
688 MODULE_DESCRIPTION("Driver for most I2C EEPROMs");
689 MODULE_AUTHOR("David Brownell and Wolfram Sang");
690 MODULE_LICENSE("GPL");
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