drivers/misc/eeprom/at25.c

   1 /*
   2  * at25.c -- support most SPI EEPROMs, such as Atmel AT25 models
   3  *
   4  * Copyright (C) 2006 David Brownell
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  */
  11
  12 #include <linux/kernel.h>
  13 #include <linux/module.h>
  14 #include <linux/slab.h>
  15 #include <linux/delay.h>
  16 #include <linux/device.h>
  17 #include <linux/sched.h>
  18
  19 #include <linux/spi/spi.h>
  20 #include <linux/spi/eeprom.h>
  21 #include <linux/property.h>
  22
  23 /*
  24  * NOTE: this is an *EEPROM* driver.  The vagaries of product naming
  25  * mean that some AT25 products are EEPROMs, and others are FLASH.
  26  * Handle FLASH chips with the drivers/mtd/devices/m25p80.c driver,
  27  * not this one!
  28  */
  29
  30 struct at25_data {
  31         struct spi_device       *spi;
  32         struct mutex            lock;
  33         struct spi_eeprom       chip;
  34         struct bin_attribute    bin;
  35         unsigned                addrlen;
  36 };
  37
  38 #define AT25_WREN       0x06            /* latch the write enable */
  39 #define AT25_WRDI       0x04            /* reset the write enable */
  40 #define AT25_RDSR       0x05            /* read status register */
  41 #define AT25_WRSR       0x01            /* write status register */
  42 #define AT25_READ       0x03            /* read byte(s) */
  43 #define AT25_WRITE      0x02            /* write byte(s)/sector */
  44
  45 #define AT25_SR_nRDY    0x01            /* nRDY = write-in-progress */
  46 #define AT25_SR_WEN     0x02            /* write enable (latched) */
  47 #define AT25_SR_BP0     0x04            /* BP for software writeprotect */
  48 #define AT25_SR_BP1     0x08
  49 #define AT25_SR_WPEN    0x80            /* writeprotect enable */
  50
  51 #define AT25_INSTR_BIT3 0x08            /* Additional address bit in instr */
  52
  53 #define EE_MAXADDRLEN   3               /* 24 bit addresses, up to 2 MBytes */
  54
  55 /* Specs often allow 5 msec for a page write, sometimes 20 msec;
  56  * it's important to recover from write timeouts.
  57  */
  58 #define EE_TIMEOUT      25
  59
  60 /*-------------------------------------------------------------------------*/
  61
  62 #define io_limit        PAGE_SIZE       /* bytes */
  63
  64 static ssize_t
  65 at25_ee_read(
  66         struct at25_data        *at25,
  67         char                    *buf,
  68         unsigned                offset,
  69         size_t                  count
  70 )
  71 {
  72         u8                      command[EE_MAXADDRLEN + 1];
  73         u8                      *cp;
  74         ssize_t                 status;
  75         struct spi_transfer     t[2];
  76         struct spi_message      m;
  77         u8                      instr;
  78
  79         if (unlikely(offset >= at25->bin.size))
  80                 return 0;
  81         if ((offset + count) > at25->bin.size)
  82                 count = at25->bin.size - offset;
  83         if (unlikely(!count))
  84                 return count;
  85
  86         cp = command;
  87
  88         instr = AT25_READ;
  89         if (at25->chip.flags & EE_INSTR_BIT3_IS_ADDR)
  90                 if (offset >= (1U << (at25->addrlen * 8)))
  91                         instr |= AT25_INSTR_BIT3;
  92         *cp++ = instr;
  93
  94         /* 8/16/24-bit address is written MSB first */
  95         switch (at25->addrlen) {
  96         default:        /* case 3 */
  97                 *cp++ = offset >> 16;
  98         case 2:
  99                 *cp++ = offset >> 8;
 100         case 1:
 101         case 0: /* can't happen: for better codegen */
 102                 *cp++ = offset >> 0;
 103         }
 104
 105         spi_message_init(&m);
 106         memset(t, 0, sizeof t);
 107
 108         t[0].tx_buf = command;
 109         t[0].len = at25->addrlen + 1;
 110         spi_message_add_tail(&t[0], &m);
 111
 112         t[1].rx_buf = buf;
 113         t[1].len = count;
 114         spi_message_add_tail(&t[1], &m);
 115
 116         mutex_lock(&at25->lock);
 117
 118         /* Read it all at once.
 119          *
 120          * REVISIT that's potentially a problem with large chips, if
 121          * other devices on the bus need to be accessed regularly or
 122          * this chip is clocked very slowly
 123          */
 124         status = spi_sync(at25->spi, &m);
 125         dev_dbg(&at25->spi->dev,
 126                 "read %Zd bytes at %d --> %d\n",
 127                 count, offset, (int) status);
 128
 129         mutex_unlock(&at25->lock);
 130         return status ? status : count;
 131 }
 132
 133 static ssize_t
 134 at25_bin_read(struct file *filp, struct kobject *kobj,
 135               struct bin_attribute *bin_attr,
 136               char *buf, loff_t off, size_t count)
 137 {
 138         struct device           *dev;
 139         struct at25_data        *at25;
 140
 141         dev = kobj_to_dev(kobj);
 142         at25 = dev_get_drvdata(dev);
 143
 144         return at25_ee_read(at25, buf, off, count);
 145 }
 146
 147
 148 static ssize_t
 149 at25_ee_write(struct at25_data *at25, const char *buf, loff_t off,
 150               size_t count)
 151 {
 152         ssize_t                 status = 0;
 153         unsigned                written = 0;
 154         unsigned                buf_size;
 155         u8                      *bounce;
 156
 157         if (unlikely(off >= at25->bin.size))
 158                 return -EFBIG;
 159         if ((off + count) > at25->bin.size)
 160                 count = at25->bin.size - off;
 161         if (unlikely(!count))
 162                 return count;
 163
 164         /* Temp buffer starts with command and address */
 165         buf_size = at25->chip.page_size;
 166         if (buf_size > io_limit)
 167                 buf_size = io_limit;
 168         bounce = kmalloc(buf_size + at25->addrlen + 1, GFP_KERNEL);
 169         if (!bounce)
 170                 return -ENOMEM;
 171
 172         /* For write, rollover is within the page ... so we write at
 173          * most one page, then manually roll over to the next page.
 174          */
 175         mutex_lock(&at25->lock);
 176         do {
 177                 unsigned long   timeout, retries;
 178                 unsigned        segment;
 179                 unsigned        offset = (unsigned) off;
 180                 u8              *cp = bounce;
 181                 int             sr;
 182                 u8              instr;
 183
 184                 *cp = AT25_WREN;
 185                 status = spi_write(at25->spi, cp, 1);
 186                 if (status < 0) {
 187                         dev_dbg(&at25->spi->dev, "WREN --> %d\n",
 188                                         (int) status);
 189                         break;
 190                 }
 191
 192                 instr = AT25_WRITE;
 193                 if (at25->chip.flags & EE_INSTR_BIT3_IS_ADDR)
 194                         if (offset >= (1U << (at25->addrlen * 8)))
 195                                 instr |= AT25_INSTR_BIT3;
 196                 *cp++ = instr;
 197
 198                 /* 8/16/24-bit address is written MSB first */
 199                 switch (at25->addrlen) {
 200                 default:        /* case 3 */
 201                         *cp++ = offset >> 16;
 202                 case 2:
 203                         *cp++ = offset >> 8;
 204                 case 1:
 205                 case 0: /* can't happen: for better codegen */
 206                         *cp++ = offset >> 0;
 207                 }
 208
 209                 /* Write as much of a page as we can */
 210                 segment = buf_size - (offset % buf_size);
 211                 if (segment > count)
 212                         segment = count;
 213                 memcpy(cp, buf, segment);
 214                 status = spi_write(at25->spi, bounce,
 215                                 segment + at25->addrlen + 1);
 216                 dev_dbg(&at25->spi->dev,
 217                                 "write %u bytes at %u --> %d\n",
 218                                 segment, offset, (int) status);
 219                 if (status < 0)
 220                         break;
 221
 222                 /* REVISIT this should detect (or prevent) failed writes
 223                  * to readonly sections of the EEPROM...
 224                  */
 225
 226                 /* Wait for non-busy status */
 227                 timeout = jiffies + msecs_to_jiffies(EE_TIMEOUT);
 228                 retries = 0;
 229                 do {
 230
 231                         sr = spi_w8r8(at25->spi, AT25_RDSR);
 232                         if (sr < 0 || (sr & AT25_SR_nRDY)) {
 233                                 dev_dbg(&at25->spi->dev,
 234                                         "rdsr --> %d (%02x)\n", sr, sr);
 235                                 /* at HZ=100, this is sloooow */
 236                                 msleep(1);
 237                                 continue;
 238                         }
 239                         if (!(sr & AT25_SR_nRDY))
 240                                 break;
 241                 } while (retries++ < 3 || time_before_eq(jiffies, timeout));
 242
 243                 if ((sr < 0) || (sr & AT25_SR_nRDY)) {
 244                         dev_err(&at25->spi->dev,
 245                                 "write %d bytes offset %d, "
 246                                 "timeout after %u msecs\n",
 247                                 segment, offset,
 248                                 jiffies_to_msecs(jiffies -
 249                                         (timeout - EE_TIMEOUT)));
 250                         status = -ETIMEDOUT;
 251                         break;
 252                 }
 253
 254                 off += segment;
 255                 buf += segment;
 256                 count -= segment;
 257                 written += segment;
 258
 259         } while (count > 0);
 260
 261         mutex_unlock(&at25->lock);
 262
 263         kfree(bounce);
 264         return written ? written : status;
 265 }
 266
 267 static ssize_t
 268 at25_bin_write(struct file *filp, struct kobject *kobj,
 269                struct bin_attribute *bin_attr,
 270                char *buf, loff_t off, size_t count)
 271 {
 272         struct device           *dev;
 273         struct at25_data        *at25;
 274
 275         dev = kobj_to_dev(kobj);
 276         at25 = dev_get_drvdata(dev);
 277
 278         return at25_ee_write(at25, buf, off, count);
 279 }
 280
 281 /*-------------------------------------------------------------------------*/
 282
 283 static int at25_fw_to_chip(struct device *dev, struct spi_eeprom *chip)
 284 {
 285         u32 val;
 286
 287         memset(chip, 0, sizeof(*chip));
 288         strncpy(chip->name, "at25", sizeof(chip->name));
 289
 290         if (device_property_read_u32(dev, "size", &val) == 0 ||
 291             device_property_read_u32(dev, "at25,byte-len", &val) == 0) {
 292                 chip->byte_len = val;
 293         } else {
 294                 dev_err(dev, "Error: missing \"size\" property\n");
 295                 return -ENODEV;
 296         }
 297
 298         if (device_property_read_u32(dev, "pagesize", &val) == 0 ||
 299             device_property_read_u32(dev, "at25,page-size", &val) == 0) {
 300                 chip->page_size = (u16)val;
 301         } else {
 302                 dev_err(dev, "Error: missing \"pagesize\" property\n");
 303                 return -ENODEV;
 304         }
 305
 306         if (device_property_read_u32(dev, "at25,addr-mode", &val) == 0) {
 307                 chip->flags = (u16)val;
 308         } else {
 309                 if (device_property_read_u32(dev, "address-width", &val)) {
 310                         dev_err(dev,
 311                                 "Error: missing \"address-width\" property\n");
 312                         return -ENODEV;
 313                 }
 314                 switch (val) {
 315                 case 8:
 316                         chip->flags |= EE_ADDR1;
 317                         break;
 318                 case 16:
 319                         chip->flags |= EE_ADDR2;
 320                         break;
 321                 case 24:
 322                         chip->flags |= EE_ADDR3;
 323                         break;
 324                 default:
 325                         dev_err(dev,
 326                                 "Error: bad \"address-width\" property: %u\n",
 327                                 val);
 328                         return -ENODEV;
 329                 }
 330                 if (device_property_present(dev, "read-only"))
 331                         chip->flags |= EE_READONLY;
 332         }
 333         return 0;
 334 }
 335
 336 static int at25_probe(struct spi_device *spi)
 337 {
 338         struct at25_data        *at25 = NULL;
 339         struct spi_eeprom       chip;
 340         int                     err;
 341         int                     sr;
 342         int                     addrlen;
 343
 344         /* Chip description */
 345         if (!spi->dev.platform_data) {
 346                 err = at25_fw_to_chip(&spi->dev, &chip);
 347                 if (err)
 348                         return err;
 349         } else
 350                 chip = *(struct spi_eeprom *)spi->dev.platform_data;
 351
 352         /* For now we only support 8/16/24 bit addressing */
 353         if (chip.flags & EE_ADDR1)
 354                 addrlen = 1;
 355         else if (chip.flags & EE_ADDR2)
 356                 addrlen = 2;
 357         else if (chip.flags & EE_ADDR3)
 358                 addrlen = 3;
 359         else {
 360                 dev_dbg(&spi->dev, "unsupported address type\n");
 361                 return -EINVAL;
 362         }
 363
 364         /* Ping the chip ... the status register is pretty portable,
 365          * unlike probing manufacturer IDs.  We do expect that system
 366          * firmware didn't write it in the past few milliseconds!
 367          */
 368         sr = spi_w8r8(spi, AT25_RDSR);
 369         if (sr < 0 || sr & AT25_SR_nRDY) {
 370                 dev_dbg(&spi->dev, "rdsr --> %d (%02x)\n", sr, sr);
 371                 return -ENXIO;
 372         }
 373
 374         at25 = devm_kzalloc(&spi->dev, sizeof(struct at25_data), GFP_KERNEL);
 375         if (!at25)
 376                 return -ENOMEM;
 377
 378         mutex_init(&at25->lock);
 379         at25->chip = chip;
 380         at25->spi = spi_dev_get(spi);
 381         spi_set_drvdata(spi, at25);
 382         at25->addrlen = addrlen;
 383
 384         /* Export the EEPROM bytes through sysfs, since that's convenient.
 385          * And maybe to other kernel code; it might hold a board's Ethernet
 386          * address, or board-specific calibration data generated on the
 387          * manufacturing floor.
 388          *
 389          * Default to root-only access to the data; EEPROMs often hold data
 390          * that's sensitive for read and/or write, like ethernet addresses,
 391          * security codes, board-specific manufacturing calibrations, etc.
 392          */
 393         sysfs_bin_attr_init(&at25->bin);
 394         at25->bin.attr.name = "eeprom";
 395         at25->bin.attr.mode = S_IRUSR;
 396         at25->bin.read = at25_bin_read;
 397
 398         at25->bin.size = at25->chip.byte_len;
 399         if (!(chip.flags & EE_READONLY)) {
 400                 at25->bin.write = at25_bin_write;
 401                 at25->bin.attr.mode |= S_IWUSR;
 402         }
 403
 404         err = sysfs_create_bin_file(&spi->dev.kobj, &at25->bin);
 405         if (err)
 406                 return err;
 407
 408         dev_info(&spi->dev, "%Zd %s %s eeprom%s, pagesize %u\n",
 409                 (at25->bin.size < 1024)
 410                         ? at25->bin.size
 411                         : (at25->bin.size / 1024),
 412                 (at25->bin.size < 1024) ? "Byte" : "KByte",
 413                 at25->chip.name,
 414                 (chip.flags & EE_READONLY) ? " (readonly)" : "",
 415                 at25->chip.page_size);
 416         return 0;
 417 }
 418
 419 static int at25_remove(struct spi_device *spi)
 420 {
 421         struct at25_data        *at25;
 422
 423         at25 = spi_get_drvdata(spi);
 424         sysfs_remove_bin_file(&spi->dev.kobj, &at25->bin);
 425         return 0;
 426 }
 427
 428 /*-------------------------------------------------------------------------*/
 429
 430 static const struct of_device_id at25_of_match[] = {
 431         { .compatible = "atmel,at25", },
 432         { }
 433 };
 434 MODULE_DEVICE_TABLE(of, at25_of_match);
 435
 436 static struct spi_driver at25_driver = {
 437         .driver = {
 438                 .name           = "at25",
 439                 .of_match_table = at25_of_match,
 440         },
 441         .probe          = at25_probe,
 442         .remove         = at25_remove,
 443 };
 444
 445 module_spi_driver(at25_driver);
 446
 447 MODULE_DESCRIPTION("Driver for most SPI EEPROMs");
 448 MODULE_AUTHOR("David Brownell");
 449 MODULE_LICENSE("GPL");
 450 MODULE_ALIAS("spi:at25");