drivers/misc/mei/hw-me.c

   1 /*
   2  *
   3  * Intel Management Engine Interface (Intel MEI) Linux driver
   4  * Copyright (c) 2003-2012, Intel Corporation.
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms and conditions of the GNU General Public License,
   8  * version 2, as published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13  * more details.
  14  *
  15  */
  16
  17 #include <linux/pci.h>
  18
  19 #include <linux/kthread.h>
  20 #include <linux/interrupt.h>
  21
  22 #include "mei_dev.h"
  23 #include "hw-me.h"
  24
  25 #include "hbm.h"
  26
  27
  28 /**
  29  * mei_me_reg_read - Reads 32bit data from the mei device
  30  *
  31  * @dev: the device structure
  32  * @offset: offset from which to read the data
  33  *
  34  * returns register value (u32)
  35  */
  36 static inline u32 mei_me_reg_read(const struct mei_me_hw *hw,
  37                                unsigned long offset)
  38 {
  39         return ioread32(hw->mem_addr + offset);
  40 }
  41
  42
  43 /**
  44  * mei_me_reg_write - Writes 32bit data to the mei device
  45  *
  46  * @dev: the device structure
  47  * @offset: offset from which to write the data
  48  * @value: register value to write (u32)
  49  */
  50 static inline void mei_me_reg_write(const struct mei_me_hw *hw,
  51                                  unsigned long offset, u32 value)
  52 {
  53         iowrite32(value, hw->mem_addr + offset);
  54 }
  55
  56 /**
  57  * mei_me_mecbrw_read - Reads 32bit data from ME circular buffer
  58  *  read window register
  59  *
  60  * @dev: the device structure
  61  *
  62  * returns ME_CB_RW register value (u32)
  63  */
  64 static u32 mei_me_mecbrw_read(const struct mei_device *dev)
  65 {
  66         return mei_me_reg_read(to_me_hw(dev), ME_CB_RW);
  67 }
  68 /**
  69  * mei_me_mecsr_read - Reads 32bit data from the ME CSR
  70  *
  71  * @dev: the device structure
  72  *
  73  * returns ME_CSR_HA register value (u32)
  74  */
  75 static inline u32 mei_me_mecsr_read(const struct mei_me_hw *hw)
  76 {
  77         return mei_me_reg_read(hw, ME_CSR_HA);
  78 }
  79
  80 /**
  81  * mei_hcsr_read - Reads 32bit data from the host CSR
  82  *
  83  * @dev: the device structure
  84  *
  85  * returns H_CSR register value (u32)
  86  */
  87 static inline u32 mei_hcsr_read(const struct mei_me_hw *hw)
  88 {
  89         return mei_me_reg_read(hw, H_CSR);
  90 }
  91
  92 /**
  93  * mei_hcsr_set - writes H_CSR register to the mei device,
  94  * and ignores the H_IS bit for it is write-one-to-zero.
  95  *
  96  * @dev: the device structure
  97  */
  98 static inline void mei_hcsr_set(struct mei_me_hw *hw, u32 hcsr)
  99 {
 100         hcsr &= ~H_IS;
 101         mei_me_reg_write(hw, H_CSR, hcsr);
 102 }
 103
 104
 105 /**
 106  * mei_me_hw_config - configure hw dependent settings
 107  *
 108  * @dev: mei device
 109  */
 110 static void mei_me_hw_config(struct mei_device *dev)
 111 {
 112         u32 hcsr = mei_hcsr_read(to_me_hw(dev));
 113         /* Doesn't change in runtime */
 114         dev->hbuf_depth = (hcsr & H_CBD) >> 24;
 115 }
 116 /**
 117  * mei_clear_interrupts - clear and stop interrupts
 118  *
 119  * @dev: the device structure
 120  */
 121 static void mei_me_intr_clear(struct mei_device *dev)
 122 {
 123         struct mei_me_hw *hw = to_me_hw(dev);
 124         u32 hcsr = mei_hcsr_read(hw);
 125         if ((hcsr & H_IS) == H_IS)
 126                 mei_me_reg_write(hw, H_CSR, hcsr);
 127 }
 128 /**
 129  * mei_me_intr_enable - enables mei device interrupts
 130  *
 131  * @dev: the device structure
 132  */
 133 static void mei_me_intr_enable(struct mei_device *dev)
 134 {
 135         struct mei_me_hw *hw = to_me_hw(dev);
 136         u32 hcsr = mei_hcsr_read(hw);
 137         hcsr |= H_IE;
 138         mei_hcsr_set(hw, hcsr);
 139 }
 140
 141 /**
 142  * mei_disable_interrupts - disables mei device interrupts
 143  *
 144  * @dev: the device structure
 145  */
 146 static void mei_me_intr_disable(struct mei_device *dev)
 147 {
 148         struct mei_me_hw *hw = to_me_hw(dev);
 149         u32 hcsr = mei_hcsr_read(hw);
 150         hcsr  &= ~H_IE;
 151         mei_hcsr_set(hw, hcsr);
 152 }
 153
 154 /**
 155  * mei_me_hw_reset_release - release device from the reset
 156  *
 157  * @dev: the device structure
 158  */
 159 static void mei_me_hw_reset_release(struct mei_device *dev)
 160 {
 161         struct mei_me_hw *hw = to_me_hw(dev);
 162         u32 hcsr = mei_hcsr_read(hw);
 163
 164         hcsr |= H_IG;
 165         hcsr &= ~H_RST;
 166         mei_hcsr_set(hw, hcsr);
 167 }
 168 /**
 169  * mei_me_hw_reset - resets fw via mei csr register.
 170  *
 171  * @dev: the device structure
 172  * @intr_enable: if interrupt should be enabled after reset.
 173  */
 174 static int mei_me_hw_reset(struct mei_device *dev, bool intr_enable)
 175 {
 176         struct mei_me_hw *hw = to_me_hw(dev);
 177         u32 hcsr = mei_hcsr_read(hw);
 178
 179         dev_dbg(&dev->pdev->dev, "before reset HCSR = 0x%08x.\n", hcsr);
 180
 181         hcsr |= (H_RST | H_IG);
 182
 183         if (intr_enable)
 184                 hcsr |= H_IE;
 185         else
 186                 hcsr |= ~H_IE;
 187
 188         mei_hcsr_set(hw, hcsr);
 189
 190         if (dev->dev_state == MEI_DEV_POWER_DOWN)
 191                 mei_me_hw_reset_release(dev);
 192
 193         dev_dbg(&dev->pdev->dev, "current HCSR = 0x%08x.\n", mei_hcsr_read(hw));
 194         return 0;
 195 }
 196
 197 /**
 198  * mei_me_host_set_ready - enable device
 199  *
 200  * @dev - mei device
 201  * returns bool
 202  */
 203
 204 static void mei_me_host_set_ready(struct mei_device *dev)
 205 {
 206         struct mei_me_hw *hw = to_me_hw(dev);
 207         hw->host_hw_state |= H_IE | H_IG | H_RDY;
 208         mei_hcsr_set(hw, hw->host_hw_state);
 209 }
 210 /**
 211  * mei_me_host_is_ready - check whether the host has turned ready
 212  *
 213  * @dev - mei device
 214  * returns bool
 215  */
 216 static bool mei_me_host_is_ready(struct mei_device *dev)
 217 {
 218         struct mei_me_hw *hw = to_me_hw(dev);
 219         hw->host_hw_state = mei_hcsr_read(hw);
 220         return (hw->host_hw_state & H_RDY) == H_RDY;
 221 }
 222
 223 /**
 224  * mei_me_hw_is_ready - check whether the me(hw) has turned ready
 225  *
 226  * @dev - mei device
 227  * returns bool
 228  */
 229 static bool mei_me_hw_is_ready(struct mei_device *dev)
 230 {
 231         struct mei_me_hw *hw = to_me_hw(dev);
 232         hw->me_hw_state = mei_me_mecsr_read(hw);
 233         return (hw->me_hw_state & ME_RDY_HRA) == ME_RDY_HRA;
 234 }
 235
 236 static int mei_me_hw_ready_wait(struct mei_device *dev)
 237 {
 238         int err;
 239         if (mei_me_hw_is_ready(dev))
 240                 return 0;
 241
 242         mutex_unlock(&dev->device_lock);
 243         err = wait_event_interruptible_timeout(dev->wait_hw_ready,
 244                         dev->recvd_hw_ready, MEI_INTEROP_TIMEOUT);
 245         mutex_lock(&dev->device_lock);
 246         if (!err && !dev->recvd_hw_ready) {
 247                 dev_err(&dev->pdev->dev,
 248                         "wait hw ready failed. status = 0x%x\n", err);
 249                 return -ETIMEDOUT;
 250         }
 251
 252         dev->recvd_hw_ready = false;
 253         return 0;
 254 }
 255
 256 static int mei_me_hw_start(struct mei_device *dev)
 257 {
 258         int ret = mei_me_hw_ready_wait(dev);
 259         if (ret)
 260                 return ret;
 261         dev_dbg(&dev->pdev->dev, "hw is ready\n");
 262
 263         mei_me_host_set_ready(dev);
 264         return ret;
 265 }
 266
 267
 268 /**
 269  * mei_hbuf_filled_slots - gets number of device filled buffer slots
 270  *
 271  * @dev: the device structure
 272  *
 273  * returns number of filled slots
 274  */
 275 static unsigned char mei_hbuf_filled_slots(struct mei_device *dev)
 276 {
 277         struct mei_me_hw *hw = to_me_hw(dev);
 278         char read_ptr, write_ptr;
 279
 280         hw->host_hw_state = mei_hcsr_read(hw);
 281
 282         read_ptr = (char) ((hw->host_hw_state & H_CBRP) >> 8);
 283         write_ptr = (char) ((hw->host_hw_state & H_CBWP) >> 16);
 284
 285         return (unsigned char) (write_ptr - read_ptr);
 286 }
 287
 288 /**
 289  * mei_me_hbuf_is_empty - checks if host buffer is empty.
 290  *
 291  * @dev: the device structure
 292  *
 293  * returns true if empty, false - otherwise.
 294  */
 295 static bool mei_me_hbuf_is_empty(struct mei_device *dev)
 296 {
 297         return mei_hbuf_filled_slots(dev) == 0;
 298 }
 299
 300 /**
 301  * mei_me_hbuf_empty_slots - counts write empty slots.
 302  *
 303  * @dev: the device structure
 304  *
 305  * returns -1(ESLOTS_OVERFLOW) if overflow, otherwise empty slots count
 306  */
 307 static int mei_me_hbuf_empty_slots(struct mei_device *dev)
 308 {
 309         unsigned char filled_slots, empty_slots;
 310
 311         filled_slots = mei_hbuf_filled_slots(dev);
 312         empty_slots = dev->hbuf_depth - filled_slots;
 313
 314         /* check for overflow */
 315         if (filled_slots > dev->hbuf_depth)
 316                 return -EOVERFLOW;
 317
 318         return empty_slots;
 319 }
 320
 321 static size_t mei_me_hbuf_max_len(const struct mei_device *dev)
 322 {
 323         return dev->hbuf_depth * sizeof(u32) - sizeof(struct mei_msg_hdr);
 324 }
 325
 326
 327 /**
 328  * mei_write_message - writes a message to mei device.
 329  *
 330  * @dev: the device structure
 331  * @header: mei HECI header of message
 332  * @buf: message payload will be written
 333  *
 334  * This function returns -EIO if write has failed
 335  */
 336 static int mei_me_write_message(struct mei_device *dev,
 337                         struct mei_msg_hdr *header,
 338                         unsigned char *buf)
 339 {
 340         struct mei_me_hw *hw = to_me_hw(dev);
 341         unsigned long rem;
 342         unsigned long length = header->length;
 343         u32 *reg_buf = (u32 *)buf;
 344         u32 hcsr;
 345         u32 dw_cnt;
 346         int i;
 347         int empty_slots;
 348
 349         dev_dbg(&dev->pdev->dev, MEI_HDR_FMT, MEI_HDR_PRM(header));
 350
 351         empty_slots = mei_hbuf_empty_slots(dev);
 352         dev_dbg(&dev->pdev->dev, "empty slots = %hu.\n", empty_slots);
 353
 354         dw_cnt = mei_data2slots(length);
 355         if (empty_slots < 0 || dw_cnt > empty_slots)
 356                 return -EIO;
 357
 358         mei_me_reg_write(hw, H_CB_WW, *((u32 *) header));
 359
 360         for (i = 0; i < length / 4; i++)
 361                 mei_me_reg_write(hw, H_CB_WW, reg_buf[i]);
 362
 363         rem = length & 0x3;
 364         if (rem > 0) {
 365                 u32 reg = 0;
 366                 memcpy(&reg, &buf[length - rem], rem);
 367                 mei_me_reg_write(hw, H_CB_WW, reg);
 368         }
 369
 370         hcsr = mei_hcsr_read(hw) | H_IG;
 371         mei_hcsr_set(hw, hcsr);
 372         if (!mei_me_hw_is_ready(dev))
 373                 return -EIO;
 374
 375         return 0;
 376 }
 377
 378 /**
 379  * mei_me_count_full_read_slots - counts read full slots.
 380  *
 381  * @dev: the device structure
 382  *
 383  * returns -1(ESLOTS_OVERFLOW) if overflow, otherwise filled slots count
 384  */
 385 static int mei_me_count_full_read_slots(struct mei_device *dev)
 386 {
 387         struct mei_me_hw *hw = to_me_hw(dev);
 388         char read_ptr, write_ptr;
 389         unsigned char buffer_depth, filled_slots;
 390
 391         hw->me_hw_state = mei_me_mecsr_read(hw);
 392         buffer_depth = (unsigned char)((hw->me_hw_state & ME_CBD_HRA) >> 24);
 393         read_ptr = (char) ((hw->me_hw_state & ME_CBRP_HRA) >> 8);
 394         write_ptr = (char) ((hw->me_hw_state & ME_CBWP_HRA) >> 16);
 395         filled_slots = (unsigned char) (write_ptr - read_ptr);
 396
 397         /* check for overflow */
 398         if (filled_slots > buffer_depth)
 399                 return -EOVERFLOW;
 400
 401         dev_dbg(&dev->pdev->dev, "filled_slots =%08x\n", filled_slots);
 402         return (int)filled_slots;
 403 }
 404
 405 /**
 406  * mei_me_read_slots - reads a message from mei device.
 407  *
 408  * @dev: the device structure
 409  * @buffer: message buffer will be written
 410  * @buffer_length: message size will be read
 411  */
 412 static int mei_me_read_slots(struct mei_device *dev, unsigned char *buffer,
 413                     unsigned long buffer_length)
 414 {
 415         struct mei_me_hw *hw = to_me_hw(dev);
 416         u32 *reg_buf = (u32 *)buffer;
 417         u32 hcsr;
 418
 419         for (; buffer_length >= sizeof(u32); buffer_length -= sizeof(u32))
 420                 *reg_buf++ = mei_me_mecbrw_read(dev);
 421
 422         if (buffer_length > 0) {
 423                 u32 reg = mei_me_mecbrw_read(dev);
 424                 memcpy(reg_buf, &reg, buffer_length);
 425         }
 426
 427         hcsr = mei_hcsr_read(hw) | H_IG;
 428         mei_hcsr_set(hw, hcsr);
 429         return 0;
 430 }
 431
 432 /**
 433  * mei_me_irq_quick_handler - The ISR of the MEI device
 434  *
 435  * @irq: The irq number
 436  * @dev_id: pointer to the device structure
 437  *
 438  * returns irqreturn_t
 439  */
 440
 441 irqreturn_t mei_me_irq_quick_handler(int irq, void *dev_id)
 442 {
 443         struct mei_device *dev = (struct mei_device *) dev_id;
 444         struct mei_me_hw *hw = to_me_hw(dev);
 445         u32 csr_reg = mei_hcsr_read(hw);
 446
 447         if ((csr_reg & H_IS) != H_IS)
 448                 return IRQ_NONE;
 449
 450         /* clear H_IS bit in H_CSR */
 451         mei_me_reg_write(hw, H_CSR, csr_reg);
 452
 453         return IRQ_WAKE_THREAD;
 454 }
 455
 456 /**
 457  * mei_me_irq_thread_handler - function called after ISR to handle the interrupt
 458  * processing.
 459  *
 460  * @irq: The irq number
 461  * @dev_id: pointer to the device structure
 462  *
 463  * returns irqreturn_t
 464  *
 465  */
 466 irqreturn_t mei_me_irq_thread_handler(int irq, void *dev_id)
 467 {
 468         struct mei_device *dev = (struct mei_device *) dev_id;
 469         struct mei_cl_cb complete_list;
 470         s32 slots;
 471         int rets;
 472
 473         dev_dbg(&dev->pdev->dev, "function called after ISR to handle the interrupt processing.\n");
 474         /* initialize our complete list */
 475         mutex_lock(&dev->device_lock);
 476         mei_io_list_init(&complete_list);
 477
 478         /* Ack the interrupt here
 479          * In case of MSI we don't go through the quick handler */
 480         if (pci_dev_msi_enabled(dev->pdev))
 481                 mei_clear_interrupts(dev);
 482
 483         /* check if ME wants a reset */
 484         if (!mei_hw_is_ready(dev) &&
 485             dev->dev_state != MEI_DEV_RESETTING &&
 486             dev->dev_state != MEI_DEV_INITIALIZING) {
 487                 dev_dbg(&dev->pdev->dev, "FW not ready.\n");
 488                 mei_reset(dev, 1);
 489                 mutex_unlock(&dev->device_lock);
 490                 return IRQ_HANDLED;
 491         }
 492
 493         /*  check if we need to start the dev */
 494         if (!mei_host_is_ready(dev)) {
 495                 if (mei_hw_is_ready(dev)) {
 496                         dev_dbg(&dev->pdev->dev, "we need to start the dev.\n");
 497
 498                         dev->recvd_hw_ready = true;
 499                         wake_up_interruptible(&dev->wait_hw_ready);
 500
 501                         mutex_unlock(&dev->device_lock);
 502                         return IRQ_HANDLED;
 503                 } else {
 504                         dev_dbg(&dev->pdev->dev, "Reset Completed.\n");
 505                         mei_me_hw_reset_release(dev);
 506                         mutex_unlock(&dev->device_lock);
 507                         return IRQ_HANDLED;
 508                 }
 509         }
 510         /* check slots available for reading */
 511         slots = mei_count_full_read_slots(dev);
 512         while (slots > 0) {
 513                 /* we have urgent data to send so break the read */
 514                 if (dev->wr_ext_msg.hdr.length)
 515                         break;
 516                 dev_dbg(&dev->pdev->dev, "slots =%08x\n", slots);
 517                 dev_dbg(&dev->pdev->dev, "call mei_irq_read_handler.\n");
 518                 rets = mei_irq_read_handler(dev, &complete_list, &slots);
 519                 if (rets)
 520                         goto end;
 521         }
 522         rets = mei_irq_write_handler(dev, &complete_list);
 523 end:
 524         dev_dbg(&dev->pdev->dev, "end of bottom half function.\n");
 525         dev->hbuf_is_ready = mei_hbuf_is_ready(dev);
 526
 527         mutex_unlock(&dev->device_lock);
 528
 529         mei_irq_compl_handler(dev, &complete_list);
 530
 531         return IRQ_HANDLED;
 532 }
 533 static const struct mei_hw_ops mei_me_hw_ops = {
 534
 535         .host_is_ready = mei_me_host_is_ready,
 536
 537         .hw_is_ready = mei_me_hw_is_ready,
 538         .hw_reset = mei_me_hw_reset,
 539         .hw_config = mei_me_hw_config,
 540         .hw_start = mei_me_hw_start,
 541
 542         .intr_clear = mei_me_intr_clear,
 543         .intr_enable = mei_me_intr_enable,
 544         .intr_disable = mei_me_intr_disable,
 545
 546         .hbuf_free_slots = mei_me_hbuf_empty_slots,
 547         .hbuf_is_ready = mei_me_hbuf_is_empty,
 548         .hbuf_max_len = mei_me_hbuf_max_len,
 549
 550         .write = mei_me_write_message,
 551
 552         .rdbuf_full_slots = mei_me_count_full_read_slots,
 553         .read_hdr = mei_me_mecbrw_read,
 554         .read = mei_me_read_slots
 555 };
 556
 557 /**
 558  * mei_me_dev_init - allocates and initializes the mei device structure
 559  *
 560  * @pdev: The pci device structure
 561  *
 562  * returns The mei_device_device pointer on success, NULL on failure.
 563  */
 564 struct mei_device *mei_me_dev_init(struct pci_dev *pdev)
 565 {
 566         struct mei_device *dev;
 567
 568         dev = kzalloc(sizeof(struct mei_device) +
 569                          sizeof(struct mei_me_hw), GFP_KERNEL);
 570         if (!dev)
 571                 return NULL;
 572
 573         mei_device_init(dev);
 574
 575         dev->ops = &mei_me_hw_ops;
 576
 577         dev->pdev = pdev;
 578         return dev;
 579 }
 580