drivers/misc/mei/pci-me.c

   1 /*
   2  *
   3  * Intel Management Engine Interface (Intel MEI) Linux driver
   4  * Copyright (c) 2003-2012, Intel Corporation.
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms and conditions of the GNU General Public License,
   8  * version 2, as published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13  * more details.
  14  *
  15  */
  16
  17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  18
  19 #include <linux/module.h>
  20 #include <linux/moduleparam.h>
  21 #include <linux/kernel.h>
  22 #include <linux/device.h>
  23 #include <linux/fs.h>
  24 #include <linux/errno.h>
  25 #include <linux/types.h>
  26 #include <linux/fcntl.h>
  27 #include <linux/aio.h>
  28 #include <linux/pci.h>
  29 #include <linux/poll.h>
  30 #include <linux/init.h>
  31 #include <linux/ioctl.h>
  32 #include <linux/cdev.h>
  33 #include <linux/sched.h>
  34 #include <linux/uuid.h>
  35 #include <linux/compat.h>
  36 #include <linux/jiffies.h>
  37 #include <linux/interrupt.h>
  38 #include <linux/miscdevice.h>
  39
  40 #include <linux/mei.h>
  41
  42 #include "mei_dev.h"
  43 #include "hw-me.h"
  44 #include "client.h"
  45
  46 /* mei_pci_tbl - PCI Device ID Table */
  47 static DEFINE_PCI_DEVICE_TABLE(mei_me_pci_tbl) = {
  48         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82946GZ)},
  49         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82G35)},
  50         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82Q965)},
  51         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82G965)},
  52         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82GM965)},
  53         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82GME965)},
  54         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82Q35)},
  55         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82G33)},
  56         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82Q33)},
  57         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82X38)},
  58         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_3200)},
  59         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_6)},
  60         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_7)},
  61         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_8)},
  62         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_9)},
  63         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_10)},
  64         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9M_1)},
  65         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9M_2)},
  66         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9M_3)},
  67         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9M_4)},
  68         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH10_1)},
  69         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH10_2)},
  70         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH10_3)},
  71         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH10_4)},
  72         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_IBXPK_1)},
  73         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_IBXPK_2)},
  74         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_CPT_1)},
  75         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PBG_1)},
  76         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PPT_1)},
  77         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PPT_2)},
  78         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PPT_3)},
  79         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_LPT)},
  80         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_LPT_LP)},
  81
  82         /* required last entry */
  83         {0, }
  84 };
  85
  86 MODULE_DEVICE_TABLE(pci, mei_me_pci_tbl);
  87
  88 /**
  89  * mei_quirk_probe - probe for devices that doesn't valid ME interface
  90  *
  91  * @pdev: PCI device structure
  92  * @ent: entry into pci_device_table
  93  *
  94  * returns true if ME Interface is valid, false otherwise
  95  */
  96 static bool mei_me_quirk_probe(struct pci_dev *pdev,
  97                                 const struct pci_device_id *ent)
  98 {
  99         u32 reg;
 100         if (ent->device == MEI_DEV_ID_PBG_1) {
 101                 pci_read_config_dword(pdev, 0x48, &reg);
 102                 /* make sure that bit 9 is up and bit 10 is down */
 103                 if ((reg & 0x600) == 0x200) {
 104                         dev_info(&pdev->dev, "Device doesn't have valid ME Interface\n");
 105                         return false;
 106                 }
 107         }
 108         return true;
 109 }
 110 /**
 111  * mei_probe - Device Initialization Routine
 112  *
 113  * @pdev: PCI device structure
 114  * @ent: entry in kcs_pci_tbl
 115  *
 116  * returns 0 on success, <0 on failure.
 117  */
 118 static int mei_me_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 119 {
 120         struct mei_device *dev;
 121         struct mei_me_hw *hw;
 122         int err;
 123
 124
 125         if (!mei_me_quirk_probe(pdev, ent)) {
 126                 err = -ENODEV;
 127                 goto end;
 128         }
 129
 130         /* enable pci dev */
 131         err = pci_enable_device(pdev);
 132         if (err) {
 133                 dev_err(&pdev->dev, "failed to enable pci device.\n");
 134                 goto end;
 135         }
 136         /* set PCI host mastering  */
 137         pci_set_master(pdev);
 138         /* pci request regions for mei driver */
 139         err = pci_request_regions(pdev, KBUILD_MODNAME);
 140         if (err) {
 141                 dev_err(&pdev->dev, "failed to get pci regions.\n");
 142                 goto disable_device;
 143         }
 144         /* allocates and initializes the mei dev structure */
 145         dev = mei_me_dev_init(pdev);
 146         if (!dev) {
 147                 err = -ENOMEM;
 148                 goto release_regions;
 149         }
 150         hw = to_me_hw(dev);
 151         /* mapping  IO device memory */
 152         hw->mem_addr = pci_iomap(pdev, 0, 0);
 153         if (!hw->mem_addr) {
 154                 dev_err(&pdev->dev, "mapping I/O device memory failure.\n");
 155                 err = -ENOMEM;
 156                 goto free_device;
 157         }
 158         pci_enable_msi(pdev);
 159
 160          /* request and enable interrupt */
 161         if (pci_dev_msi_enabled(pdev))
 162                 err = request_threaded_irq(pdev->irq,
 163                         NULL,
 164                         mei_me_irq_thread_handler,
 165                         IRQF_ONESHOT, KBUILD_MODNAME, dev);
 166         else
 167                 err = request_threaded_irq(pdev->irq,
 168                         mei_me_irq_quick_handler,
 169                         mei_me_irq_thread_handler,
 170                         IRQF_SHARED, KBUILD_MODNAME, dev);
 171
 172         if (err) {
 173                 dev_err(&pdev->dev, "request_threaded_irq failure. irq = %d\n",
 174                        pdev->irq);
 175                 goto disable_msi;
 176         }
 177
 178         if (mei_start(dev)) {
 179                 dev_err(&pdev->dev, "init hw failure.\n");
 180                 err = -ENODEV;
 181                 goto release_irq;
 182         }
 183
 184         err = mei_register(dev);
 185         if (err)
 186                 goto release_irq;
 187
 188         pci_set_drvdata(pdev, dev);
 189
 190         schedule_delayed_work(&dev->timer_work, HZ);
 191
 192         pr_debug("initialization successful.\n");
 193
 194         return 0;
 195
 196 release_irq:
 197         mei_disable_interrupts(dev);
 198         flush_scheduled_work();
 199         free_irq(pdev->irq, dev);
 200 disable_msi:
 201         pci_disable_msi(pdev);
 202         pci_iounmap(pdev, hw->mem_addr);
 203 free_device:
 204         kfree(dev);
 205 release_regions:
 206         pci_release_regions(pdev);
 207 disable_device:
 208         pci_disable_device(pdev);
 209 end:
 210         dev_err(&pdev->dev, "initialization failed.\n");
 211         return err;
 212 }
 213
 214 /**
 215  * mei_remove - Device Removal Routine
 216  *
 217  * @pdev: PCI device structure
 218  *
 219  * mei_remove is called by the PCI subsystem to alert the driver
 220  * that it should release a PCI device.
 221  */
 222 static void mei_me_remove(struct pci_dev *pdev)
 223 {
 224         struct mei_device *dev;
 225         struct mei_me_hw *hw;
 226
 227         dev = pci_get_drvdata(pdev);
 228         if (!dev)
 229                 return;
 230
 231         hw = to_me_hw(dev);
 232
 233
 234         dev_err(&pdev->dev, "stop\n");
 235         mei_stop(dev);
 236
 237         /* disable interrupts */
 238         mei_disable_interrupts(dev);
 239
 240         free_irq(pdev->irq, dev);
 241         pci_disable_msi(pdev);
 242
 243         if (hw->mem_addr)
 244                 pci_iounmap(pdev, hw->mem_addr);
 245
 246         mei_deregister(dev);
 247
 248         kfree(dev);
 249
 250         pci_release_regions(pdev);
 251         pci_disable_device(pdev);
 252
 253
 254 }
 255 #ifdef CONFIG_PM
 256 static int mei_me_pci_suspend(struct device *device)
 257 {
 258         struct pci_dev *pdev = to_pci_dev(device);
 259         struct mei_device *dev = pci_get_drvdata(pdev);
 260
 261         if (!dev)
 262                 return -ENODEV;
 263
 264         dev_err(&pdev->dev, "suspend\n");
 265
 266         mei_stop(dev);
 267
 268         mei_disable_interrupts(dev);
 269
 270         free_irq(pdev->irq, dev);
 271         pci_disable_msi(pdev);
 272
 273         return 0;
 274 }
 275
 276 static int mei_me_pci_resume(struct device *device)
 277 {
 278         struct pci_dev *pdev = to_pci_dev(device);
 279         struct mei_device *dev;
 280         int err;
 281
 282         dev = pci_get_drvdata(pdev);
 283         if (!dev)
 284                 return -ENODEV;
 285
 286         pci_enable_msi(pdev);
 287
 288         /* request and enable interrupt */
 289         if (pci_dev_msi_enabled(pdev))
 290                 err = request_threaded_irq(pdev->irq,
 291                         NULL,
 292                         mei_me_irq_thread_handler,
 293                         IRQF_ONESHOT, KBUILD_MODNAME, dev);
 294         else
 295                 err = request_threaded_irq(pdev->irq,
 296                         mei_me_irq_quick_handler,
 297                         mei_me_irq_thread_handler,
 298                         IRQF_SHARED, KBUILD_MODNAME, dev);
 299
 300         if (err) {
 301                 dev_err(&pdev->dev, "request_threaded_irq failed: irq = %d.\n",
 302                                 pdev->irq);
 303                 return err;
 304         }
 305
 306         mutex_lock(&dev->device_lock);
 307         dev->dev_state = MEI_DEV_POWER_UP;
 308         mei_clear_interrupts(dev);
 309         mei_reset(dev, 1);
 310         mutex_unlock(&dev->device_lock);
 311
 312         /* Start timer if stopped in suspend */
 313         schedule_delayed_work(&dev->timer_work, HZ);
 314
 315         return err;
 316 }
 317 static SIMPLE_DEV_PM_OPS(mei_me_pm_ops, mei_me_pci_suspend, mei_me_pci_resume);
 318 #define MEI_ME_PM_OPS   (&mei_me_pm_ops)
 319 #else
 320 #define MEI_ME_PM_OPS   NULL
 321 #endif /* CONFIG_PM */
 322 /*
 323  *  PCI driver structure
 324  */
 325 static struct pci_driver mei_me_driver = {
 326         .name = KBUILD_MODNAME,
 327         .id_table = mei_me_pci_tbl,
 328         .probe = mei_me_probe,
 329         .remove = mei_me_remove,
 330         .shutdown = mei_me_remove,
 331         .driver.pm = MEI_ME_PM_OPS,
 332 };
 333
 334 module_pci_driver(mei_me_driver);
 335
 336 MODULE_AUTHOR("Intel Corporation");
 337 MODULE_DESCRIPTION("Intel(R) Management Engine Interface");
 338 MODULE_LICENSE("GPL v2");