2 * linux/drivers/mmc/host/mmci.c - ARM PrimeCell MMCI PL180/1 driver
4 * Copyright (C) 2003 Deep Blue Solutions, Ltd, All Rights Reserved.
5 * Copyright (C) 2010 ST-Ericsson AB.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 #include <linux/module.h>
12 #include <linux/moduleparam.h>
13 #include <linux/init.h>
14 #include <linux/ioport.h>
15 #include <linux/device.h>
16 #include <linux/interrupt.h>
17 #include <linux/delay.h>
18 #include <linux/err.h>
19 #include <linux/highmem.h>
20 #include <linux/log2.h>
21 #include <linux/mmc/host.h>
22 #include <linux/mmc/card.h>
23 #include <linux/amba/bus.h>
24 #include <linux/clk.h>
25 #include <linux/scatterlist.h>
26 #include <linux/gpio.h>
27 #include <linux/amba/mmci.h>
28 #include <linux/regulator/consumer.h>
30 #include <asm/div64.h>
32 #include <asm/sizes.h>
36 #define DRIVER_NAME "mmci-pl18x"
38 static unsigned int fmax
= 515633;
41 * struct variant_data - MMCI variant-specific quirks
42 * @clkreg: default value for MCICLOCK register
43 * @clkreg_enable: enable value for MMCICLOCK register
44 * @datalength_bits: number of bits in the MMCIDATALENGTH register
45 * @fifosize: number of bytes that can be written when MMCI_TXFIFOEMPTY
46 * is asserted (likewise for RX)
47 * @fifohalfsize: number of bytes that can be written when MCI_TXFIFOHALFEMPTY
48 * is asserted (likewise for RX)
49 * @sdio: variant supports SDIO
50 * @st_clkdiv: true if using a ST-specific clock divider algorithm
54 unsigned int clkreg_enable
;
55 unsigned int datalength_bits
;
56 unsigned int fifosize
;
57 unsigned int fifohalfsize
;
62 static struct variant_data variant_arm
= {
64 .fifohalfsize
= 8 * 4,
65 .datalength_bits
= 16,
68 static struct variant_data variant_u300
= {
70 .fifohalfsize
= 8 * 4,
71 .clkreg_enable
= 1 << 13, /* HWFCEN */
72 .datalength_bits
= 16,
76 static struct variant_data variant_ux500
= {
78 .fifohalfsize
= 8 * 4,
79 .clkreg
= MCI_CLK_ENABLE
,
80 .clkreg_enable
= 1 << 14, /* HWFCEN */
81 .datalength_bits
= 24,
87 * This must be called with host->lock held
89 static void mmci_set_clkreg(struct mmci_host
*host
, unsigned int desired
)
91 struct variant_data
*variant
= host
->variant
;
92 u32 clk
= variant
->clkreg
;
95 if (desired
>= host
->mclk
) {
97 host
->cclk
= host
->mclk
;
98 } else if (variant
->st_clkdiv
) {
100 * DB8500 TRM says f = mclk / (clkdiv + 2)
101 * => clkdiv = (mclk / f) - 2
102 * Round the divider up so we don't exceed the max
105 clk
= DIV_ROUND_UP(host
->mclk
, desired
) - 2;
108 host
->cclk
= host
->mclk
/ (clk
+ 2);
111 * PL180 TRM says f = mclk / (2 * (clkdiv + 1))
112 * => clkdiv = mclk / (2 * f) - 1
114 clk
= host
->mclk
/ (2 * desired
) - 1;
117 host
->cclk
= host
->mclk
/ (2 * (clk
+ 1));
120 clk
|= variant
->clkreg_enable
;
121 clk
|= MCI_CLK_ENABLE
;
122 /* This hasn't proven to be worthwhile */
123 /* clk |= MCI_CLK_PWRSAVE; */
126 if (host
->mmc
->ios
.bus_width
== MMC_BUS_WIDTH_4
)
128 if (host
->mmc
->ios
.bus_width
== MMC_BUS_WIDTH_8
)
129 clk
|= MCI_ST_8BIT_BUS
;
131 writel(clk
, host
->base
+ MMCICLOCK
);
135 mmci_request_end(struct mmci_host
*host
, struct mmc_request
*mrq
)
137 writel(0, host
->base
+ MMCICOMMAND
);
145 mrq
->data
->bytes_xfered
= host
->data_xfered
;
148 * Need to drop the host lock here; mmc_request_done may call
149 * back into the driver...
151 spin_unlock(&host
->lock
);
152 mmc_request_done(host
->mmc
, mrq
);
153 spin_lock(&host
->lock
);
156 static void mmci_set_mask1(struct mmci_host
*host
, unsigned int mask
)
158 void __iomem
*base
= host
->base
;
160 if (host
->singleirq
) {
161 unsigned int mask0
= readl(base
+ MMCIMASK0
);
163 mask0
&= ~MCI_IRQ1MASK
;
166 writel(mask0
, base
+ MMCIMASK0
);
169 writel(mask
, base
+ MMCIMASK1
);
172 static void mmci_stop_data(struct mmci_host
*host
)
174 writel(0, host
->base
+ MMCIDATACTRL
);
175 mmci_set_mask1(host
, 0);
179 static void mmci_init_sg(struct mmci_host
*host
, struct mmc_data
*data
)
181 unsigned int flags
= SG_MITER_ATOMIC
;
183 if (data
->flags
& MMC_DATA_READ
)
184 flags
|= SG_MITER_TO_SG
;
186 flags
|= SG_MITER_FROM_SG
;
188 sg_miter_start(&host
->sg_miter
, data
->sg
, data
->sg_len
, flags
);
191 static void mmci_start_data(struct mmci_host
*host
, struct mmc_data
*data
)
193 struct variant_data
*variant
= host
->variant
;
194 unsigned int datactrl
, timeout
, irqmask
;
195 unsigned long long clks
;
199 dev_dbg(mmc_dev(host
->mmc
), "blksz %04x blks %04x flags %08x\n",
200 data
->blksz
, data
->blocks
, data
->flags
);
203 host
->size
= data
->blksz
* data
->blocks
;
204 host
->data_xfered
= 0;
206 mmci_init_sg(host
, data
);
208 clks
= (unsigned long long)data
->timeout_ns
* host
->cclk
;
209 do_div(clks
, 1000000000UL);
211 timeout
= data
->timeout_clks
+ (unsigned int)clks
;
214 writel(timeout
, base
+ MMCIDATATIMER
);
215 writel(host
->size
, base
+ MMCIDATALENGTH
);
217 blksz_bits
= ffs(data
->blksz
) - 1;
218 BUG_ON(1 << blksz_bits
!= data
->blksz
);
220 datactrl
= MCI_DPSM_ENABLE
| blksz_bits
<< 4;
221 if (data
->flags
& MMC_DATA_READ
) {
222 datactrl
|= MCI_DPSM_DIRECTION
;
223 irqmask
= MCI_RXFIFOHALFFULLMASK
;
226 * If we have less than a FIFOSIZE of bytes to transfer,
227 * trigger a PIO interrupt as soon as any data is available.
229 if (host
->size
< variant
->fifosize
)
230 irqmask
|= MCI_RXDATAAVLBLMASK
;
233 * We don't actually need to include "FIFO empty" here
234 * since its implicit in "FIFO half empty".
236 irqmask
= MCI_TXFIFOHALFEMPTYMASK
;
239 /* The ST Micro variants has a special bit to enable SDIO */
240 if (variant
->sdio
&& host
->mmc
->card
)
241 if (mmc_card_sdio(host
->mmc
->card
))
242 datactrl
|= MCI_ST_DPSM_SDIOEN
;
244 writel(datactrl
, base
+ MMCIDATACTRL
);
245 writel(readl(base
+ MMCIMASK0
) & ~MCI_DATAENDMASK
, base
+ MMCIMASK0
);
246 mmci_set_mask1(host
, irqmask
);
250 mmci_start_command(struct mmci_host
*host
, struct mmc_command
*cmd
, u32 c
)
252 void __iomem
*base
= host
->base
;
254 dev_dbg(mmc_dev(host
->mmc
), "op %02x arg %08x flags %08x\n",
255 cmd
->opcode
, cmd
->arg
, cmd
->flags
);
257 if (readl(base
+ MMCICOMMAND
) & MCI_CPSM_ENABLE
) {
258 writel(0, base
+ MMCICOMMAND
);
262 c
|= cmd
->opcode
| MCI_CPSM_ENABLE
;
263 if (cmd
->flags
& MMC_RSP_PRESENT
) {
264 if (cmd
->flags
& MMC_RSP_136
)
265 c
|= MCI_CPSM_LONGRSP
;
266 c
|= MCI_CPSM_RESPONSE
;
269 c
|= MCI_CPSM_INTERRUPT
;
273 writel(cmd
->arg
, base
+ MMCIARGUMENT
);
274 writel(c
, base
+ MMCICOMMAND
);
278 mmci_data_irq(struct mmci_host
*host
, struct mmc_data
*data
,
281 /* First check for errors */
282 if (status
& (MCI_DATACRCFAIL
|MCI_DATATIMEOUT
|MCI_TXUNDERRUN
|MCI_RXOVERRUN
)) {
285 /* Calculate how far we are into the transfer */
286 remain
= readl(host
->base
+ MMCIDATACNT
) << 2;
287 success
= data
->blksz
* data
->blocks
- remain
;
289 dev_dbg(mmc_dev(host
->mmc
), "MCI ERROR IRQ (status %08x)\n", status
);
290 if (status
& MCI_DATACRCFAIL
) {
291 /* Last block was not successful */
292 host
->data_xfered
= ((success
/ data
->blksz
) - 1 * data
->blksz
);
293 data
->error
= -EILSEQ
;
294 } else if (status
& MCI_DATATIMEOUT
) {
295 host
->data_xfered
= success
;
296 data
->error
= -ETIMEDOUT
;
297 } else if (status
& (MCI_TXUNDERRUN
|MCI_RXOVERRUN
)) {
298 host
->data_xfered
= success
;
303 * We hit an error condition. Ensure that any data
304 * partially written to a page is properly coherent.
306 if (data
->flags
& MMC_DATA_READ
) {
307 struct sg_mapping_iter
*sg_miter
= &host
->sg_miter
;
310 local_irq_save(flags
);
311 if (sg_miter_next(sg_miter
)) {
312 flush_dcache_page(sg_miter
->page
);
313 sg_miter_stop(sg_miter
);
315 local_irq_restore(flags
);
319 if (status
& MCI_DATABLOCKEND
)
320 dev_err(mmc_dev(host
->mmc
), "stray MCI_DATABLOCKEND interrupt\n");
322 if (status
& MCI_DATAEND
) {
323 mmci_stop_data(host
);
326 /* The error clause is handled above, success! */
327 host
->data_xfered
+= data
->blksz
* data
->blocks
;
330 mmci_request_end(host
, data
->mrq
);
332 mmci_start_command(host
, data
->stop
, 0);
338 mmci_cmd_irq(struct mmci_host
*host
, struct mmc_command
*cmd
,
341 void __iomem
*base
= host
->base
;
345 if (status
& MCI_CMDTIMEOUT
) {
346 cmd
->error
= -ETIMEDOUT
;
347 } else if (status
& MCI_CMDCRCFAIL
&& cmd
->flags
& MMC_RSP_CRC
) {
348 cmd
->error
= -EILSEQ
;
350 cmd
->resp
[0] = readl(base
+ MMCIRESPONSE0
);
351 cmd
->resp
[1] = readl(base
+ MMCIRESPONSE1
);
352 cmd
->resp
[2] = readl(base
+ MMCIRESPONSE2
);
353 cmd
->resp
[3] = readl(base
+ MMCIRESPONSE3
);
356 if (!cmd
->data
|| cmd
->error
) {
358 mmci_stop_data(host
);
359 mmci_request_end(host
, cmd
->mrq
);
360 } else if (!(cmd
->data
->flags
& MMC_DATA_READ
)) {
361 mmci_start_data(host
, cmd
->data
);
365 static int mmci_pio_read(struct mmci_host
*host
, char *buffer
, unsigned int remain
)
367 void __iomem
*base
= host
->base
;
370 int host_remain
= host
->size
;
373 int count
= host_remain
- (readl(base
+ MMCIFIFOCNT
) << 2);
381 readsl(base
+ MMCIFIFO
, ptr
, count
>> 2);
385 host_remain
-= count
;
390 status
= readl(base
+ MMCISTATUS
);
391 } while (status
& MCI_RXDATAAVLBL
);
396 static int mmci_pio_write(struct mmci_host
*host
, char *buffer
, unsigned int remain
, u32 status
)
398 struct variant_data
*variant
= host
->variant
;
399 void __iomem
*base
= host
->base
;
403 unsigned int count
, maxcnt
;
405 maxcnt
= status
& MCI_TXFIFOEMPTY
?
406 variant
->fifosize
: variant
->fifohalfsize
;
407 count
= min(remain
, maxcnt
);
410 * The ST Micro variant for SDIO transfer sizes
411 * less then 8 bytes should have clock H/W flow
415 mmc_card_sdio(host
->mmc
->card
)) {
417 writel(readl(host
->base
+ MMCICLOCK
) &
418 ~variant
->clkreg_enable
,
419 host
->base
+ MMCICLOCK
);
421 writel(readl(host
->base
+ MMCICLOCK
) |
422 variant
->clkreg_enable
,
423 host
->base
+ MMCICLOCK
);
427 * SDIO especially may want to send something that is
428 * not divisible by 4 (as opposed to card sectors
429 * etc), and the FIFO only accept full 32-bit writes.
430 * So compensate by adding +3 on the count, a single
431 * byte become a 32bit write, 7 bytes will be two
434 writesl(base
+ MMCIFIFO
, ptr
, (count
+ 3) >> 2);
442 status
= readl(base
+ MMCISTATUS
);
443 } while (status
& MCI_TXFIFOHALFEMPTY
);
449 * PIO data transfer IRQ handler.
451 static irqreturn_t
mmci_pio_irq(int irq
, void *dev_id
)
453 struct mmci_host
*host
= dev_id
;
454 struct sg_mapping_iter
*sg_miter
= &host
->sg_miter
;
455 struct variant_data
*variant
= host
->variant
;
456 void __iomem
*base
= host
->base
;
460 status
= readl(base
+ MMCISTATUS
);
462 dev_dbg(mmc_dev(host
->mmc
), "irq1 (pio) %08x\n", status
);
464 local_irq_save(flags
);
467 unsigned int remain
, len
;
471 * For write, we only need to test the half-empty flag
472 * here - if the FIFO is completely empty, then by
473 * definition it is more than half empty.
475 * For read, check for data available.
477 if (!(status
& (MCI_TXFIFOHALFEMPTY
|MCI_RXDATAAVLBL
)))
480 if (!sg_miter_next(sg_miter
))
483 buffer
= sg_miter
->addr
;
484 remain
= sg_miter
->length
;
487 if (status
& MCI_RXACTIVE
)
488 len
= mmci_pio_read(host
, buffer
, remain
);
489 if (status
& MCI_TXACTIVE
)
490 len
= mmci_pio_write(host
, buffer
, remain
, status
);
492 sg_miter
->consumed
= len
;
500 if (status
& MCI_RXACTIVE
)
501 flush_dcache_page(sg_miter
->page
);
503 status
= readl(base
+ MMCISTATUS
);
506 sg_miter_stop(sg_miter
);
508 local_irq_restore(flags
);
511 * If we're nearing the end of the read, switch to
512 * "any data available" mode.
514 if (status
& MCI_RXACTIVE
&& host
->size
< variant
->fifosize
)
515 mmci_set_mask1(host
, MCI_RXDATAAVLBLMASK
);
518 * If we run out of data, disable the data IRQs; this
519 * prevents a race where the FIFO becomes empty before
520 * the chip itself has disabled the data path, and
521 * stops us racing with our data end IRQ.
523 if (host
->size
== 0) {
524 mmci_set_mask1(host
, 0);
525 writel(readl(base
+ MMCIMASK0
) | MCI_DATAENDMASK
, base
+ MMCIMASK0
);
532 * Handle completion of command and data transfers.
534 static irqreturn_t
mmci_irq(int irq
, void *dev_id
)
536 struct mmci_host
*host
= dev_id
;
540 spin_lock(&host
->lock
);
543 struct mmc_command
*cmd
;
544 struct mmc_data
*data
;
546 status
= readl(host
->base
+ MMCISTATUS
);
548 if (host
->singleirq
) {
549 if (status
& readl(host
->base
+ MMCIMASK1
))
550 mmci_pio_irq(irq
, dev_id
);
552 status
&= ~MCI_IRQ1MASK
;
555 status
&= readl(host
->base
+ MMCIMASK0
);
556 writel(status
, host
->base
+ MMCICLEAR
);
558 dev_dbg(mmc_dev(host
->mmc
), "irq0 (data+cmd) %08x\n", status
);
561 if (status
& (MCI_DATACRCFAIL
|MCI_DATATIMEOUT
|MCI_TXUNDERRUN
|
562 MCI_RXOVERRUN
|MCI_DATAEND
|MCI_DATABLOCKEND
) && data
)
563 mmci_data_irq(host
, data
, status
);
566 if (status
& (MCI_CMDCRCFAIL
|MCI_CMDTIMEOUT
|MCI_CMDSENT
|MCI_CMDRESPEND
) && cmd
)
567 mmci_cmd_irq(host
, cmd
, status
);
572 spin_unlock(&host
->lock
);
574 return IRQ_RETVAL(ret
);
577 static void mmci_request(struct mmc_host
*mmc
, struct mmc_request
*mrq
)
579 struct mmci_host
*host
= mmc_priv(mmc
);
582 WARN_ON(host
->mrq
!= NULL
);
584 if (mrq
->data
&& !is_power_of_2(mrq
->data
->blksz
)) {
585 dev_err(mmc_dev(mmc
), "unsupported block size (%d bytes)\n",
587 mrq
->cmd
->error
= -EINVAL
;
588 mmc_request_done(mmc
, mrq
);
592 spin_lock_irqsave(&host
->lock
, flags
);
596 if (mrq
->data
&& mrq
->data
->flags
& MMC_DATA_READ
)
597 mmci_start_data(host
, mrq
->data
);
599 mmci_start_command(host
, mrq
->cmd
, 0);
601 spin_unlock_irqrestore(&host
->lock
, flags
);
604 static void mmci_set_ios(struct mmc_host
*mmc
, struct mmc_ios
*ios
)
606 struct mmci_host
*host
= mmc_priv(mmc
);
611 switch (ios
->power_mode
) {
614 ret
= mmc_regulator_set_ocr(mmc
, host
->vcc
, 0);
618 ret
= mmc_regulator_set_ocr(mmc
, host
->vcc
, ios
->vdd
);
620 dev_err(mmc_dev(mmc
), "unable to set OCR\n");
622 * The .set_ios() function in the mmc_host_ops
623 * struct return void, and failing to set the
624 * power should be rare so we print an error
630 if (host
->plat
->vdd_handler
)
631 pwr
|= host
->plat
->vdd_handler(mmc_dev(mmc
), ios
->vdd
,
633 /* The ST version does not have this, fall through to POWER_ON */
634 if (host
->hw_designer
!= AMBA_VENDOR_ST
) {
643 if (ios
->bus_mode
== MMC_BUSMODE_OPENDRAIN
) {
644 if (host
->hw_designer
!= AMBA_VENDOR_ST
)
648 * The ST Micro variant use the ROD bit for something
649 * else and only has OD (Open Drain).
655 spin_lock_irqsave(&host
->lock
, flags
);
657 mmci_set_clkreg(host
, ios
->clock
);
659 if (host
->pwr
!= pwr
) {
661 writel(pwr
, host
->base
+ MMCIPOWER
);
664 spin_unlock_irqrestore(&host
->lock
, flags
);
667 static int mmci_get_ro(struct mmc_host
*mmc
)
669 struct mmci_host
*host
= mmc_priv(mmc
);
671 if (host
->gpio_wp
== -ENOSYS
)
674 return gpio_get_value_cansleep(host
->gpio_wp
);
677 static int mmci_get_cd(struct mmc_host
*mmc
)
679 struct mmci_host
*host
= mmc_priv(mmc
);
680 struct mmci_platform_data
*plat
= host
->plat
;
683 if (host
->gpio_cd
== -ENOSYS
) {
685 return 1; /* Assume always present */
687 status
= plat
->status(mmc_dev(host
->mmc
));
689 status
= !!gpio_get_value_cansleep(host
->gpio_cd
)
693 * Use positive logic throughout - status is zero for no card,
694 * non-zero for card inserted.
699 static irqreturn_t
mmci_cd_irq(int irq
, void *dev_id
)
701 struct mmci_host
*host
= dev_id
;
703 mmc_detect_change(host
->mmc
, msecs_to_jiffies(500));
708 static const struct mmc_host_ops mmci_ops
= {
709 .request
= mmci_request
,
710 .set_ios
= mmci_set_ios
,
711 .get_ro
= mmci_get_ro
,
712 .get_cd
= mmci_get_cd
,
715 static int __devinit
mmci_probe(struct amba_device
*dev
, struct amba_id
*id
)
717 struct mmci_platform_data
*plat
= dev
->dev
.platform_data
;
718 struct variant_data
*variant
= id
->data
;
719 struct mmci_host
*host
;
720 struct mmc_host
*mmc
;
723 /* must have platform data */
729 ret
= amba_request_regions(dev
, DRIVER_NAME
);
733 mmc
= mmc_alloc_host(sizeof(struct mmci_host
), &dev
->dev
);
739 host
= mmc_priv(mmc
);
742 host
->gpio_wp
= -ENOSYS
;
743 host
->gpio_cd
= -ENOSYS
;
744 host
->gpio_cd_irq
= -1;
746 host
->hw_designer
= amba_manf(dev
);
747 host
->hw_revision
= amba_rev(dev
);
748 dev_dbg(mmc_dev(mmc
), "designer ID = 0x%02x\n", host
->hw_designer
);
749 dev_dbg(mmc_dev(mmc
), "revision = 0x%01x\n", host
->hw_revision
);
751 host
->clk
= clk_get(&dev
->dev
, NULL
);
752 if (IS_ERR(host
->clk
)) {
753 ret
= PTR_ERR(host
->clk
);
758 ret
= clk_enable(host
->clk
);
763 host
->variant
= variant
;
764 host
->mclk
= clk_get_rate(host
->clk
);
766 * According to the spec, mclk is max 100 MHz,
767 * so we try to adjust the clock down to this,
770 if (host
->mclk
> 100000000) {
771 ret
= clk_set_rate(host
->clk
, 100000000);
774 host
->mclk
= clk_get_rate(host
->clk
);
775 dev_dbg(mmc_dev(mmc
), "eventual mclk rate: %u Hz\n",
778 host
->base
= ioremap(dev
->res
.start
, resource_size(&dev
->res
));
784 mmc
->ops
= &mmci_ops
;
785 mmc
->f_min
= (host
->mclk
+ 511) / 512;
787 * If the platform data supplies a maximum operating
788 * frequency, this takes precedence. Else, we fall back
789 * to using the module parameter, which has a (low)
790 * default value in case it is not specified. Either
791 * value must not exceed the clock rate into the block,
795 mmc
->f_max
= min(host
->mclk
, plat
->f_max
);
797 mmc
->f_max
= min(host
->mclk
, fmax
);
798 dev_dbg(mmc_dev(mmc
), "clocking block at %u Hz\n", mmc
->f_max
);
800 #ifdef CONFIG_REGULATOR
801 /* If we're using the regulator framework, try to fetch a regulator */
802 host
->vcc
= regulator_get(&dev
->dev
, "vmmc");
803 if (IS_ERR(host
->vcc
))
806 int mask
= mmc_regulator_get_ocrmask(host
->vcc
);
809 dev_err(&dev
->dev
, "error getting OCR mask (%d)\n",
812 host
->mmc
->ocr_avail
= (u32
) mask
;
815 "Provided ocr_mask/setpower will not be used "
816 "(using regulator instead)\n");
820 /* Fall back to platform data if no regulator is found */
821 if (host
->vcc
== NULL
)
822 mmc
->ocr_avail
= plat
->ocr_mask
;
823 mmc
->caps
= plat
->capabilities
;
828 mmc
->max_segs
= NR_SG
;
831 * Since only a certain number of bits are valid in the data length
832 * register, we must ensure that we don't exceed 2^num-1 bytes in a
835 mmc
->max_req_size
= (1 << variant
->datalength_bits
) - 1;
838 * Set the maximum segment size. Since we aren't doing DMA
839 * (yet) we are only limited by the data length register.
841 mmc
->max_seg_size
= mmc
->max_req_size
;
844 * Block size can be up to 2048 bytes, but must be a power of two.
846 mmc
->max_blk_size
= 2048;
849 * No limit on the number of blocks transferred.
851 mmc
->max_blk_count
= mmc
->max_req_size
;
853 spin_lock_init(&host
->lock
);
855 writel(0, host
->base
+ MMCIMASK0
);
856 writel(0, host
->base
+ MMCIMASK1
);
857 writel(0xfff, host
->base
+ MMCICLEAR
);
859 if (gpio_is_valid(plat
->gpio_cd
)) {
860 ret
= gpio_request(plat
->gpio_cd
, DRIVER_NAME
" (cd)");
862 ret
= gpio_direction_input(plat
->gpio_cd
);
864 host
->gpio_cd
= plat
->gpio_cd
;
865 else if (ret
!= -ENOSYS
)
868 ret
= request_any_context_irq(gpio_to_irq(plat
->gpio_cd
),
870 DRIVER_NAME
" (cd)", host
);
872 host
->gpio_cd_irq
= gpio_to_irq(plat
->gpio_cd
);
874 if (gpio_is_valid(plat
->gpio_wp
)) {
875 ret
= gpio_request(plat
->gpio_wp
, DRIVER_NAME
" (wp)");
877 ret
= gpio_direction_input(plat
->gpio_wp
);
879 host
->gpio_wp
= plat
->gpio_wp
;
880 else if (ret
!= -ENOSYS
)
884 if ((host
->plat
->status
|| host
->gpio_cd
!= -ENOSYS
)
885 && host
->gpio_cd_irq
< 0)
886 mmc
->caps
|= MMC_CAP_NEEDS_POLL
;
888 ret
= request_irq(dev
->irq
[0], mmci_irq
, IRQF_SHARED
, DRIVER_NAME
" (cmd)", host
);
892 if (dev
->irq
[1] == NO_IRQ
)
893 host
->singleirq
= true;
895 ret
= request_irq(dev
->irq
[1], mmci_pio_irq
, IRQF_SHARED
,
896 DRIVER_NAME
" (pio)", host
);
901 writel(MCI_IRQENABLE
, host
->base
+ MMCIMASK0
);
903 amba_set_drvdata(dev
, mmc
);
905 dev_info(&dev
->dev
, "%s: PL%03x rev%u at 0x%08llx irq %d,%d\n",
906 mmc_hostname(mmc
), amba_part(dev
), amba_rev(dev
),
907 (unsigned long long)dev
->res
.start
, dev
->irq
[0], dev
->irq
[1]);
914 free_irq(dev
->irq
[0], host
);
916 if (host
->gpio_wp
!= -ENOSYS
)
917 gpio_free(host
->gpio_wp
);
919 if (host
->gpio_cd_irq
>= 0)
920 free_irq(host
->gpio_cd_irq
, host
);
921 if (host
->gpio_cd
!= -ENOSYS
)
922 gpio_free(host
->gpio_cd
);
926 clk_disable(host
->clk
);
932 amba_release_regions(dev
);
937 static int __devexit
mmci_remove(struct amba_device
*dev
)
939 struct mmc_host
*mmc
= amba_get_drvdata(dev
);
941 amba_set_drvdata(dev
, NULL
);
944 struct mmci_host
*host
= mmc_priv(mmc
);
946 mmc_remove_host(mmc
);
948 writel(0, host
->base
+ MMCIMASK0
);
949 writel(0, host
->base
+ MMCIMASK1
);
951 writel(0, host
->base
+ MMCICOMMAND
);
952 writel(0, host
->base
+ MMCIDATACTRL
);
954 free_irq(dev
->irq
[0], host
);
955 if (!host
->singleirq
)
956 free_irq(dev
->irq
[1], host
);
958 if (host
->gpio_wp
!= -ENOSYS
)
959 gpio_free(host
->gpio_wp
);
960 if (host
->gpio_cd_irq
>= 0)
961 free_irq(host
->gpio_cd_irq
, host
);
962 if (host
->gpio_cd
!= -ENOSYS
)
963 gpio_free(host
->gpio_cd
);
966 clk_disable(host
->clk
);
970 mmc_regulator_set_ocr(mmc
, host
->vcc
, 0);
971 regulator_put(host
->vcc
);
975 amba_release_regions(dev
);
982 static int mmci_suspend(struct amba_device
*dev
, pm_message_t state
)
984 struct mmc_host
*mmc
= amba_get_drvdata(dev
);
988 struct mmci_host
*host
= mmc_priv(mmc
);
990 ret
= mmc_suspend_host(mmc
);
992 writel(0, host
->base
+ MMCIMASK0
);
998 static int mmci_resume(struct amba_device
*dev
)
1000 struct mmc_host
*mmc
= amba_get_drvdata(dev
);
1004 struct mmci_host
*host
= mmc_priv(mmc
);
1006 writel(MCI_IRQENABLE
, host
->base
+ MMCIMASK0
);
1008 ret
= mmc_resume_host(mmc
);
1014 #define mmci_suspend NULL
1015 #define mmci_resume NULL
1018 static struct amba_id mmci_ids
[] = {
1022 .data
= &variant_arm
,
1027 .data
= &variant_arm
,
1029 /* ST Micro variants */
1033 .data
= &variant_u300
,
1038 .data
= &variant_u300
,
1043 .data
= &variant_ux500
,
1048 static struct amba_driver mmci_driver
= {
1050 .name
= DRIVER_NAME
,
1052 .probe
= mmci_probe
,
1053 .remove
= __devexit_p(mmci_remove
),
1054 .suspend
= mmci_suspend
,
1055 .resume
= mmci_resume
,
1056 .id_table
= mmci_ids
,
1059 static int __init
mmci_init(void)
1061 return amba_driver_register(&mmci_driver
);
1064 static void __exit
mmci_exit(void)
1066 amba_driver_unregister(&mmci_driver
);
1069 module_init(mmci_init
);
1070 module_exit(mmci_exit
);
1071 module_param(fmax
, uint
, 0444);
1073 MODULE_DESCRIPTION("ARM PrimeCell PL180/181 Multimedia Card Interface driver");
1074 MODULE_LICENSE("GPL");