drivers/mmc/host/sdhci-esdhc-imx.c

   1 /*
   2  * Freescale eSDHC i.MX controller driver for the platform bus.
   3  *
   4  * derived from the OF-version.
   5  *
   6  * Copyright (c) 2010 Pengutronix e.K.
   7  *   Author: Wolfram Sang <w.sang@pengutronix.de>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License.
  12  */
  13
  14 #include <linux/io.h>
  15 #include <linux/delay.h>
  16 #include <linux/err.h>
  17 #include <linux/clk.h>
  18 #include <linux/gpio.h>
  19 #include <linux/module.h>
  20 #include <linux/slab.h>
  21 #include <linux/mmc/host.h>
  22 #include <linux/mmc/mmc.h>
  23 #include <linux/mmc/sdio.h>
  24 #include <linux/of.h>
  25 #include <linux/of_device.h>
  26 #include <linux/of_gpio.h>
  27 #include <mach/esdhc.h>
  28 #include "sdhci-pltfm.h"
  29 #include "sdhci-esdhc.h"
  30
  31 #define SDHCI_CTRL_D3CD                 0x08
  32 /* VENDOR SPEC register */
  33 #define SDHCI_VENDOR_SPEC               0xC0
  34 #define  SDHCI_VENDOR_SPEC_SDIO_QUIRK   0x00000002
  35 #define SDHCI_MIX_CTRL                  0x48
  36
  37 /*
  38  * There is an INT DMA ERR mis-match between eSDHC and STD SDHC SPEC:
  39  * Bit25 is used in STD SPEC, and is reserved in fsl eSDHC design,
  40  * but bit28 is used as the INT DMA ERR in fsl eSDHC design.
  41  * Define this macro DMA error INT for fsl eSDHC
  42  */
  43 #define SDHCI_INT_VENDOR_SPEC_DMA_ERR   0x10000000
  44
  45 /*
  46  * The CMDTYPE of the CMD register (offset 0xE) should be set to
  47  * "11" when the STOP CMD12 is issued on imx53 to abort one
  48  * open ended multi-blk IO. Otherwise the TC INT wouldn't
  49  * be generated.
  50  * In exact block transfer, the controller doesn't complete the
  51  * operations automatically as required at the end of the
  52  * transfer and remains on hold if the abort command is not sent.
  53  * As a result, the TC flag is not asserted and SW  received timeout
  54  * exeception. Bit1 of Vendor Spec registor is used to fix it.
  55  */
  56 #define ESDHC_FLAG_MULTIBLK_NO_INT      (1 << 1)
  57
  58 enum imx_esdhc_type {
  59         IMX25_ESDHC,
  60         IMX35_ESDHC,
  61         IMX51_ESDHC,
  62         IMX53_ESDHC,
  63         IMX6Q_USDHC,
  64 };
  65
  66 struct pltfm_imx_data {
  67         int flags;
  68         u32 scratchpad;
  69         enum imx_esdhc_type devtype;
  70         struct esdhc_platform_data boarddata;
  71 };
  72
  73 static struct platform_device_id imx_esdhc_devtype[] = {
  74         {
  75                 .name = "sdhci-esdhc-imx25",
  76                 .driver_data = IMX25_ESDHC,
  77         }, {
  78                 .name = "sdhci-esdhc-imx35",
  79                 .driver_data = IMX35_ESDHC,
  80         }, {
  81                 .name = "sdhci-esdhc-imx51",
  82                 .driver_data = IMX51_ESDHC,
  83         }, {
  84                 .name = "sdhci-esdhc-imx53",
  85                 .driver_data = IMX53_ESDHC,
  86         }, {
  87                 .name = "sdhci-usdhc-imx6q",
  88                 .driver_data = IMX6Q_USDHC,
  89         }, {
  90                 /* sentinel */
  91         }
  92 };
  93 MODULE_DEVICE_TABLE(platform, imx_esdhc_devtype);
  94
  95 static const struct of_device_id imx_esdhc_dt_ids[] = {
  96         { .compatible = "fsl,imx25-esdhc", .data = &imx_esdhc_devtype[IMX25_ESDHC], },
  97         { .compatible = "fsl,imx35-esdhc", .data = &imx_esdhc_devtype[IMX35_ESDHC], },
  98         { .compatible = "fsl,imx51-esdhc", .data = &imx_esdhc_devtype[IMX51_ESDHC], },
  99         { .compatible = "fsl,imx53-esdhc", .data = &imx_esdhc_devtype[IMX53_ESDHC], },
 100         { .compatible = "fsl,imx6q-usdhc", .data = &imx_esdhc_devtype[IMX6Q_USDHC], },
 101         { /* sentinel */ }
 102 };
 103 MODULE_DEVICE_TABLE(of, imx_esdhc_dt_ids);
 104
 105 static inline int is_imx25_esdhc(struct pltfm_imx_data *data)
 106 {
 107         return data->devtype == IMX25_ESDHC;
 108 }
 109
 110 static inline int is_imx35_esdhc(struct pltfm_imx_data *data)
 111 {
 112         return data->devtype == IMX35_ESDHC;
 113 }
 114
 115 static inline int is_imx51_esdhc(struct pltfm_imx_data *data)
 116 {
 117         return data->devtype == IMX51_ESDHC;
 118 }
 119
 120 static inline int is_imx53_esdhc(struct pltfm_imx_data *data)
 121 {
 122         return data->devtype == IMX53_ESDHC;
 123 }
 124
 125 static inline int is_imx6q_usdhc(struct pltfm_imx_data *data)
 126 {
 127         return data->devtype == IMX6Q_USDHC;
 128 }
 129
 130 static inline void esdhc_clrset_le(struct sdhci_host *host, u32 mask, u32 val, int reg)
 131 {
 132         void __iomem *base = host->ioaddr + (reg & ~0x3);
 133         u32 shift = (reg & 0x3) * 8;
 134
 135         writel(((readl(base) & ~(mask << shift)) | (val << shift)), base);
 136 }
 137
 138 static u32 esdhc_readl_le(struct sdhci_host *host, int reg)
 139 {
 140         struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
 141         struct pltfm_imx_data *imx_data = pltfm_host->priv;
 142         struct esdhc_platform_data *boarddata = &imx_data->boarddata;
 143
 144         /* fake CARD_PRESENT flag */
 145         u32 val = readl(host->ioaddr + reg);
 146
 147         if (unlikely((reg == SDHCI_PRESENT_STATE)
 148                         && gpio_is_valid(boarddata->cd_gpio))) {
 149                 if (gpio_get_value(boarddata->cd_gpio))
 150                         /* no card, if a valid gpio says so... */
 151                         val &= ~SDHCI_CARD_PRESENT;
 152                 else
 153                         /* ... in all other cases assume card is present */
 154                         val |= SDHCI_CARD_PRESENT;
 155         }
 156
 157         if (unlikely(reg == SDHCI_CAPABILITIES)) {
 158                 /* In FSL esdhc IC module, only bit20 is used to indicate the
 159                  * ADMA2 capability of esdhc, but this bit is messed up on
 160                  * some SOCs (e.g. on MX25, MX35 this bit is set, but they
 161                  * don't actually support ADMA2). So set the BROKEN_ADMA
 162                  * uirk on MX25/35 platforms.
 163                  */
 164
 165                 if (val & SDHCI_CAN_DO_ADMA1) {
 166                         val &= ~SDHCI_CAN_DO_ADMA1;
 167                         val |= SDHCI_CAN_DO_ADMA2;
 168                 }
 169         }
 170
 171         if (unlikely(reg == SDHCI_INT_STATUS)) {
 172                 if (val & SDHCI_INT_VENDOR_SPEC_DMA_ERR) {
 173                         val &= ~SDHCI_INT_VENDOR_SPEC_DMA_ERR;
 174                         val |= SDHCI_INT_ADMA_ERROR;
 175                 }
 176         }
 177
 178         return val;
 179 }
 180
 181 static void esdhc_writel_le(struct sdhci_host *host, u32 val, int reg)
 182 {
 183         struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
 184         struct pltfm_imx_data *imx_data = pltfm_host->priv;
 185         struct esdhc_platform_data *boarddata = &imx_data->boarddata;
 186         u32 data;
 187
 188         if (unlikely(reg == SDHCI_INT_ENABLE || reg == SDHCI_SIGNAL_ENABLE)) {
 189                 if (boarddata->cd_type == ESDHC_CD_GPIO)
 190                         /*
 191                          * These interrupts won't work with a custom
 192                          * card_detect gpio (only applied to mx25/35)
 193                          */
 194                         val &= ~(SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT);
 195
 196                 if (val & SDHCI_INT_CARD_INT) {
 197                         /*
 198                          * Clear and then set D3CD bit to avoid missing the
 199                          * card interrupt.  This is a eSDHC controller problem
 200                          * so we need to apply the following workaround: clear
 201                          * and set D3CD bit will make eSDHC re-sample the card
 202                          * interrupt. In case a card interrupt was lost,
 203                          * re-sample it by the following steps.
 204                          */
 205                         data = readl(host->ioaddr + SDHCI_HOST_CONTROL);
 206                         data &= ~SDHCI_CTRL_D3CD;
 207                         writel(data, host->ioaddr + SDHCI_HOST_CONTROL);
 208                         data |= SDHCI_CTRL_D3CD;
 209                         writel(data, host->ioaddr + SDHCI_HOST_CONTROL);
 210                 }
 211         }
 212
 213         if (unlikely((imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT)
 214                                 && (reg == SDHCI_INT_STATUS)
 215                                 && (val & SDHCI_INT_DATA_END))) {
 216                         u32 v;
 217                         v = readl(host->ioaddr + SDHCI_VENDOR_SPEC);
 218                         v &= ~SDHCI_VENDOR_SPEC_SDIO_QUIRK;
 219                         writel(v, host->ioaddr + SDHCI_VENDOR_SPEC);
 220         }
 221
 222         if (unlikely(reg == SDHCI_INT_ENABLE || reg == SDHCI_SIGNAL_ENABLE)) {
 223                 if (val & SDHCI_INT_ADMA_ERROR) {
 224                         val &= ~SDHCI_INT_ADMA_ERROR;
 225                         val |= SDHCI_INT_VENDOR_SPEC_DMA_ERR;
 226                 }
 227         }
 228
 229         writel(val, host->ioaddr + reg);
 230 }
 231
 232 static u16 esdhc_readw_le(struct sdhci_host *host, int reg)
 233 {
 234         if (unlikely(reg == SDHCI_HOST_VERSION)) {
 235                 u16 val = readw(host->ioaddr + (reg ^ 2));
 236                 /*
 237                  * uSDHC supports SDHCI v3.0, but it's encoded as value
 238                  * 0x3 in host controller version register, which violates
 239                  * SDHCI_SPEC_300 definition.  Work it around here.
 240                  */
 241                 if ((val & SDHCI_SPEC_VER_MASK) == 3)
 242                         return --val;
 243         }
 244
 245         return readw(host->ioaddr + reg);
 246 }
 247
 248 static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg)
 249 {
 250         struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
 251         struct pltfm_imx_data *imx_data = pltfm_host->priv;
 252
 253         switch (reg) {
 254         case SDHCI_TRANSFER_MODE:
 255                 /*
 256                  * Postpone this write, we must do it together with a
 257                  * command write that is down below.
 258                  */
 259                 if ((imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT)
 260                                 && (host->cmd->opcode == SD_IO_RW_EXTENDED)
 261                                 && (host->cmd->data->blocks > 1)
 262                                 && (host->cmd->data->flags & MMC_DATA_READ)) {
 263                         u32 v;
 264                         v = readl(host->ioaddr + SDHCI_VENDOR_SPEC);
 265                         v |= SDHCI_VENDOR_SPEC_SDIO_QUIRK;
 266                         writel(v, host->ioaddr + SDHCI_VENDOR_SPEC);
 267                 }
 268                 imx_data->scratchpad = val;
 269                 return;
 270         case SDHCI_COMMAND:
 271                 if ((host->cmd->opcode == MMC_STOP_TRANSMISSION)
 272                         && (imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT))
 273                         val |= SDHCI_CMD_ABORTCMD;
 274
 275                 if (is_imx6q_usdhc(imx_data)) {
 276                         u32 m = readl(host->ioaddr + SDHCI_MIX_CTRL);
 277                         m = imx_data->scratchpad | (m & 0xffff0000);
 278                         writel(m, host->ioaddr + SDHCI_MIX_CTRL);
 279                         writel(val << 16,
 280                                host->ioaddr + SDHCI_TRANSFER_MODE);
 281                 } else {
 282                         writel(val << 16 | imx_data->scratchpad,
 283                                host->ioaddr + SDHCI_TRANSFER_MODE);
 284                 }
 285                 return;
 286         case SDHCI_BLOCK_SIZE:
 287                 val &= ~SDHCI_MAKE_BLKSZ(0x7, 0);
 288                 break;
 289         }
 290         esdhc_clrset_le(host, 0xffff, val, reg);
 291 }
 292
 293 static void esdhc_writeb_le(struct sdhci_host *host, u8 val, int reg)
 294 {
 295         u32 new_val;
 296
 297         switch (reg) {
 298         case SDHCI_POWER_CONTROL:
 299                 /*
 300                  * FSL put some DMA bits here
 301                  * If your board has a regulator, code should be here
 302                  */
 303                 return;
 304         case SDHCI_HOST_CONTROL:
 305                 /* FSL messed up here, so we can just keep those three */
 306                 new_val = val & (SDHCI_CTRL_LED | \
 307                                 SDHCI_CTRL_4BITBUS | \
 308                                 SDHCI_CTRL_D3CD);
 309                 /* ensure the endianess */
 310                 new_val |= ESDHC_HOST_CONTROL_LE;
 311                 /* DMA mode bits are shifted */
 312                 new_val |= (val & SDHCI_CTRL_DMA_MASK) << 5;
 313
 314                 esdhc_clrset_le(host, 0xffff, new_val, reg);
 315                 return;
 316         }
 317         esdhc_clrset_le(host, 0xff, val, reg);
 318
 319         /*
 320          * The esdhc has a design violation to SDHC spec which tells
 321          * that software reset should not affect card detection circuit.
 322          * But esdhc clears its SYSCTL register bits [0..2] during the
 323          * software reset.  This will stop those clocks that card detection
 324          * circuit relies on.  To work around it, we turn the clocks on back
 325          * to keep card detection circuit functional.
 326          */
 327         if ((reg == SDHCI_SOFTWARE_RESET) && (val & 1))
 328                 esdhc_clrset_le(host, 0x7, 0x7, ESDHC_SYSTEM_CONTROL);
 329 }
 330
 331 static unsigned int esdhc_pltfm_get_max_clock(struct sdhci_host *host)
 332 {
 333         struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
 334
 335         return clk_get_rate(pltfm_host->clk);
 336 }
 337
 338 static unsigned int esdhc_pltfm_get_min_clock(struct sdhci_host *host)
 339 {
 340         struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
 341
 342         return clk_get_rate(pltfm_host->clk) / 256 / 16;
 343 }
 344
 345 static unsigned int esdhc_pltfm_get_ro(struct sdhci_host *host)
 346 {
 347         struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
 348         struct pltfm_imx_data *imx_data = pltfm_host->priv;
 349         struct esdhc_platform_data *boarddata = &imx_data->boarddata;
 350
 351         switch (boarddata->wp_type) {
 352         case ESDHC_WP_GPIO:
 353                 if (gpio_is_valid(boarddata->wp_gpio))
 354                         return gpio_get_value(boarddata->wp_gpio);
 355         case ESDHC_WP_CONTROLLER:
 356                 return !(readl(host->ioaddr + SDHCI_PRESENT_STATE) &
 357                                SDHCI_WRITE_PROTECT);
 358         case ESDHC_WP_NONE:
 359                 break;
 360         }
 361
 362         return -ENOSYS;
 363 }
 364
 365 static struct sdhci_ops sdhci_esdhc_ops = {
 366         .read_l = esdhc_readl_le,
 367         .read_w = esdhc_readw_le,
 368         .write_l = esdhc_writel_le,
 369         .write_w = esdhc_writew_le,
 370         .write_b = esdhc_writeb_le,
 371         .set_clock = esdhc_set_clock,
 372         .get_max_clock = esdhc_pltfm_get_max_clock,
 373         .get_min_clock = esdhc_pltfm_get_min_clock,
 374         .get_ro = esdhc_pltfm_get_ro,
 375 };
 376
 377 static struct sdhci_pltfm_data sdhci_esdhc_imx_pdata = {
 378         .quirks = ESDHC_DEFAULT_QUIRKS | SDHCI_QUIRK_NO_HISPD_BIT
 379                         | SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
 380                         | SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC
 381                         | SDHCI_QUIRK_BROKEN_CARD_DETECTION,
 382         .ops = &sdhci_esdhc_ops,
 383 };
 384
 385 static irqreturn_t cd_irq(int irq, void *data)
 386 {
 387         struct sdhci_host *sdhost = (struct sdhci_host *)data;
 388
 389         tasklet_schedule(&sdhost->card_tasklet);
 390         return IRQ_HANDLED;
 391 };
 392
 393 #ifdef CONFIG_OF
 394 static int __devinit
 395 sdhci_esdhc_imx_probe_dt(struct platform_device *pdev,
 396                          struct esdhc_platform_data *boarddata)
 397 {
 398         struct device_node *np = pdev->dev.of_node;
 399
 400         if (!np)
 401                 return -ENODEV;
 402
 403         if (of_get_property(np, "fsl,card-wired", NULL))
 404                 boarddata->cd_type = ESDHC_CD_PERMANENT;
 405
 406         if (of_get_property(np, "fsl,cd-controller", NULL))
 407                 boarddata->cd_type = ESDHC_CD_CONTROLLER;
 408
 409         if (of_get_property(np, "fsl,wp-controller", NULL))
 410                 boarddata->wp_type = ESDHC_WP_CONTROLLER;
 411
 412         boarddata->cd_gpio = of_get_named_gpio(np, "cd-gpios", 0);
 413         if (gpio_is_valid(boarddata->cd_gpio))
 414                 boarddata->cd_type = ESDHC_CD_GPIO;
 415
 416         boarddata->wp_gpio = of_get_named_gpio(np, "wp-gpios", 0);
 417         if (gpio_is_valid(boarddata->wp_gpio))
 418                 boarddata->wp_type = ESDHC_WP_GPIO;
 419
 420         return 0;
 421 }
 422 #else
 423 static inline int
 424 sdhci_esdhc_imx_probe_dt(struct platform_device *pdev,
 425                          struct esdhc_platform_data *boarddata)
 426 {
 427         return -ENODEV;
 428 }
 429 #endif
 430
 431 static int __devinit sdhci_esdhc_imx_probe(struct platform_device *pdev)
 432 {
 433         const struct of_device_id *of_id =
 434                         of_match_device(imx_esdhc_dt_ids, &pdev->dev);
 435         struct sdhci_pltfm_host *pltfm_host;
 436         struct sdhci_host *host;
 437         struct esdhc_platform_data *boarddata;
 438         struct clk *clk;
 439         int err;
 440         struct pltfm_imx_data *imx_data;
 441
 442         host = sdhci_pltfm_init(pdev, &sdhci_esdhc_imx_pdata);
 443         if (IS_ERR(host))
 444                 return PTR_ERR(host);
 445
 446         pltfm_host = sdhci_priv(host);
 447
 448         imx_data = kzalloc(sizeof(struct pltfm_imx_data), GFP_KERNEL);
 449         if (!imx_data) {
 450                 err = -ENOMEM;
 451                 goto err_imx_data;
 452         }
 453
 454         if (of_id)
 455                 pdev->id_entry = of_id->data;
 456         imx_data->devtype = pdev->id_entry->driver_data;
 457         pltfm_host->priv = imx_data;
 458
 459         clk = clk_get(mmc_dev(host->mmc), NULL);
 460         if (IS_ERR(clk)) {
 461                 dev_err(mmc_dev(host->mmc), "clk err\n");
 462                 err = PTR_ERR(clk);
 463                 goto err_clk_get;
 464         }
 465         clk_enable(clk);
 466         pltfm_host->clk = clk;
 467
 468         if (!is_imx25_esdhc(imx_data))
 469                 host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL;
 470
 471         if (is_imx25_esdhc(imx_data) || is_imx35_esdhc(imx_data))
 472                 /* Fix errata ENGcm07207 present on i.MX25 and i.MX35 */
 473                 host->quirks |= SDHCI_QUIRK_NO_MULTIBLOCK
 474                         | SDHCI_QUIRK_BROKEN_ADMA;
 475
 476         if (is_imx53_esdhc(imx_data))
 477                 imx_data->flags |= ESDHC_FLAG_MULTIBLK_NO_INT;
 478
 479         boarddata = &imx_data->boarddata;
 480         if (sdhci_esdhc_imx_probe_dt(pdev, boarddata) < 0) {
 481                 if (!host->mmc->parent->platform_data) {
 482                         dev_err(mmc_dev(host->mmc), "no board data!\n");
 483                         err = -EINVAL;
 484                         goto no_board_data;
 485                 }
 486                 imx_data->boarddata = *((struct esdhc_platform_data *)
 487                                         host->mmc->parent->platform_data);
 488         }
 489
 490         /* write_protect */
 491         if (boarddata->wp_type == ESDHC_WP_GPIO) {
 492                 err = gpio_request_one(boarddata->wp_gpio, GPIOF_IN, "ESDHC_WP");
 493                 if (err) {
 494                         dev_warn(mmc_dev(host->mmc),
 495                                  "no write-protect pin available!\n");
 496                         boarddata->wp_gpio = -EINVAL;
 497                 }
 498         } else {
 499                 boarddata->wp_gpio = -EINVAL;
 500         }
 501
 502         /* card_detect */
 503         if (boarddata->cd_type != ESDHC_CD_GPIO)
 504                 boarddata->cd_gpio = -EINVAL;
 505
 506         switch (boarddata->cd_type) {
 507         case ESDHC_CD_GPIO:
 508                 err = gpio_request_one(boarddata->cd_gpio, GPIOF_IN, "ESDHC_CD");
 509                 if (err) {
 510                         dev_err(mmc_dev(host->mmc),
 511                                 "no card-detect pin available!\n");
 512                         goto no_card_detect_pin;
 513                 }
 514
 515                 err = request_irq(gpio_to_irq(boarddata->cd_gpio), cd_irq,
 516                                  IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
 517                                  mmc_hostname(host->mmc), host);
 518                 if (err) {
 519                         dev_err(mmc_dev(host->mmc), "request irq error\n");
 520                         goto no_card_detect_irq;
 521                 }
 522                 /* fall through */
 523
 524         case ESDHC_CD_CONTROLLER:
 525                 /* we have a working card_detect back */
 526                 host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION;
 527                 break;
 528
 529         case ESDHC_CD_PERMANENT:
 530                 host->mmc->caps = MMC_CAP_NONREMOVABLE;
 531                 break;
 532
 533         case ESDHC_CD_NONE:
 534                 break;
 535         }
 536
 537         err = sdhci_add_host(host);
 538         if (err)
 539                 goto err_add_host;
 540
 541         return 0;
 542
 543 err_add_host:
 544         if (gpio_is_valid(boarddata->cd_gpio))
 545                 free_irq(gpio_to_irq(boarddata->cd_gpio), host);
 546 no_card_detect_irq:
 547         if (gpio_is_valid(boarddata->cd_gpio))
 548                 gpio_free(boarddata->cd_gpio);
 549         if (gpio_is_valid(boarddata->wp_gpio))
 550                 gpio_free(boarddata->wp_gpio);
 551 no_card_detect_pin:
 552 no_board_data:
 553         clk_disable(pltfm_host->clk);
 554         clk_put(pltfm_host->clk);
 555 err_clk_get:
 556         kfree(imx_data);
 557 err_imx_data:
 558         sdhci_pltfm_free(pdev);
 559         return err;
 560 }
 561
 562 static int __devexit sdhci_esdhc_imx_remove(struct platform_device *pdev)
 563 {
 564         struct sdhci_host *host = platform_get_drvdata(pdev);
 565         struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
 566         struct pltfm_imx_data *imx_data = pltfm_host->priv;
 567         struct esdhc_platform_data *boarddata = &imx_data->boarddata;
 568         int dead = (readl(host->ioaddr + SDHCI_INT_STATUS) == 0xffffffff);
 569
 570         sdhci_remove_host(host, dead);
 571
 572         if (gpio_is_valid(boarddata->wp_gpio))
 573                 gpio_free(boarddata->wp_gpio);
 574
 575         if (gpio_is_valid(boarddata->cd_gpio)) {
 576                 free_irq(gpio_to_irq(boarddata->cd_gpio), host);
 577                 gpio_free(boarddata->cd_gpio);
 578         }
 579
 580         clk_disable(pltfm_host->clk);
 581         clk_put(pltfm_host->clk);
 582         kfree(imx_data);
 583
 584         sdhci_pltfm_free(pdev);
 585
 586         return 0;
 587 }
 588
 589 static struct platform_driver sdhci_esdhc_imx_driver = {
 590         .driver         = {
 591                 .name   = "sdhci-esdhc-imx",
 592                 .owner  = THIS_MODULE,
 593                 .of_match_table = imx_esdhc_dt_ids,
 594         },
 595         .id_table       = imx_esdhc_devtype,
 596         .probe          = sdhci_esdhc_imx_probe,
 597         .remove         = __devexit_p(sdhci_esdhc_imx_remove),
 598 #ifdef CONFIG_PM
 599         .suspend        = sdhci_pltfm_suspend,
 600         .resume         = sdhci_pltfm_resume,
 601 #endif
 602 };
 603
 604 static int __init sdhci_esdhc_imx_init(void)
 605 {
 606         return platform_driver_register(&sdhci_esdhc_imx_driver);
 607 }
 608 module_init(sdhci_esdhc_imx_init);
 609
 610 static void __exit sdhci_esdhc_imx_exit(void)
 611 {
 612         platform_driver_unregister(&sdhci_esdhc_imx_driver);
 613 }
 614 module_exit(sdhci_esdhc_imx_exit);
 615
 616 MODULE_DESCRIPTION("SDHCI driver for Freescale i.MX eSDHC");
 617 MODULE_AUTHOR("Wolfram Sang <w.sang@pengutronix.de>");
 618 MODULE_LICENSE("GPL v2");