projects / deliverable / linux.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
Merge with /pub/scm/linux/kernel/git/torvalds/linux-2.6.git
[deliverable/linux.git] / drivers / mmc / pxamci.c
1 /*
2 * linux/drivers/mmc/pxa.c - PXA MMCI driver
3 *
4 * Copyright (C) 2003 Russell King, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This hardware is really sick:
11 * - No way to clear interrupts.
12 * - Have to turn off the clock whenever we touch the device.
13 * - Doesn't tell you how many data blocks were transferred.
14 * Yuck!
15 *
16 * 1 and 3 byte data transfers not supported
17 * max block length up to 1023
18 */
19 #include <linux/config.h>
20 #include <linux/module.h>
21 #include <linux/init.h>
22 #include <linux/ioport.h>
23 #include <linux/platform_device.h>
24 #include <linux/delay.h>
25 #include <linux/interrupt.h>
26 #include <linux/dma-mapping.h>
27 #include <linux/mmc/host.h>
28 #include <linux/mmc/protocol.h>
29
30 #include <asm/dma.h>
31 #include <asm/io.h>
32 #include <asm/scatterlist.h>
33 #include <asm/sizes.h>
34
35 #include <asm/arch/pxa-regs.h>
36 #include <asm/arch/mmc.h>
37
38 #include "pxamci.h"
39
40 #ifdef CONFIG_MMC_DEBUG
41 #define DBG(x...) printk(KERN_DEBUG x)
42 #else
43 #define DBG(x...) do { } while (0)
44 #endif
45
46 #define DRIVER_NAME "pxa2xx-mci"
47
48 #define NR_SG 1
49
50 struct pxamci_host {
51 struct mmc_host *mmc;
52 spinlock_t lock;
53 struct resource *res;
54 void __iomem *base;
55 int irq;
56 int dma;
57 unsigned int clkrt;
58 unsigned int cmdat;
59 unsigned int imask;
60 unsigned int power_mode;
61 struct pxamci_platform_data *pdata;
62
63 struct mmc_request *mrq;
64 struct mmc_command *cmd;
65 struct mmc_data *data;
66
67 dma_addr_t sg_dma;
68 struct pxa_dma_desc *sg_cpu;
69 unsigned int dma_len;
70
71 unsigned int dma_dir;
72 };
73
74 static inline unsigned int ns_to_clocks(unsigned int ns)
75 {
76 return (ns * (CLOCKRATE / 1000000) + 999) / 1000;
77 }
78
79 static void pxamci_stop_clock(struct pxamci_host *host)
80 {
81 if (readl(host->base + MMC_STAT) & STAT_CLK_EN) {
82 unsigned long timeout = 10000;
83 unsigned int v;
84
85 writel(STOP_CLOCK, host->base + MMC_STRPCL);
86
87 do {
88 v = readl(host->base + MMC_STAT);
89 if (!(v & STAT_CLK_EN))
90 break;
91 udelay(1);
92 } while (timeout--);
93
94 if (v & STAT_CLK_EN)
95 dev_err(mmc_dev(host->mmc), "unable to stop clock\n");
96 }
97 }
98
99 static void pxamci_enable_irq(struct pxamci_host *host, unsigned int mask)
100 {
101 unsigned long flags;
102
103 spin_lock_irqsave(&host->lock, flags);
104 host->imask &= ~mask;
105 writel(host->imask, host->base + MMC_I_MASK);
106 spin_unlock_irqrestore(&host->lock, flags);
107 }
108
109 static void pxamci_disable_irq(struct pxamci_host *host, unsigned int mask)
110 {
111 unsigned long flags;
112
113 spin_lock_irqsave(&host->lock, flags);
114 host->imask |= mask;
115 writel(host->imask, host->base + MMC_I_MASK);
116 spin_unlock_irqrestore(&host->lock, flags);
117 }
118
119 static void pxamci_setup_data(struct pxamci_host *host, struct mmc_data *data)
120 {
121 unsigned int nob = data->blocks;
122 unsigned int timeout;
123 u32 dcmd;
124 int i;
125
126 host->data = data;
127
128 if (data->flags & MMC_DATA_STREAM)
129 nob = 0xffff;
130
131 writel(nob, host->base + MMC_NOB);
132 writel(1 << data->blksz_bits, host->base + MMC_BLKLEN);
133
134 timeout = ns_to_clocks(data->timeout_ns) + data->timeout_clks;
135 writel((timeout + 255) / 256, host->base + MMC_RDTO);
136
137 if (data->flags & MMC_DATA_READ) {
138 host->dma_dir = DMA_FROM_DEVICE;
139 dcmd = DCMD_INCTRGADDR | DCMD_FLOWTRG;
140 DRCMRTXMMC = 0;
141 DRCMRRXMMC = host->dma | DRCMR_MAPVLD;
142 } else {
143 host->dma_dir = DMA_TO_DEVICE;
144 dcmd = DCMD_INCSRCADDR | DCMD_FLOWSRC;
145 DRCMRRXMMC = 0;
146 DRCMRTXMMC = host->dma | DRCMR_MAPVLD;
147 }
148
149 dcmd |= DCMD_BURST32 | DCMD_WIDTH1;
150
151 host->dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len,
152 host->dma_dir);
153
154 for (i = 0; i < host->dma_len; i++) {
155 if (data->flags & MMC_DATA_READ) {
156 host->sg_cpu[i].dsadr = host->res->start + MMC_RXFIFO;
157 host->sg_cpu[i].dtadr = sg_dma_address(&data->sg[i]);
158 } else {
159 host->sg_cpu[i].dsadr = sg_dma_address(&data->sg[i]);
160 host->sg_cpu[i].dtadr = host->res->start + MMC_TXFIFO;
161 }
162 host->sg_cpu[i].dcmd = dcmd | sg_dma_len(&data->sg[i]);
163 host->sg_cpu[i].ddadr = host->sg_dma + (i + 1) *
164 sizeof(struct pxa_dma_desc);
165 }
166 host->sg_cpu[host->dma_len - 1].ddadr = DDADR_STOP;
167 wmb();
168
169 DDADR(host->dma) = host->sg_dma;
170 DCSR(host->dma) = DCSR_RUN;
171 }
172
173 static void pxamci_start_cmd(struct pxamci_host *host, struct mmc_command *cmd, unsigned int cmdat)
174 {
175 WARN_ON(host->cmd != NULL);
176 host->cmd = cmd;
177
178 if (cmd->flags & MMC_RSP_BUSY)
179 cmdat |= CMDAT_BUSY;
180
181 #define RSP_TYPE(x) ((x) & ~(MMC_RSP_BUSY|MMC_RSP_OPCODE))
182 switch (RSP_TYPE(mmc_resp_type(cmd))) {
183 case RSP_TYPE(MMC_RSP_R1): /* r1, r1b, r6 */
184 cmdat |= CMDAT_RESP_SHORT;
185 break;
186 case RSP_TYPE(MMC_RSP_R3):
187 cmdat |= CMDAT_RESP_R3;
188 break;
189 case RSP_TYPE(MMC_RSP_R2):
190 cmdat |= CMDAT_RESP_R2;
191 break;
192 default:
193 break;
194 }
195
196 writel(cmd->opcode, host->base + MMC_CMD);
197 writel(cmd->arg >> 16, host->base + MMC_ARGH);
198 writel(cmd->arg & 0xffff, host->base + MMC_ARGL);
199 writel(cmdat, host->base + MMC_CMDAT);
200 writel(host->clkrt, host->base + MMC_CLKRT);
201
202 writel(START_CLOCK, host->base + MMC_STRPCL);
203
204 pxamci_enable_irq(host, END_CMD_RES);
205 }
206
207 static void pxamci_finish_request(struct pxamci_host *host, struct mmc_request *mrq)
208 {
209 DBG("PXAMCI: request done\n");
210 host->mrq = NULL;
211 host->cmd = NULL;
212 host->data = NULL;
213 mmc_request_done(host->mmc, mrq);
214 }
215
216 static int pxamci_cmd_done(struct pxamci_host *host, unsigned int stat)
217 {
218 struct mmc_command *cmd = host->cmd;
219 int i;
220 u32 v;
221
222 if (!cmd)
223 return 0;
224
225 host->cmd = NULL;
226
227 /*
228 * Did I mention this is Sick. We always need to
229 * discard the upper 8 bits of the first 16-bit word.
230 */
231 v = readl(host->base + MMC_RES) & 0xffff;
232 for (i = 0; i < 4; i++) {
233 u32 w1 = readl(host->base + MMC_RES) & 0xffff;
234 u32 w2 = readl(host->base + MMC_RES) & 0xffff;
235 cmd->resp[i] = v << 24 | w1 << 8 | w2 >> 8;
236 v = w2;
237 }
238
239 if (stat & STAT_TIME_OUT_RESPONSE) {
240 cmd->error = MMC_ERR_TIMEOUT;
241 } else if (stat & STAT_RES_CRC_ERR && cmd->flags & MMC_RSP_CRC) {
242 #ifdef CONFIG_PXA27x
243 /*
244 * workaround for erratum #42:
245 * Intel PXA27x Family Processor Specification Update Rev 001
246 */
247 if (cmd->opcode == MMC_ALL_SEND_CID ||
248 cmd->opcode == MMC_SEND_CSD ||
249 cmd->opcode == MMC_SEND_CID) {
250 /* a bogus CRC error can appear if the msb of
251 the 15 byte response is a one */
252 if ((cmd->resp[0] & 0x80000000) == 0)
253 cmd->error = MMC_ERR_BADCRC;
254 } else {
255 DBG("ignoring CRC from command %d - *risky*\n",cmd->opcode);
256 }
257 #else
258 cmd->error = MMC_ERR_BADCRC;
259 #endif
260 }
261
262 pxamci_disable_irq(host, END_CMD_RES);
263 if (host->data && cmd->error == MMC_ERR_NONE) {
264 pxamci_enable_irq(host, DATA_TRAN_DONE);
265 } else {
266 pxamci_finish_request(host, host->mrq);
267 }
268
269 return 1;
270 }
271
272 static int pxamci_data_done(struct pxamci_host *host, unsigned int stat)
273 {
274 struct mmc_data *data = host->data;
275
276 if (!data)
277 return 0;
278
279 DCSR(host->dma) = 0;
280 dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_len,
281 host->dma_dir);
282
283 if (stat & STAT_READ_TIME_OUT)
284 data->error = MMC_ERR_TIMEOUT;
285 else if (stat & (STAT_CRC_READ_ERROR|STAT_CRC_WRITE_ERROR))
286 data->error = MMC_ERR_BADCRC;
287
288 /*
289 * There appears to be a hardware design bug here. There seems to
290 * be no way to find out how much data was transferred to the card.
291 * This means that if there was an error on any block, we mark all
292 * data blocks as being in error.
293 */
294 if (data->error == MMC_ERR_NONE)
295 data->bytes_xfered = data->blocks << data->blksz_bits;
296 else
297 data->bytes_xfered = 0;
298
299 pxamci_disable_irq(host, DATA_TRAN_DONE);
300
301 host->data = NULL;
302 if (host->mrq->stop && data->error == MMC_ERR_NONE) {
303 pxamci_stop_clock(host);
304 pxamci_start_cmd(host, host->mrq->stop, 0);
305 } else {
306 pxamci_finish_request(host, host->mrq);
307 }
308
309 return 1;
310 }
311
312 static irqreturn_t pxamci_irq(int irq, void *devid, struct pt_regs *regs)
313 {
314 struct pxamci_host *host = devid;
315 unsigned int ireg;
316 int handled = 0;
317
318 ireg = readl(host->base + MMC_I_REG);
319
320 DBG("PXAMCI: irq %08x\n", ireg);
321
322 if (ireg) {
323 unsigned stat = readl(host->base + MMC_STAT);
324
325 DBG("PXAMCI: stat %08x\n", stat);
326
327 if (ireg & END_CMD_RES)
328 handled |= pxamci_cmd_done(host, stat);
329 if (ireg & DATA_TRAN_DONE)
330 handled |= pxamci_data_done(host, stat);
331 }
332
333 return IRQ_RETVAL(handled);
334 }
335
336 static void pxamci_request(struct mmc_host *mmc, struct mmc_request *mrq)
337 {
338 struct pxamci_host *host = mmc_priv(mmc);
339 unsigned int cmdat;
340
341 WARN_ON(host->mrq != NULL);
342
343 host->mrq = mrq;
344
345 pxamci_stop_clock(host);
346
347 cmdat = host->cmdat;
348 host->cmdat &= ~CMDAT_INIT;
349
350 if (mrq->data) {
351 pxamci_setup_data(host, mrq->data);
352
353 cmdat &= ~CMDAT_BUSY;
354 cmdat |= CMDAT_DATAEN | CMDAT_DMAEN;
355 if (mrq->data->flags & MMC_DATA_WRITE)
356 cmdat |= CMDAT_WRITE;
357
358 if (mrq->data->flags & MMC_DATA_STREAM)
359 cmdat |= CMDAT_STREAM;
360 }
361
362 pxamci_start_cmd(host, mrq->cmd, cmdat);
363 }
364
365 static int pxamci_get_ro(struct mmc_host *mmc)
366 {
367 struct pxamci_host *host = mmc_priv(mmc);
368
369 if (host->pdata && host->pdata->get_ro)
370 return host->pdata->get_ro(mmc->dev);
371 /* Host doesn't support read only detection so assume writeable */
372 return 0;
373 }
374
375 static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
376 {
377 struct pxamci_host *host = mmc_priv(mmc);
378
379 DBG("pxamci_set_ios: clock %u power %u vdd %u.%02u\n",
380 ios->clock, ios->power_mode, ios->vdd / 100,
381 ios->vdd % 100);
382
383 if (ios->clock) {
384 unsigned int clk = CLOCKRATE / ios->clock;
385 if (CLOCKRATE / clk > ios->clock)
386 clk <<= 1;
387 host->clkrt = fls(clk) - 1;
388 pxa_set_cken(CKEN12_MMC, 1);
389
390 /*
391 * we write clkrt on the next command
392 */
393 } else {
394 pxamci_stop_clock(host);
395 pxa_set_cken(CKEN12_MMC, 0);
396 }
397
398 if (host->power_mode != ios->power_mode) {
399 host->power_mode = ios->power_mode;
400
401 if (host->pdata && host->pdata->setpower)
402 host->pdata->setpower(mmc->dev, ios->vdd);
403
404 if (ios->power_mode == MMC_POWER_ON)
405 host->cmdat |= CMDAT_INIT;
406 }
407
408 DBG("pxamci_set_ios: clkrt = %x cmdat = %x\n",
409 host->clkrt, host->cmdat);
410 }
411
412 static struct mmc_host_ops pxamci_ops = {
413 .request = pxamci_request,
414 .get_ro = pxamci_get_ro,
415 .set_ios = pxamci_set_ios,
416 };
417
418 static void pxamci_dma_irq(int dma, void *devid, struct pt_regs *regs)
419 {
420 printk(KERN_ERR "DMA%d: IRQ???\n", dma);
421 DCSR(dma) = DCSR_STARTINTR|DCSR_ENDINTR|DCSR_BUSERR;
422 }
423
424 static irqreturn_t pxamci_detect_irq(int irq, void *devid, struct pt_regs *regs)
425 {
426 struct pxamci_host *host = mmc_priv(devid);
427
428 mmc_detect_change(devid, host->pdata->detect_delay);
429 return IRQ_HANDLED;
430 }
431
432 static int pxamci_probe(struct platform_device *pdev)
433 {
434 struct mmc_host *mmc;
435 struct pxamci_host *host = NULL;
436 struct resource *r;
437 int ret, irq;
438
439 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
440 irq = platform_get_irq(pdev, 0);
441 if (!r || irq < 0)
442 return -ENXIO;
443
444 r = request_mem_region(r->start, SZ_4K, DRIVER_NAME);
445 if (!r)
446 return -EBUSY;
447
448 mmc = mmc_alloc_host(sizeof(struct pxamci_host), &pdev->dev);
449 if (!mmc) {
450 ret = -ENOMEM;
451 goto out;
452 }
453
454 mmc->ops = &pxamci_ops;
455 mmc->f_min = CLOCKRATE_MIN;
456 mmc->f_max = CLOCKRATE_MAX;
457
458 /*
459 * We can do SG-DMA, but we don't because we never know how much
460 * data we successfully wrote to the card.
461 */
462 mmc->max_phys_segs = NR_SG;
463
464 /*
465 * Our hardware DMA can handle a maximum of one page per SG entry.
466 */
467 mmc->max_seg_size = PAGE_SIZE;
468
469 host = mmc_priv(mmc);
470 host->mmc = mmc;
471 host->dma = -1;
472 host->pdata = pdev->dev.platform_data;
473 mmc->ocr_avail = host->pdata ?
474 host->pdata->ocr_mask :
475 MMC_VDD_32_33|MMC_VDD_33_34;
476
477 host->sg_cpu = dma_alloc_coherent(&pdev->dev, PAGE_SIZE, &host->sg_dma, GFP_KERNEL);
478 if (!host->sg_cpu) {
479 ret = -ENOMEM;
480 goto out;
481 }
482
483 spin_lock_init(&host->lock);
484 host->res = r;
485 host->irq = irq;
486 host->imask = MMC_I_MASK_ALL;
487
488 host->base = ioremap(r->start, SZ_4K);
489 if (!host->base) {
490 ret = -ENOMEM;
491 goto out;
492 }
493
494 /*
495 * Ensure that the host controller is shut down, and setup
496 * with our defaults.
497 */
498 pxamci_stop_clock(host);
499 writel(0, host->base + MMC_SPI);
500 writel(64, host->base + MMC_RESTO);
501 writel(host->imask, host->base + MMC_I_MASK);
502
503 host->dma = pxa_request_dma(DRIVER_NAME, DMA_PRIO_LOW,
504 pxamci_dma_irq, host);
505 if (host->dma < 0) {
506 ret = -EBUSY;
507 goto out;
508 }
509
510 ret = request_irq(host->irq, pxamci_irq, 0, DRIVER_NAME, host);
511 if (ret)
512 goto out;
513
514 platform_set_drvdata(pdev, mmc);
515
516 if (host->pdata && host->pdata->init)
517 host->pdata->init(&pdev->dev, pxamci_detect_irq, mmc);
518
519 mmc_add_host(mmc);
520
521 return 0;
522
523 out:
524 if (host) {
525 if (host->dma >= 0)
526 pxa_free_dma(host->dma);
527 if (host->base)
528 iounmap(host->base);
529 if (host->sg_cpu)
530 dma_free_coherent(&pdev->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma);
531 }
532 if (mmc)
533 mmc_free_host(mmc);
534 release_resource(r);
535 return ret;
536 }
537
538 static int pxamci_remove(struct platform_device *pdev)
539 {
540 struct mmc_host *mmc = platform_get_drvdata(pdev);
541
542 platform_set_drvdata(pdev, NULL);
543
544 if (mmc) {
545 struct pxamci_host *host = mmc_priv(mmc);
546
547 if (host->pdata && host->pdata->exit)
548 host->pdata->exit(&pdev->dev, mmc);
549
550 mmc_remove_host(mmc);
551
552 pxamci_stop_clock(host);
553 writel(TXFIFO_WR_REQ|RXFIFO_RD_REQ|CLK_IS_OFF|STOP_CMD|
554 END_CMD_RES|PRG_DONE|DATA_TRAN_DONE,
555 host->base + MMC_I_MASK);
556
557 DRCMRRXMMC = 0;
558 DRCMRTXMMC = 0;
559
560 free_irq(host->irq, host);
561 pxa_free_dma(host->dma);
562 iounmap(host->base);
563 dma_free_coherent(&pdev->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma);
564
565 release_resource(host->res);
566
567 mmc_free_host(mmc);
568 }
569 return 0;
570 }
571
572 #ifdef CONFIG_PM
573 static int pxamci_suspend(struct platform_device *dev, pm_message_t state)
574 {
575 struct mmc_host *mmc = platform_get_drvdata(dev);
576 int ret = 0;
577
578 if (mmc)
579 ret = mmc_suspend_host(mmc, state);
580
581 return ret;
582 }
583
584 static int pxamci_resume(struct platform_device *dev)
585 {
586 struct mmc_host *mmc = platform_get_drvdata(dev);
587 int ret = 0;
588
589 if (mmc)
590 ret = mmc_resume_host(mmc);
591
592 return ret;
593 }
594 #else
595 #define pxamci_suspend NULL
596 #define pxamci_resume NULL
597 #endif
598
599 static struct platform_driver pxamci_driver = {
600 .probe = pxamci_probe,
601 .remove = pxamci_remove,
602 .suspend = pxamci_suspend,
603 .resume = pxamci_resume,
604 .driver = {
605 .name = DRIVER_NAME,
606 },
607 };
608
609 static int __init pxamci_init(void)
610 {
611 return platform_driver_register(&pxamci_driver);
612 }
613
614 static void __exit pxamci_exit(void)
615 {
616 platform_driver_unregister(&pxamci_driver);
617 }
618
619 module_init(pxamci_init);
620 module_exit(pxamci_exit);
621
622 MODULE_DESCRIPTION("PXA Multimedia Card Interface Driver");
623 MODULE_LICENSE("GPL");
Linux kernel - Deliverables
This page took 0.047646 seconds and 5 git commands to generate.