drivers/mtd/devices/m25p80.c

   1 /*
   2  * MTD SPI driver for ST M25Pxx (and similar) serial flash chips
   3  *
   4  * Author: Mike Lavender, mike@steroidmicros.com
   5  *
   6  * Copyright (c) 2005, Intec Automation Inc.
   7  *
   8  * Some parts are based on lart.c by Abraham Van Der Merwe
   9  *
  10  * Cleaned up and generalized based on mtd_dataflash.c
  11  *
  12  * This code is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License version 2 as
  14  * published by the Free Software Foundation.
  15  *
  16  */
  17
  18 #include <linux/err.h>
  19 #include <linux/errno.h>
  20 #include <linux/module.h>
  21 #include <linux/device.h>
  22
  23 #include <linux/mtd/mtd.h>
  24 #include <linux/mtd/partitions.h>
  25
  26 #include <linux/spi/spi.h>
  27 #include <linux/spi/flash.h>
  28 #include <linux/mtd/spi-nor.h>
  29
  30 #define MAX_CMD_SIZE            6
  31 struct m25p {
  32         struct spi_device       *spi;
  33         struct spi_nor          spi_nor;
  34         u8                      command[MAX_CMD_SIZE];
  35 };
  36
  37 static int m25p80_read_reg(struct spi_nor *nor, u8 code, u8 *val, int len)
  38 {
  39         struct m25p *flash = nor->priv;
  40         struct spi_device *spi = flash->spi;
  41         int ret;
  42
  43         ret = spi_write_then_read(spi, &code, 1, val, len);
  44         if (ret < 0)
  45                 dev_err(&spi->dev, "error %d reading %x\n", ret, code);
  46
  47         return ret;
  48 }
  49
  50 static void m25p_addr2cmd(struct spi_nor *nor, unsigned int addr, u8 *cmd)
  51 {
  52         /* opcode is in cmd[0] */
  53         cmd[1] = addr >> (nor->addr_width * 8 -  8);
  54         cmd[2] = addr >> (nor->addr_width * 8 - 16);
  55         cmd[3] = addr >> (nor->addr_width * 8 - 24);
  56         cmd[4] = addr >> (nor->addr_width * 8 - 32);
  57 }
  58
  59 static int m25p_cmdsz(struct spi_nor *nor)
  60 {
  61         return 1 + nor->addr_width;
  62 }
  63
  64 static int m25p80_write_reg(struct spi_nor *nor, u8 opcode, u8 *buf, int len)
  65 {
  66         struct m25p *flash = nor->priv;
  67         struct spi_device *spi = flash->spi;
  68
  69         flash->command[0] = opcode;
  70         if (buf)
  71                 memcpy(&flash->command[1], buf, len);
  72
  73         return spi_write(spi, flash->command, len + 1);
  74 }
  75
  76 static ssize_t m25p80_write(struct spi_nor *nor, loff_t to, size_t len,
  77                             const u_char *buf)
  78 {
  79         struct m25p *flash = nor->priv;
  80         struct spi_device *spi = flash->spi;
  81         struct spi_transfer t[2] = {};
  82         struct spi_message m;
  83         int cmd_sz = m25p_cmdsz(nor);
  84         ssize_t ret;
  85
  86         spi_message_init(&m);
  87
  88         if (nor->program_opcode == SPINOR_OP_AAI_WP && nor->sst_write_second)
  89                 cmd_sz = 1;
  90
  91         flash->command[0] = nor->program_opcode;
  92         m25p_addr2cmd(nor, to, flash->command);
  93
  94         t[0].tx_buf = flash->command;
  95         t[0].len = cmd_sz;
  96         spi_message_add_tail(&t[0], &m);
  97
  98         t[1].tx_buf = buf;
  99         t[1].len = len;
 100         spi_message_add_tail(&t[1], &m);
 101
 102         ret = spi_sync(spi, &m);
 103         if (ret)
 104                 return ret;
 105
 106         ret = m.actual_length - cmd_sz;
 107         if (ret < 0)
 108                 return -EIO;
 109         return ret;
 110 }
 111
 112 static inline unsigned int m25p80_rx_nbits(struct spi_nor *nor)
 113 {
 114         switch (nor->flash_read) {
 115         case SPI_NOR_DUAL:
 116                 return 2;
 117         case SPI_NOR_QUAD:
 118                 return 4;
 119         default:
 120                 return 0;
 121         }
 122 }
 123
 124 /*
 125  * Read an address range from the nor chip.  The address range
 126  * may be any size provided it is within the physical boundaries.
 127  */
 128 static ssize_t m25p80_read(struct spi_nor *nor, loff_t from, size_t len,
 129                            u_char *buf)
 130 {
 131         struct m25p *flash = nor->priv;
 132         struct spi_device *spi = flash->spi;
 133         struct spi_transfer t[2];
 134         struct spi_message m;
 135         unsigned int dummy = nor->read_dummy;
 136         ssize_t ret;
 137
 138         /* convert the dummy cycles to the number of bytes */
 139         dummy /= 8;
 140
 141         if (spi_flash_read_supported(spi)) {
 142                 struct spi_flash_read_message msg;
 143
 144                 memset(&msg, 0, sizeof(msg));
 145
 146                 msg.buf = buf;
 147                 msg.from = from;
 148                 msg.len = len;
 149                 msg.read_opcode = nor->read_opcode;
 150                 msg.addr_width = nor->addr_width;
 151                 msg.dummy_bytes = dummy;
 152                 /* TODO: Support other combinations */
 153                 msg.opcode_nbits = SPI_NBITS_SINGLE;
 154                 msg.addr_nbits = SPI_NBITS_SINGLE;
 155                 msg.data_nbits = m25p80_rx_nbits(nor);
 156
 157                 ret = spi_flash_read(spi, &msg);
 158                 if (ret < 0)
 159                         return ret;
 160                 return msg.retlen;
 161         }
 162
 163         spi_message_init(&m);
 164         memset(t, 0, (sizeof t));
 165
 166         flash->command[0] = nor->read_opcode;
 167         m25p_addr2cmd(nor, from, flash->command);
 168
 169         t[0].tx_buf = flash->command;
 170         t[0].len = m25p_cmdsz(nor) + dummy;
 171         spi_message_add_tail(&t[0], &m);
 172
 173         t[1].rx_buf = buf;
 174         t[1].rx_nbits = m25p80_rx_nbits(nor);
 175         t[1].len = min(len, spi_max_transfer_size(spi));
 176         spi_message_add_tail(&t[1], &m);
 177
 178         ret = spi_sync(spi, &m);
 179         if (ret)
 180                 return ret;
 181
 182         ret = m.actual_length - m25p_cmdsz(nor) - dummy;
 183         if (ret < 0)
 184                 return -EIO;
 185         return ret;
 186 }
 187
 188 /*
 189  * board specific setup should have ensured the SPI clock used here
 190  * matches what the READ command supports, at least until this driver
 191  * understands FAST_READ (for clocks over 25 MHz).
 192  */
 193 static int m25p_probe(struct spi_device *spi)
 194 {
 195         struct flash_platform_data      *data;
 196         struct m25p *flash;
 197         struct spi_nor *nor;
 198         enum read_mode mode = SPI_NOR_NORMAL;
 199         char *flash_name;
 200         int ret;
 201
 202         data = dev_get_platdata(&spi->dev);
 203
 204         flash = devm_kzalloc(&spi->dev, sizeof(*flash), GFP_KERNEL);
 205         if (!flash)
 206                 return -ENOMEM;
 207
 208         nor = &flash->spi_nor;
 209
 210         /* install the hooks */
 211         nor->read = m25p80_read;
 212         nor->write = m25p80_write;
 213         nor->write_reg = m25p80_write_reg;
 214         nor->read_reg = m25p80_read_reg;
 215
 216         nor->dev = &spi->dev;
 217         spi_nor_set_flash_node(nor, spi->dev.of_node);
 218         nor->priv = flash;
 219
 220         spi_set_drvdata(spi, flash);
 221         flash->spi = spi;
 222
 223         if (spi->mode & SPI_RX_QUAD)
 224                 mode = SPI_NOR_QUAD;
 225         else if (spi->mode & SPI_RX_DUAL)
 226                 mode = SPI_NOR_DUAL;
 227
 228         if (data && data->name)
 229                 nor->mtd.name = data->name;
 230
 231         /* For some (historical?) reason many platforms provide two different
 232          * names in flash_platform_data: "name" and "type". Quite often name is
 233          * set to "m25p80" and then "type" provides a real chip name.
 234          * If that's the case, respect "type" and ignore a "name".
 235          */
 236         if (data && data->type)
 237                 flash_name = data->type;
 238         else if (!strcmp(spi->modalias, "spi-nor"))
 239                 flash_name = NULL; /* auto-detect */
 240         else
 241                 flash_name = spi->modalias;
 242
 243         ret = spi_nor_scan(nor, flash_name, mode);
 244         if (ret)
 245                 return ret;
 246
 247         return mtd_device_register(&nor->mtd, data ? data->parts : NULL,
 248                                    data ? data->nr_parts : 0);
 249 }
 250
 251
 252 static int m25p_remove(struct spi_device *spi)
 253 {
 254         struct m25p     *flash = spi_get_drvdata(spi);
 255
 256         /* Clean up MTD stuff. */
 257         return mtd_device_unregister(&flash->spi_nor.mtd);
 258 }
 259
 260 /*
 261  * Do NOT add to this array without reading the following:
 262  *
 263  * Historically, many flash devices are bound to this driver by their name. But
 264  * since most of these flash are compatible to some extent, and their
 265  * differences can often be differentiated by the JEDEC read-ID command, we
 266  * encourage new users to add support to the spi-nor library, and simply bind
 267  * against a generic string here (e.g., "jedec,spi-nor").
 268  *
 269  * Many flash names are kept here in this list (as well as in spi-nor.c) to
 270  * keep them available as module aliases for existing platforms.
 271  */
 272 static const struct spi_device_id m25p_ids[] = {
 273         /*
 274          * Allow non-DT platform devices to bind to the "spi-nor" modalias, and
 275          * hack around the fact that the SPI core does not provide uevent
 276          * matching for .of_match_table
 277          */
 278         {"spi-nor"},
 279
 280         /*
 281          * Entries not used in DTs that should be safe to drop after replacing
 282          * them with "spi-nor" in platform data.
 283          */
 284         {"s25sl064a"},  {"w25x16"},     {"m25p10"},     {"m25px64"},
 285
 286         /*
 287          * Entries that were used in DTs without "jedec,spi-nor" fallback and
 288          * should be kept for backward compatibility.
 289          */
 290         {"at25df321a"}, {"at25df641"},  {"at26df081a"},
 291         {"mr25h256"},
 292         {"mx25l4005a"}, {"mx25l1606e"}, {"mx25l6405d"}, {"mx25l12805d"},
 293         {"mx25l25635e"},{"mx66l51235l"},
 294         {"n25q064"},    {"n25q128a11"}, {"n25q128a13"}, {"n25q512a"},
 295         {"s25fl256s1"}, {"s25fl512s"},  {"s25sl12801"}, {"s25fl008k"},
 296         {"s25fl064k"},
 297         {"sst25vf040b"},{"sst25vf016b"},{"sst25vf032b"},{"sst25wf040"},
 298         {"m25p40"},     {"m25p80"},     {"m25p16"},     {"m25p32"},
 299         {"m25p64"},     {"m25p128"},
 300         {"w25x80"},     {"w25x32"},     {"w25q32"},     {"w25q32dw"},
 301         {"w25q80bl"},   {"w25q128"},    {"w25q256"},
 302
 303         /* Flashes that can't be detected using JEDEC */
 304         {"m25p05-nonjedec"},    {"m25p10-nonjedec"},    {"m25p20-nonjedec"},
 305         {"m25p40-nonjedec"},    {"m25p80-nonjedec"},    {"m25p16-nonjedec"},
 306         {"m25p32-nonjedec"},    {"m25p64-nonjedec"},    {"m25p128-nonjedec"},
 307
 308         { },
 309 };
 310 MODULE_DEVICE_TABLE(spi, m25p_ids);
 311
 312 static const struct of_device_id m25p_of_table[] = {
 313         /*
 314          * Generic compatibility for SPI NOR that can be identified by the
 315          * JEDEC READ ID opcode (0x9F). Use this, if possible.
 316          */
 317         { .compatible = "jedec,spi-nor" },
 318         {}
 319 };
 320 MODULE_DEVICE_TABLE(of, m25p_of_table);
 321
 322 static struct spi_driver m25p80_driver = {
 323         .driver = {
 324                 .name   = "m25p80",
 325                 .of_match_table = m25p_of_table,
 326         },
 327         .id_table       = m25p_ids,
 328         .probe  = m25p_probe,
 329         .remove = m25p_remove,
 330
 331         /* REVISIT: many of these chips have deep power-down modes, which
 332          * should clearly be entered on suspend() to minimize power use.
 333          * And also when they're otherwise idle...
 334          */
 335 };
 336
 337 module_spi_driver(m25p80_driver);
 338
 339 MODULE_LICENSE("GPL");
 340 MODULE_AUTHOR("Mike Lavender");
 341 MODULE_DESCRIPTION("MTD SPI driver for ST M25Pxx flash chips");