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[deliverable/linux.git] / drivers / mtd / devices / m25p80.c
1 /*
2 * MTD SPI driver for ST M25Pxx (and similar) serial flash chips
3 *
4 * Author: Mike Lavender, mike@steroidmicros.com
5 *
6 * Copyright (c) 2005, Intec Automation Inc.
7 *
8 * Some parts are based on lart.c by Abraham Van Der Merwe
9 *
10 * Cleaned up and generalized based on mtd_dataflash.c
11 *
12 * This code is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
16 */
17
18 #include <linux/err.h>
19 #include <linux/errno.h>
20 #include <linux/module.h>
21 #include <linux/device.h>
22
23 #include <linux/mtd/mtd.h>
24 #include <linux/mtd/partitions.h>
25
26 #include <linux/spi/spi.h>
27 #include <linux/spi/flash.h>
28 #include <linux/mtd/spi-nor.h>
29
30 #define MAX_CMD_SIZE 6
31 struct m25p {
32 struct spi_device *spi;
33 struct spi_nor spi_nor;
34 u8 command[MAX_CMD_SIZE];
35 };
36
37 static int m25p80_read_reg(struct spi_nor *nor, u8 code, u8 *val, int len)
38 {
39 struct m25p *flash = nor->priv;
40 struct spi_device *spi = flash->spi;
41 int ret;
42
43 ret = spi_write_then_read(spi, &code, 1, val, len);
44 if (ret < 0)
45 dev_err(&spi->dev, "error %d reading %x\n", ret, code);
46
47 return ret;
48 }
49
50 static void m25p_addr2cmd(struct spi_nor *nor, unsigned int addr, u8 *cmd)
51 {
52 /* opcode is in cmd[0] */
53 cmd[1] = addr >> (nor->addr_width * 8 - 8);
54 cmd[2] = addr >> (nor->addr_width * 8 - 16);
55 cmd[3] = addr >> (nor->addr_width * 8 - 24);
56 cmd[4] = addr >> (nor->addr_width * 8 - 32);
57 }
58
59 static int m25p_cmdsz(struct spi_nor *nor)
60 {
61 return 1 + nor->addr_width;
62 }
63
64 static int m25p80_write_reg(struct spi_nor *nor, u8 opcode, u8 *buf, int len)
65 {
66 struct m25p *flash = nor->priv;
67 struct spi_device *spi = flash->spi;
68
69 flash->command[0] = opcode;
70 if (buf)
71 memcpy(&flash->command[1], buf, len);
72
73 return spi_write(spi, flash->command, len + 1);
74 }
75
76 static void m25p80_write(struct spi_nor *nor, loff_t to, size_t len,
77 size_t *retlen, const u_char *buf)
78 {
79 struct m25p *flash = nor->priv;
80 struct spi_device *spi = flash->spi;
81 struct spi_transfer t[2] = {};
82 struct spi_message m;
83 int cmd_sz = m25p_cmdsz(nor);
84
85 spi_message_init(&m);
86
87 if (nor->program_opcode == SPINOR_OP_AAI_WP && nor->sst_write_second)
88 cmd_sz = 1;
89
90 flash->command[0] = nor->program_opcode;
91 m25p_addr2cmd(nor, to, flash->command);
92
93 t[0].tx_buf = flash->command;
94 t[0].len = cmd_sz;
95 spi_message_add_tail(&t[0], &m);
96
97 t[1].tx_buf = buf;
98 t[1].len = len;
99 spi_message_add_tail(&t[1], &m);
100
101 spi_sync(spi, &m);
102
103 *retlen += m.actual_length - cmd_sz;
104 }
105
106 static inline unsigned int m25p80_rx_nbits(struct spi_nor *nor)
107 {
108 switch (nor->flash_read) {
109 case SPI_NOR_DUAL:
110 return 2;
111 case SPI_NOR_QUAD:
112 return 4;
113 default:
114 return 0;
115 }
116 }
117
118 /*
119 * Read an address range from the nor chip. The address range
120 * may be any size provided it is within the physical boundaries.
121 */
122 static int m25p80_read(struct spi_nor *nor, loff_t from, size_t len,
123 size_t *retlen, u_char *buf)
124 {
125 struct m25p *flash = nor->priv;
126 struct spi_device *spi = flash->spi;
127 struct spi_transfer t[2];
128 struct spi_message m;
129 unsigned int dummy = nor->read_dummy;
130
131 /* convert the dummy cycles to the number of bytes */
132 dummy /= 8;
133
134 if (spi_flash_read_supported(spi)) {
135 struct spi_flash_read_message msg;
136 int ret;
137
138 memset(&msg, 0, sizeof(msg));
139
140 msg.buf = buf;
141 msg.from = from;
142 msg.len = len;
143 msg.read_opcode = nor->read_opcode;
144 msg.addr_width = nor->addr_width;
145 msg.dummy_bytes = dummy;
146 /* TODO: Support other combinations */
147 msg.opcode_nbits = SPI_NBITS_SINGLE;
148 msg.addr_nbits = SPI_NBITS_SINGLE;
149 msg.data_nbits = m25p80_rx_nbits(nor);
150
151 ret = spi_flash_read(spi, &msg);
152 *retlen = msg.retlen;
153 return ret;
154 }
155
156 spi_message_init(&m);
157 memset(t, 0, (sizeof t));
158
159 flash->command[0] = nor->read_opcode;
160 m25p_addr2cmd(nor, from, flash->command);
161
162 t[0].tx_buf = flash->command;
163 t[0].len = m25p_cmdsz(nor) + dummy;
164 spi_message_add_tail(&t[0], &m);
165
166 t[1].rx_buf = buf;
167 t[1].rx_nbits = m25p80_rx_nbits(nor);
168 t[1].len = len;
169 spi_message_add_tail(&t[1], &m);
170
171 spi_sync(spi, &m);
172
173 *retlen = m.actual_length - m25p_cmdsz(nor) - dummy;
174 return 0;
175 }
176
177 /*
178 * board specific setup should have ensured the SPI clock used here
179 * matches what the READ command supports, at least until this driver
180 * understands FAST_READ (for clocks over 25 MHz).
181 */
182 static int m25p_probe(struct spi_device *spi)
183 {
184 struct flash_platform_data *data;
185 struct m25p *flash;
186 struct spi_nor *nor;
187 enum read_mode mode = SPI_NOR_NORMAL;
188 char *flash_name;
189 int ret;
190
191 data = dev_get_platdata(&spi->dev);
192
193 flash = devm_kzalloc(&spi->dev, sizeof(*flash), GFP_KERNEL);
194 if (!flash)
195 return -ENOMEM;
196
197 nor = &flash->spi_nor;
198
199 /* install the hooks */
200 nor->read = m25p80_read;
201 nor->write = m25p80_write;
202 nor->write_reg = m25p80_write_reg;
203 nor->read_reg = m25p80_read_reg;
204
205 nor->dev = &spi->dev;
206 spi_nor_set_flash_node(nor, spi->dev.of_node);
207 nor->priv = flash;
208
209 spi_set_drvdata(spi, flash);
210 flash->spi = spi;
211
212 if (spi->mode & SPI_RX_QUAD)
213 mode = SPI_NOR_QUAD;
214 else if (spi->mode & SPI_RX_DUAL)
215 mode = SPI_NOR_DUAL;
216
217 if (data && data->name)
218 nor->mtd.name = data->name;
219
220 /* For some (historical?) reason many platforms provide two different
221 * names in flash_platform_data: "name" and "type". Quite often name is
222 * set to "m25p80" and then "type" provides a real chip name.
223 * If that's the case, respect "type" and ignore a "name".
224 */
225 if (data && data->type)
226 flash_name = data->type;
227 else if (!strcmp(spi->modalias, "spi-nor"))
228 flash_name = NULL; /* auto-detect */
229 else
230 flash_name = spi->modalias;
231
232 ret = spi_nor_scan(nor, flash_name, mode);
233 if (ret)
234 return ret;
235
236 return mtd_device_register(&nor->mtd, data ? data->parts : NULL,
237 data ? data->nr_parts : 0);
238 }
239
240
241 static int m25p_remove(struct spi_device *spi)
242 {
243 struct m25p *flash = spi_get_drvdata(spi);
244
245 /* Clean up MTD stuff. */
246 return mtd_device_unregister(&flash->spi_nor.mtd);
247 }
248
249 /*
250 * Do NOT add to this array without reading the following:
251 *
252 * Historically, many flash devices are bound to this driver by their name. But
253 * since most of these flash are compatible to some extent, and their
254 * differences can often be differentiated by the JEDEC read-ID command, we
255 * encourage new users to add support to the spi-nor library, and simply bind
256 * against a generic string here (e.g., "jedec,spi-nor").
257 *
258 * Many flash names are kept here in this list (as well as in spi-nor.c) to
259 * keep them available as module aliases for existing platforms.
260 */
261 static const struct spi_device_id m25p_ids[] = {
262 /*
263 * Allow non-DT platform devices to bind to the "spi-nor" modalias, and
264 * hack around the fact that the SPI core does not provide uevent
265 * matching for .of_match_table
266 */
267 {"spi-nor"},
268
269 /*
270 * Entries not used in DTs that should be safe to drop after replacing
271 * them with "spi-nor" in platform data.
272 */
273 {"s25sl064a"}, {"w25x16"}, {"m25p10"}, {"m25px64"},
274
275 /*
276 * Entries that were used in DTs without "jedec,spi-nor" fallback and
277 * should be kept for backward compatibility.
278 */
279 {"at25df321a"}, {"at25df641"}, {"at26df081a"},
280 {"mr25h256"},
281 {"mx25l4005a"}, {"mx25l1606e"}, {"mx25l6405d"}, {"mx25l12805d"},
282 {"mx25l25635e"},{"mx66l51235l"},
283 {"n25q064"}, {"n25q128a11"}, {"n25q128a13"}, {"n25q512a"},
284 {"s25fl256s1"}, {"s25fl512s"}, {"s25sl12801"}, {"s25fl008k"},
285 {"s25fl064k"},
286 {"sst25vf040b"},{"sst25vf016b"},{"sst25vf032b"},{"sst25wf040"},
287 {"m25p40"}, {"m25p80"}, {"m25p16"}, {"m25p32"},
288 {"m25p64"}, {"m25p128"},
289 {"w25x80"}, {"w25x32"}, {"w25q32"}, {"w25q32dw"},
290 {"w25q80bl"}, {"w25q128"}, {"w25q256"},
291
292 /* Flashes that can't be detected using JEDEC */
293 {"m25p05-nonjedec"}, {"m25p10-nonjedec"}, {"m25p20-nonjedec"},
294 {"m25p40-nonjedec"}, {"m25p80-nonjedec"}, {"m25p16-nonjedec"},
295 {"m25p32-nonjedec"}, {"m25p64-nonjedec"}, {"m25p128-nonjedec"},
296
297 { },
298 };
299 MODULE_DEVICE_TABLE(spi, m25p_ids);
300
301 static const struct of_device_id m25p_of_table[] = {
302 /*
303 * Generic compatibility for SPI NOR that can be identified by the
304 * JEDEC READ ID opcode (0x9F). Use this, if possible.
305 */
306 { .compatible = "jedec,spi-nor" },
307 {}
308 };
309 MODULE_DEVICE_TABLE(of, m25p_of_table);
310
311 static struct spi_driver m25p80_driver = {
312 .driver = {
313 .name = "m25p80",
314 .of_match_table = m25p_of_table,
315 },
316 .id_table = m25p_ids,
317 .probe = m25p_probe,
318 .remove = m25p_remove,
319
320 /* REVISIT: many of these chips have deep power-down modes, which
321 * should clearly be entered on suspend() to minimize power use.
322 * And also when they're otherwise idle...
323 */
324 };
325
326 module_spi_driver(m25p80_driver);
327
328 MODULE_LICENSE("GPL");
329 MODULE_AUTHOR("Mike Lavender");
330 MODULE_DESCRIPTION("MTD SPI driver for ST M25Pxx flash chips");
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