2 * drivers/mtd/nand/au1550nd.c
4 * Copyright (C) 2004 Embedded Edge, LLC
6 * $Id: au1550nd.c,v 1.13 2005/11/07 11:14:30 gleixner Exp $
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
14 #include <linux/slab.h>
15 #include <linux/init.h>
16 #include <linux/module.h>
17 #include <linux/mtd/mtd.h>
18 #include <linux/mtd/nand.h>
19 #include <linux/mtd/partitions.h>
22 /* fixme: this is ugly */
23 #if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 0)
24 #include <asm/mach-au1x00/au1xxx.h>
26 #include <asm/au1000.h>
27 #ifdef CONFIG_MIPS_PB1550
28 #include <asm/pb1550.h>
30 #ifdef CONFIG_MIPS_DB1550
31 #include <asm/db1x00.h>
36 * MTD structure for NAND controller
38 static struct mtd_info
*au1550_mtd
= NULL
;
39 static void __iomem
*p_nand
;
40 static int nand_width
= 1; /* default x8*/
43 * Define partitions for flash device
45 const static struct mtd_partition partition_info
[] = {
53 .offset
= MTDPART_OFS_APPEND
,
54 .size
= MTDPART_SIZ_FULL
57 #define NB_OF(x) (sizeof(x)/sizeof(x[0]))
61 * au_read_byte - read one byte from the chip
62 * @mtd: MTD device structure
64 * read function for 8bit buswith
66 static u_char
au_read_byte(struct mtd_info
*mtd
)
68 struct nand_chip
*this = mtd
->priv
;
69 u_char ret
= readb(this->IO_ADDR_R
);
75 * au_write_byte - write one byte to the chip
76 * @mtd: MTD device structure
77 * @byte: pointer to data byte to write
79 * write function for 8it buswith
81 static void au_write_byte(struct mtd_info
*mtd
, u_char byte
)
83 struct nand_chip
*this = mtd
->priv
;
84 writeb(byte
, this->IO_ADDR_W
);
89 * au_read_byte16 - read one byte endianess aware from the chip
90 * @mtd: MTD device structure
92 * read function for 16bit buswith with
93 * endianess conversion
95 static u_char
au_read_byte16(struct mtd_info
*mtd
)
97 struct nand_chip
*this = mtd
->priv
;
98 u_char ret
= (u_char
) cpu_to_le16(readw(this->IO_ADDR_R
));
104 * au_write_byte16 - write one byte endianess aware to the chip
105 * @mtd: MTD device structure
106 * @byte: pointer to data byte to write
108 * write function for 16bit buswith with
109 * endianess conversion
111 static void au_write_byte16(struct mtd_info
*mtd
, u_char byte
)
113 struct nand_chip
*this = mtd
->priv
;
114 writew(le16_to_cpu((u16
) byte
), this->IO_ADDR_W
);
119 * au_read_word - read one word from the chip
120 * @mtd: MTD device structure
122 * read function for 16bit buswith without
123 * endianess conversion
125 static u16
au_read_word(struct mtd_info
*mtd
)
127 struct nand_chip
*this = mtd
->priv
;
128 u16 ret
= readw(this->IO_ADDR_R
);
134 * au_write_word - write one word to the chip
135 * @mtd: MTD device structure
136 * @word: data word to write
138 * write function for 16bit buswith without
139 * endianess conversion
141 static void au_write_word(struct mtd_info
*mtd
, u16 word
)
143 struct nand_chip
*this = mtd
->priv
;
144 writew(word
, this->IO_ADDR_W
);
149 * au_write_buf - write buffer to chip
150 * @mtd: MTD device structure
152 * @len: number of bytes to write
154 * write function for 8bit buswith
156 static void au_write_buf(struct mtd_info
*mtd
, const u_char
*buf
, int len
)
159 struct nand_chip
*this = mtd
->priv
;
161 for (i
=0; i
<len
; i
++) {
162 writeb(buf
[i
], this->IO_ADDR_W
);
168 * au_read_buf - read chip data into buffer
169 * @mtd: MTD device structure
170 * @buf: buffer to store date
171 * @len: number of bytes to read
173 * read function for 8bit buswith
175 static void au_read_buf(struct mtd_info
*mtd
, u_char
*buf
, int len
)
178 struct nand_chip
*this = mtd
->priv
;
180 for (i
=0; i
<len
; i
++) {
181 buf
[i
] = readb(this->IO_ADDR_R
);
187 * au_verify_buf - Verify chip data against buffer
188 * @mtd: MTD device structure
189 * @buf: buffer containing the data to compare
190 * @len: number of bytes to compare
192 * verify function for 8bit buswith
194 static int au_verify_buf(struct mtd_info
*mtd
, const u_char
*buf
, int len
)
197 struct nand_chip
*this = mtd
->priv
;
199 for (i
=0; i
<len
; i
++) {
200 if (buf
[i
] != readb(this->IO_ADDR_R
))
209 * au_write_buf16 - write buffer to chip
210 * @mtd: MTD device structure
212 * @len: number of bytes to write
214 * write function for 16bit buswith
216 static void au_write_buf16(struct mtd_info
*mtd
, const u_char
*buf
, int len
)
219 struct nand_chip
*this = mtd
->priv
;
220 u16
*p
= (u16
*) buf
;
223 for (i
=0; i
<len
; i
++) {
224 writew(p
[i
], this->IO_ADDR_W
);
231 * au_read_buf16 - read chip data into buffer
232 * @mtd: MTD device structure
233 * @buf: buffer to store date
234 * @len: number of bytes to read
236 * read function for 16bit buswith
238 static void au_read_buf16(struct mtd_info
*mtd
, u_char
*buf
, int len
)
241 struct nand_chip
*this = mtd
->priv
;
242 u16
*p
= (u16
*) buf
;
245 for (i
=0; i
<len
; i
++) {
246 p
[i
] = readw(this->IO_ADDR_R
);
252 * au_verify_buf16 - Verify chip data against buffer
253 * @mtd: MTD device structure
254 * @buf: buffer containing the data to compare
255 * @len: number of bytes to compare
257 * verify function for 16bit buswith
259 static int au_verify_buf16(struct mtd_info
*mtd
, const u_char
*buf
, int len
)
262 struct nand_chip
*this = mtd
->priv
;
263 u16
*p
= (u16
*) buf
;
266 for (i
=0; i
<len
; i
++) {
267 if (p
[i
] != readw(this->IO_ADDR_R
))
275 static void au1550_hwcontrol(struct mtd_info
*mtd
, int cmd
)
277 register struct nand_chip
*this = mtd
->priv
;
281 case NAND_CTL_SETCLE
: this->IO_ADDR_W
= p_nand
+ MEM_STNAND_CMD
; break;
282 case NAND_CTL_CLRCLE
: this->IO_ADDR_W
= p_nand
+ MEM_STNAND_DATA
; break;
284 case NAND_CTL_SETALE
: this->IO_ADDR_W
= p_nand
+ MEM_STNAND_ADDR
; break;
285 case NAND_CTL_CLRALE
:
286 this->IO_ADDR_W
= p_nand
+ MEM_STNAND_DATA
;
287 /* FIXME: Nobody knows why this is neccecary,
288 * but it works only that way */
292 case NAND_CTL_SETNCE
:
293 /* assert (force assert) chip enable */
294 au_writel((1<<(4+NAND_CS
)) , MEM_STNDCTL
); break;
297 case NAND_CTL_CLRNCE
:
298 /* deassert chip enable */
299 au_writel(0, MEM_STNDCTL
); break;
303 this->IO_ADDR_R
= this->IO_ADDR_W
;
305 /* Drain the writebuffer */
309 int au1550_device_ready(struct mtd_info
*mtd
)
311 int ret
= (au_readl(MEM_STSTAT
) & 0x1) ? 1 : 0;
317 * Main initialization routine
319 int __init
au1xxx_nand_init (void)
321 struct nand_chip
*this;
322 u16 boot_swapboot
= 0; /* default value */
327 /* Allocate memory for MTD device structure and private data */
328 au1550_mtd
= kmalloc (sizeof(struct mtd_info
) +
329 sizeof (struct nand_chip
), GFP_KERNEL
);
331 printk ("Unable to allocate NAND MTD dev structure.\n");
335 /* Get pointer to private data */
336 this = (struct nand_chip
*) (&au1550_mtd
[1]);
338 /* Initialize structures */
339 memset((char *) au1550_mtd
, 0, sizeof(struct mtd_info
));
340 memset((char *) this, 0, sizeof(struct nand_chip
));
342 /* Link the private data with the MTD structure */
343 au1550_mtd
->priv
= this;
346 /* disable interrupts */
347 au_writel(au_readl(MEM_STNDCTL
) & ~(1<<8), MEM_STNDCTL
);
349 /* disable NAND boot */
350 au_writel(au_readl(MEM_STNDCTL
) & ~(1<<0), MEM_STNDCTL
);
352 #ifdef CONFIG_MIPS_PB1550
353 /* set gpio206 high */
354 au_writel(au_readl(GPIO2_DIR
) & ~(1<<6), GPIO2_DIR
);
356 boot_swapboot
= (au_readl(MEM_STSTAT
) & (0x7<<1)) |
357 ((bcsr
->status
>> 6) & 0x1);
358 switch (boot_swapboot
) {
376 printk("Pb1550 NAND: bad boot:swap\n");
382 /* Configure chip-select; normally done by boot code, e.g. YAMON */
385 au_writel(NAND_STCFG
, MEM_STCFG0
);
386 au_writel(NAND_STTIME
, MEM_STTIME0
);
387 au_writel(NAND_STADDR
, MEM_STADDR0
);
390 au_writel(NAND_STCFG
, MEM_STCFG1
);
391 au_writel(NAND_STTIME
, MEM_STTIME1
);
392 au_writel(NAND_STADDR
, MEM_STADDR1
);
395 au_writel(NAND_STCFG
, MEM_STCFG2
);
396 au_writel(NAND_STTIME
, MEM_STTIME2
);
397 au_writel(NAND_STADDR
, MEM_STADDR2
);
400 au_writel(NAND_STCFG
, MEM_STCFG3
);
401 au_writel(NAND_STTIME
, MEM_STTIME3
);
402 au_writel(NAND_STADDR
, MEM_STADDR3
);
406 /* Locate NAND chip-select in order to determine NAND phys address */
407 mem_staddr
= 0x00000000;
408 if (((au_readl(MEM_STCFG0
) & 0x7) == 0x5) && (NAND_CS
== 0))
409 mem_staddr
= au_readl(MEM_STADDR0
);
410 else if (((au_readl(MEM_STCFG1
) & 0x7) == 0x5) && (NAND_CS
== 1))
411 mem_staddr
= au_readl(MEM_STADDR1
);
412 else if (((au_readl(MEM_STCFG2
) & 0x7) == 0x5) && (NAND_CS
== 2))
413 mem_staddr
= au_readl(MEM_STADDR2
);
414 else if (((au_readl(MEM_STCFG3
) & 0x7) == 0x5) && (NAND_CS
== 3))
415 mem_staddr
= au_readl(MEM_STADDR3
);
417 if (mem_staddr
== 0x00000000) {
418 printk("Au1xxx NAND: ERROR WITH NAND CHIP-SELECT\n");
422 nand_phys
= (mem_staddr
<< 4) & 0xFFFC0000;
424 p_nand
= (void __iomem
*)ioremap(nand_phys
, 0x1000);
426 /* make controller and MTD agree */
428 nand_width
= au_readl(MEM_STCFG0
) & (1<<22);
430 nand_width
= au_readl(MEM_STCFG1
) & (1<<22);
432 nand_width
= au_readl(MEM_STCFG2
) & (1<<22);
434 nand_width
= au_readl(MEM_STCFG3
) & (1<<22);
437 /* Set address of hardware control function */
438 this->hwcontrol
= au1550_hwcontrol
;
439 this->dev_ready
= au1550_device_ready
;
440 /* 30 us command delay time */
441 this->chip_delay
= 30;
442 this->eccmode
= NAND_ECC_SOFT
;
444 this->options
= NAND_NO_AUTOINCR
;
447 this->options
|= NAND_BUSWIDTH_16
;
449 this->read_byte
= (!nand_width
) ? au_read_byte16
: au_read_byte
;
450 this->write_byte
= (!nand_width
) ? au_write_byte16
: au_write_byte
;
451 this->write_word
= au_write_word
;
452 this->read_word
= au_read_word
;
453 this->write_buf
= (!nand_width
) ? au_write_buf16
: au_write_buf
;
454 this->read_buf
= (!nand_width
) ? au_read_buf16
: au_read_buf
;
455 this->verify_buf
= (!nand_width
) ? au_verify_buf16
: au_verify_buf
;
457 /* Scan to find existence of the device */
458 if (nand_scan (au1550_mtd
, 1)) {
463 /* Register the partitions */
464 add_mtd_partitions(au1550_mtd
, partition_info
, NB_OF(partition_info
));
469 iounmap ((void *)p_nand
);
476 module_init(au1xxx_nand_init
);
482 static void __exit
au1550_cleanup (void)
484 struct nand_chip
*this = (struct nand_chip
*) &au1550_mtd
[1];
486 /* Release resources, unregister device */
487 nand_release (au1550_mtd
);
489 /* Free the MTD device structure */
493 iounmap ((void *)p_nand
);
495 module_exit(au1550_cleanup
);
498 MODULE_LICENSE("GPL");
499 MODULE_AUTHOR("Embedded Edge, LLC");
500 MODULE_DESCRIPTION("Board-specific glue layer for NAND flash on Pb1550 board");