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mtd: nand: rename the id field of 'struct nand_flash_dev'
[deliverable/linux.git] / drivers / mtd / nand / nandsim.c
1 /*
2 * NAND flash simulator.
3 *
4 * Author: Artem B. Bityuckiy <dedekind@oktetlabs.ru>, <dedekind@infradead.org>
5 *
6 * Copyright (C) 2004 Nokia Corporation
7 *
8 * Note: NS means "NAND Simulator".
9 * Note: Input means input TO flash chip, output means output FROM chip.
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2, or (at your option) any later
14 * version.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General
19 * Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
24 */
25
26 #include <linux/init.h>
27 #include <linux/types.h>
28 #include <linux/module.h>
29 #include <linux/moduleparam.h>
30 #include <linux/vmalloc.h>
31 #include <linux/math64.h>
32 #include <linux/slab.h>
33 #include <linux/errno.h>
34 #include <linux/string.h>
35 #include <linux/mtd/mtd.h>
36 #include <linux/mtd/nand.h>
37 #include <linux/mtd/nand_bch.h>
38 #include <linux/mtd/partitions.h>
39 #include <linux/delay.h>
40 #include <linux/list.h>
41 #include <linux/random.h>
42 #include <linux/sched.h>
43 #include <linux/fs.h>
44 #include <linux/pagemap.h>
45 #include <linux/seq_file.h>
46 #include <linux/debugfs.h>
47
48 /* Default simulator parameters values */
49 #if !defined(CONFIG_NANDSIM_FIRST_ID_BYTE) || \
50 !defined(CONFIG_NANDSIM_SECOND_ID_BYTE) || \
51 !defined(CONFIG_NANDSIM_THIRD_ID_BYTE) || \
52 !defined(CONFIG_NANDSIM_FOURTH_ID_BYTE)
53 #define CONFIG_NANDSIM_FIRST_ID_BYTE 0x98
54 #define CONFIG_NANDSIM_SECOND_ID_BYTE 0x39
55 #define CONFIG_NANDSIM_THIRD_ID_BYTE 0xFF /* No byte */
56 #define CONFIG_NANDSIM_FOURTH_ID_BYTE 0xFF /* No byte */
57 #endif
58
59 #ifndef CONFIG_NANDSIM_ACCESS_DELAY
60 #define CONFIG_NANDSIM_ACCESS_DELAY 25
61 #endif
62 #ifndef CONFIG_NANDSIM_PROGRAMM_DELAY
63 #define CONFIG_NANDSIM_PROGRAMM_DELAY 200
64 #endif
65 #ifndef CONFIG_NANDSIM_ERASE_DELAY
66 #define CONFIG_NANDSIM_ERASE_DELAY 2
67 #endif
68 #ifndef CONFIG_NANDSIM_OUTPUT_CYCLE
69 #define CONFIG_NANDSIM_OUTPUT_CYCLE 40
70 #endif
71 #ifndef CONFIG_NANDSIM_INPUT_CYCLE
72 #define CONFIG_NANDSIM_INPUT_CYCLE 50
73 #endif
74 #ifndef CONFIG_NANDSIM_BUS_WIDTH
75 #define CONFIG_NANDSIM_BUS_WIDTH 8
76 #endif
77 #ifndef CONFIG_NANDSIM_DO_DELAYS
78 #define CONFIG_NANDSIM_DO_DELAYS 0
79 #endif
80 #ifndef CONFIG_NANDSIM_LOG
81 #define CONFIG_NANDSIM_LOG 0
82 #endif
83 #ifndef CONFIG_NANDSIM_DBG
84 #define CONFIG_NANDSIM_DBG 0
85 #endif
86 #ifndef CONFIG_NANDSIM_MAX_PARTS
87 #define CONFIG_NANDSIM_MAX_PARTS 32
88 #endif
89
90 static uint first_id_byte = CONFIG_NANDSIM_FIRST_ID_BYTE;
91 static uint second_id_byte = CONFIG_NANDSIM_SECOND_ID_BYTE;
92 static uint third_id_byte = CONFIG_NANDSIM_THIRD_ID_BYTE;
93 static uint fourth_id_byte = CONFIG_NANDSIM_FOURTH_ID_BYTE;
94 static uint access_delay = CONFIG_NANDSIM_ACCESS_DELAY;
95 static uint programm_delay = CONFIG_NANDSIM_PROGRAMM_DELAY;
96 static uint erase_delay = CONFIG_NANDSIM_ERASE_DELAY;
97 static uint output_cycle = CONFIG_NANDSIM_OUTPUT_CYCLE;
98 static uint input_cycle = CONFIG_NANDSIM_INPUT_CYCLE;
99 static uint bus_width = CONFIG_NANDSIM_BUS_WIDTH;
100 static uint do_delays = CONFIG_NANDSIM_DO_DELAYS;
101 static uint log = CONFIG_NANDSIM_LOG;
102 static uint dbg = CONFIG_NANDSIM_DBG;
103 static unsigned long parts[CONFIG_NANDSIM_MAX_PARTS];
104 static unsigned int parts_num;
105 static char *badblocks = NULL;
106 static char *weakblocks = NULL;
107 static char *weakpages = NULL;
108 static unsigned int bitflips = 0;
109 static char *gravepages = NULL;
110 static unsigned int overridesize = 0;
111 static char *cache_file = NULL;
112 static unsigned int bbt;
113 static unsigned int bch;
114
115 module_param(first_id_byte, uint, 0400);
116 module_param(second_id_byte, uint, 0400);
117 module_param(third_id_byte, uint, 0400);
118 module_param(fourth_id_byte, uint, 0400);
119 module_param(access_delay, uint, 0400);
120 module_param(programm_delay, uint, 0400);
121 module_param(erase_delay, uint, 0400);
122 module_param(output_cycle, uint, 0400);
123 module_param(input_cycle, uint, 0400);
124 module_param(bus_width, uint, 0400);
125 module_param(do_delays, uint, 0400);
126 module_param(log, uint, 0400);
127 module_param(dbg, uint, 0400);
128 module_param_array(parts, ulong, &parts_num, 0400);
129 module_param(badblocks, charp, 0400);
130 module_param(weakblocks, charp, 0400);
131 module_param(weakpages, charp, 0400);
132 module_param(bitflips, uint, 0400);
133 module_param(gravepages, charp, 0400);
134 module_param(overridesize, uint, 0400);
135 module_param(cache_file, charp, 0400);
136 module_param(bbt, uint, 0400);
137 module_param(bch, uint, 0400);
138
139 MODULE_PARM_DESC(first_id_byte, "The first byte returned by NAND Flash 'read ID' command (manufacturer ID)");
140 MODULE_PARM_DESC(second_id_byte, "The second byte returned by NAND Flash 'read ID' command (chip ID)");
141 MODULE_PARM_DESC(third_id_byte, "The third byte returned by NAND Flash 'read ID' command");
142 MODULE_PARM_DESC(fourth_id_byte, "The fourth byte returned by NAND Flash 'read ID' command");
143 MODULE_PARM_DESC(access_delay, "Initial page access delay (microseconds)");
144 MODULE_PARM_DESC(programm_delay, "Page programm delay (microseconds");
145 MODULE_PARM_DESC(erase_delay, "Sector erase delay (milliseconds)");
146 MODULE_PARM_DESC(output_cycle, "Word output (from flash) time (nanoseconds)");
147 MODULE_PARM_DESC(input_cycle, "Word input (to flash) time (nanoseconds)");
148 MODULE_PARM_DESC(bus_width, "Chip's bus width (8- or 16-bit)");
149 MODULE_PARM_DESC(do_delays, "Simulate NAND delays using busy-waits if not zero");
150 MODULE_PARM_DESC(log, "Perform logging if not zero");
151 MODULE_PARM_DESC(dbg, "Output debug information if not zero");
152 MODULE_PARM_DESC(parts, "Partition sizes (in erase blocks) separated by commas");
153 /* Page and erase block positions for the following parameters are independent of any partitions */
154 MODULE_PARM_DESC(badblocks, "Erase blocks that are initially marked bad, separated by commas");
155 MODULE_PARM_DESC(weakblocks, "Weak erase blocks [: remaining erase cycles (defaults to 3)]"
156 " separated by commas e.g. 113:2 means eb 113"
157 " can be erased only twice before failing");
158 MODULE_PARM_DESC(weakpages, "Weak pages [: maximum writes (defaults to 3)]"
159 " separated by commas e.g. 1401:2 means page 1401"
160 " can be written only twice before failing");
161 MODULE_PARM_DESC(bitflips, "Maximum number of random bit flips per page (zero by default)");
162 MODULE_PARM_DESC(gravepages, "Pages that lose data [: maximum reads (defaults to 3)]"
163 " separated by commas e.g. 1401:2 means page 1401"
164 " can be read only twice before failing");
165 MODULE_PARM_DESC(overridesize, "Specifies the NAND Flash size overriding the ID bytes. "
166 "The size is specified in erase blocks and as the exponent of a power of two"
167 " e.g. 5 means a size of 32 erase blocks");
168 MODULE_PARM_DESC(cache_file, "File to use to cache nand pages instead of memory");
169 MODULE_PARM_DESC(bbt, "0 OOB, 1 BBT with marker in OOB, 2 BBT with marker in data area");
170 MODULE_PARM_DESC(bch, "Enable BCH ecc and set how many bits should "
171 "be correctable in 512-byte blocks");
172
173 /* The largest possible page size */
174 #define NS_LARGEST_PAGE_SIZE 4096
175
176 /* The prefix for simulator output */
177 #define NS_OUTPUT_PREFIX "[nandsim]"
178
179 /* Simulator's output macros (logging, debugging, warning, error) */
180 #define NS_LOG(args...) \
181 do { if (log) printk(KERN_DEBUG NS_OUTPUT_PREFIX " log: " args); } while(0)
182 #define NS_DBG(args...) \
183 do { if (dbg) printk(KERN_DEBUG NS_OUTPUT_PREFIX " debug: " args); } while(0)
184 #define NS_WARN(args...) \
185 do { printk(KERN_WARNING NS_OUTPUT_PREFIX " warning: " args); } while(0)
186 #define NS_ERR(args...) \
187 do { printk(KERN_ERR NS_OUTPUT_PREFIX " error: " args); } while(0)
188 #define NS_INFO(args...) \
189 do { printk(KERN_INFO NS_OUTPUT_PREFIX " " args); } while(0)
190
191 /* Busy-wait delay macros (microseconds, milliseconds) */
192 #define NS_UDELAY(us) \
193 do { if (do_delays) udelay(us); } while(0)
194 #define NS_MDELAY(us) \
195 do { if (do_delays) mdelay(us); } while(0)
196
197 /* Is the nandsim structure initialized ? */
198 #define NS_IS_INITIALIZED(ns) ((ns)->geom.totsz != 0)
199
200 /* Good operation completion status */
201 #define NS_STATUS_OK(ns) (NAND_STATUS_READY | (NAND_STATUS_WP * ((ns)->lines.wp == 0)))
202
203 /* Operation failed completion status */
204 #define NS_STATUS_FAILED(ns) (NAND_STATUS_FAIL | NS_STATUS_OK(ns))
205
206 /* Calculate the page offset in flash RAM image by (row, column) address */
207 #define NS_RAW_OFFSET(ns) \
208 (((ns)->regs.row << (ns)->geom.pgshift) + ((ns)->regs.row * (ns)->geom.oobsz) + (ns)->regs.column)
209
210 /* Calculate the OOB offset in flash RAM image by (row, column) address */
211 #define NS_RAW_OFFSET_OOB(ns) (NS_RAW_OFFSET(ns) + ns->geom.pgsz)
212
213 /* After a command is input, the simulator goes to one of the following states */
214 #define STATE_CMD_READ0 0x00000001 /* read data from the beginning of page */
215 #define STATE_CMD_READ1 0x00000002 /* read data from the second half of page */
216 #define STATE_CMD_READSTART 0x00000003 /* read data second command (large page devices) */
217 #define STATE_CMD_PAGEPROG 0x00000004 /* start page program */
218 #define STATE_CMD_READOOB 0x00000005 /* read OOB area */
219 #define STATE_CMD_ERASE1 0x00000006 /* sector erase first command */
220 #define STATE_CMD_STATUS 0x00000007 /* read status */
221 #define STATE_CMD_SEQIN 0x00000009 /* sequential data input */
222 #define STATE_CMD_READID 0x0000000A /* read ID */
223 #define STATE_CMD_ERASE2 0x0000000B /* sector erase second command */
224 #define STATE_CMD_RESET 0x0000000C /* reset */
225 #define STATE_CMD_RNDOUT 0x0000000D /* random output command */
226 #define STATE_CMD_RNDOUTSTART 0x0000000E /* random output start command */
227 #define STATE_CMD_MASK 0x0000000F /* command states mask */
228
229 /* After an address is input, the simulator goes to one of these states */
230 #define STATE_ADDR_PAGE 0x00000010 /* full (row, column) address is accepted */
231 #define STATE_ADDR_SEC 0x00000020 /* sector address was accepted */
232 #define STATE_ADDR_COLUMN 0x00000030 /* column address was accepted */
233 #define STATE_ADDR_ZERO 0x00000040 /* one byte zero address was accepted */
234 #define STATE_ADDR_MASK 0x00000070 /* address states mask */
235
236 /* During data input/output the simulator is in these states */
237 #define STATE_DATAIN 0x00000100 /* waiting for data input */
238 #define STATE_DATAIN_MASK 0x00000100 /* data input states mask */
239
240 #define STATE_DATAOUT 0x00001000 /* waiting for page data output */
241 #define STATE_DATAOUT_ID 0x00002000 /* waiting for ID bytes output */
242 #define STATE_DATAOUT_STATUS 0x00003000 /* waiting for status output */
243 #define STATE_DATAOUT_STATUS_M 0x00004000 /* waiting for multi-plane status output */
244 #define STATE_DATAOUT_MASK 0x00007000 /* data output states mask */
245
246 /* Previous operation is done, ready to accept new requests */
247 #define STATE_READY 0x00000000
248
249 /* This state is used to mark that the next state isn't known yet */
250 #define STATE_UNKNOWN 0x10000000
251
252 /* Simulator's actions bit masks */
253 #define ACTION_CPY 0x00100000 /* copy page/OOB to the internal buffer */
254 #define ACTION_PRGPAGE 0x00200000 /* program the internal buffer to flash */
255 #define ACTION_SECERASE 0x00300000 /* erase sector */
256 #define ACTION_ZEROOFF 0x00400000 /* don't add any offset to address */
257 #define ACTION_HALFOFF 0x00500000 /* add to address half of page */
258 #define ACTION_OOBOFF 0x00600000 /* add to address OOB offset */
259 #define ACTION_MASK 0x00700000 /* action mask */
260
261 #define NS_OPER_NUM 13 /* Number of operations supported by the simulator */
262 #define NS_OPER_STATES 6 /* Maximum number of states in operation */
263
264 #define OPT_ANY 0xFFFFFFFF /* any chip supports this operation */
265 #define OPT_PAGE256 0x00000001 /* 256-byte page chips */
266 #define OPT_PAGE512 0x00000002 /* 512-byte page chips */
267 #define OPT_PAGE2048 0x00000008 /* 2048-byte page chips */
268 #define OPT_SMARTMEDIA 0x00000010 /* SmartMedia technology chips */
269 #define OPT_PAGE512_8BIT 0x00000040 /* 512-byte page chips with 8-bit bus width */
270 #define OPT_PAGE4096 0x00000080 /* 4096-byte page chips */
271 #define OPT_LARGEPAGE (OPT_PAGE2048 | OPT_PAGE4096) /* 2048 & 4096-byte page chips */
272 #define OPT_SMALLPAGE (OPT_PAGE256 | OPT_PAGE512) /* 256 and 512-byte page chips */
273
274 /* Remove action bits from state */
275 #define NS_STATE(x) ((x) & ~ACTION_MASK)
276
277 /*
278 * Maximum previous states which need to be saved. Currently saving is
279 * only needed for page program operation with preceded read command
280 * (which is only valid for 512-byte pages).
281 */
282 #define NS_MAX_PREVSTATES 1
283
284 /* Maximum page cache pages needed to read or write a NAND page to the cache_file */
285 #define NS_MAX_HELD_PAGES 16
286
287 struct nandsim_debug_info {
288 struct dentry *dfs_root;
289 struct dentry *dfs_wear_report;
290 };
291
292 /*
293 * A union to represent flash memory contents and flash buffer.
294 */
295 union ns_mem {
296 u_char *byte; /* for byte access */
297 uint16_t *word; /* for 16-bit word access */
298 };
299
300 /*
301 * The structure which describes all the internal simulator data.
302 */
303 struct nandsim {
304 struct mtd_partition partitions[CONFIG_NANDSIM_MAX_PARTS];
305 unsigned int nbparts;
306
307 uint busw; /* flash chip bus width (8 or 16) */
308 u_char ids[4]; /* chip's ID bytes */
309 uint32_t options; /* chip's characteristic bits */
310 uint32_t state; /* current chip state */
311 uint32_t nxstate; /* next expected state */
312
313 uint32_t *op; /* current operation, NULL operations isn't known yet */
314 uint32_t pstates[NS_MAX_PREVSTATES]; /* previous states */
315 uint16_t npstates; /* number of previous states saved */
316 uint16_t stateidx; /* current state index */
317
318 /* The simulated NAND flash pages array */
319 union ns_mem *pages;
320
321 /* Slab allocator for nand pages */
322 struct kmem_cache *nand_pages_slab;
323
324 /* Internal buffer of page + OOB size bytes */
325 union ns_mem buf;
326
327 /* NAND flash "geometry" */
328 struct {
329 uint64_t totsz; /* total flash size, bytes */
330 uint32_t secsz; /* flash sector (erase block) size, bytes */
331 uint pgsz; /* NAND flash page size, bytes */
332 uint oobsz; /* page OOB area size, bytes */
333 uint64_t totszoob; /* total flash size including OOB, bytes */
334 uint pgszoob; /* page size including OOB , bytes*/
335 uint secszoob; /* sector size including OOB, bytes */
336 uint pgnum; /* total number of pages */
337 uint pgsec; /* number of pages per sector */
338 uint secshift; /* bits number in sector size */
339 uint pgshift; /* bits number in page size */
340 uint oobshift; /* bits number in OOB size */
341 uint pgaddrbytes; /* bytes per page address */
342 uint secaddrbytes; /* bytes per sector address */
343 uint idbytes; /* the number ID bytes that this chip outputs */
344 } geom;
345
346 /* NAND flash internal registers */
347 struct {
348 unsigned command; /* the command register */
349 u_char status; /* the status register */
350 uint row; /* the page number */
351 uint column; /* the offset within page */
352 uint count; /* internal counter */
353 uint num; /* number of bytes which must be processed */
354 uint off; /* fixed page offset */
355 } regs;
356
357 /* NAND flash lines state */
358 struct {
359 int ce; /* chip Enable */
360 int cle; /* command Latch Enable */
361 int ale; /* address Latch Enable */
362 int wp; /* write Protect */
363 } lines;
364
365 /* Fields needed when using a cache file */
366 struct file *cfile; /* Open file */
367 unsigned char *pages_written; /* Which pages have been written */
368 void *file_buf;
369 struct page *held_pages[NS_MAX_HELD_PAGES];
370 int held_cnt;
371
372 struct nandsim_debug_info dbg;
373 };
374
375 /*
376 * Operations array. To perform any operation the simulator must pass
377 * through the correspondent states chain.
378 */
379 static struct nandsim_operations {
380 uint32_t reqopts; /* options which are required to perform the operation */
381 uint32_t states[NS_OPER_STATES]; /* operation's states */
382 } ops[NS_OPER_NUM] = {
383 /* Read page + OOB from the beginning */
384 {OPT_SMALLPAGE, {STATE_CMD_READ0 | ACTION_ZEROOFF, STATE_ADDR_PAGE | ACTION_CPY,
385 STATE_DATAOUT, STATE_READY}},
386 /* Read page + OOB from the second half */
387 {OPT_PAGE512_8BIT, {STATE_CMD_READ1 | ACTION_HALFOFF, STATE_ADDR_PAGE | ACTION_CPY,
388 STATE_DATAOUT, STATE_READY}},
389 /* Read OOB */
390 {OPT_SMALLPAGE, {STATE_CMD_READOOB | ACTION_OOBOFF, STATE_ADDR_PAGE | ACTION_CPY,
391 STATE_DATAOUT, STATE_READY}},
392 /* Program page starting from the beginning */
393 {OPT_ANY, {STATE_CMD_SEQIN, STATE_ADDR_PAGE, STATE_DATAIN,
394 STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
395 /* Program page starting from the beginning */
396 {OPT_SMALLPAGE, {STATE_CMD_READ0, STATE_CMD_SEQIN | ACTION_ZEROOFF, STATE_ADDR_PAGE,
397 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
398 /* Program page starting from the second half */
399 {OPT_PAGE512, {STATE_CMD_READ1, STATE_CMD_SEQIN | ACTION_HALFOFF, STATE_ADDR_PAGE,
400 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
401 /* Program OOB */
402 {OPT_SMALLPAGE, {STATE_CMD_READOOB, STATE_CMD_SEQIN | ACTION_OOBOFF, STATE_ADDR_PAGE,
403 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
404 /* Erase sector */
405 {OPT_ANY, {STATE_CMD_ERASE1, STATE_ADDR_SEC, STATE_CMD_ERASE2 | ACTION_SECERASE, STATE_READY}},
406 /* Read status */
407 {OPT_ANY, {STATE_CMD_STATUS, STATE_DATAOUT_STATUS, STATE_READY}},
408 /* Read ID */
409 {OPT_ANY, {STATE_CMD_READID, STATE_ADDR_ZERO, STATE_DATAOUT_ID, STATE_READY}},
410 /* Large page devices read page */
411 {OPT_LARGEPAGE, {STATE_CMD_READ0, STATE_ADDR_PAGE, STATE_CMD_READSTART | ACTION_CPY,
412 STATE_DATAOUT, STATE_READY}},
413 /* Large page devices random page read */
414 {OPT_LARGEPAGE, {STATE_CMD_RNDOUT, STATE_ADDR_COLUMN, STATE_CMD_RNDOUTSTART | ACTION_CPY,
415 STATE_DATAOUT, STATE_READY}},
416 };
417
418 struct weak_block {
419 struct list_head list;
420 unsigned int erase_block_no;
421 unsigned int max_erases;
422 unsigned int erases_done;
423 };
424
425 static LIST_HEAD(weak_blocks);
426
427 struct weak_page {
428 struct list_head list;
429 unsigned int page_no;
430 unsigned int max_writes;
431 unsigned int writes_done;
432 };
433
434 static LIST_HEAD(weak_pages);
435
436 struct grave_page {
437 struct list_head list;
438 unsigned int page_no;
439 unsigned int max_reads;
440 unsigned int reads_done;
441 };
442
443 static LIST_HEAD(grave_pages);
444
445 static unsigned long *erase_block_wear = NULL;
446 static unsigned int wear_eb_count = 0;
447 static unsigned long total_wear = 0;
448
449 /* MTD structure for NAND controller */
450 static struct mtd_info *nsmtd;
451
452 static int nandsim_debugfs_show(struct seq_file *m, void *private)
453 {
454 unsigned long wmin = -1, wmax = 0, avg;
455 unsigned long deciles[10], decile_max[10], tot = 0;
456 unsigned int i;
457
458 /* Calc wear stats */
459 for (i = 0; i < wear_eb_count; ++i) {
460 unsigned long wear = erase_block_wear[i];
461 if (wear < wmin)
462 wmin = wear;
463 if (wear > wmax)
464 wmax = wear;
465 tot += wear;
466 }
467
468 for (i = 0; i < 9; ++i) {
469 deciles[i] = 0;
470 decile_max[i] = (wmax * (i + 1) + 5) / 10;
471 }
472 deciles[9] = 0;
473 decile_max[9] = wmax;
474 for (i = 0; i < wear_eb_count; ++i) {
475 int d;
476 unsigned long wear = erase_block_wear[i];
477 for (d = 0; d < 10; ++d)
478 if (wear <= decile_max[d]) {
479 deciles[d] += 1;
480 break;
481 }
482 }
483 avg = tot / wear_eb_count;
484
485 /* Output wear report */
486 seq_printf(m, "Total numbers of erases: %lu\n", tot);
487 seq_printf(m, "Number of erase blocks: %u\n", wear_eb_count);
488 seq_printf(m, "Average number of erases: %lu\n", avg);
489 seq_printf(m, "Maximum number of erases: %lu\n", wmax);
490 seq_printf(m, "Minimum number of erases: %lu\n", wmin);
491 for (i = 0; i < 10; ++i) {
492 unsigned long from = (i ? decile_max[i - 1] + 1 : 0);
493 if (from > decile_max[i])
494 continue;
495 seq_printf(m, "Number of ebs with erase counts from %lu to %lu : %lu\n",
496 from,
497 decile_max[i],
498 deciles[i]);
499 }
500
501 return 0;
502 }
503
504 static int nandsim_debugfs_open(struct inode *inode, struct file *file)
505 {
506 return single_open(file, nandsim_debugfs_show, inode->i_private);
507 }
508
509 static const struct file_operations dfs_fops = {
510 .open = nandsim_debugfs_open,
511 .read = seq_read,
512 .llseek = seq_lseek,
513 .release = single_release,
514 };
515
516 /**
517 * nandsim_debugfs_create - initialize debugfs
518 * @dev: nandsim device description object
519 *
520 * This function creates all debugfs files for UBI device @ubi. Returns zero in
521 * case of success and a negative error code in case of failure.
522 */
523 static int nandsim_debugfs_create(struct nandsim *dev)
524 {
525 struct nandsim_debug_info *dbg = &dev->dbg;
526 struct dentry *dent;
527 int err;
528
529 if (!IS_ENABLED(CONFIG_DEBUG_FS))
530 return 0;
531
532 dent = debugfs_create_dir("nandsim", NULL);
533 if (IS_ERR_OR_NULL(dent)) {
534 int err = dent ? -ENODEV : PTR_ERR(dent);
535
536 NS_ERR("cannot create \"nandsim\" debugfs directory, err %d\n",
537 err);
538 return err;
539 }
540 dbg->dfs_root = dent;
541
542 dent = debugfs_create_file("wear_report", S_IRUSR,
543 dbg->dfs_root, dev, &dfs_fops);
544 if (IS_ERR_OR_NULL(dent))
545 goto out_remove;
546 dbg->dfs_wear_report = dent;
547
548 return 0;
549
550 out_remove:
551 debugfs_remove_recursive(dbg->dfs_root);
552 err = dent ? PTR_ERR(dent) : -ENODEV;
553 return err;
554 }
555
556 /**
557 * nandsim_debugfs_remove - destroy all debugfs files
558 */
559 static void nandsim_debugfs_remove(struct nandsim *ns)
560 {
561 if (IS_ENABLED(CONFIG_DEBUG_FS))
562 debugfs_remove_recursive(ns->dbg.dfs_root);
563 }
564
565 /*
566 * Allocate array of page pointers, create slab allocation for an array
567 * and initialize the array by NULL pointers.
568 *
569 * RETURNS: 0 if success, -ENOMEM if memory alloc fails.
570 */
571 static int alloc_device(struct nandsim *ns)
572 {
573 struct file *cfile;
574 int i, err;
575
576 if (cache_file) {
577 cfile = filp_open(cache_file, O_CREAT | O_RDWR | O_LARGEFILE, 0600);
578 if (IS_ERR(cfile))
579 return PTR_ERR(cfile);
580 if (!cfile->f_op || (!cfile->f_op->read && !cfile->f_op->aio_read)) {
581 NS_ERR("alloc_device: cache file not readable\n");
582 err = -EINVAL;
583 goto err_close;
584 }
585 if (!cfile->f_op->write && !cfile->f_op->aio_write) {
586 NS_ERR("alloc_device: cache file not writeable\n");
587 err = -EINVAL;
588 goto err_close;
589 }
590 ns->pages_written = vzalloc(ns->geom.pgnum);
591 if (!ns->pages_written) {
592 NS_ERR("alloc_device: unable to allocate pages written array\n");
593 err = -ENOMEM;
594 goto err_close;
595 }
596 ns->file_buf = kmalloc(ns->geom.pgszoob, GFP_KERNEL);
597 if (!ns->file_buf) {
598 NS_ERR("alloc_device: unable to allocate file buf\n");
599 err = -ENOMEM;
600 goto err_free;
601 }
602 ns->cfile = cfile;
603 return 0;
604 }
605
606 ns->pages = vmalloc(ns->geom.pgnum * sizeof(union ns_mem));
607 if (!ns->pages) {
608 NS_ERR("alloc_device: unable to allocate page array\n");
609 return -ENOMEM;
610 }
611 for (i = 0; i < ns->geom.pgnum; i++) {
612 ns->pages[i].byte = NULL;
613 }
614 ns->nand_pages_slab = kmem_cache_create("nandsim",
615 ns->geom.pgszoob, 0, 0, NULL);
616 if (!ns->nand_pages_slab) {
617 NS_ERR("cache_create: unable to create kmem_cache\n");
618 return -ENOMEM;
619 }
620
621 return 0;
622
623 err_free:
624 vfree(ns->pages_written);
625 err_close:
626 filp_close(cfile, NULL);
627 return err;
628 }
629
630 /*
631 * Free any allocated pages, and free the array of page pointers.
632 */
633 static void free_device(struct nandsim *ns)
634 {
635 int i;
636
637 if (ns->cfile) {
638 kfree(ns->file_buf);
639 vfree(ns->pages_written);
640 filp_close(ns->cfile, NULL);
641 return;
642 }
643
644 if (ns->pages) {
645 for (i = 0; i < ns->geom.pgnum; i++) {
646 if (ns->pages[i].byte)
647 kmem_cache_free(ns->nand_pages_slab,
648 ns->pages[i].byte);
649 }
650 kmem_cache_destroy(ns->nand_pages_slab);
651 vfree(ns->pages);
652 }
653 }
654
655 static char *get_partition_name(int i)
656 {
657 char buf[64];
658 sprintf(buf, "NAND simulator partition %d", i);
659 return kstrdup(buf, GFP_KERNEL);
660 }
661
662 /*
663 * Initialize the nandsim structure.
664 *
665 * RETURNS: 0 if success, -ERRNO if failure.
666 */
667 static int init_nandsim(struct mtd_info *mtd)
668 {
669 struct nand_chip *chip = mtd->priv;
670 struct nandsim *ns = chip->priv;
671 int i, ret = 0;
672 uint64_t remains;
673 uint64_t next_offset;
674
675 if (NS_IS_INITIALIZED(ns)) {
676 NS_ERR("init_nandsim: nandsim is already initialized\n");
677 return -EIO;
678 }
679
680 /* Force mtd to not do delays */
681 chip->chip_delay = 0;
682
683 /* Initialize the NAND flash parameters */
684 ns->busw = chip->options & NAND_BUSWIDTH_16 ? 16 : 8;
685 ns->geom.totsz = mtd->size;
686 ns->geom.pgsz = mtd->writesize;
687 ns->geom.oobsz = mtd->oobsize;
688 ns->geom.secsz = mtd->erasesize;
689 ns->geom.pgszoob = ns->geom.pgsz + ns->geom.oobsz;
690 ns->geom.pgnum = div_u64(ns->geom.totsz, ns->geom.pgsz);
691 ns->geom.totszoob = ns->geom.totsz + (uint64_t)ns->geom.pgnum * ns->geom.oobsz;
692 ns->geom.secshift = ffs(ns->geom.secsz) - 1;
693 ns->geom.pgshift = chip->page_shift;
694 ns->geom.oobshift = ffs(ns->geom.oobsz) - 1;
695 ns->geom.pgsec = ns->geom.secsz / ns->geom.pgsz;
696 ns->geom.secszoob = ns->geom.secsz + ns->geom.oobsz * ns->geom.pgsec;
697 ns->options = 0;
698
699 if (ns->geom.pgsz == 256) {
700 ns->options |= OPT_PAGE256;
701 }
702 else if (ns->geom.pgsz == 512) {
703 ns->options |= OPT_PAGE512;
704 if (ns->busw == 8)
705 ns->options |= OPT_PAGE512_8BIT;
706 } else if (ns->geom.pgsz == 2048) {
707 ns->options |= OPT_PAGE2048;
708 } else if (ns->geom.pgsz == 4096) {
709 ns->options |= OPT_PAGE4096;
710 } else {
711 NS_ERR("init_nandsim: unknown page size %u\n", ns->geom.pgsz);
712 return -EIO;
713 }
714
715 if (ns->options & OPT_SMALLPAGE) {
716 if (ns->geom.totsz <= (32 << 20)) {
717 ns->geom.pgaddrbytes = 3;
718 ns->geom.secaddrbytes = 2;
719 } else {
720 ns->geom.pgaddrbytes = 4;
721 ns->geom.secaddrbytes = 3;
722 }
723 } else {
724 if (ns->geom.totsz <= (128 << 20)) {
725 ns->geom.pgaddrbytes = 4;
726 ns->geom.secaddrbytes = 2;
727 } else {
728 ns->geom.pgaddrbytes = 5;
729 ns->geom.secaddrbytes = 3;
730 }
731 }
732
733 /* Fill the partition_info structure */
734 if (parts_num > ARRAY_SIZE(ns->partitions)) {
735 NS_ERR("too many partitions.\n");
736 ret = -EINVAL;
737 goto error;
738 }
739 remains = ns->geom.totsz;
740 next_offset = 0;
741 for (i = 0; i < parts_num; ++i) {
742 uint64_t part_sz = (uint64_t)parts[i] * ns->geom.secsz;
743
744 if (!part_sz || part_sz > remains) {
745 NS_ERR("bad partition size.\n");
746 ret = -EINVAL;
747 goto error;
748 }
749 ns->partitions[i].name = get_partition_name(i);
750 ns->partitions[i].offset = next_offset;
751 ns->partitions[i].size = part_sz;
752 next_offset += ns->partitions[i].size;
753 remains -= ns->partitions[i].size;
754 }
755 ns->nbparts = parts_num;
756 if (remains) {
757 if (parts_num + 1 > ARRAY_SIZE(ns->partitions)) {
758 NS_ERR("too many partitions.\n");
759 ret = -EINVAL;
760 goto error;
761 }
762 ns->partitions[i].name = get_partition_name(i);
763 ns->partitions[i].offset = next_offset;
764 ns->partitions[i].size = remains;
765 ns->nbparts += 1;
766 }
767
768 /* Detect how many ID bytes the NAND chip outputs */
769 for (i = 0; nand_flash_ids[i].name != NULL; i++) {
770 if (second_id_byte != nand_flash_ids[i].dev_id)
771 continue;
772 }
773
774 if (ns->busw == 16)
775 NS_WARN("16-bit flashes support wasn't tested\n");
776
777 printk("flash size: %llu MiB\n",
778 (unsigned long long)ns->geom.totsz >> 20);
779 printk("page size: %u bytes\n", ns->geom.pgsz);
780 printk("OOB area size: %u bytes\n", ns->geom.oobsz);
781 printk("sector size: %u KiB\n", ns->geom.secsz >> 10);
782 printk("pages number: %u\n", ns->geom.pgnum);
783 printk("pages per sector: %u\n", ns->geom.pgsec);
784 printk("bus width: %u\n", ns->busw);
785 printk("bits in sector size: %u\n", ns->geom.secshift);
786 printk("bits in page size: %u\n", ns->geom.pgshift);
787 printk("bits in OOB size: %u\n", ns->geom.oobshift);
788 printk("flash size with OOB: %llu KiB\n",
789 (unsigned long long)ns->geom.totszoob >> 10);
790 printk("page address bytes: %u\n", ns->geom.pgaddrbytes);
791 printk("sector address bytes: %u\n", ns->geom.secaddrbytes);
792 printk("options: %#x\n", ns->options);
793
794 if ((ret = alloc_device(ns)) != 0)
795 goto error;
796
797 /* Allocate / initialize the internal buffer */
798 ns->buf.byte = kmalloc(ns->geom.pgszoob, GFP_KERNEL);
799 if (!ns->buf.byte) {
800 NS_ERR("init_nandsim: unable to allocate %u bytes for the internal buffer\n",
801 ns->geom.pgszoob);
802 ret = -ENOMEM;
803 goto error;
804 }
805 memset(ns->buf.byte, 0xFF, ns->geom.pgszoob);
806
807 return 0;
808
809 error:
810 free_device(ns);
811
812 return ret;
813 }
814
815 /*
816 * Free the nandsim structure.
817 */
818 static void free_nandsim(struct nandsim *ns)
819 {
820 kfree(ns->buf.byte);
821 free_device(ns);
822
823 return;
824 }
825
826 static int parse_badblocks(struct nandsim *ns, struct mtd_info *mtd)
827 {
828 char *w;
829 int zero_ok;
830 unsigned int erase_block_no;
831 loff_t offset;
832
833 if (!badblocks)
834 return 0;
835 w = badblocks;
836 do {
837 zero_ok = (*w == '0' ? 1 : 0);
838 erase_block_no = simple_strtoul(w, &w, 0);
839 if (!zero_ok && !erase_block_no) {
840 NS_ERR("invalid badblocks.\n");
841 return -EINVAL;
842 }
843 offset = erase_block_no * ns->geom.secsz;
844 if (mtd_block_markbad(mtd, offset)) {
845 NS_ERR("invalid badblocks.\n");
846 return -EINVAL;
847 }
848 if (*w == ',')
849 w += 1;
850 } while (*w);
851 return 0;
852 }
853
854 static int parse_weakblocks(void)
855 {
856 char *w;
857 int zero_ok;
858 unsigned int erase_block_no;
859 unsigned int max_erases;
860 struct weak_block *wb;
861
862 if (!weakblocks)
863 return 0;
864 w = weakblocks;
865 do {
866 zero_ok = (*w == '0' ? 1 : 0);
867 erase_block_no = simple_strtoul(w, &w, 0);
868 if (!zero_ok && !erase_block_no) {
869 NS_ERR("invalid weakblocks.\n");
870 return -EINVAL;
871 }
872 max_erases = 3;
873 if (*w == ':') {
874 w += 1;
875 max_erases = simple_strtoul(w, &w, 0);
876 }
877 if (*w == ',')
878 w += 1;
879 wb = kzalloc(sizeof(*wb), GFP_KERNEL);
880 if (!wb) {
881 NS_ERR("unable to allocate memory.\n");
882 return -ENOMEM;
883 }
884 wb->erase_block_no = erase_block_no;
885 wb->max_erases = max_erases;
886 list_add(&wb->list, &weak_blocks);
887 } while (*w);
888 return 0;
889 }
890
891 static int erase_error(unsigned int erase_block_no)
892 {
893 struct weak_block *wb;
894
895 list_for_each_entry(wb, &weak_blocks, list)
896 if (wb->erase_block_no == erase_block_no) {
897 if (wb->erases_done >= wb->max_erases)
898 return 1;
899 wb->erases_done += 1;
900 return 0;
901 }
902 return 0;
903 }
904
905 static int parse_weakpages(void)
906 {
907 char *w;
908 int zero_ok;
909 unsigned int page_no;
910 unsigned int max_writes;
911 struct weak_page *wp;
912
913 if (!weakpages)
914 return 0;
915 w = weakpages;
916 do {
917 zero_ok = (*w == '0' ? 1 : 0);
918 page_no = simple_strtoul(w, &w, 0);
919 if (!zero_ok && !page_no) {
920 NS_ERR("invalid weakpagess.\n");
921 return -EINVAL;
922 }
923 max_writes = 3;
924 if (*w == ':') {
925 w += 1;
926 max_writes = simple_strtoul(w, &w, 0);
927 }
928 if (*w == ',')
929 w += 1;
930 wp = kzalloc(sizeof(*wp), GFP_KERNEL);
931 if (!wp) {
932 NS_ERR("unable to allocate memory.\n");
933 return -ENOMEM;
934 }
935 wp->page_no = page_no;
936 wp->max_writes = max_writes;
937 list_add(&wp->list, &weak_pages);
938 } while (*w);
939 return 0;
940 }
941
942 static int write_error(unsigned int page_no)
943 {
944 struct weak_page *wp;
945
946 list_for_each_entry(wp, &weak_pages, list)
947 if (wp->page_no == page_no) {
948 if (wp->writes_done >= wp->max_writes)
949 return 1;
950 wp->writes_done += 1;
951 return 0;
952 }
953 return 0;
954 }
955
956 static int parse_gravepages(void)
957 {
958 char *g;
959 int zero_ok;
960 unsigned int page_no;
961 unsigned int max_reads;
962 struct grave_page *gp;
963
964 if (!gravepages)
965 return 0;
966 g = gravepages;
967 do {
968 zero_ok = (*g == '0' ? 1 : 0);
969 page_no = simple_strtoul(g, &g, 0);
970 if (!zero_ok && !page_no) {
971 NS_ERR("invalid gravepagess.\n");
972 return -EINVAL;
973 }
974 max_reads = 3;
975 if (*g == ':') {
976 g += 1;
977 max_reads = simple_strtoul(g, &g, 0);
978 }
979 if (*g == ',')
980 g += 1;
981 gp = kzalloc(sizeof(*gp), GFP_KERNEL);
982 if (!gp) {
983 NS_ERR("unable to allocate memory.\n");
984 return -ENOMEM;
985 }
986 gp->page_no = page_no;
987 gp->max_reads = max_reads;
988 list_add(&gp->list, &grave_pages);
989 } while (*g);
990 return 0;
991 }
992
993 static int read_error(unsigned int page_no)
994 {
995 struct grave_page *gp;
996
997 list_for_each_entry(gp, &grave_pages, list)
998 if (gp->page_no == page_no) {
999 if (gp->reads_done >= gp->max_reads)
1000 return 1;
1001 gp->reads_done += 1;
1002 return 0;
1003 }
1004 return 0;
1005 }
1006
1007 static void free_lists(void)
1008 {
1009 struct list_head *pos, *n;
1010 list_for_each_safe(pos, n, &weak_blocks) {
1011 list_del(pos);
1012 kfree(list_entry(pos, struct weak_block, list));
1013 }
1014 list_for_each_safe(pos, n, &weak_pages) {
1015 list_del(pos);
1016 kfree(list_entry(pos, struct weak_page, list));
1017 }
1018 list_for_each_safe(pos, n, &grave_pages) {
1019 list_del(pos);
1020 kfree(list_entry(pos, struct grave_page, list));
1021 }
1022 kfree(erase_block_wear);
1023 }
1024
1025 static int setup_wear_reporting(struct mtd_info *mtd)
1026 {
1027 size_t mem;
1028
1029 wear_eb_count = div_u64(mtd->size, mtd->erasesize);
1030 mem = wear_eb_count * sizeof(unsigned long);
1031 if (mem / sizeof(unsigned long) != wear_eb_count) {
1032 NS_ERR("Too many erase blocks for wear reporting\n");
1033 return -ENOMEM;
1034 }
1035 erase_block_wear = kzalloc(mem, GFP_KERNEL);
1036 if (!erase_block_wear) {
1037 NS_ERR("Too many erase blocks for wear reporting\n");
1038 return -ENOMEM;
1039 }
1040 return 0;
1041 }
1042
1043 static void update_wear(unsigned int erase_block_no)
1044 {
1045 if (!erase_block_wear)
1046 return;
1047 total_wear += 1;
1048 /*
1049 * TODO: Notify this through a debugfs entry,
1050 * instead of showing an error message.
1051 */
1052 if (total_wear == 0)
1053 NS_ERR("Erase counter total overflow\n");
1054 erase_block_wear[erase_block_no] += 1;
1055 if (erase_block_wear[erase_block_no] == 0)
1056 NS_ERR("Erase counter overflow for erase block %u\n", erase_block_no);
1057 }
1058
1059 /*
1060 * Returns the string representation of 'state' state.
1061 */
1062 static char *get_state_name(uint32_t state)
1063 {
1064 switch (NS_STATE(state)) {
1065 case STATE_CMD_READ0:
1066 return "STATE_CMD_READ0";
1067 case STATE_CMD_READ1:
1068 return "STATE_CMD_READ1";
1069 case STATE_CMD_PAGEPROG:
1070 return "STATE_CMD_PAGEPROG";
1071 case STATE_CMD_READOOB:
1072 return "STATE_CMD_READOOB";
1073 case STATE_CMD_READSTART:
1074 return "STATE_CMD_READSTART";
1075 case STATE_CMD_ERASE1:
1076 return "STATE_CMD_ERASE1";
1077 case STATE_CMD_STATUS:
1078 return "STATE_CMD_STATUS";
1079 case STATE_CMD_SEQIN:
1080 return "STATE_CMD_SEQIN";
1081 case STATE_CMD_READID:
1082 return "STATE_CMD_READID";
1083 case STATE_CMD_ERASE2:
1084 return "STATE_CMD_ERASE2";
1085 case STATE_CMD_RESET:
1086 return "STATE_CMD_RESET";
1087 case STATE_CMD_RNDOUT:
1088 return "STATE_CMD_RNDOUT";
1089 case STATE_CMD_RNDOUTSTART:
1090 return "STATE_CMD_RNDOUTSTART";
1091 case STATE_ADDR_PAGE:
1092 return "STATE_ADDR_PAGE";
1093 case STATE_ADDR_SEC:
1094 return "STATE_ADDR_SEC";
1095 case STATE_ADDR_ZERO:
1096 return "STATE_ADDR_ZERO";
1097 case STATE_ADDR_COLUMN:
1098 return "STATE_ADDR_COLUMN";
1099 case STATE_DATAIN:
1100 return "STATE_DATAIN";
1101 case STATE_DATAOUT:
1102 return "STATE_DATAOUT";
1103 case STATE_DATAOUT_ID:
1104 return "STATE_DATAOUT_ID";
1105 case STATE_DATAOUT_STATUS:
1106 return "STATE_DATAOUT_STATUS";
1107 case STATE_DATAOUT_STATUS_M:
1108 return "STATE_DATAOUT_STATUS_M";
1109 case STATE_READY:
1110 return "STATE_READY";
1111 case STATE_UNKNOWN:
1112 return "STATE_UNKNOWN";
1113 }
1114
1115 NS_ERR("get_state_name: unknown state, BUG\n");
1116 return NULL;
1117 }
1118
1119 /*
1120 * Check if command is valid.
1121 *
1122 * RETURNS: 1 if wrong command, 0 if right.
1123 */
1124 static int check_command(int cmd)
1125 {
1126 switch (cmd) {
1127
1128 case NAND_CMD_READ0:
1129 case NAND_CMD_READ1:
1130 case NAND_CMD_READSTART:
1131 case NAND_CMD_PAGEPROG:
1132 case NAND_CMD_READOOB:
1133 case NAND_CMD_ERASE1:
1134 case NAND_CMD_STATUS:
1135 case NAND_CMD_SEQIN:
1136 case NAND_CMD_READID:
1137 case NAND_CMD_ERASE2:
1138 case NAND_CMD_RESET:
1139 case NAND_CMD_RNDOUT:
1140 case NAND_CMD_RNDOUTSTART:
1141 return 0;
1142
1143 default:
1144 return 1;
1145 }
1146 }
1147
1148 /*
1149 * Returns state after command is accepted by command number.
1150 */
1151 static uint32_t get_state_by_command(unsigned command)
1152 {
1153 switch (command) {
1154 case NAND_CMD_READ0:
1155 return STATE_CMD_READ0;
1156 case NAND_CMD_READ1:
1157 return STATE_CMD_READ1;
1158 case NAND_CMD_PAGEPROG:
1159 return STATE_CMD_PAGEPROG;
1160 case NAND_CMD_READSTART:
1161 return STATE_CMD_READSTART;
1162 case NAND_CMD_READOOB:
1163 return STATE_CMD_READOOB;
1164 case NAND_CMD_ERASE1:
1165 return STATE_CMD_ERASE1;
1166 case NAND_CMD_STATUS:
1167 return STATE_CMD_STATUS;
1168 case NAND_CMD_SEQIN:
1169 return STATE_CMD_SEQIN;
1170 case NAND_CMD_READID:
1171 return STATE_CMD_READID;
1172 case NAND_CMD_ERASE2:
1173 return STATE_CMD_ERASE2;
1174 case NAND_CMD_RESET:
1175 return STATE_CMD_RESET;
1176 case NAND_CMD_RNDOUT:
1177 return STATE_CMD_RNDOUT;
1178 case NAND_CMD_RNDOUTSTART:
1179 return STATE_CMD_RNDOUTSTART;
1180 }
1181
1182 NS_ERR("get_state_by_command: unknown command, BUG\n");
1183 return 0;
1184 }
1185
1186 /*
1187 * Move an address byte to the correspondent internal register.
1188 */
1189 static inline void accept_addr_byte(struct nandsim *ns, u_char bt)
1190 {
1191 uint byte = (uint)bt;
1192
1193 if (ns->regs.count < (ns->geom.pgaddrbytes - ns->geom.secaddrbytes))
1194 ns->regs.column |= (byte << 8 * ns->regs.count);
1195 else {
1196 ns->regs.row |= (byte << 8 * (ns->regs.count -
1197 ns->geom.pgaddrbytes +
1198 ns->geom.secaddrbytes));
1199 }
1200
1201 return;
1202 }
1203
1204 /*
1205 * Switch to STATE_READY state.
1206 */
1207 static inline void switch_to_ready_state(struct nandsim *ns, u_char status)
1208 {
1209 NS_DBG("switch_to_ready_state: switch to %s state\n", get_state_name(STATE_READY));
1210
1211 ns->state = STATE_READY;
1212 ns->nxstate = STATE_UNKNOWN;
1213 ns->op = NULL;
1214 ns->npstates = 0;
1215 ns->stateidx = 0;
1216 ns->regs.num = 0;
1217 ns->regs.count = 0;
1218 ns->regs.off = 0;
1219 ns->regs.row = 0;
1220 ns->regs.column = 0;
1221 ns->regs.status = status;
1222 }
1223
1224 /*
1225 * If the operation isn't known yet, try to find it in the global array
1226 * of supported operations.
1227 *
1228 * Operation can be unknown because of the following.
1229 * 1. New command was accepted and this is the first call to find the
1230 * correspondent states chain. In this case ns->npstates = 0;
1231 * 2. There are several operations which begin with the same command(s)
1232 * (for example program from the second half and read from the
1233 * second half operations both begin with the READ1 command). In this
1234 * case the ns->pstates[] array contains previous states.
1235 *
1236 * Thus, the function tries to find operation containing the following
1237 * states (if the 'flag' parameter is 0):
1238 * ns->pstates[0], ... ns->pstates[ns->npstates], ns->state
1239 *
1240 * If (one and only one) matching operation is found, it is accepted (
1241 * ns->ops, ns->state, ns->nxstate are initialized, ns->npstate is
1242 * zeroed).
1243 *
1244 * If there are several matches, the current state is pushed to the
1245 * ns->pstates.
1246 *
1247 * The operation can be unknown only while commands are input to the chip.
1248 * As soon as address command is accepted, the operation must be known.
1249 * In such situation the function is called with 'flag' != 0, and the
1250 * operation is searched using the following pattern:
1251 * ns->pstates[0], ... ns->pstates[ns->npstates], <address input>
1252 *
1253 * It is supposed that this pattern must either match one operation or
1254 * none. There can't be ambiguity in that case.
1255 *
1256 * If no matches found, the function does the following:
1257 * 1. if there are saved states present, try to ignore them and search
1258 * again only using the last command. If nothing was found, switch
1259 * to the STATE_READY state.
1260 * 2. if there are no saved states, switch to the STATE_READY state.
1261 *
1262 * RETURNS: -2 - no matched operations found.
1263 * -1 - several matches.
1264 * 0 - operation is found.
1265 */
1266 static int find_operation(struct nandsim *ns, uint32_t flag)
1267 {
1268 int opsfound = 0;
1269 int i, j, idx = 0;
1270
1271 for (i = 0; i < NS_OPER_NUM; i++) {
1272
1273 int found = 1;
1274
1275 if (!(ns->options & ops[i].reqopts))
1276 /* Ignore operations we can't perform */
1277 continue;
1278
1279 if (flag) {
1280 if (!(ops[i].states[ns->npstates] & STATE_ADDR_MASK))
1281 continue;
1282 } else {
1283 if (NS_STATE(ns->state) != NS_STATE(ops[i].states[ns->npstates]))
1284 continue;
1285 }
1286
1287 for (j = 0; j < ns->npstates; j++)
1288 if (NS_STATE(ops[i].states[j]) != NS_STATE(ns->pstates[j])
1289 && (ns->options & ops[idx].reqopts)) {
1290 found = 0;
1291 break;
1292 }
1293
1294 if (found) {
1295 idx = i;
1296 opsfound += 1;
1297 }
1298 }
1299
1300 if (opsfound == 1) {
1301 /* Exact match */
1302 ns->op = &ops[idx].states[0];
1303 if (flag) {
1304 /*
1305 * In this case the find_operation function was
1306 * called when address has just began input. But it isn't
1307 * yet fully input and the current state must
1308 * not be one of STATE_ADDR_*, but the STATE_ADDR_*
1309 * state must be the next state (ns->nxstate).
1310 */
1311 ns->stateidx = ns->npstates - 1;
1312 } else {
1313 ns->stateidx = ns->npstates;
1314 }
1315 ns->npstates = 0;
1316 ns->state = ns->op[ns->stateidx];
1317 ns->nxstate = ns->op[ns->stateidx + 1];
1318 NS_DBG("find_operation: operation found, index: %d, state: %s, nxstate %s\n",
1319 idx, get_state_name(ns->state), get_state_name(ns->nxstate));
1320 return 0;
1321 }
1322
1323 if (opsfound == 0) {
1324 /* Nothing was found. Try to ignore previous commands (if any) and search again */
1325 if (ns->npstates != 0) {
1326 NS_DBG("find_operation: no operation found, try again with state %s\n",
1327 get_state_name(ns->state));
1328 ns->npstates = 0;
1329 return find_operation(ns, 0);
1330
1331 }
1332 NS_DBG("find_operation: no operations found\n");
1333 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1334 return -2;
1335 }
1336
1337 if (flag) {
1338 /* This shouldn't happen */
1339 NS_DBG("find_operation: BUG, operation must be known if address is input\n");
1340 return -2;
1341 }
1342
1343 NS_DBG("find_operation: there is still ambiguity\n");
1344
1345 ns->pstates[ns->npstates++] = ns->state;
1346
1347 return -1;
1348 }
1349
1350 static void put_pages(struct nandsim *ns)
1351 {
1352 int i;
1353
1354 for (i = 0; i < ns->held_cnt; i++)
1355 page_cache_release(ns->held_pages[i]);
1356 }
1357
1358 /* Get page cache pages in advance to provide NOFS memory allocation */
1359 static int get_pages(struct nandsim *ns, struct file *file, size_t count, loff_t pos)
1360 {
1361 pgoff_t index, start_index, end_index;
1362 struct page *page;
1363 struct address_space *mapping = file->f_mapping;
1364
1365 start_index = pos >> PAGE_CACHE_SHIFT;
1366 end_index = (pos + count - 1) >> PAGE_CACHE_SHIFT;
1367 if (end_index - start_index + 1 > NS_MAX_HELD_PAGES)
1368 return -EINVAL;
1369 ns->held_cnt = 0;
1370 for (index = start_index; index <= end_index; index++) {
1371 page = find_get_page(mapping, index);
1372 if (page == NULL) {
1373 page = find_or_create_page(mapping, index, GFP_NOFS);
1374 if (page == NULL) {
1375 write_inode_now(mapping->host, 1);
1376 page = find_or_create_page(mapping, index, GFP_NOFS);
1377 }
1378 if (page == NULL) {
1379 put_pages(ns);
1380 return -ENOMEM;
1381 }
1382 unlock_page(page);
1383 }
1384 ns->held_pages[ns->held_cnt++] = page;
1385 }
1386 return 0;
1387 }
1388
1389 static int set_memalloc(void)
1390 {
1391 if (current->flags & PF_MEMALLOC)
1392 return 0;
1393 current->flags |= PF_MEMALLOC;
1394 return 1;
1395 }
1396
1397 static void clear_memalloc(int memalloc)
1398 {
1399 if (memalloc)
1400 current->flags &= ~PF_MEMALLOC;
1401 }
1402
1403 static ssize_t read_file(struct nandsim *ns, struct file *file, void *buf, size_t count, loff_t pos)
1404 {
1405 ssize_t tx;
1406 int err, memalloc;
1407
1408 err = get_pages(ns, file, count, pos);
1409 if (err)
1410 return err;
1411 memalloc = set_memalloc();
1412 tx = kernel_read(file, pos, buf, count);
1413 clear_memalloc(memalloc);
1414 put_pages(ns);
1415 return tx;
1416 }
1417
1418 static ssize_t write_file(struct nandsim *ns, struct file *file, void *buf, size_t count, loff_t pos)
1419 {
1420 ssize_t tx;
1421 int err, memalloc;
1422
1423 err = get_pages(ns, file, count, pos);
1424 if (err)
1425 return err;
1426 memalloc = set_memalloc();
1427 tx = kernel_write(file, buf, count, pos);
1428 clear_memalloc(memalloc);
1429 put_pages(ns);
1430 return tx;
1431 }
1432
1433 /*
1434 * Returns a pointer to the current page.
1435 */
1436 static inline union ns_mem *NS_GET_PAGE(struct nandsim *ns)
1437 {
1438 return &(ns->pages[ns->regs.row]);
1439 }
1440
1441 /*
1442 * Retuns a pointer to the current byte, within the current page.
1443 */
1444 static inline u_char *NS_PAGE_BYTE_OFF(struct nandsim *ns)
1445 {
1446 return NS_GET_PAGE(ns)->byte + ns->regs.column + ns->regs.off;
1447 }
1448
1449 int do_read_error(struct nandsim *ns, int num)
1450 {
1451 unsigned int page_no = ns->regs.row;
1452
1453 if (read_error(page_no)) {
1454 prandom_bytes(ns->buf.byte, num);
1455 NS_WARN("simulating read error in page %u\n", page_no);
1456 return 1;
1457 }
1458 return 0;
1459 }
1460
1461 void do_bit_flips(struct nandsim *ns, int num)
1462 {
1463 if (bitflips && prandom_u32() < (1 << 22)) {
1464 int flips = 1;
1465 if (bitflips > 1)
1466 flips = (prandom_u32() % (int) bitflips) + 1;
1467 while (flips--) {
1468 int pos = prandom_u32() % (num * 8);
1469 ns->buf.byte[pos / 8] ^= (1 << (pos % 8));
1470 NS_WARN("read_page: flipping bit %d in page %d "
1471 "reading from %d ecc: corrected=%u failed=%u\n",
1472 pos, ns->regs.row, ns->regs.column + ns->regs.off,
1473 nsmtd->ecc_stats.corrected, nsmtd->ecc_stats.failed);
1474 }
1475 }
1476 }
1477
1478 /*
1479 * Fill the NAND buffer with data read from the specified page.
1480 */
1481 static void read_page(struct nandsim *ns, int num)
1482 {
1483 union ns_mem *mypage;
1484
1485 if (ns->cfile) {
1486 if (!ns->pages_written[ns->regs.row]) {
1487 NS_DBG("read_page: page %d not written\n", ns->regs.row);
1488 memset(ns->buf.byte, 0xFF, num);
1489 } else {
1490 loff_t pos;
1491 ssize_t tx;
1492
1493 NS_DBG("read_page: page %d written, reading from %d\n",
1494 ns->regs.row, ns->regs.column + ns->regs.off);
1495 if (do_read_error(ns, num))
1496 return;
1497 pos = (loff_t)ns->regs.row * ns->geom.pgszoob + ns->regs.column + ns->regs.off;
1498 tx = read_file(ns, ns->cfile, ns->buf.byte, num, pos);
1499 if (tx != num) {
1500 NS_ERR("read_page: read error for page %d ret %ld\n", ns->regs.row, (long)tx);
1501 return;
1502 }
1503 do_bit_flips(ns, num);
1504 }
1505 return;
1506 }
1507
1508 mypage = NS_GET_PAGE(ns);
1509 if (mypage->byte == NULL) {
1510 NS_DBG("read_page: page %d not allocated\n", ns->regs.row);
1511 memset(ns->buf.byte, 0xFF, num);
1512 } else {
1513 NS_DBG("read_page: page %d allocated, reading from %d\n",
1514 ns->regs.row, ns->regs.column + ns->regs.off);
1515 if (do_read_error(ns, num))
1516 return;
1517 memcpy(ns->buf.byte, NS_PAGE_BYTE_OFF(ns), num);
1518 do_bit_flips(ns, num);
1519 }
1520 }
1521
1522 /*
1523 * Erase all pages in the specified sector.
1524 */
1525 static void erase_sector(struct nandsim *ns)
1526 {
1527 union ns_mem *mypage;
1528 int i;
1529
1530 if (ns->cfile) {
1531 for (i = 0; i < ns->geom.pgsec; i++)
1532 if (ns->pages_written[ns->regs.row + i]) {
1533 NS_DBG("erase_sector: freeing page %d\n", ns->regs.row + i);
1534 ns->pages_written[ns->regs.row + i] = 0;
1535 }
1536 return;
1537 }
1538
1539 mypage = NS_GET_PAGE(ns);
1540 for (i = 0; i < ns->geom.pgsec; i++) {
1541 if (mypage->byte != NULL) {
1542 NS_DBG("erase_sector: freeing page %d\n", ns->regs.row+i);
1543 kmem_cache_free(ns->nand_pages_slab, mypage->byte);
1544 mypage->byte = NULL;
1545 }
1546 mypage++;
1547 }
1548 }
1549
1550 /*
1551 * Program the specified page with the contents from the NAND buffer.
1552 */
1553 static int prog_page(struct nandsim *ns, int num)
1554 {
1555 int i;
1556 union ns_mem *mypage;
1557 u_char *pg_off;
1558
1559 if (ns->cfile) {
1560 loff_t off;
1561 ssize_t tx;
1562 int all;
1563
1564 NS_DBG("prog_page: writing page %d\n", ns->regs.row);
1565 pg_off = ns->file_buf + ns->regs.column + ns->regs.off;
1566 off = (loff_t)ns->regs.row * ns->geom.pgszoob + ns->regs.column + ns->regs.off;
1567 if (!ns->pages_written[ns->regs.row]) {
1568 all = 1;
1569 memset(ns->file_buf, 0xff, ns->geom.pgszoob);
1570 } else {
1571 all = 0;
1572 tx = read_file(ns, ns->cfile, pg_off, num, off);
1573 if (tx != num) {
1574 NS_ERR("prog_page: read error for page %d ret %ld\n", ns->regs.row, (long)tx);
1575 return -1;
1576 }
1577 }
1578 for (i = 0; i < num; i++)
1579 pg_off[i] &= ns->buf.byte[i];
1580 if (all) {
1581 loff_t pos = (loff_t)ns->regs.row * ns->geom.pgszoob;
1582 tx = write_file(ns, ns->cfile, ns->file_buf, ns->geom.pgszoob, pos);
1583 if (tx != ns->geom.pgszoob) {
1584 NS_ERR("prog_page: write error for page %d ret %ld\n", ns->regs.row, (long)tx);
1585 return -1;
1586 }
1587 ns->pages_written[ns->regs.row] = 1;
1588 } else {
1589 tx = write_file(ns, ns->cfile, pg_off, num, off);
1590 if (tx != num) {
1591 NS_ERR("prog_page: write error for page %d ret %ld\n", ns->regs.row, (long)tx);
1592 return -1;
1593 }
1594 }
1595 return 0;
1596 }
1597
1598 mypage = NS_GET_PAGE(ns);
1599 if (mypage->byte == NULL) {
1600 NS_DBG("prog_page: allocating page %d\n", ns->regs.row);
1601 /*
1602 * We allocate memory with GFP_NOFS because a flash FS may
1603 * utilize this. If it is holding an FS lock, then gets here,
1604 * then kernel memory alloc runs writeback which goes to the FS
1605 * again and deadlocks. This was seen in practice.
1606 */
1607 mypage->byte = kmem_cache_alloc(ns->nand_pages_slab, GFP_NOFS);
1608 if (mypage->byte == NULL) {
1609 NS_ERR("prog_page: error allocating memory for page %d\n", ns->regs.row);
1610 return -1;
1611 }
1612 memset(mypage->byte, 0xFF, ns->geom.pgszoob);
1613 }
1614
1615 pg_off = NS_PAGE_BYTE_OFF(ns);
1616 for (i = 0; i < num; i++)
1617 pg_off[i] &= ns->buf.byte[i];
1618
1619 return 0;
1620 }
1621
1622 /*
1623 * If state has any action bit, perform this action.
1624 *
1625 * RETURNS: 0 if success, -1 if error.
1626 */
1627 static int do_state_action(struct nandsim *ns, uint32_t action)
1628 {
1629 int num;
1630 int busdiv = ns->busw == 8 ? 1 : 2;
1631 unsigned int erase_block_no, page_no;
1632
1633 action &= ACTION_MASK;
1634
1635 /* Check that page address input is correct */
1636 if (action != ACTION_SECERASE && ns->regs.row >= ns->geom.pgnum) {
1637 NS_WARN("do_state_action: wrong page number (%#x)\n", ns->regs.row);
1638 return -1;
1639 }
1640
1641 switch (action) {
1642
1643 case ACTION_CPY:
1644 /*
1645 * Copy page data to the internal buffer.
1646 */
1647
1648 /* Column shouldn't be very large */
1649 if (ns->regs.column >= (ns->geom.pgszoob - ns->regs.off)) {
1650 NS_ERR("do_state_action: column number is too large\n");
1651 break;
1652 }
1653 num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1654 read_page(ns, num);
1655
1656 NS_DBG("do_state_action: (ACTION_CPY:) copy %d bytes to int buf, raw offset %d\n",
1657 num, NS_RAW_OFFSET(ns) + ns->regs.off);
1658
1659 if (ns->regs.off == 0)
1660 NS_LOG("read page %d\n", ns->regs.row);
1661 else if (ns->regs.off < ns->geom.pgsz)
1662 NS_LOG("read page %d (second half)\n", ns->regs.row);
1663 else
1664 NS_LOG("read OOB of page %d\n", ns->regs.row);
1665
1666 NS_UDELAY(access_delay);
1667 NS_UDELAY(input_cycle * ns->geom.pgsz / 1000 / busdiv);
1668
1669 break;
1670
1671 case ACTION_SECERASE:
1672 /*
1673 * Erase sector.
1674 */
1675
1676 if (ns->lines.wp) {
1677 NS_ERR("do_state_action: device is write-protected, ignore sector erase\n");
1678 return -1;
1679 }
1680
1681 if (ns->regs.row >= ns->geom.pgnum - ns->geom.pgsec
1682 || (ns->regs.row & ~(ns->geom.secsz - 1))) {
1683 NS_ERR("do_state_action: wrong sector address (%#x)\n", ns->regs.row);
1684 return -1;
1685 }
1686
1687 ns->regs.row = (ns->regs.row <<
1688 8 * (ns->geom.pgaddrbytes - ns->geom.secaddrbytes)) | ns->regs.column;
1689 ns->regs.column = 0;
1690
1691 erase_block_no = ns->regs.row >> (ns->geom.secshift - ns->geom.pgshift);
1692
1693 NS_DBG("do_state_action: erase sector at address %#x, off = %d\n",
1694 ns->regs.row, NS_RAW_OFFSET(ns));
1695 NS_LOG("erase sector %u\n", erase_block_no);
1696
1697 erase_sector(ns);
1698
1699 NS_MDELAY(erase_delay);
1700
1701 if (erase_block_wear)
1702 update_wear(erase_block_no);
1703
1704 if (erase_error(erase_block_no)) {
1705 NS_WARN("simulating erase failure in erase block %u\n", erase_block_no);
1706 return -1;
1707 }
1708
1709 break;
1710
1711 case ACTION_PRGPAGE:
1712 /*
1713 * Program page - move internal buffer data to the page.
1714 */
1715
1716 if (ns->lines.wp) {
1717 NS_WARN("do_state_action: device is write-protected, programm\n");
1718 return -1;
1719 }
1720
1721 num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1722 if (num != ns->regs.count) {
1723 NS_ERR("do_state_action: too few bytes were input (%d instead of %d)\n",
1724 ns->regs.count, num);
1725 return -1;
1726 }
1727
1728 if (prog_page(ns, num) == -1)
1729 return -1;
1730
1731 page_no = ns->regs.row;
1732
1733 NS_DBG("do_state_action: copy %d bytes from int buf to (%#x, %#x), raw off = %d\n",
1734 num, ns->regs.row, ns->regs.column, NS_RAW_OFFSET(ns) + ns->regs.off);
1735 NS_LOG("programm page %d\n", ns->regs.row);
1736
1737 NS_UDELAY(programm_delay);
1738 NS_UDELAY(output_cycle * ns->geom.pgsz / 1000 / busdiv);
1739
1740 if (write_error(page_no)) {
1741 NS_WARN("simulating write failure in page %u\n", page_no);
1742 return -1;
1743 }
1744
1745 break;
1746
1747 case ACTION_ZEROOFF:
1748 NS_DBG("do_state_action: set internal offset to 0\n");
1749 ns->regs.off = 0;
1750 break;
1751
1752 case ACTION_HALFOFF:
1753 if (!(ns->options & OPT_PAGE512_8BIT)) {
1754 NS_ERR("do_state_action: BUG! can't skip half of page for non-512"
1755 "byte page size 8x chips\n");
1756 return -1;
1757 }
1758 NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz/2);
1759 ns->regs.off = ns->geom.pgsz/2;
1760 break;
1761
1762 case ACTION_OOBOFF:
1763 NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz);
1764 ns->regs.off = ns->geom.pgsz;
1765 break;
1766
1767 default:
1768 NS_DBG("do_state_action: BUG! unknown action\n");
1769 }
1770
1771 return 0;
1772 }
1773
1774 /*
1775 * Switch simulator's state.
1776 */
1777 static void switch_state(struct nandsim *ns)
1778 {
1779 if (ns->op) {
1780 /*
1781 * The current operation have already been identified.
1782 * Just follow the states chain.
1783 */
1784
1785 ns->stateidx += 1;
1786 ns->state = ns->nxstate;
1787 ns->nxstate = ns->op[ns->stateidx + 1];
1788
1789 NS_DBG("switch_state: operation is known, switch to the next state, "
1790 "state: %s, nxstate: %s\n",
1791 get_state_name(ns->state), get_state_name(ns->nxstate));
1792
1793 /* See, whether we need to do some action */
1794 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1795 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1796 return;
1797 }
1798
1799 } else {
1800 /*
1801 * We don't yet know which operation we perform.
1802 * Try to identify it.
1803 */
1804
1805 /*
1806 * The only event causing the switch_state function to
1807 * be called with yet unknown operation is new command.
1808 */
1809 ns->state = get_state_by_command(ns->regs.command);
1810
1811 NS_DBG("switch_state: operation is unknown, try to find it\n");
1812
1813 if (find_operation(ns, 0) != 0)
1814 return;
1815
1816 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1817 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1818 return;
1819 }
1820 }
1821
1822 /* For 16x devices column means the page offset in words */
1823 if ((ns->nxstate & STATE_ADDR_MASK) && ns->busw == 16) {
1824 NS_DBG("switch_state: double the column number for 16x device\n");
1825 ns->regs.column <<= 1;
1826 }
1827
1828 if (NS_STATE(ns->nxstate) == STATE_READY) {
1829 /*
1830 * The current state is the last. Return to STATE_READY
1831 */
1832
1833 u_char status = NS_STATUS_OK(ns);
1834
1835 /* In case of data states, see if all bytes were input/output */
1836 if ((ns->state & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK))
1837 && ns->regs.count != ns->regs.num) {
1838 NS_WARN("switch_state: not all bytes were processed, %d left\n",
1839 ns->regs.num - ns->regs.count);
1840 status = NS_STATUS_FAILED(ns);
1841 }
1842
1843 NS_DBG("switch_state: operation complete, switch to STATE_READY state\n");
1844
1845 switch_to_ready_state(ns, status);
1846
1847 return;
1848 } else if (ns->nxstate & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK)) {
1849 /*
1850 * If the next state is data input/output, switch to it now
1851 */
1852
1853 ns->state = ns->nxstate;
1854 ns->nxstate = ns->op[++ns->stateidx + 1];
1855 ns->regs.num = ns->regs.count = 0;
1856
1857 NS_DBG("switch_state: the next state is data I/O, switch, "
1858 "state: %s, nxstate: %s\n",
1859 get_state_name(ns->state), get_state_name(ns->nxstate));
1860
1861 /*
1862 * Set the internal register to the count of bytes which
1863 * are expected to be input or output
1864 */
1865 switch (NS_STATE(ns->state)) {
1866 case STATE_DATAIN:
1867 case STATE_DATAOUT:
1868 ns->regs.num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1869 break;
1870
1871 case STATE_DATAOUT_ID:
1872 ns->regs.num = ns->geom.idbytes;
1873 break;
1874
1875 case STATE_DATAOUT_STATUS:
1876 case STATE_DATAOUT_STATUS_M:
1877 ns->regs.count = ns->regs.num = 0;
1878 break;
1879
1880 default:
1881 NS_ERR("switch_state: BUG! unknown data state\n");
1882 }
1883
1884 } else if (ns->nxstate & STATE_ADDR_MASK) {
1885 /*
1886 * If the next state is address input, set the internal
1887 * register to the number of expected address bytes
1888 */
1889
1890 ns->regs.count = 0;
1891
1892 switch (NS_STATE(ns->nxstate)) {
1893 case STATE_ADDR_PAGE:
1894 ns->regs.num = ns->geom.pgaddrbytes;
1895
1896 break;
1897 case STATE_ADDR_SEC:
1898 ns->regs.num = ns->geom.secaddrbytes;
1899 break;
1900
1901 case STATE_ADDR_ZERO:
1902 ns->regs.num = 1;
1903 break;
1904
1905 case STATE_ADDR_COLUMN:
1906 /* Column address is always 2 bytes */
1907 ns->regs.num = ns->geom.pgaddrbytes - ns->geom.secaddrbytes;
1908 break;
1909
1910 default:
1911 NS_ERR("switch_state: BUG! unknown address state\n");
1912 }
1913 } else {
1914 /*
1915 * Just reset internal counters.
1916 */
1917
1918 ns->regs.num = 0;
1919 ns->regs.count = 0;
1920 }
1921 }
1922
1923 static u_char ns_nand_read_byte(struct mtd_info *mtd)
1924 {
1925 struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
1926 u_char outb = 0x00;
1927
1928 /* Sanity and correctness checks */
1929 if (!ns->lines.ce) {
1930 NS_ERR("read_byte: chip is disabled, return %#x\n", (uint)outb);
1931 return outb;
1932 }
1933 if (ns->lines.ale || ns->lines.cle) {
1934 NS_ERR("read_byte: ALE or CLE pin is high, return %#x\n", (uint)outb);
1935 return outb;
1936 }
1937 if (!(ns->state & STATE_DATAOUT_MASK)) {
1938 NS_WARN("read_byte: unexpected data output cycle, state is %s "
1939 "return %#x\n", get_state_name(ns->state), (uint)outb);
1940 return outb;
1941 }
1942
1943 /* Status register may be read as many times as it is wanted */
1944 if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS) {
1945 NS_DBG("read_byte: return %#x status\n", ns->regs.status);
1946 return ns->regs.status;
1947 }
1948
1949 /* Check if there is any data in the internal buffer which may be read */
1950 if (ns->regs.count == ns->regs.num) {
1951 NS_WARN("read_byte: no more data to output, return %#x\n", (uint)outb);
1952 return outb;
1953 }
1954
1955 switch (NS_STATE(ns->state)) {
1956 case STATE_DATAOUT:
1957 if (ns->busw == 8) {
1958 outb = ns->buf.byte[ns->regs.count];
1959 ns->regs.count += 1;
1960 } else {
1961 outb = (u_char)cpu_to_le16(ns->buf.word[ns->regs.count >> 1]);
1962 ns->regs.count += 2;
1963 }
1964 break;
1965 case STATE_DATAOUT_ID:
1966 NS_DBG("read_byte: read ID byte %d, total = %d\n", ns->regs.count, ns->regs.num);
1967 outb = ns->ids[ns->regs.count];
1968 ns->regs.count += 1;
1969 break;
1970 default:
1971 BUG();
1972 }
1973
1974 if (ns->regs.count == ns->regs.num) {
1975 NS_DBG("read_byte: all bytes were read\n");
1976
1977 if (NS_STATE(ns->nxstate) == STATE_READY)
1978 switch_state(ns);
1979 }
1980
1981 return outb;
1982 }
1983
1984 static void ns_nand_write_byte(struct mtd_info *mtd, u_char byte)
1985 {
1986 struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
1987
1988 /* Sanity and correctness checks */
1989 if (!ns->lines.ce) {
1990 NS_ERR("write_byte: chip is disabled, ignore write\n");
1991 return;
1992 }
1993 if (ns->lines.ale && ns->lines.cle) {
1994 NS_ERR("write_byte: ALE and CLE pins are high simultaneously, ignore write\n");
1995 return;
1996 }
1997
1998 if (ns->lines.cle == 1) {
1999 /*
2000 * The byte written is a command.
2001 */
2002
2003 if (byte == NAND_CMD_RESET) {
2004 NS_LOG("reset chip\n");
2005 switch_to_ready_state(ns, NS_STATUS_OK(ns));
2006 return;
2007 }
2008
2009 /* Check that the command byte is correct */
2010 if (check_command(byte)) {
2011 NS_ERR("write_byte: unknown command %#x\n", (uint)byte);
2012 return;
2013 }
2014
2015 if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS
2016 || NS_STATE(ns->state) == STATE_DATAOUT_STATUS_M
2017 || NS_STATE(ns->state) == STATE_DATAOUT) {
2018 int row = ns->regs.row;
2019
2020 switch_state(ns);
2021 if (byte == NAND_CMD_RNDOUT)
2022 ns->regs.row = row;
2023 }
2024
2025 /* Check if chip is expecting command */
2026 if (NS_STATE(ns->nxstate) != STATE_UNKNOWN && !(ns->nxstate & STATE_CMD_MASK)) {
2027 /* Do not warn if only 2 id bytes are read */
2028 if (!(ns->regs.command == NAND_CMD_READID &&
2029 NS_STATE(ns->state) == STATE_DATAOUT_ID && ns->regs.count == 2)) {
2030 /*
2031 * We are in situation when something else (not command)
2032 * was expected but command was input. In this case ignore
2033 * previous command(s)/state(s) and accept the last one.
2034 */
2035 NS_WARN("write_byte: command (%#x) wasn't expected, expected state is %s, "
2036 "ignore previous states\n", (uint)byte, get_state_name(ns->nxstate));
2037 }
2038 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2039 }
2040
2041 NS_DBG("command byte corresponding to %s state accepted\n",
2042 get_state_name(get_state_by_command(byte)));
2043 ns->regs.command = byte;
2044 switch_state(ns);
2045
2046 } else if (ns->lines.ale == 1) {
2047 /*
2048 * The byte written is an address.
2049 */
2050
2051 if (NS_STATE(ns->nxstate) == STATE_UNKNOWN) {
2052
2053 NS_DBG("write_byte: operation isn't known yet, identify it\n");
2054
2055 if (find_operation(ns, 1) < 0)
2056 return;
2057
2058 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
2059 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2060 return;
2061 }
2062
2063 ns->regs.count = 0;
2064 switch (NS_STATE(ns->nxstate)) {
2065 case STATE_ADDR_PAGE:
2066 ns->regs.num = ns->geom.pgaddrbytes;
2067 break;
2068 case STATE_ADDR_SEC:
2069 ns->regs.num = ns->geom.secaddrbytes;
2070 break;
2071 case STATE_ADDR_ZERO:
2072 ns->regs.num = 1;
2073 break;
2074 default:
2075 BUG();
2076 }
2077 }
2078
2079 /* Check that chip is expecting address */
2080 if (!(ns->nxstate & STATE_ADDR_MASK)) {
2081 NS_ERR("write_byte: address (%#x) isn't expected, expected state is %s, "
2082 "switch to STATE_READY\n", (uint)byte, get_state_name(ns->nxstate));
2083 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2084 return;
2085 }
2086
2087 /* Check if this is expected byte */
2088 if (ns->regs.count == ns->regs.num) {
2089 NS_ERR("write_byte: no more address bytes expected\n");
2090 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2091 return;
2092 }
2093
2094 accept_addr_byte(ns, byte);
2095
2096 ns->regs.count += 1;
2097
2098 NS_DBG("write_byte: address byte %#x was accepted (%d bytes input, %d expected)\n",
2099 (uint)byte, ns->regs.count, ns->regs.num);
2100
2101 if (ns->regs.count == ns->regs.num) {
2102 NS_DBG("address (%#x, %#x) is accepted\n", ns->regs.row, ns->regs.column);
2103 switch_state(ns);
2104 }
2105
2106 } else {
2107 /*
2108 * The byte written is an input data.
2109 */
2110
2111 /* Check that chip is expecting data input */
2112 if (!(ns->state & STATE_DATAIN_MASK)) {
2113 NS_ERR("write_byte: data input (%#x) isn't expected, state is %s, "
2114 "switch to %s\n", (uint)byte,
2115 get_state_name(ns->state), get_state_name(STATE_READY));
2116 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2117 return;
2118 }
2119
2120 /* Check if this is expected byte */
2121 if (ns->regs.count == ns->regs.num) {
2122 NS_WARN("write_byte: %u input bytes has already been accepted, ignore write\n",
2123 ns->regs.num);
2124 return;
2125 }
2126
2127 if (ns->busw == 8) {
2128 ns->buf.byte[ns->regs.count] = byte;
2129 ns->regs.count += 1;
2130 } else {
2131 ns->buf.word[ns->regs.count >> 1] = cpu_to_le16((uint16_t)byte);
2132 ns->regs.count += 2;
2133 }
2134 }
2135
2136 return;
2137 }
2138
2139 static void ns_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int bitmask)
2140 {
2141 struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
2142
2143 ns->lines.cle = bitmask & NAND_CLE ? 1 : 0;
2144 ns->lines.ale = bitmask & NAND_ALE ? 1 : 0;
2145 ns->lines.ce = bitmask & NAND_NCE ? 1 : 0;
2146
2147 if (cmd != NAND_CMD_NONE)
2148 ns_nand_write_byte(mtd, cmd);
2149 }
2150
2151 static int ns_device_ready(struct mtd_info *mtd)
2152 {
2153 NS_DBG("device_ready\n");
2154 return 1;
2155 }
2156
2157 static uint16_t ns_nand_read_word(struct mtd_info *mtd)
2158 {
2159 struct nand_chip *chip = (struct nand_chip *)mtd->priv;
2160
2161 NS_DBG("read_word\n");
2162
2163 return chip->read_byte(mtd) | (chip->read_byte(mtd) << 8);
2164 }
2165
2166 static void ns_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
2167 {
2168 struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
2169
2170 /* Check that chip is expecting data input */
2171 if (!(ns->state & STATE_DATAIN_MASK)) {
2172 NS_ERR("write_buf: data input isn't expected, state is %s, "
2173 "switch to STATE_READY\n", get_state_name(ns->state));
2174 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2175 return;
2176 }
2177
2178 /* Check if these are expected bytes */
2179 if (ns->regs.count + len > ns->regs.num) {
2180 NS_ERR("write_buf: too many input bytes\n");
2181 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2182 return;
2183 }
2184
2185 memcpy(ns->buf.byte + ns->regs.count, buf, len);
2186 ns->regs.count += len;
2187
2188 if (ns->regs.count == ns->regs.num) {
2189 NS_DBG("write_buf: %d bytes were written\n", ns->regs.count);
2190 }
2191 }
2192
2193 static void ns_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
2194 {
2195 struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
2196
2197 /* Sanity and correctness checks */
2198 if (!ns->lines.ce) {
2199 NS_ERR("read_buf: chip is disabled\n");
2200 return;
2201 }
2202 if (ns->lines.ale || ns->lines.cle) {
2203 NS_ERR("read_buf: ALE or CLE pin is high\n");
2204 return;
2205 }
2206 if (!(ns->state & STATE_DATAOUT_MASK)) {
2207 NS_WARN("read_buf: unexpected data output cycle, current state is %s\n",
2208 get_state_name(ns->state));
2209 return;
2210 }
2211
2212 if (NS_STATE(ns->state) != STATE_DATAOUT) {
2213 int i;
2214
2215 for (i = 0; i < len; i++)
2216 buf[i] = ((struct nand_chip *)mtd->priv)->read_byte(mtd);
2217
2218 return;
2219 }
2220
2221 /* Check if these are expected bytes */
2222 if (ns->regs.count + len > ns->regs.num) {
2223 NS_ERR("read_buf: too many bytes to read\n");
2224 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2225 return;
2226 }
2227
2228 memcpy(buf, ns->buf.byte + ns->regs.count, len);
2229 ns->regs.count += len;
2230
2231 if (ns->regs.count == ns->regs.num) {
2232 if (NS_STATE(ns->nxstate) == STATE_READY)
2233 switch_state(ns);
2234 }
2235
2236 return;
2237 }
2238
2239 /*
2240 * Module initialization function
2241 */
2242 static int __init ns_init_module(void)
2243 {
2244 struct nand_chip *chip;
2245 struct nandsim *nand;
2246 int retval = -ENOMEM, i;
2247
2248 if (bus_width != 8 && bus_width != 16) {
2249 NS_ERR("wrong bus width (%d), use only 8 or 16\n", bus_width);
2250 return -EINVAL;
2251 }
2252
2253 /* Allocate and initialize mtd_info, nand_chip and nandsim structures */
2254 nsmtd = kzalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip)
2255 + sizeof(struct nandsim), GFP_KERNEL);
2256 if (!nsmtd) {
2257 NS_ERR("unable to allocate core structures.\n");
2258 return -ENOMEM;
2259 }
2260 chip = (struct nand_chip *)(nsmtd + 1);
2261 nsmtd->priv = (void *)chip;
2262 nand = (struct nandsim *)(chip + 1);
2263 chip->priv = (void *)nand;
2264
2265 /*
2266 * Register simulator's callbacks.
2267 */
2268 chip->cmd_ctrl = ns_hwcontrol;
2269 chip->read_byte = ns_nand_read_byte;
2270 chip->dev_ready = ns_device_ready;
2271 chip->write_buf = ns_nand_write_buf;
2272 chip->read_buf = ns_nand_read_buf;
2273 chip->read_word = ns_nand_read_word;
2274 chip->ecc.mode = NAND_ECC_SOFT;
2275 /* The NAND_SKIP_BBTSCAN option is necessary for 'overridesize' */
2276 /* and 'badblocks' parameters to work */
2277 chip->options |= NAND_SKIP_BBTSCAN;
2278
2279 switch (bbt) {
2280 case 2:
2281 chip->bbt_options |= NAND_BBT_NO_OOB;
2282 case 1:
2283 chip->bbt_options |= NAND_BBT_USE_FLASH;
2284 case 0:
2285 break;
2286 default:
2287 NS_ERR("bbt has to be 0..2\n");
2288 retval = -EINVAL;
2289 goto error;
2290 }
2291 /*
2292 * Perform minimum nandsim structure initialization to handle
2293 * the initial ID read command correctly
2294 */
2295 if (third_id_byte != 0xFF || fourth_id_byte != 0xFF)
2296 nand->geom.idbytes = 4;
2297 else
2298 nand->geom.idbytes = 2;
2299 nand->regs.status = NS_STATUS_OK(nand);
2300 nand->nxstate = STATE_UNKNOWN;
2301 nand->options |= OPT_PAGE256; /* temporary value */
2302 nand->ids[0] = first_id_byte;
2303 nand->ids[1] = second_id_byte;
2304 nand->ids[2] = third_id_byte;
2305 nand->ids[3] = fourth_id_byte;
2306 if (bus_width == 16) {
2307 nand->busw = 16;
2308 chip->options |= NAND_BUSWIDTH_16;
2309 }
2310
2311 nsmtd->owner = THIS_MODULE;
2312
2313 if ((retval = parse_weakblocks()) != 0)
2314 goto error;
2315
2316 if ((retval = parse_weakpages()) != 0)
2317 goto error;
2318
2319 if ((retval = parse_gravepages()) != 0)
2320 goto error;
2321
2322 retval = nand_scan_ident(nsmtd, 1, NULL);
2323 if (retval) {
2324 NS_ERR("cannot scan NAND Simulator device\n");
2325 if (retval > 0)
2326 retval = -ENXIO;
2327 goto error;
2328 }
2329
2330 if (bch) {
2331 unsigned int eccsteps, eccbytes;
2332 if (!mtd_nand_has_bch()) {
2333 NS_ERR("BCH ECC support is disabled\n");
2334 retval = -EINVAL;
2335 goto error;
2336 }
2337 /* use 512-byte ecc blocks */
2338 eccsteps = nsmtd->writesize/512;
2339 eccbytes = (bch*13+7)/8;
2340 /* do not bother supporting small page devices */
2341 if ((nsmtd->oobsize < 64) || !eccsteps) {
2342 NS_ERR("bch not available on small page devices\n");
2343 retval = -EINVAL;
2344 goto error;
2345 }
2346 if ((eccbytes*eccsteps+2) > nsmtd->oobsize) {
2347 NS_ERR("invalid bch value %u\n", bch);
2348 retval = -EINVAL;
2349 goto error;
2350 }
2351 chip->ecc.mode = NAND_ECC_SOFT_BCH;
2352 chip->ecc.size = 512;
2353 chip->ecc.bytes = eccbytes;
2354 NS_INFO("using %u-bit/%u bytes BCH ECC\n", bch, chip->ecc.size);
2355 }
2356
2357 retval = nand_scan_tail(nsmtd);
2358 if (retval) {
2359 NS_ERR("can't register NAND Simulator\n");
2360 if (retval > 0)
2361 retval = -ENXIO;
2362 goto error;
2363 }
2364
2365 if (overridesize) {
2366 uint64_t new_size = (uint64_t)nsmtd->erasesize << overridesize;
2367 if (new_size >> overridesize != nsmtd->erasesize) {
2368 NS_ERR("overridesize is too big\n");
2369 retval = -EINVAL;
2370 goto err_exit;
2371 }
2372 /* N.B. This relies on nand_scan not doing anything with the size before we change it */
2373 nsmtd->size = new_size;
2374 chip->chipsize = new_size;
2375 chip->chip_shift = ffs(nsmtd->erasesize) + overridesize - 1;
2376 chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
2377 }
2378
2379 if ((retval = setup_wear_reporting(nsmtd)) != 0)
2380 goto err_exit;
2381
2382 if ((retval = nandsim_debugfs_create(nand)) != 0)
2383 goto err_exit;
2384
2385 if ((retval = init_nandsim(nsmtd)) != 0)
2386 goto err_exit;
2387
2388 if ((retval = nand_default_bbt(nsmtd)) != 0)
2389 goto err_exit;
2390
2391 if ((retval = parse_badblocks(nand, nsmtd)) != 0)
2392 goto err_exit;
2393
2394 /* Register NAND partitions */
2395 retval = mtd_device_register(nsmtd, &nand->partitions[0],
2396 nand->nbparts);
2397 if (retval != 0)
2398 goto err_exit;
2399
2400 return 0;
2401
2402 err_exit:
2403 free_nandsim(nand);
2404 nand_release(nsmtd);
2405 for (i = 0;i < ARRAY_SIZE(nand->partitions); ++i)
2406 kfree(nand->partitions[i].name);
2407 error:
2408 kfree(nsmtd);
2409 free_lists();
2410
2411 return retval;
2412 }
2413
2414 module_init(ns_init_module);
2415
2416 /*
2417 * Module clean-up function
2418 */
2419 static void __exit ns_cleanup_module(void)
2420 {
2421 struct nandsim *ns = ((struct nand_chip *)nsmtd->priv)->priv;
2422 int i;
2423
2424 nandsim_debugfs_remove(ns);
2425 free_nandsim(ns); /* Free nandsim private resources */
2426 nand_release(nsmtd); /* Unregister driver */
2427 for (i = 0;i < ARRAY_SIZE(ns->partitions); ++i)
2428 kfree(ns->partitions[i].name);
2429 kfree(nsmtd); /* Free other structures */
2430 free_lists();
2431 }
2432
2433 module_exit(ns_cleanup_module);
2434
2435 MODULE_LICENSE ("GPL");
2436 MODULE_AUTHOR ("Artem B. Bityuckiy");
2437 MODULE_DESCRIPTION ("The NAND flash simulator");
Linux kernel - Deliverables
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